From 80af502dadb201657461ae0c82a227f66282a60e Mon Sep 17 00:00:00 2001
From: Daniel Qarras <dqarras@yahoo.com>
Date: Sun, 12 Jul 2009 04:32:40 -0700
Subject: [PATCH] --- yaml --- r: 155717 b: refs/heads/master c:
 f1c6a58121f9846ac665b0fbd3cbab90ce8bcbac h: refs/heads/master i:   155715:
 0e823336a970a3ec6931a6bb08a87064e4735ca7 v: v3

---
 [refs]                                   | 2 +-
 trunk/arch/x86/kernel/cpu/perf_counter.c | 6 ++----
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/[refs] b/[refs]
index 28d202399ca3..d40a968fdbe5 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: e3d7e183dc276df2fcaf02af173a49ad119ba9f9
+refs/heads/master: f1c6a58121f9846ac665b0fbd3cbab90ce8bcbac
diff --git a/trunk/arch/x86/kernel/cpu/perf_counter.c b/trunk/arch/x86/kernel/cpu/perf_counter.c
index bed1c4c2f251..7e346d4bc0fb 100644
--- a/trunk/arch/x86/kernel/cpu/perf_counter.c
+++ b/trunk/arch/x86/kernel/cpu/perf_counter.c
@@ -1583,10 +1583,8 @@ static int p6_pmu_init(void)
 		break;
 	case 9:
 	case 13:
-		/* for Pentium M, we need to check if PMU exist */
-		rdmsr(MSR_IA32_MISC_ENABLE, low, high);
-		if (low & MSR_IA32_MISC_ENABLE_EMON)
-			break;
+		/* Pentium M */
+		break;
 	default:
 		pr_cont("unsupported p6 CPU model %d ",
 			boot_cpu_data.x86_model);