From 8122a21281aa25fa81591fcad9483ca22bb12357 Mon Sep 17 00:00:00 2001 From: Chris Metcalf Date: Wed, 15 Sep 2010 11:16:10 -0400 Subject: [PATCH] --- yaml --- r: 210735 b: refs/heads/master c: a802fc685426303ab627b7ad3fd5c97b5dea7e00 h: refs/heads/master i: 210733: 7637cb4e84bcb43b6317825647c547d65108e121 210731: 1c14db171b9e271304083600dc8673a8c66f34de 210727: 76b151aa60dd179bd16bac04ebe8593cc10376ad 210719: 996a30e74bff6fefc7ca155796f054bf5d1063e9 v: v3 --- [refs] | 2 +- trunk/arch/tile/include/arch/chip_tile64.h | 3 +++ trunk/arch/tile/include/arch/chip_tilepro.h | 3 +++ trunk/arch/tile/include/asm/processor.h | 12 +++++++++++ trunk/arch/tile/kernel/process.c | 23 ++++++++++++++------- 5 files changed, 35 insertions(+), 8 deletions(-) diff --git a/[refs] b/[refs] index 657abf85053a..35da626c0f5f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 74fca9da097b74117ae2cef9e5f0d9b0e28ccbb7 +refs/heads/master: a802fc685426303ab627b7ad3fd5c97b5dea7e00 diff --git a/trunk/arch/tile/include/arch/chip_tile64.h b/trunk/arch/tile/include/arch/chip_tile64.h index 1246573be59e..261aaba092d4 100644 --- a/trunk/arch/tile/include/arch/chip_tile64.h +++ b/trunk/arch/tile/include/arch/chip_tile64.h @@ -150,6 +150,9 @@ /** Is the PROC_STATUS SPR supported? */ #define CHIP_HAS_PROC_STATUS_SPR() 0 +/** Is the DSTREAM_PF SPR supported? */ +#define CHIP_HAS_DSTREAM_PF() 0 + /** Log of the number of mshims we have. */ #define CHIP_LOG_NUM_MSHIMS() 2 diff --git a/trunk/arch/tile/include/arch/chip_tilepro.h b/trunk/arch/tile/include/arch/chip_tilepro.h index e864c47fc89c..70017699a74c 100644 --- a/trunk/arch/tile/include/arch/chip_tilepro.h +++ b/trunk/arch/tile/include/arch/chip_tilepro.h @@ -150,6 +150,9 @@ /** Is the PROC_STATUS SPR supported? */ #define CHIP_HAS_PROC_STATUS_SPR() 1 +/** Is the DSTREAM_PF SPR supported? */ +#define CHIP_HAS_DSTREAM_PF() 0 + /** Log of the number of mshims we have. */ #define CHIP_LOG_NUM_MSHIMS() 2 diff --git a/trunk/arch/tile/include/asm/processor.h b/trunk/arch/tile/include/asm/processor.h index d942d09b252e..ccd5f8425688 100644 --- a/trunk/arch/tile/include/asm/processor.h +++ b/trunk/arch/tile/include/asm/processor.h @@ -103,6 +103,18 @@ struct thread_struct { /* Any other miscellaneous processor state bits */ unsigned long proc_status; #endif +#if !CHIP_HAS_FIXED_INTVEC_BASE() + /* Interrupt base for PL0 interrupts */ + unsigned long interrupt_vector_base; +#endif +#if CHIP_HAS_TILE_RTF_HWM() + /* Tile cache retry fifo high-water mark */ + unsigned long tile_rtf_hwm; +#endif +#if CHIP_HAS_DSTREAM_PF() + /* Data stream prefetch control */ + unsigned long dstream_pf; +#endif #ifdef CONFIG_HARDWALL /* Is this task tied to an activated hardwall? */ struct hardwall_info *hardwall; diff --git a/trunk/arch/tile/kernel/process.c b/trunk/arch/tile/kernel/process.c index 88be49e3aa25..c37b6e3873c1 100644 --- a/trunk/arch/tile/kernel/process.c +++ b/trunk/arch/tile/kernel/process.c @@ -408,6 +408,15 @@ static void save_arch_state(struct thread_struct *t) #if CHIP_HAS_PROC_STATUS_SPR() t->proc_status = __insn_mfspr(SPR_PROC_STATUS); #endif +#if !CHIP_HAS_FIXED_INTVEC_BASE() + t->interrupt_vector_base = __insn_mfspr(SPR_INTERRUPT_VECTOR_BASE_0); +#endif +#if CHIP_HAS_TILE_RTF_HWM() + t->tile_rtf_hwm = __insn_mfspr(SPR_TILE_RTF_HWM); +#endif +#if CHIP_HAS_DSTREAM_PF() + t->dstream_pf = __insn_mfspr(SPR_DSTREAM_PF); +#endif } static void restore_arch_state(const struct thread_struct *t) @@ -428,14 +437,14 @@ static void restore_arch_state(const struct thread_struct *t) #if CHIP_HAS_PROC_STATUS_SPR() __insn_mtspr(SPR_PROC_STATUS, t->proc_status); #endif +#if !CHIP_HAS_FIXED_INTVEC_BASE() + __insn_mtspr(SPR_INTERRUPT_VECTOR_BASE_0, t->interrupt_vector_base); +#endif #if CHIP_HAS_TILE_RTF_HWM() - /* - * Clear this whenever we switch back to a process in case - * the previous process was monkeying with it. Even if enabled - * in CBOX_MSR1 via TILE_RTF_HWM_MIN, it's still just a - * performance hint, so isn't worth a full save/restore. - */ - __insn_mtspr(SPR_TILE_RTF_HWM, 0); + __insn_mtspr(SPR_TILE_RTF_HWM, t->tile_rtf_hwm); +#endif +#if CHIP_HAS_DSTREAM_PF() + __insn_mtspr(SPR_DSTREAM_PF, t->dstream_pf); #endif }