diff --git a/[refs] b/[refs] index 04b5af971bce..fed7593e4d3c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 1d9c114dc1702306215439cd608047ab639700db +refs/heads/master: 1291417eb61d1cd3fc69e295c2e9b83c5f6a8ff9 diff --git a/trunk/arch/mips/mm/sc-rm7k.c b/trunk/arch/mips/mm/sc-rm7k.c index e3abfb2d7e86..de69bfbf506e 100644 --- a/trunk/arch/mips/mm/sc-rm7k.c +++ b/trunk/arch/mips/mm/sc-rm7k.c @@ -29,7 +29,7 @@ extern unsigned long icache_way_size, dcache_way_size; #include -int rm7k_tcache_enabled; +static int rm7k_tcache_enabled; /* * Writeback and invalidate the primary cache dcache before DMA. @@ -121,7 +121,7 @@ static void rm7k_sc_disable(void) clear_c0_config(RM7K_CONF_SE); } -struct bcache_ops rm7k_sc_ops = { +static struct bcache_ops rm7k_sc_ops = { .bc_enable = rm7k_sc_enable, .bc_disable = rm7k_sc_disable, .bc_wback_inv = rm7k_sc_wback_inv,