From 826b2f96a16754df110aee4b758220863688d493 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 15 Apr 2010 16:54:38 -0400 Subject: [PATCH] --- yaml --- r: 190006 b: refs/heads/master c: b317a9ce2259e64258a802a5ca70dec45ac15dda h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/radeon_encoders.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 7ec720ff6116..7f9c0de36235 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 30f69f3fb20bd719b5e1bf879339914063d38f47 +refs/heads/master: b317a9ce2259e64258a802a5ca70dec45ac15dda diff --git a/trunk/drivers/gpu/drm/radeon/radeon_encoders.c b/trunk/drivers/gpu/drm/radeon/radeon_encoders.c index c52fc3080b67..9f7f56a55f0a 100644 --- a/trunk/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/trunk/drivers/gpu/drm/radeon/radeon_encoders.c @@ -865,6 +865,8 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { if (dig->coherent_mode) args.v3.acConfig.fCoherentMode = 1; + if (radeon_encoder->pixel_clock > 165000) + args.v3.acConfig.fDualLinkConnector = 1; } } else if (ASIC_IS_DCE32(rdev)) { args.v2.acConfig.ucEncoderSel = dig->dig_encoder; @@ -888,6 +890,8 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { if (dig->coherent_mode) args.v2.acConfig.fCoherentMode = 1; + if (radeon_encoder->pixel_clock > 165000) + args.v2.acConfig.fDualLinkConnector = 1; } } else { args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;