From 82953861c88b60ada2ed69a63161ca4b539c047c Mon Sep 17 00:00:00 2001 From: Nick Kossifidis Date: Tue, 23 Nov 2010 20:50:16 +0200 Subject: [PATCH] --- yaml --- r: 224862 b: refs/heads/master c: f7317ba2d669c1b54fb31ed7834361a700a79217 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/wireless/ath/ath5k/dma.c | 14 ++++++++++++++ trunk/drivers/net/wireless/ath/ath5k/qcu.c | 3 --- 3 files changed, 15 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 38a57e1ef685..29c9f44f306f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: b3a28e68d5c8d788a4e538a119a5d326545add8a +refs/heads/master: f7317ba2d669c1b54fb31ed7834361a700a79217 diff --git a/trunk/drivers/net/wireless/ath/ath5k/dma.c b/trunk/drivers/net/wireless/ath/ath5k/dma.c index e39c95340841..bfdfcff42a1e 100644 --- a/trunk/drivers/net/wireless/ath/ath5k/dma.c +++ b/trunk/drivers/net/wireless/ath/ath5k/dma.c @@ -216,6 +216,14 @@ int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue) ath5k_hw_reg_write(ah, tx_queue, AR5K_CR); ath5k_hw_reg_read(ah, AR5K_CR); } else { + + /* + * Enable DCU early termination to quickly + * flush any pending frames from QCU + */ + AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue), + AR5K_QCU_MISC_DCU_EARLY); + /* * Schedule TX disable and wait until queue is empty */ @@ -285,6 +293,12 @@ int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue) queue); } + /* + * Disable DCU early termination + */ + AR5K_REG_DISABLE_BITS(ah, AR5K_QUEUE_MISC(queue), + AR5K_QCU_MISC_DCU_EARLY); + /* Clear register */ ath5k_hw_reg_write(ah, 0, AR5K_QCU_TXD); if (pending) { diff --git a/trunk/drivers/net/wireless/ath/ath5k/qcu.c b/trunk/drivers/net/wireless/ath/ath5k/qcu.c index 52eee34fd54d..ed62273cdf01 100644 --- a/trunk/drivers/net/wireless/ath/ath5k/qcu.c +++ b/trunk/drivers/net/wireless/ath/ath5k/qcu.c @@ -340,9 +340,6 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) /* * Set misc registers */ - /* Enable DCU early termination for this queue */ - AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue), - AR5K_QCU_MISC_DCU_EARLY); /* Enable DCU to wait for next fragment from QCU */ AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_DFS_MISC(queue),