From 82af1f221b0b2af867ccd1e54f45fb8d5879d320 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 22 Sep 2012 10:00:11 -0600 Subject: [PATCH] --- yaml --- r: 331278 b: refs/heads/master c: 5dbd6535d5bcb9d1899dd27d209ca651431df66b h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-omap1/board-htcherald.c | 3 +- trunk/arch/arm/mach-omap1/clock.c | 4 +- trunk/arch/arm/mach-omap1/clock_data.c | 13 +- trunk/arch/arm/mach-omap1/dma.c | 5 +- trunk/arch/arm/mach-omap1/lcd_dma.c | 6 +- trunk/arch/arm/mach-omap1/leds-h2p2-debug.c | 12 +- trunk/arch/arm/mach-omap2/Makefile | 1 - trunk/arch/arm/mach-omap2/board-n8x0.c | 7 +- trunk/arch/arm/mach-omap2/board-overo.c | 6 +- .../arm/mach-omap2/board-zoom-debugboard.c | 7 +- trunk/arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 10 +- trunk/arch/arm/mach-omap2/clkt_clksel.c | 28 +- trunk/arch/arm/mach-omap2/clkt_dpll.c | 12 +- trunk/arch/arm/mach-omap2/clock.c | 20 +- trunk/arch/arm/mach-omap2/clock33xx_data.c | 2 - trunk/arch/arm/mach-omap2/clock3xxx.c | 3 +- trunk/arch/arm/mach-omap2/clockdomain.c | 74 +- .../arm/mach-omap2/common-board-devices.c | 3 +- trunk/arch/arm/mach-omap2/dpll3xxx.c | 11 +- trunk/arch/arm/mach-omap2/gpio.c | 1 - trunk/arch/arm/mach-omap2/gpmc.c | 2 +- trunk/arch/arm/mach-omap2/id.c | 5 +- trunk/arch/arm/mach-omap2/io.c | 2 - trunk/arch/arm/mach-omap2/irq.c | 5 +- trunk/arch/arm/mach-omap2/omap_hwmod.c | 194 +- .../arm/mach-omap2/omap_hwmod_33xx_data.c | 3381 ----------------- trunk/arch/arm/mach-omap2/opp.c | 15 +- trunk/arch/arm/mach-omap2/pm.c | 4 +- trunk/arch/arm/mach-omap2/pm34xx.c | 8 +- trunk/arch/arm/mach-omap2/pm44xx.c | 8 +- trunk/arch/arm/mach-omap2/powerdomain.c | 36 +- .../arm/mach-omap2/powerdomain2xxx_3xxx.c | 4 +- trunk/arch/arm/mach-omap2/powerdomain44xx.c | 4 +- trunk/arch/arm/mach-omap2/prcm.c | 8 +- trunk/arch/arm/mach-omap2/serial.c | 12 +- trunk/arch/arm/mach-omap2/sr_device.c | 13 +- trunk/arch/arm/mach-omap2/timer.c | 2 +- trunk/arch/arm/mach-omap2/vc.c | 5 +- trunk/arch/arm/mach-omap2/voltage.c | 12 +- trunk/arch/arm/mach-omap2/vp.c | 16 +- trunk/arch/arm/plat-omap/dma.c | 51 +- .../arm/plat-omap/include/plat/omap_hwmod.h | 1 - trunk/arch/arm/plat-omap/mux.c | 2 +- trunk/arch/arm/plat-omap/omap-pm-noop.c | 39 +- trunk/arch/arm/plat-omap/omap_device.c | 25 +- 46 files changed, 281 insertions(+), 3803 deletions(-) delete mode 100644 trunk/arch/arm/mach-omap2/omap_hwmod_33xx_data.c diff --git a/[refs] b/[refs] index a1c45de7b489..7dab537d52b0 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 1e2ee2a60df5c3ab74dd1c9155fb01b5bc6f807d +refs/heads/master: 5dbd6535d5bcb9d1899dd27d209ca651431df66b diff --git a/trunk/arch/arm/mach-omap1/board-htcherald.c b/trunk/arch/arm/mach-omap1/board-htcherald.c index 1dcb751b8fe5..a5ac352d68d3 100644 --- a/trunk/arch/arm/mach-omap1/board-htcherald.c +++ b/trunk/arch/arm/mach-omap1/board-htcherald.c @@ -475,7 +475,8 @@ static void __init htcherald_lcd_init(void) break; } if (!tries) - pr_err("Timeout waiting for end of frame -- LCD may not be available\n"); + printk(KERN_WARNING "Timeout waiting for end of frame " + "-- LCD may not be available\n"); /* turn off DMA */ reg = omap_readw(OMAP_DMA_LCD_CCR); diff --git a/trunk/arch/arm/mach-omap1/clock.c b/trunk/arch/arm/mach-omap1/clock.c index 638f4070fc70..a9ee06b6cb42 100644 --- a/trunk/arch/arm/mach-omap1/clock.c +++ b/trunk/arch/arm/mach-omap1/clock.c @@ -587,8 +587,8 @@ void omap1_clk_disable_unused(struct clk *clk) /* Clocks in the DSP domain need api_ck. Just assume bootloader * has not enabled any DSP clocks */ if (clk->enable_reg == DSP_IDLECT2) { - pr_info("Skipping reset check for DSP domain clock \"%s\"\n", - clk->name); + printk(KERN_INFO "Skipping reset check for DSP domain " + "clock \"%s\"\n", clk->name); return; } diff --git a/trunk/arch/arm/mach-omap1/clock_data.c b/trunk/arch/arm/mach-omap1/clock_data.c index 9b45f4b0ee22..6a32b9b0dc30 100644 --- a/trunk/arch/arm/mach-omap1/clock_data.c +++ b/trunk/arch/arm/mach-omap1/clock_data.c @@ -775,10 +775,11 @@ static struct clk_functions omap1_clk_functions = { static void __init omap1_show_rates(void) { - pr_notice("Clocking rate (xtal/DPLL1/MPU): %ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n", - ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10, - ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, - arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); + pr_notice("Clocking rate (xtal/DPLL1/MPU): " + "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n", + ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10, + ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, + arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); } u32 cpu_mask; @@ -839,8 +840,8 @@ int __init omap1_clk_init(void) if (cpu_is_omap16xx() && crystal_type == 2) ck_ref.rate = 19200000; - pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n", - omap_readw(ARM_SYSST), omap_readw(DPLL_CTL), + pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: " + "0x%04x\n", omap_readw(ARM_SYSST), omap_readw(DPLL_CTL), omap_readw(ARM_CKCTL)); /* We want to be in syncronous scalable mode */ diff --git a/trunk/arch/arm/mach-omap1/dma.c b/trunk/arch/arm/mach-omap1/dma.c index 29007fef84cd..b0b0f0f27450 100644 --- a/trunk/arch/arm/mach-omap1/dma.c +++ b/trunk/arch/arm/mach-omap1/dma.c @@ -331,9 +331,8 @@ static int __init omap1_system_dma_init(void) d->chan = kzalloc(sizeof(struct omap_dma_lch) * (d->lch_count), GFP_KERNEL); if (!d->chan) { - dev_err(&pdev->dev, - "%s: Memory allocation failed for d->chan!\n", - __func__); + dev_err(&pdev->dev, "%s: Memory allocation failed" + "for d->chan!!!\n", __func__); goto exit_release_d; } diff --git a/trunk/arch/arm/mach-omap1/lcd_dma.c b/trunk/arch/arm/mach-omap1/lcd_dma.c index ed42628611bc..5769c71815b2 100644 --- a/trunk/arch/arm/mach-omap1/lcd_dma.c +++ b/trunk/arch/arm/mach-omap1/lcd_dma.c @@ -113,7 +113,8 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror); void omap_set_lcd_dma_b1_vxres(unsigned long vxres) { if (cpu_is_omap15xx()) { - pr_err("DMA virtual resolution is not supported in 1510 mode\n"); + printk(KERN_ERR "DMA virtual resolution is not supported " + "in 1510 mode\n"); BUG(); } lcd_dma.vxres = vxres; @@ -436,7 +437,8 @@ static int __init omap_init_lcd_dma(void) r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0, "LCD DMA", NULL); if (r != 0) - pr_err("unable to request IRQ for LCD DMA (error %d)\n", r); + printk(KERN_ERR "unable to request IRQ for LCD DMA " + "(error %d)\n", r); return r; } diff --git a/trunk/arch/arm/mach-omap1/leds-h2p2-debug.c b/trunk/arch/arm/mach-omap1/leds-h2p2-debug.c index 6f958aec9459..7f4bba9fa02e 100644 --- a/trunk/arch/arm/mach-omap1/leds-h2p2-debug.c +++ b/trunk/arch/arm/mach-omap1/leds-h2p2-debug.c @@ -69,13 +69,11 @@ void h2p2_dbg_leds_event(led_event_t evt) gpio_set_value(GPIO_IDLE, 0); } + __raw_writew(~0, &fpga->leds); led_state &= ~LED_STATE_ENABLED; - if (fpga) { - __raw_writew(~0, &fpga->leds); - if (evt == led_halted) { - iounmap(fpga); - fpga = NULL; - } + if (evt == led_halted) { + iounmap(fpga); + fpga = NULL; } goto done; @@ -161,7 +159,7 @@ void h2p2_dbg_leds_event(led_event_t evt) /* * Actually burn the LEDs */ - if (led_state & LED_STATE_ENABLED && fpga) + if (led_state & LED_STATE_ENABLED) __raw_writew(~hw_led_state, &fpga->leds); done: diff --git a/trunk/arch/arm/mach-omap2/Makefile b/trunk/arch/arm/mach-omap2/Makefile index f629df13f157..34c2c7f59f0a 100644 --- a/trunk/arch/arm/mach-omap2/Makefile +++ b/trunk/arch/arm/mach-omap2/Makefile @@ -194,7 +194,6 @@ obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o -obj-$(CONFIG_SOC_AM33XX) += omap_hwmod_33xx_data.o obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o # EMU peripherals diff --git a/trunk/arch/arm/mach-omap2/board-n8x0.c b/trunk/arch/arm/mach-omap2/board-n8x0.c index 4b43fe311571..d8deaea37dca 100644 --- a/trunk/arch/arm/mach-omap2/board-n8x0.c +++ b/trunk/arch/arm/mach-omap2/board-n8x0.c @@ -550,8 +550,8 @@ static int n8x0_auto_sleep_regulators(void) ret = menelaus_set_regulator_sleep(1, val); if (ret < 0) { - pr_err("Could not set regulators to sleep on menelaus: %u\n", - ret); + printk(KERN_ERR "Could not set regulators to sleep on " + "menelaus: %u\n", ret); return ret; } return 0; @@ -563,7 +563,8 @@ static int n8x0_auto_voltage_scale(void) ret = menelaus_set_vcore_hw(1400, 1050); if (ret < 0) { - pr_err("Could not set VCORE voltage on menelaus: %u\n", ret); + printk(KERN_ERR "Could not set VCORE voltage on " + "menelaus: %u\n", ret); return ret; } return 0; diff --git a/trunk/arch/arm/mach-omap2/board-overo.c b/trunk/arch/arm/mach-omap2/board-overo.c index 13c101c2c643..7a62d1322b7a 100644 --- a/trunk/arch/arm/mach-omap2/board-overo.c +++ b/trunk/arch/arm/mach-omap2/board-overo.c @@ -516,7 +516,8 @@ static void __init overo_init(void) udelay(10); gpio_set_value(OVERO_GPIO_W2W_NRESET, 1); } else { - pr_err("could not obtain gpio for OVERO_GPIO_W2W_NRESET\n"); + printk(KERN_ERR "could not obtain gpio for " + "OVERO_GPIO_W2W_NRESET\n"); } ret = gpio_request_array(overo_bt_gpios, ARRAY_SIZE(overo_bt_gpios)); @@ -535,7 +536,8 @@ static void __init overo_init(void) if (ret == 0) gpio_export(OVERO_GPIO_USBH_CPEN, 0); else - pr_err("could not obtain gpio for OVERO_GPIO_USBH_CPEN\n"); + printk(KERN_ERR "could not obtain gpio for " + "OVERO_GPIO_USBH_CPEN\n"); } MACHINE_START(OVERO, "Gumstix Overo") diff --git a/trunk/arch/arm/mach-omap2/board-zoom-debugboard.c b/trunk/arch/arm/mach-omap2/board-zoom-debugboard.c index 0d8d91917d10..5ec069e529e7 100644 --- a/trunk/arch/arm/mach-omap2/board-zoom-debugboard.c +++ b/trunk/arch/arm/mach-omap2/board-zoom-debugboard.c @@ -84,7 +84,8 @@ static inline void __init zoom_init_quaduart(void) quart_cs = ZOOM_QUADUART_CS; if (gpmc_cs_request(quart_cs, SZ_1M, &cs_mem_base) < 0) { - pr_err("Failed to request GPMC mem for Quad UART(TL16CP754C)\n"); + printk(KERN_ERR "Failed to request GPMC mem" + "for Quad UART(TL16CP754C)\n"); return; } @@ -106,8 +107,8 @@ static inline int omap_zoom_debugboard_detect(void) if (gpio_request_one(debug_board_detect, GPIOF_IN, "Zoom debug board detect") < 0) { - pr_err("Failed to request GPIO%d for Zoom debug board detect\n", - debug_board_detect); + printk(KERN_ERR "Failed to request GPIO%d for Zoom debug" + "board detect\n", debug_board_detect); return 0; } diff --git a/trunk/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/trunk/arch/arm/mach-omap2/clkt34xx_dpll3m2.c index 298887b5bf66..d6e34dd9e7e7 100644 --- a/trunk/arch/arm/mach-omap2/clkt34xx_dpll3m2.c +++ b/trunk/arch/arm/mach-omap2/clkt34xx_dpll3m2.c @@ -92,13 +92,15 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) pr_debug("clock: changing CORE DPLL rate from %lu to %lu\n", clk->rate, validrate); - pr_debug("clock: SDRC CS0 timing params used: RFR %08x CTRLA %08x CTRLB %08x MR %08x\n", + pr_debug("clock: SDRC CS0 timing params used:" + " RFR %08x CTRLA %08x CTRLB %08x MR %08x\n", sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla, sdrc_cs0->actim_ctrlb, sdrc_cs0->mr); if (sdrc_cs1) - pr_debug("clock: SDRC CS1 timing params used: RFR %08x CTRLA %08x CTRLB %08x MR %08x\n", - sdrc_cs1->rfr_ctrl, sdrc_cs1->actim_ctrla, - sdrc_cs1->actim_ctrlb, sdrc_cs1->mr); + pr_debug("clock: SDRC CS1 timing params used: " + " RFR %08x CTRLA %08x CTRLB %08x MR %08x\n", + sdrc_cs1->rfr_ctrl, sdrc_cs1->actim_ctrla, + sdrc_cs1->actim_ctrlb, sdrc_cs1->mr); if (sdrc_cs1) omap3_configure_core_dpll( diff --git a/trunk/arch/arm/mach-omap2/clkt_clksel.c b/trunk/arch/arm/mach-omap2/clkt_clksel.c index 19a980956d44..04d551b1f7f7 100644 --- a/trunk/arch/arm/mach-omap2/clkt_clksel.c +++ b/trunk/arch/arm/mach-omap2/clkt_clksel.c @@ -71,8 +71,8 @@ static const struct clksel *_get_clksel_by_parent(struct clk *clk, if (!clks->parent) { /* This indicates a data problem */ - WARN(1, "clock: %s: could not find parent clock %s in clksel array\n", - clk->name, src_clk->name); + WARN(1, "clock: Could not find parent clock %s in clksel array " + "of clock %s\n", src_clk->name, clk->name); return NULL; } @@ -126,8 +126,8 @@ static u8 _get_div_and_fieldval(struct clk *src_clk, struct clk *clk, if (max_div == 0) { /* This indicates an error in the clksel data */ - WARN(1, "clock: %s: could not find divisor for parent %s\n", - clk->name, src_clk->parent->name); + WARN(1, "clock: Could not find divisor for clock %s parent %s" + "\n", clk->name, src_clk->parent->name); return 0; } @@ -191,8 +191,8 @@ static u32 _clksel_to_divisor(struct clk *clk, u32 field_val) if (!clkr->div) { /* This indicates a data error */ - WARN(1, "clock: %s: could not find fieldval %d parent %s\n", - clk->name, field_val, clk->parent->name); + WARN(1, "clock: Could not find fieldval %d for clock %s parent " + "%s\n", field_val, clk->name, clk->parent->name); return 0; } @@ -230,8 +230,8 @@ static u32 _divisor_to_clksel(struct clk *clk, u32 div) } if (!clkr->div) { - pr_err("clock: %s: could not find divisor %d parent %s\n", - clk->name, div, clk->parent->name); + pr_err("clock: Could not find divisor %d for clock %s parent " + "%s\n", div, clk->name, clk->parent->name); return ~0; } @@ -300,8 +300,8 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, /* Sanity check */ if (clkr->div <= last_div) - pr_err("clock: %s: clksel_rate table not sorted", - clk->name); + pr_err("clock: clksel_rate table not sorted " + "for clock %s", clk->name); last_div = clkr->div; @@ -312,8 +312,9 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, } if (!clkr->div) { - pr_err("clock: %s: could not find divisor for target rate %ld parent %s\n", - clk->name, target_rate, clk->parent->name); + pr_err("clock: Could not find divisor for target " + "rate %ld for clock %s parent %s\n", target_rate, + clk->name, clk->parent->name); return ~0; } @@ -358,7 +359,8 @@ void omap2_init_clksel_parent(struct clk *clk) if (clkr->val == r) { if (clk->parent != clks->parent) { - pr_debug("clock: %s: inited parent to %s (was %s)\n", + pr_debug("clock: inited %s parent " + "to %s (was %s)\n", clk->name, clks->parent->name, ((clk->parent) ? clk->parent->name : "NULL")); diff --git a/trunk/arch/arm/mach-omap2/clkt_dpll.c b/trunk/arch/arm/mach-omap2/clkt_dpll.c index 83b658bf385a..ae624c3b832a 100644 --- a/trunk/arch/arm/mach-omap2/clkt_dpll.c +++ b/trunk/arch/arm/mach-omap2/clkt_dpll.c @@ -105,13 +105,13 @@ static int _dpll_test_fint(struct clk *clk, u8 n) } if (fint < fint_min) { - pr_debug("rejecting n=%d due to Fint failure, lowering max_divider\n", - n); + pr_debug("rejecting n=%d due to Fint failure, " + "lowering max_divider\n", n); dd->max_divider = n; ret = DPLL_FINT_UNDERFLOW; } else if (fint > fint_max) { - pr_debug("rejecting n=%d due to Fint failure, boosting min_divider\n", - n); + pr_debug("rejecting n=%d due to Fint failure, " + "boosting min_divider\n", n); dd->min_divider = n; ret = DPLL_FINT_INVALID; } else if (cpu_is_omap3430() && fint > OMAP3430_DPLL_FINT_BAND1_MAX && @@ -211,7 +211,7 @@ void omap2_init_dpll_parent(struct clk *clk) if (v == OMAP3XXX_EN_DPLL_LPBYPASS || v == OMAP3XXX_EN_DPLL_FRBYPASS) clk_reparent(clk, dd->clk_bypass); - } else if (soc_is_am33xx() || cpu_is_omap44xx()) { + } else if (cpu_is_omap44xx()) { if (v == OMAP4XXX_EN_DPLL_LPBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_MNBYPASS) @@ -257,7 +257,7 @@ u32 omap2_get_dpll_rate(struct clk *clk) if (v == OMAP3XXX_EN_DPLL_LPBYPASS || v == OMAP3XXX_EN_DPLL_FRBYPASS) return dd->clk_bypass->rate; - } else if (soc_is_am33xx() || cpu_is_omap44xx()) { + } else if (cpu_is_omap44xx()) { if (v == OMAP4XXX_EN_DPLL_LPBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_MNBYPASS) diff --git a/trunk/arch/arm/mach-omap2/clock.c b/trunk/arch/arm/mach-omap2/clock.c index e97f98ffe8b2..1a1f97f3ca69 100644 --- a/trunk/arch/arm/mach-omap2/clock.c +++ b/trunk/arch/arm/mach-omap2/clock.c @@ -104,8 +104,8 @@ void omap2_init_clk_clkdm(struct clk *clk) clk->name, clk->clkdm_name); clk->clkdm = clkdm; } else { - pr_debug("clock: could not associate clk %s to clkdm %s\n", - clk->name, clk->clkdm_name); + pr_debug("clock: could not associate clk %s to " + "clkdm %s\n", clk->name, clk->clkdm_name); } } @@ -228,7 +228,8 @@ void omap2_dflt_clk_disable(struct clk *clk) * 'Independent' here refers to a clock which is not * controlled by its parent. */ - pr_err("clock: clk_disable called on independent clock %s which has no enable_reg\n", clk->name); + printk(KERN_ERR "clock: clk_disable called on independent " + "clock %s which has no enable_reg\n", clk->name); return; } @@ -271,7 +272,8 @@ const struct clkops clkops_omap2_dflt = { void omap2_clk_disable(struct clk *clk) { if (clk->usecount == 0) { - WARN(1, "clock: %s: omap2_clk_disable() called, but usecount already 0?", clk->name); + WARN(1, "clock: %s: omap2_clk_disable() called, but usecount " + "already 0?", clk->name); return; } @@ -332,8 +334,8 @@ int omap2_clk_enable(struct clk *clk) if (clkdm_control && clk->clkdm) { ret = clkdm_clk_enable(clk->clkdm, clk); if (ret) { - WARN(1, "clock: %s: could not enable clockdomain %s: %d\n", - clk->name, clk->clkdm->name, ret); + WARN(1, "clock: %s: could not enable clockdomain %s: " + "%d\n", clk->name, clk->clkdm->name, ret); goto oce_err2; } } @@ -501,8 +503,10 @@ void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name, hfclkin_rate = clk_get_rate(hfclkin_ck); - pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n", - (hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10), + pr_info("Switched to new clocking rate (Crystal/Core/MPU): " + "%ld.%01ld/%ld/%ld MHz\n", + (hfclkin_rate / 1000000), + ((hfclkin_rate / 100000) % 10), (clk_get_rate(core_ck) / 1000000), (clk_get_rate(mpu_ck) / 1000000)); } diff --git a/trunk/arch/arm/mach-omap2/clock33xx_data.c b/trunk/arch/arm/mach-omap2/clock33xx_data.c index 2026311a4ff6..8e06de665b14 100644 --- a/trunk/arch/arm/mach-omap2/clock33xx_data.c +++ b/trunk/arch/arm/mach-omap2/clock33xx_data.c @@ -1027,9 +1027,7 @@ static struct omap_clk am33xx_clks[] = { CLK(NULL, "cefuse_fck", &cefuse_fck, CK_AM33XX), CLK(NULL, "clkdiv32k_ick", &clkdiv32k_ick, CK_AM33XX), CLK(NULL, "dcan0_fck", &dcan0_fck, CK_AM33XX), - CLK("481cc000.d_can", NULL, &dcan0_fck, CK_AM33XX), CLK(NULL, "dcan1_fck", &dcan1_fck, CK_AM33XX), - CLK("481d0000.d_can", NULL, &dcan1_fck, CK_AM33XX), CLK(NULL, "debugss_ick", &debugss_ick, CK_AM33XX), CLK(NULL, "pruss_ocp_gclk", &pruss_ocp_gclk, CK_AM33XX), CLK("davinci-mcasp.0", NULL, &mcasp0_fck, CK_AM33XX), diff --git a/trunk/arch/arm/mach-omap2/clock3xxx.c b/trunk/arch/arm/mach-omap2/clock3xxx.c index 15cdc6471737..fc2765bcdd40 100644 --- a/trunk/arch/arm/mach-omap2/clock3xxx.c +++ b/trunk/arch/arm/mach-omap2/clock3xxx.c @@ -49,7 +49,8 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate) * on DPLL4. */ if (omap_rev() == OMAP3430_REV_ES1_0) { - pr_err("clock: DPLL4 cannot change rate due to silicon 'Limitation 2.5' on 3430ES1.\n"); + pr_err("clock: DPLL4 cannot change rate due to " + "silicon 'Limitation 2.5' on 3430ES1.\n"); return -EINVAL; } diff --git a/trunk/arch/arm/mach-omap2/clockdomain.c b/trunk/arch/arm/mach-omap2/clockdomain.c index a1555627ad97..8664f5a8bfb6 100644 --- a/trunk/arch/arm/mach-omap2/clockdomain.c +++ b/trunk/arch/arm/mach-omap2/clockdomain.c @@ -174,8 +174,9 @@ void _clkdm_add_autodeps(struct clockdomain *clkdm) if (IS_ERR(autodep->clkdm.ptr)) continue; - pr_debug("clockdomain: %s: adding %s sleepdep/wkdep\n", - clkdm->name, autodep->clkdm.ptr->name); + pr_debug("clockdomain: adding %s sleepdep/wkdep for " + "clkdm %s\n", autodep->clkdm.ptr->name, + clkdm->name); clkdm_add_sleepdep(clkdm, autodep->clkdm.ptr); clkdm_add_wkdep(clkdm, autodep->clkdm.ptr); @@ -204,8 +205,9 @@ void _clkdm_del_autodeps(struct clockdomain *clkdm) if (IS_ERR(autodep->clkdm.ptr)) continue; - pr_debug("clockdomain: %s: removing %s sleepdep/wkdep\n", - clkdm->name, autodep->clkdm.ptr->name); + pr_debug("clockdomain: removing %s sleepdep/wkdep for " + "clkdm %s\n", autodep->clkdm.ptr->name, + clkdm->name); clkdm_del_sleepdep(clkdm, autodep->clkdm.ptr); clkdm_del_wkdep(clkdm, autodep->clkdm.ptr); @@ -467,14 +469,14 @@ int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) ret = -EINVAL; if (ret) { - pr_debug("clockdomain: hardware cannot set/clear wake up of %s when %s wakes up\n", - clkdm1->name, clkdm2->name); + pr_debug("clockdomain: hardware cannot set/clear wake up of " + "%s when %s wakes up\n", clkdm1->name, clkdm2->name); return ret; } if (atomic_inc_return(&cd->wkdep_usecount) == 1) { - pr_debug("clockdomain: hardware will wake up %s when %s wakes up\n", - clkdm1->name, clkdm2->name); + pr_debug("clockdomain: hardware will wake up %s when %s wakes " + "up\n", clkdm1->name, clkdm2->name); ret = arch_clkdm->clkdm_add_wkdep(clkdm1, clkdm2); } @@ -508,14 +510,14 @@ int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) ret = -EINVAL; if (ret) { - pr_debug("clockdomain: hardware cannot set/clear wake up of %s when %s wakes up\n", - clkdm1->name, clkdm2->name); + pr_debug("clockdomain: hardware cannot set/clear wake up of " + "%s when %s wakes up\n", clkdm1->name, clkdm2->name); return ret; } if (atomic_dec_return(&cd->wkdep_usecount) == 0) { - pr_debug("clockdomain: hardware will no longer wake up %s after %s wakes up\n", - clkdm1->name, clkdm2->name); + pr_debug("clockdomain: hardware will no longer wake up %s " + "after %s wakes up\n", clkdm1->name, clkdm2->name); ret = arch_clkdm->clkdm_del_wkdep(clkdm1, clkdm2); } @@ -553,8 +555,8 @@ int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) ret = -EINVAL; if (ret) { - pr_debug("clockdomain: hardware cannot set/clear wake up of %s when %s wakes up\n", - clkdm1->name, clkdm2->name); + pr_debug("clockdomain: hardware cannot set/clear wake up of " + "%s when %s wakes up\n", clkdm1->name, clkdm2->name); return ret; } @@ -611,14 +613,15 @@ int clkdm_add_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) ret = -EINVAL; if (ret) { - pr_debug("clockdomain: hardware cannot set/clear sleep dependency affecting %s from %s\n", - clkdm1->name, clkdm2->name); + pr_debug("clockdomain: hardware cannot set/clear sleep " + "dependency affecting %s from %s\n", clkdm1->name, + clkdm2->name); return ret; } if (atomic_inc_return(&cd->sleepdep_usecount) == 1) { - pr_debug("clockdomain: will prevent %s from sleeping if %s is active\n", - clkdm1->name, clkdm2->name); + pr_debug("clockdomain: will prevent %s from sleeping if %s " + "is active\n", clkdm1->name, clkdm2->name); ret = arch_clkdm->clkdm_add_sleepdep(clkdm1, clkdm2); } @@ -654,14 +657,16 @@ int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) ret = -EINVAL; if (ret) { - pr_debug("clockdomain: hardware cannot set/clear sleep dependency affecting %s from %s\n", - clkdm1->name, clkdm2->name); + pr_debug("clockdomain: hardware cannot set/clear sleep " + "dependency affecting %s from %s\n", clkdm1->name, + clkdm2->name); return ret; } if (atomic_dec_return(&cd->sleepdep_usecount) == 0) { - pr_debug("clockdomain: will no longer prevent %s from sleeping if %s is active\n", - clkdm1->name, clkdm2->name); + pr_debug("clockdomain: will no longer prevent %s from " + "sleeping if %s is active\n", clkdm1->name, + clkdm2->name); ret = arch_clkdm->clkdm_del_sleepdep(clkdm1, clkdm2); } @@ -701,8 +706,9 @@ int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) ret = -EINVAL; if (ret) { - pr_debug("clockdomain: hardware cannot set/clear sleep dependency affecting %s from %s\n", - clkdm1->name, clkdm2->name); + pr_debug("clockdomain: hardware cannot set/clear sleep " + "dependency affecting %s from %s\n", clkdm1->name, + clkdm2->name); return ret; } @@ -749,8 +755,8 @@ int clkdm_sleep(struct clockdomain *clkdm) return -EINVAL; if (!(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { - pr_debug("clockdomain: %s does not support forcing sleep via software\n", - clkdm->name); + pr_debug("clockdomain: %s does not support forcing " + "sleep via software\n", clkdm->name); return -EINVAL; } @@ -784,8 +790,8 @@ int clkdm_wakeup(struct clockdomain *clkdm) return -EINVAL; if (!(clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { - pr_debug("clockdomain: %s does not support forcing wakeup via software\n", - clkdm->name); + pr_debug("clockdomain: %s does not support forcing " + "wakeup via software\n", clkdm->name); return -EINVAL; } @@ -820,8 +826,8 @@ void clkdm_allow_idle(struct clockdomain *clkdm) return; if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) { - pr_debug("clock: %s: automatic idle transitions cannot be enabled\n", - clkdm->name); + pr_debug("clock: automatic idle transitions cannot be enabled " + "on clockdomain %s\n", clkdm->name); return; } @@ -855,8 +861,8 @@ void clkdm_deny_idle(struct clockdomain *clkdm) return; if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) { - pr_debug("clockdomain: %s: automatic idle transitions cannot be disabled\n", - clkdm->name); + pr_debug("clockdomain: automatic idle transitions cannot be " + "disabled on %s\n", clkdm->name); return; } @@ -921,7 +927,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) pwrdm_state_switch(clkdm->pwrdm.ptr); spin_unlock_irqrestore(&clkdm->lock, flags); - pr_debug("clockdomain: %s: enabled\n", clkdm->name); + pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name); return 0; } @@ -946,7 +952,7 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) pwrdm_state_switch(clkdm->pwrdm.ptr); spin_unlock_irqrestore(&clkdm->lock, flags); - pr_debug("clockdomain: %s: disabled\n", clkdm->name); + pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name); return 0; } diff --git a/trunk/arch/arm/mach-omap2/common-board-devices.c b/trunk/arch/arm/mach-omap2/common-board-devices.c index f81dd0a18aaf..013fedc9e131 100644 --- a/trunk/arch/arm/mach-omap2/common-board-devices.c +++ b/trunk/arch/arm/mach-omap2/common-board-devices.c @@ -120,7 +120,8 @@ void __init omap_nand_flash_init(int options, struct mtd_partition *parts, } if (nandcs > GPMC_CS_NUM) { - pr_info("NAND: Unable to find configuration in GPMC\n"); + printk(KERN_INFO "NAND: Unable to find configuration " + "in GPMC\n "); return; } diff --git a/trunk/arch/arm/mach-omap2/dpll3xxx.c b/trunk/arch/arm/mach-omap2/dpll3xxx.c index 27d79deb4ba2..d8318dc5ee91 100644 --- a/trunk/arch/arm/mach-omap2/dpll3xxx.c +++ b/trunk/arch/arm/mach-omap2/dpll3xxx.c @@ -311,7 +311,7 @@ static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel) * Set jitter correction. No jitter correction for OMAP4 and 3630 * since freqsel field is no longer present */ - if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) { + if (!cpu_is_omap44xx() && !cpu_is_omap3630()) { v = __raw_readl(dd->control_reg); v &= ~dd->freqsel_mask; v |= freqsel << __ffs(dd->freqsel_mask); @@ -471,7 +471,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) return -EINVAL; /* No freqsel on OMAP4 and OMAP3630 */ - if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) { + if (!cpu_is_omap44xx() && !cpu_is_omap3630()) { freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n); if (!freqsel) @@ -623,11 +623,8 @@ unsigned long omap3_clkoutx2_recalc(struct clk *clk) while (pclk && !pclk->dpll_data) pclk = pclk->parent; - /* clk does not have a DPLL as a parent? error in the clock data */ - if (!pclk) { - WARN_ON(1); - return 0; - } + /* clk does not have a DPLL as a parent? */ + WARN_ON(!pclk); dd = pclk->dpll_data; diff --git a/trunk/arch/arm/mach-omap2/gpio.c b/trunk/arch/arm/mach-omap2/gpio.c index e7b246da02d0..7b52bdfc59c9 100644 --- a/trunk/arch/arm/mach-omap2/gpio.c +++ b/trunk/arch/arm/mach-omap2/gpio.c @@ -61,7 +61,6 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL); if (!pdata->regs) { pr_err("gpio%d: Memory allocation failed\n", id); - kfree(pdata); return -ENOMEM; } diff --git a/trunk/arch/arm/mach-omap2/gpmc.c b/trunk/arch/arm/mach-omap2/gpmc.c index 72428bd45efc..055ae8bd943f 100644 --- a/trunk/arch/arm/mach-omap2/gpmc.c +++ b/trunk/arch/arm/mach-omap2/gpmc.c @@ -297,7 +297,7 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) div = gpmc_cs_calc_divider(cs, t->sync_clk); if (div < 0) - return div; + return -1; GPMC_SET_ONE(GPMC_CS_CONFIG2, 0, 3, cs_on); GPMC_SET_ONE(GPMC_CS_CONFIG2, 8, 12, cs_rd_off); diff --git a/trunk/arch/arm/mach-omap2/id.c b/trunk/arch/arm/mach-omap2/id.c index 6b98a178fbe0..7219df0e831a 100644 --- a/trunk/arch/arm/mach-omap2/id.c +++ b/trunk/arch/arm/mach-omap2/id.c @@ -161,8 +161,9 @@ void __init omap2xxx_check_revision(void) } if (j == ARRAY_SIZE(omap_ids)) { - pr_err("Unknown OMAP device type. Handling it as OMAP%04x\n", - omap_ids[i].type >> 16); + printk(KERN_ERR "Unknown OMAP device type. " + "Handling it as OMAP%04x\n", + omap_ids[i].type >> 16); j = i; } diff --git a/trunk/arch/arm/mach-omap2/io.c b/trunk/arch/arm/mach-omap2/io.c index 4234d28dc171..0d79c23e9f88 100644 --- a/trunk/arch/arm/mach-omap2/io.c +++ b/trunk/arch/arm/mach-omap2/io.c @@ -524,8 +524,6 @@ void __init am33xx_init_early(void) am33xx_voltagedomains_init(); am33xx_powerdomains_init(); am33xx_clockdomains_init(); - am33xx_hwmod_init(); - omap_hwmod_init_postsetup(); am33xx_clk_init(); } #endif diff --git a/trunk/arch/arm/mach-omap2/irq.c b/trunk/arch/arm/mach-omap2/irq.c index 3926f370448f..efed4f540adb 100644 --- a/trunk/arch/arm/mach-omap2/irq.c +++ b/trunk/arch/arm/mach-omap2/irq.c @@ -108,8 +108,9 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) unsigned long tmp; tmp = intc_bank_read_reg(bank, INTC_REVISION) & 0xff; - pr_info("IRQ: Found an INTC at 0x%p (revision %ld.%ld) with %d interrupts\n", - bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); + printk(KERN_INFO "IRQ: Found an INTC at 0x%p " + "(revision %ld.%ld) with %d interrupts\n", + bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); tmp = intc_bank_read_reg(bank, INTC_SYSCONFIG); tmp |= 1 << 1; /* soft reset */ diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod.c b/trunk/arch/arm/mach-omap2/omap_hwmod.c index 7d843cd3b33d..226d8f73d798 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod.c @@ -149,10 +149,8 @@ #include "powerdomain.h" #include "cm2xxx_3xxx.h" #include "cminst44xx.h" -#include "cm33xx.h" #include "prm2xxx_3xxx.h" #include "prm44xx.h" -#include "prm33xx.h" #include "prminst44xx.h" #include "mux.h" #include "pm.h" @@ -869,26 +867,6 @@ static void _omap4_enable_module(struct omap_hwmod *oh) oh->prcm.omap4.clkctrl_offs); } -/** - * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX - * @oh: struct omap_hwmod * - * - * Enables the PRCM module mode related to the hwmod @oh. - * No return value. - */ -static void _am33xx_enable_module(struct omap_hwmod *oh) -{ - if (!oh->clkdm || !oh->prcm.omap4.modulemode) - return; - - pr_debug("omap_hwmod: %s: %s: %d\n", - oh->name, __func__, oh->prcm.omap4.modulemode); - - am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst, - oh->clkdm->clkdm_offs, - oh->prcm.omap4.clkctrl_offs); -} - /** * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4 * @oh: struct omap_hwmod * @@ -915,31 +893,6 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh) oh->prcm.omap4.clkctrl_offs); } -/** - * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX - * @oh: struct omap_hwmod * - * - * Wait for a module @oh to enter slave idle. Returns 0 if the module - * does not have an IDLEST bit or if the module successfully enters - * slave idle; otherwise, pass along the return value of the - * appropriate *_cm*_wait_module_idle() function. - */ -static int _am33xx_wait_target_disable(struct omap_hwmod *oh) -{ - if (!oh) - return -EINVAL; - - if (oh->_int_flags & _HWMOD_NO_MPU_PORT) - return 0; - - if (oh->flags & HWMOD_NO_IDLEST) - return 0; - - return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst, - oh->clkdm->clkdm_offs, - oh->prcm.omap4.clkctrl_offs); -} - /** * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh * @oh: struct omap_hwmod *oh @@ -1485,8 +1438,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) * Return the bit position of the reset line that match the * input name. Return -ENOENT if not found. */ -static int _lookup_hardreset(struct omap_hwmod *oh, const char *name, - struct omap_hwmod_rst_info *ohri) +static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name, + struct omap_hwmod_rst_info *ohri) { int i; @@ -1522,7 +1475,7 @@ static int _lookup_hardreset(struct omap_hwmod *oh, const char *name, static int _assert_hardreset(struct omap_hwmod *oh, const char *name) { struct omap_hwmod_rst_info ohri; - int ret = -EINVAL; + u8 ret = -EINVAL; if (!oh) return -EINVAL; @@ -1531,7 +1484,7 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name) return -ENOSYS; ret = _lookup_hardreset(oh, name, &ohri); - if (ret < 0) + if (IS_ERR_VALUE(ret)) return ret; ret = soc_ops.assert_hardreset(oh, &ohri); @@ -1589,7 +1542,7 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) static int _read_hardreset(struct omap_hwmod *oh, const char *name) { struct omap_hwmod_rst_info ohri; - int ret = -EINVAL; + u8 ret = -EINVAL; if (!oh) return -EINVAL; @@ -1598,7 +1551,7 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name) return -ENOSYS; ret = _lookup_hardreset(oh, name, &ohri); - if (ret < 0) + if (IS_ERR_VALUE(ret)) return ret; return soc_ops.is_hardreset_asserted(oh, &ohri); @@ -1660,36 +1613,6 @@ static int _omap4_disable_module(struct omap_hwmod *oh) return 0; } -/** - * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX - * @oh: struct omap_hwmod * - * - * Disable the PRCM module mode related to the hwmod @oh. - * Return EINVAL if the modulemode is not supported and 0 in case of success. - */ -static int _am33xx_disable_module(struct omap_hwmod *oh) -{ - int v; - - if (!oh->clkdm || !oh->prcm.omap4.modulemode) - return -EINVAL; - - pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); - - am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs, - oh->prcm.omap4.clkctrl_offs); - - if (_are_any_hardreset_lines_asserted(oh)) - return 0; - - v = _am33xx_wait_target_disable(oh); - if (v) - pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", - oh->name); - - return 0; -} - /** * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit * @oh: struct omap_hwmod * @@ -1718,8 +1641,8 @@ static int _ocp_softreset(struct omap_hwmod *oh) /* clocks must be on for this operation */ if (oh->_state != _HWMOD_STATE_ENABLED) { - pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n", - oh->name); + pr_warning("omap_hwmod: %s: reset can only be entered from " + "enabled state\n", oh->name); return -EINVAL; } @@ -2625,33 +2548,6 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh) oh->prcm.omap4.clkctrl_offs); } -/** - * _am33xx_wait_target_ready - wait for a module to leave slave idle - * @oh: struct omap_hwmod * - * - * Wait for a module @oh to leave slave idle. Returns 0 if the module - * does not have an IDLEST bit or if the module successfully leaves - * slave idle; otherwise, pass along the return value of the - * appropriate *_cm*_wait_module_ready() function. - */ -static int _am33xx_wait_target_ready(struct omap_hwmod *oh) -{ - if (!oh || !oh->clkdm) - return -EINVAL; - - if (oh->flags & HWMOD_NO_IDLEST) - return 0; - - if (!_find_mpu_rt_port(oh)) - return 0; - - /* XXX check module SIDLEMODE, hardreset status */ - - return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst, - oh->clkdm->clkdm_offs, - oh->prcm.omap4.clkctrl_offs); -} - /** * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args * @oh: struct omap_hwmod * to assert hardreset @@ -2783,72 +2679,6 @@ static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh, oh->prcm.omap4.rstctrl_offs); } -/** - * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to assert hardreset - * @ohri: hardreset line data - * - * Call am33xx_prminst_assert_hardreset() with parameters extracted - * from the hwmod @oh and the hardreset line data @ohri. Only - * intended for use as an soc_ops function pointer. Passes along the - * return value from am33xx_prminst_assert_hardreset(). XXX This - * function is scheduled for removal when the PRM code is moved into - * drivers/. - */ -static int _am33xx_assert_hardreset(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) - -{ - return am33xx_prm_assert_hardreset(ohri->rst_shift, - oh->clkdm->pwrdm.ptr->prcm_offs, - oh->prcm.omap4.rstctrl_offs); -} - -/** - * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to deassert hardreset - * @ohri: hardreset line data - * - * Call am33xx_prminst_deassert_hardreset() with parameters extracted - * from the hwmod @oh and the hardreset line data @ohri. Only - * intended for use as an soc_ops function pointer. Passes along the - * return value from am33xx_prminst_deassert_hardreset(). XXX This - * function is scheduled for removal when the PRM code is moved into - * drivers/. - */ -static int _am33xx_deassert_hardreset(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - if (ohri->st_shift) - pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", - oh->name, ohri->name); - - return am33xx_prm_deassert_hardreset(ohri->rst_shift, - oh->clkdm->pwrdm.ptr->prcm_offs, - oh->prcm.omap4.rstctrl_offs, - oh->prcm.omap4.rstst_offs); -} - -/** - * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to test hardreset - * @ohri: hardreset line data - * - * Call am33xx_prminst_is_hardreset_asserted() with parameters - * extracted from the hwmod @oh and the hardreset line data @ohri. - * Only intended for use as an soc_ops function pointer. Passes along - * the return value from am33xx_prminst_is_hardreset_asserted(). XXX - * This function is scheduled for removal when the PRM code is moved - * into drivers/. - */ -static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - return am33xx_prm_is_hardreset_asserted(ohri->rst_shift, - oh->clkdm->pwrdm.ptr->prcm_offs, - oh->prcm.omap4.rstctrl_offs); -} - /* Public functions */ u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) @@ -3848,14 +3678,6 @@ void __init omap_hwmod_init(void) soc_ops.deassert_hardreset = _omap4_deassert_hardreset; soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; soc_ops.init_clkdm = _init_clkdm; - } else if (soc_is_am33xx()) { - soc_ops.enable_module = _am33xx_enable_module; - soc_ops.disable_module = _am33xx_disable_module; - soc_ops.wait_target_ready = _am33xx_wait_target_ready; - soc_ops.assert_hardreset = _am33xx_assert_hardreset; - soc_ops.deassert_hardreset = _am33xx_deassert_hardreset; - soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted; - soc_ops.init_clkdm = _init_clkdm; } else { WARN(1, "omap_hwmod: unknown SoC type\n"); } diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_33xx_data.c deleted file mode 100644 index 22433cb2bec0..000000000000 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ /dev/null @@ -1,3381 +0,0 @@ -/* - * omap_hwmod_33xx_data.c: Hardware modules present on the AM33XX chips - * - * Copyright (C) {2012} Texas Instruments Incorporated - http://www.ti.com/ - * - * This file is automatically generated from the AM33XX hardware databases. - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include "omap_hwmod_common_data.h" - -#include "control.h" -#include "cm33xx.h" -#include "prm33xx.h" -#include "prm-regbits-33xx.h" - -/* - * IP blocks - */ - -/* - * 'emif_fw' class - * instance(s): emif_fw - */ -static struct omap_hwmod_class am33xx_emif_fw_hwmod_class = { - .name = "emif_fw", -}; - -/* emif_fw */ -static struct omap_hwmod am33xx_emif_fw_hwmod = { - .name = "emif_fw", - .class = &am33xx_emif_fw_hwmod_class, - .clkdm_name = "l4fw_clkdm", - .main_clk = "l4fw_gclk", - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_EMIF_FW_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'emif' class - * instance(s): emif - */ -static struct omap_hwmod_class_sysconfig am33xx_emif_sysc = { - .rev_offs = 0x0000, -}; - -static struct omap_hwmod_class am33xx_emif_hwmod_class = { - .name = "emif", - .sysc = &am33xx_emif_sysc, -}; - -static struct omap_hwmod_irq_info am33xx_emif_irqs[] = { - { .name = "ddrerr0", .irq = 101 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -/* emif */ -static struct omap_hwmod am33xx_emif_hwmod = { - .name = "emif", - .class = &am33xx_emif_hwmod_class, - .clkdm_name = "l3_clkdm", - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .mpu_irqs = am33xx_emif_irqs, - .main_clk = "dpll_ddr_m2_div2_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_EMIF_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'l3' class - * instance(s): l3_main, l3_s, l3_instr - */ -static struct omap_hwmod_class am33xx_l3_hwmod_class = { - .name = "l3", -}; - -/* l3_main (l3_fast) */ -static struct omap_hwmod_irq_info am33xx_l3_main_irqs[] = { - { .name = "l3debug", .irq = 9 + OMAP_INTC_START, }, - { .name = "l3appint", .irq = 10 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_l3_main_hwmod = { - .name = "l3_main", - .class = &am33xx_l3_hwmod_class, - .clkdm_name = "l3_clkdm", - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .mpu_irqs = am33xx_l3_main_irqs, - .main_clk = "l3_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_L3_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* l3_s */ -static struct omap_hwmod am33xx_l3_s_hwmod = { - .name = "l3_s", - .class = &am33xx_l3_hwmod_class, - .clkdm_name = "l3s_clkdm", -}; - -/* l3_instr */ -static struct omap_hwmod am33xx_l3_instr_hwmod = { - .name = "l3_instr", - .class = &am33xx_l3_hwmod_class, - .clkdm_name = "l3_clkdm", - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .main_clk = "l3_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'l4' class - * instance(s): l4_ls, l4_hs, l4_wkup, l4_fw - */ -static struct omap_hwmod_class am33xx_l4_hwmod_class = { - .name = "l4", -}; - -/* l4_ls */ -static struct omap_hwmod am33xx_l4_ls_hwmod = { - .name = "l4_ls", - .class = &am33xx_l4_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_L4LS_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* l4_hs */ -static struct omap_hwmod am33xx_l4_hs_hwmod = { - .name = "l4_hs", - .class = &am33xx_l4_hwmod_class, - .clkdm_name = "l4hs_clkdm", - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .main_clk = "l4hs_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_L4HS_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - - -/* l4_wkup */ -static struct omap_hwmod am33xx_l4_wkup_hwmod = { - .name = "l4_wkup", - .class = &am33xx_l4_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* l4_fw */ -static struct omap_hwmod am33xx_l4_fw_hwmod = { - .name = "l4_fw", - .class = &am33xx_l4_hwmod_class, - .clkdm_name = "l4fw_clkdm", - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_L4FW_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'mpu' class - */ -static struct omap_hwmod_class am33xx_mpu_hwmod_class = { - .name = "mpu", -}; - -/* mpu */ -static struct omap_hwmod_irq_info am33xx_mpu_irqs[] = { - { .name = "emuint", .irq = 0 + OMAP_INTC_START, }, - { .name = "commtx", .irq = 1 + OMAP_INTC_START, }, - { .name = "commrx", .irq = 2 + OMAP_INTC_START, }, - { .name = "bench", .irq = 3 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_mpu_hwmod = { - .name = "mpu", - .class = &am33xx_mpu_hwmod_class, - .clkdm_name = "mpu_clkdm", - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .mpu_irqs = am33xx_mpu_irqs, - .main_clk = "dpll_mpu_m2_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_MPU_MPU_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'wakeup m3' class - * Wakeup controller sub-system under wakeup domain - */ -static struct omap_hwmod_class am33xx_wkup_m3_hwmod_class = { - .name = "wkup_m3", -}; - -static struct omap_hwmod_rst_info am33xx_wkup_m3_resets[] = { - { .name = "wkup_m3", .rst_shift = 3, .st_shift = 5 }, -}; - -static struct omap_hwmod_irq_info am33xx_wkup_m3_irqs[] = { - { .name = "txev", .irq = 78 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -/* wkup_m3 */ -static struct omap_hwmod am33xx_wkup_m3_hwmod = { - .name = "wkup_m3", - .class = &am33xx_wkup_m3_hwmod_class, - .clkdm_name = "l4_wkup_aon_clkdm", - .flags = HWMOD_INIT_NO_RESET, /* Keep hardreset asserted */ - .mpu_irqs = am33xx_wkup_m3_irqs, - .main_clk = "dpll_core_m4_div2_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET, - .rstctrl_offs = AM33XX_RM_WKUP_RSTCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .rst_lines = am33xx_wkup_m3_resets, - .rst_lines_cnt = ARRAY_SIZE(am33xx_wkup_m3_resets), -}; - -/* - * 'pru-icss' class - * Programmable Real-Time Unit and Industrial Communication Subsystem - */ -static struct omap_hwmod_class am33xx_pruss_hwmod_class = { - .name = "pruss", -}; - -static struct omap_hwmod_rst_info am33xx_pruss_resets[] = { - { .name = "pruss", .rst_shift = 1 }, -}; - -static struct omap_hwmod_irq_info am33xx_pruss_irqs[] = { - { .name = "evtout0", .irq = 20 + OMAP_INTC_START, }, - { .name = "evtout1", .irq = 21 + OMAP_INTC_START, }, - { .name = "evtout2", .irq = 22 + OMAP_INTC_START, }, - { .name = "evtout3", .irq = 23 + OMAP_INTC_START, }, - { .name = "evtout4", .irq = 24 + OMAP_INTC_START, }, - { .name = "evtout5", .irq = 25 + OMAP_INTC_START, }, - { .name = "evtout6", .irq = 26 + OMAP_INTC_START, }, - { .name = "evtout7", .irq = 27 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -/* pru-icss */ -/* Pseudo hwmod for reset control purpose only */ -static struct omap_hwmod am33xx_pruss_hwmod = { - .name = "pruss", - .class = &am33xx_pruss_hwmod_class, - .clkdm_name = "pruss_ocp_clkdm", - .mpu_irqs = am33xx_pruss_irqs, - .main_clk = "pruss_ocp_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_PRUSS_CLKCTRL_OFFSET, - .rstctrl_offs = AM33XX_RM_PER_RSTCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .rst_lines = am33xx_pruss_resets, - .rst_lines_cnt = ARRAY_SIZE(am33xx_pruss_resets), -}; - -/* gfx */ -/* Pseudo hwmod for reset control purpose only */ -static struct omap_hwmod_class am33xx_gfx_hwmod_class = { - .name = "gfx", -}; - -static struct omap_hwmod_rst_info am33xx_gfx_resets[] = { - { .name = "gfx", .rst_shift = 0 }, -}; - -static struct omap_hwmod_irq_info am33xx_gfx_irqs[] = { - { .name = "gfxint", .irq = 37 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_gfx_hwmod = { - .name = "gfx", - .class = &am33xx_gfx_hwmod_class, - .clkdm_name = "gfx_l3_clkdm", - .mpu_irqs = am33xx_gfx_irqs, - .main_clk = "gfx_fck_div_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_GFX_GFX_CLKCTRL_OFFSET, - .rstctrl_offs = AM33XX_RM_GFX_RSTCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .rst_lines = am33xx_gfx_resets, - .rst_lines_cnt = ARRAY_SIZE(am33xx_gfx_resets), -}; - -/* - * 'prcm' class - * power and reset manager (whole prcm infrastructure) - */ -static struct omap_hwmod_class am33xx_prcm_hwmod_class = { - .name = "prcm", -}; - -/* prcm */ -static struct omap_hwmod am33xx_prcm_hwmod = { - .name = "prcm", - .class = &am33xx_prcm_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", -}; - -/* - * 'adc/tsc' class - * TouchScreen Controller (Anolog-To-Digital Converter) - */ -static struct omap_hwmod_class_sysconfig am33xx_adc_tsc_sysc = { - .rev_offs = 0x00, - .sysc_offs = 0x10, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class am33xx_adc_tsc_hwmod_class = { - .name = "adc_tsc", - .sysc = &am33xx_adc_tsc_sysc, -}; - -static struct omap_hwmod_irq_info am33xx_adc_tsc_irqs[] = { - { .irq = 16 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_adc_tsc_hwmod = { - .name = "adc_tsc", - .class = &am33xx_adc_tsc_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .mpu_irqs = am33xx_adc_tsc_irqs, - .main_clk = "adc_tsc_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_WKUP_ADC_TSC_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * Modules omap_hwmod structures - * - * The following IPs are excluded for the moment because: - * - They do not need an explicit SW control using omap_hwmod API. - * - They still need to be validated with the driver - * properly adapted to omap_hwmod / omap_device - * - * - cEFUSE (doesn't fall under any ocp_if) - * - clkdiv32k - * - debugss - * - ocmc ram - * - ocp watch point - * - aes0 - * - sha0 - */ -#if 0 -/* - * 'cefuse' class - */ -static struct omap_hwmod_class am33xx_cefuse_hwmod_class = { - .name = "cefuse", -}; - -static struct omap_hwmod am33xx_cefuse_hwmod = { - .name = "cefuse", - .class = &am33xx_cefuse_hwmod_class, - .clkdm_name = "l4_cefuse_clkdm", - .main_clk = "cefuse_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'clkdiv32k' class - */ -static struct omap_hwmod_class am33xx_clkdiv32k_hwmod_class = { - .name = "clkdiv32k", -}; - -static struct omap_hwmod am33xx_clkdiv32k_hwmod = { - .name = "clkdiv32k", - .class = &am33xx_clkdiv32k_hwmod_class, - .clkdm_name = "clk_24mhz_clkdm", - .main_clk = "clkdiv32k_ick", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_CLKDIV32K_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'debugss' class - * debug sub system - */ -static struct omap_hwmod_class am33xx_debugss_hwmod_class = { - .name = "debugss", -}; - -static struct omap_hwmod am33xx_debugss_hwmod = { - .name = "debugss", - .class = &am33xx_debugss_hwmod_class, - .clkdm_name = "l3_aon_clkdm", - .main_clk = "debugss_ick", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_WKUP_DEBUGSS_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* ocmcram */ -static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = { - .name = "ocmcram", -}; - -static struct omap_hwmod am33xx_ocmcram_hwmod = { - .name = "ocmcram", - .class = &am33xx_ocmcram_hwmod_class, - .clkdm_name = "l3_clkdm", - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .main_clk = "l3_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* ocpwp */ -static struct omap_hwmod_class am33xx_ocpwp_hwmod_class = { - .name = "ocpwp", -}; - -static struct omap_hwmod am33xx_ocpwp_hwmod = { - .name = "ocpwp", - .class = &am33xx_ocpwp_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_OCPWP_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'aes' class - */ -static struct omap_hwmod_class am33xx_aes_hwmod_class = { - .name = "aes", -}; - -static struct omap_hwmod_irq_info am33xx_aes0_irqs[] = { - { .irq = 102 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_aes0_hwmod = { - .name = "aes0", - .class = &am33xx_aes_hwmod_class, - .clkdm_name = "l3_clkdm", - .mpu_irqs = am33xx_aes0_irqs, - .main_clk = "l3_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_AES0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* sha0 */ -static struct omap_hwmod_class am33xx_sha0_hwmod_class = { - .name = "sha0", -}; - -static struct omap_hwmod_irq_info am33xx_sha0_irqs[] = { - { .irq = 108 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_sha0_hwmod = { - .name = "sha0", - .class = &am33xx_sha0_hwmod_class, - .clkdm_name = "l3_clkdm", - .mpu_irqs = am33xx_sha0_irqs, - .main_clk = "l3_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_SHA0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -#endif - -/* 'smartreflex' class */ -static struct omap_hwmod_class am33xx_smartreflex_hwmod_class = { - .name = "smartreflex", -}; - -/* smartreflex0 */ -static struct omap_hwmod_irq_info am33xx_smartreflex0_irqs[] = { - { .irq = 120 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_smartreflex0_hwmod = { - .name = "smartreflex0", - .class = &am33xx_smartreflex_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .mpu_irqs = am33xx_smartreflex0_irqs, - .main_clk = "smartreflex0_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* smartreflex1 */ -static struct omap_hwmod_irq_info am33xx_smartreflex1_irqs[] = { - { .irq = 121 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_smartreflex1_hwmod = { - .name = "smartreflex1", - .class = &am33xx_smartreflex_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .mpu_irqs = am33xx_smartreflex1_irqs, - .main_clk = "smartreflex1_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'control' module class - */ -static struct omap_hwmod_class am33xx_control_hwmod_class = { - .name = "control", -}; - -static struct omap_hwmod_irq_info am33xx_control_irqs[] = { - { .irq = 8 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_control_hwmod = { - .name = "control", - .class = &am33xx_control_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .mpu_irqs = am33xx_control_irqs, - .main_clk = "dpll_core_m4_div2_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_WKUP_CONTROL_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'cpgmac' class - * cpsw/cpgmac sub system - */ -static struct omap_hwmod_class_sysconfig am33xx_cpgmac_sysc = { - .rev_offs = 0x0, - .sysc_offs = 0x8, - .syss_offs = 0x4, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | MSTANDBY_FORCE | - MSTANDBY_NO), - .sysc_fields = &omap_hwmod_sysc_type3, -}; - -static struct omap_hwmod_class am33xx_cpgmac0_hwmod_class = { - .name = "cpgmac0", - .sysc = &am33xx_cpgmac_sysc, -}; - -static struct omap_hwmod_irq_info am33xx_cpgmac0_irqs[] = { - { .name = "c0_rx_thresh_pend", .irq = 40 + OMAP_INTC_START, }, - { .name = "c0_rx_pend", .irq = 41 + OMAP_INTC_START, }, - { .name = "c0_tx_pend", .irq = 42 + OMAP_INTC_START, }, - { .name = "c0_misc_pend", .irq = 43 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_cpgmac0_hwmod = { - .name = "cpgmac0", - .class = &am33xx_cpgmac0_hwmod_class, - .clkdm_name = "cpsw_125mhz_clkdm", - .mpu_irqs = am33xx_cpgmac0_irqs, - .main_clk = "cpsw_125mhz_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_CPGMAC0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * dcan class - */ -static struct omap_hwmod_class am33xx_dcan_hwmod_class = { - .name = "d_can", -}; - -/* dcan0 */ -static struct omap_hwmod_irq_info am33xx_dcan0_irqs[] = { - { .name = "d_can_ms", .irq = 52 + OMAP_INTC_START, }, - { .name = "d_can_mo", .irq = 53 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_dcan0_hwmod = { - .name = "d_can0", - .class = &am33xx_dcan_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_dcan0_irqs, - .main_clk = "dcan0_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_DCAN0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* dcan1 */ -static struct omap_hwmod_irq_info am33xx_dcan1_irqs[] = { - { .name = "d_can_ms", .irq = 55 + OMAP_INTC_START, }, - { .name = "d_can_mo", .irq = 56 + OMAP_INTC_START, }, - { .irq = -1 }, -}; -static struct omap_hwmod am33xx_dcan1_hwmod = { - .name = "d_can1", - .class = &am33xx_dcan_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_dcan1_irqs, - .main_clk = "dcan1_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_DCAN1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* elm */ -static struct omap_hwmod_class_sysconfig am33xx_elm_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class am33xx_elm_hwmod_class = { - .name = "elm", - .sysc = &am33xx_elm_sysc, -}; - -static struct omap_hwmod_irq_info am33xx_elm_irqs[] = { - { .irq = 4 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_elm_hwmod = { - .name = "elm", - .class = &am33xx_elm_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_elm_irqs, - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_ELM_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'epwmss' class: ecap0,1,2, ehrpwm0,1,2 - */ -static struct omap_hwmod_class_sysconfig am33xx_epwmss_sysc = { - .rev_offs = 0x0, - .sysc_offs = 0x4, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | - MSTANDBY_SMART | MSTANDBY_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class am33xx_epwmss_hwmod_class = { - .name = "epwmss", - .sysc = &am33xx_epwmss_sysc, -}; - -/* ehrpwm0 */ -static struct omap_hwmod_irq_info am33xx_ehrpwm0_irqs[] = { - { .name = "int", .irq = 86 + OMAP_INTC_START, }, - { .name = "tzint", .irq = 58 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_ehrpwm0_hwmod = { - .name = "ehrpwm0", - .class = &am33xx_epwmss_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_ehrpwm0_irqs, - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_EPWMSS0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* ehrpwm1 */ -static struct omap_hwmod_irq_info am33xx_ehrpwm1_irqs[] = { - { .name = "int", .irq = 87 + OMAP_INTC_START, }, - { .name = "tzint", .irq = 59 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_ehrpwm1_hwmod = { - .name = "ehrpwm1", - .class = &am33xx_epwmss_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_ehrpwm1_irqs, - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_EPWMSS1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* ehrpwm2 */ -static struct omap_hwmod_irq_info am33xx_ehrpwm2_irqs[] = { - { .name = "int", .irq = 39 + OMAP_INTC_START, }, - { .name = "tzint", .irq = 60 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_ehrpwm2_hwmod = { - .name = "ehrpwm2", - .class = &am33xx_epwmss_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_ehrpwm2_irqs, - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_EPWMSS2_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* ecap0 */ -static struct omap_hwmod_irq_info am33xx_ecap0_irqs[] = { - { .irq = 31 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_ecap0_hwmod = { - .name = "ecap0", - .class = &am33xx_epwmss_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_ecap0_irqs, - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_EPWMSS0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* ecap1 */ -static struct omap_hwmod_irq_info am33xx_ecap1_irqs[] = { - { .irq = 47 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_ecap1_hwmod = { - .name = "ecap1", - .class = &am33xx_epwmss_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_ecap1_irqs, - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_EPWMSS1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* ecap2 */ -static struct omap_hwmod_irq_info am33xx_ecap2_irqs[] = { - { .irq = 61 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_ecap2_hwmod = { - .name = "ecap2", - .mpu_irqs = am33xx_ecap2_irqs, - .class = &am33xx_epwmss_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_EPWMSS2_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'gpio' class: for gpio 0,1,2,3 - */ -static struct omap_hwmod_class_sysconfig am33xx_gpio_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0114, - .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_ENAWAKEUP | - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class am33xx_gpio_hwmod_class = { - .name = "gpio", - .sysc = &am33xx_gpio_sysc, - .rev = 2, -}; - -static struct omap_gpio_dev_attr gpio_dev_attr = { - .bank_width = 32, - .dbck_flag = true, -}; - -/* gpio0 */ -static struct omap_hwmod_opt_clk gpio0_opt_clks[] = { - { .role = "dbclk", .clk = "gpio0_dbclk" }, -}; - -static struct omap_hwmod_irq_info am33xx_gpio0_irqs[] = { - { .irq = 96 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_gpio0_hwmod = { - .name = "gpio1", - .class = &am33xx_gpio_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = am33xx_gpio0_irqs, - .main_clk = "dpll_core_m4_div2_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_WKUP_GPIO0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .opt_clks = gpio0_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio0_opt_clks), - .dev_attr = &gpio_dev_attr, -}; - -/* gpio1 */ -static struct omap_hwmod_irq_info am33xx_gpio1_irqs[] = { - { .irq = 98 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { - { .role = "dbclk", .clk = "gpio1_dbclk" }, -}; - -static struct omap_hwmod am33xx_gpio1_hwmod = { - .name = "gpio2", - .class = &am33xx_gpio_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = am33xx_gpio1_irqs, - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_GPIO1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .opt_clks = gpio1_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), - .dev_attr = &gpio_dev_attr, -}; - -/* gpio2 */ -static struct omap_hwmod_irq_info am33xx_gpio2_irqs[] = { - { .irq = 32 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { - { .role = "dbclk", .clk = "gpio2_dbclk" }, -}; - -static struct omap_hwmod am33xx_gpio2_hwmod = { - .name = "gpio3", - .class = &am33xx_gpio_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = am33xx_gpio2_irqs, - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_GPIO2_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .opt_clks = gpio2_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), - .dev_attr = &gpio_dev_attr, -}; - -/* gpio3 */ -static struct omap_hwmod_irq_info am33xx_gpio3_irqs[] = { - { .irq = 62 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { - { .role = "dbclk", .clk = "gpio3_dbclk" }, -}; - -static struct omap_hwmod am33xx_gpio3_hwmod = { - .name = "gpio4", - .class = &am33xx_gpio_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = am33xx_gpio3_irqs, - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_GPIO3_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .opt_clks = gpio3_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), - .dev_attr = &gpio_dev_attr, -}; - -/* gpmc */ -static struct omap_hwmod_class_sysconfig gpmc_sysc = { - .rev_offs = 0x0, - .sysc_offs = 0x10, - .syss_offs = 0x14, - .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class am33xx_gpmc_hwmod_class = { - .name = "gpmc", - .sysc = &gpmc_sysc, -}; - -static struct omap_hwmod_irq_info am33xx_gpmc_irqs[] = { - { .irq = 100 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_gpmc_hwmod = { - .name = "gpmc", - .class = &am33xx_gpmc_hwmod_class, - .clkdm_name = "l3s_clkdm", - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), - .mpu_irqs = am33xx_gpmc_irqs, - .main_clk = "l3s_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_GPMC_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* 'i2c' class */ -static struct omap_hwmod_class_sysconfig am33xx_i2c_sysc = { - .sysc_offs = 0x0010, - .syss_offs = 0x0090, - .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class i2c_class = { - .name = "i2c", - .sysc = &am33xx_i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_2, - .reset = &omap_i2c_reset, -}; - -static struct omap_i2c_dev_attr i2c_dev_attr = { - .flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE | - OMAP_I2C_FLAG_RESET_REGS_POSTIDLE, -}; - -/* i2c1 */ -static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { - { .irq = 70 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod_dma_info i2c1_edma_reqs[] = { - { .name = "tx", .dma_req = 0, }, - { .name = "rx", .dma_req = 0, }, - { .dma_req = -1 } -}; - -static struct omap_hwmod am33xx_i2c1_hwmod = { - .name = "i2c1", - .class = &i2c_class, - .clkdm_name = "l4_wkup_clkdm", - .mpu_irqs = i2c1_mpu_irqs, - .sdma_reqs = i2c1_edma_reqs, - .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, - .main_clk = "dpll_per_m2_div4_wkupdm_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_WKUP_I2C0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &i2c_dev_attr, -}; - -/* i2c1 */ -static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { - { .irq = 71 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod_dma_info i2c2_edma_reqs[] = { - { .name = "tx", .dma_req = 0, }, - { .name = "rx", .dma_req = 0, }, - { .dma_req = -1 } -}; - -static struct omap_hwmod am33xx_i2c2_hwmod = { - .name = "i2c2", - .class = &i2c_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = i2c2_mpu_irqs, - .sdma_reqs = i2c2_edma_reqs, - .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, - .main_clk = "dpll_per_m2_div4_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_I2C1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &i2c_dev_attr, -}; - -/* i2c3 */ -static struct omap_hwmod_dma_info i2c3_edma_reqs[] = { - { .name = "tx", .dma_req = 0, }, - { .name = "rx", .dma_req = 0, }, - { .dma_req = -1 } -}; - -static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { - { .irq = 30 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_i2c3_hwmod = { - .name = "i2c3", - .class = &i2c_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = i2c3_mpu_irqs, - .sdma_reqs = i2c3_edma_reqs, - .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, - .main_clk = "dpll_per_m2_div4_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_I2C2_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &i2c_dev_attr, -}; - - -/* lcdc */ -static struct omap_hwmod_class_sysconfig lcdc_sysc = { - .rev_offs = 0x0, - .sysc_offs = 0x54, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class am33xx_lcdc_hwmod_class = { - .name = "lcdc", - .sysc = &lcdc_sysc, -}; - -static struct omap_hwmod_irq_info am33xx_lcdc_irqs[] = { - { .irq = 36 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_lcdc_hwmod = { - .name = "lcdc", - .class = &am33xx_lcdc_hwmod_class, - .clkdm_name = "lcdc_clkdm", - .mpu_irqs = am33xx_lcdc_irqs, - .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, - .main_clk = "lcd_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_LCDC_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'mailbox' class - * mailbox module allowing communication between the on-chip processors using a - * queued mailbox-interrupt mechanism. - */ -static struct omap_hwmod_class_sysconfig am33xx_mailbox_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class am33xx_mailbox_hwmod_class = { - .name = "mailbox", - .sysc = &am33xx_mailbox_sysc, -}; - -static struct omap_hwmod_irq_info am33xx_mailbox_irqs[] = { - { .irq = 77 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_mailbox_hwmod = { - .name = "mailbox", - .class = &am33xx_mailbox_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_mailbox_irqs, - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_MAILBOX0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'mcasp' class - */ -static struct omap_hwmod_class_sysconfig am33xx_mcasp_sysc = { - .rev_offs = 0x0, - .sysc_offs = 0x4, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type3, -}; - -static struct omap_hwmod_class am33xx_mcasp_hwmod_class = { - .name = "mcasp", - .sysc = &am33xx_mcasp_sysc, -}; - -/* mcasp0 */ -static struct omap_hwmod_irq_info am33xx_mcasp0_irqs[] = { - { .name = "ax", .irq = 80 + OMAP_INTC_START, }, - { .name = "ar", .irq = 81 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod_dma_info am33xx_mcasp0_edma_reqs[] = { - { .name = "tx", .dma_req = 8, }, - { .name = "rx", .dma_req = 9, }, - { .dma_req = -1 } -}; - -static struct omap_hwmod am33xx_mcasp0_hwmod = { - .name = "mcasp0", - .class = &am33xx_mcasp_hwmod_class, - .clkdm_name = "l3s_clkdm", - .mpu_irqs = am33xx_mcasp0_irqs, - .sdma_reqs = am33xx_mcasp0_edma_reqs, - .main_clk = "mcasp0_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_MCASP0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* mcasp1 */ -static struct omap_hwmod_irq_info am33xx_mcasp1_irqs[] = { - { .name = "ax", .irq = 82 + OMAP_INTC_START, }, - { .name = "ar", .irq = 83 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod_dma_info am33xx_mcasp1_edma_reqs[] = { - { .name = "tx", .dma_req = 10, }, - { .name = "rx", .dma_req = 11, }, - { .dma_req = -1 } -}; - -static struct omap_hwmod am33xx_mcasp1_hwmod = { - .name = "mcasp1", - .class = &am33xx_mcasp_hwmod_class, - .clkdm_name = "l3s_clkdm", - .mpu_irqs = am33xx_mcasp1_irqs, - .sdma_reqs = am33xx_mcasp1_edma_reqs, - .main_clk = "mcasp1_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_MCASP1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* 'mmc' class */ -static struct omap_hwmod_class_sysconfig am33xx_mmc_sysc = { - .rev_offs = 0x1fc, - .sysc_offs = 0x10, - .syss_offs = 0x14, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class am33xx_mmc_hwmod_class = { - .name = "mmc", - .sysc = &am33xx_mmc_sysc, -}; - -/* mmc0 */ -static struct omap_hwmod_irq_info am33xx_mmc0_irqs[] = { - { .irq = 64 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod_dma_info am33xx_mmc0_edma_reqs[] = { - { .name = "tx", .dma_req = 24, }, - { .name = "rx", .dma_req = 25, }, - { .dma_req = -1 } -}; - -static struct omap_mmc_dev_attr am33xx_mmc0_dev_attr = { - .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, -}; - -static struct omap_hwmod am33xx_mmc0_hwmod = { - .name = "mmc1", - .class = &am33xx_mmc_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_mmc0_irqs, - .sdma_reqs = am33xx_mmc0_edma_reqs, - .main_clk = "mmc_clk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_MMC0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &am33xx_mmc0_dev_attr, -}; - -/* mmc1 */ -static struct omap_hwmod_irq_info am33xx_mmc1_irqs[] = { - { .irq = 28 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod_dma_info am33xx_mmc1_edma_reqs[] = { - { .name = "tx", .dma_req = 2, }, - { .name = "rx", .dma_req = 3, }, - { .dma_req = -1 } -}; - -static struct omap_mmc_dev_attr am33xx_mmc1_dev_attr = { - .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, -}; - -static struct omap_hwmod am33xx_mmc1_hwmod = { - .name = "mmc2", - .class = &am33xx_mmc_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_mmc1_irqs, - .sdma_reqs = am33xx_mmc1_edma_reqs, - .main_clk = "mmc_clk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_MMC1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &am33xx_mmc1_dev_attr, -}; - -/* mmc2 */ -static struct omap_hwmod_irq_info am33xx_mmc2_irqs[] = { - { .irq = 29 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod_dma_info am33xx_mmc2_edma_reqs[] = { - { .name = "tx", .dma_req = 64, }, - { .name = "rx", .dma_req = 65, }, - { .dma_req = -1 } -}; - -static struct omap_mmc_dev_attr am33xx_mmc2_dev_attr = { - .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, -}; -static struct omap_hwmod am33xx_mmc2_hwmod = { - .name = "mmc3", - .class = &am33xx_mmc_hwmod_class, - .clkdm_name = "l3s_clkdm", - .mpu_irqs = am33xx_mmc2_irqs, - .sdma_reqs = am33xx_mmc2_edma_reqs, - .main_clk = "mmc_clk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_MMC2_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &am33xx_mmc2_dev_attr, -}; - -/* - * 'rtc' class - * rtc subsystem - */ -static struct omap_hwmod_class_sysconfig am33xx_rtc_sysc = { - .rev_offs = 0x0074, - .sysc_offs = 0x0078, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO | - SIDLE_SMART | SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type3, -}; - -static struct omap_hwmod_class am33xx_rtc_hwmod_class = { - .name = "rtc", - .sysc = &am33xx_rtc_sysc, -}; - -static struct omap_hwmod_irq_info am33xx_rtc_irqs[] = { - { .name = "rtcint", .irq = 75 + OMAP_INTC_START, }, - { .name = "rtcalarmint", .irq = 76 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_rtc_hwmod = { - .name = "rtc", - .class = &am33xx_rtc_hwmod_class, - .clkdm_name = "l4_rtc_clkdm", - .mpu_irqs = am33xx_rtc_irqs, - .main_clk = "clk_32768_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_RTC_RTC_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* 'spi' class */ -static struct omap_hwmod_class_sysconfig am33xx_mcspi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0110, - .syss_offs = 0x0114, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class am33xx_spi_hwmod_class = { - .name = "mcspi", - .sysc = &am33xx_mcspi_sysc, - .rev = OMAP4_MCSPI_REV, -}; - -/* spi0 */ -static struct omap_hwmod_irq_info am33xx_spi0_irqs[] = { - { .irq = 65 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod_dma_info am33xx_mcspi0_edma_reqs[] = { - { .name = "rx0", .dma_req = 17 }, - { .name = "tx0", .dma_req = 16 }, - { .name = "rx1", .dma_req = 19 }, - { .name = "tx1", .dma_req = 18 }, - { .dma_req = -1 } -}; - -static struct omap2_mcspi_dev_attr mcspi_attrib = { - .num_chipselect = 2, -}; -static struct omap_hwmod am33xx_spi0_hwmod = { - .name = "spi0", - .class = &am33xx_spi_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_spi0_irqs, - .sdma_reqs = am33xx_mcspi0_edma_reqs, - .main_clk = "dpll_per_m2_div4_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_SPI0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &mcspi_attrib, -}; - -/* spi1 */ -static struct omap_hwmod_irq_info am33xx_spi1_irqs[] = { - { .irq = 125 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod_dma_info am33xx_mcspi1_edma_reqs[] = { - { .name = "rx0", .dma_req = 43 }, - { .name = "tx0", .dma_req = 42 }, - { .name = "rx1", .dma_req = 45 }, - { .name = "tx1", .dma_req = 44 }, - { .dma_req = -1 } -}; - -static struct omap_hwmod am33xx_spi1_hwmod = { - .name = "spi1", - .class = &am33xx_spi_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_spi1_irqs, - .sdma_reqs = am33xx_mcspi1_edma_reqs, - .main_clk = "dpll_per_m2_div4_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_SPI1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .dev_attr = &mcspi_attrib, -}; - -/* - * 'spinlock' class - * spinlock provides hardware assistance for synchronizing the - * processes running on multiple processors - */ -static struct omap_hwmod_class am33xx_spinlock_hwmod_class = { - .name = "spinlock", -}; - -static struct omap_hwmod am33xx_spinlock_hwmod = { - .name = "spinlock", - .class = &am33xx_spinlock_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_SPINLOCK_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* 'timer 2-7' class */ -static struct omap_hwmod_class_sysconfig am33xx_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class am33xx_timer_hwmod_class = { - .name = "timer", - .sysc = &am33xx_timer_sysc, -}; - -/* timer1 1ms */ -static struct omap_hwmod_class_sysconfig am33xx_timer1ms_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class am33xx_timer1ms_hwmod_class = { - .name = "timer", - .sysc = &am33xx_timer1ms_sysc, -}; - -static struct omap_hwmod_irq_info am33xx_timer1_irqs[] = { - { .irq = 67 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_timer1_hwmod = { - .name = "timer1", - .class = &am33xx_timer1ms_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .mpu_irqs = am33xx_timer1_irqs, - .main_clk = "timer1_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_WKUP_TIMER1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -static struct omap_hwmod_irq_info am33xx_timer2_irqs[] = { - { .irq = 68 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_timer2_hwmod = { - .name = "timer2", - .class = &am33xx_timer_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_timer2_irqs, - .main_clk = "timer2_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_TIMER2_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -static struct omap_hwmod_irq_info am33xx_timer3_irqs[] = { - { .irq = 69 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_timer3_hwmod = { - .name = "timer3", - .class = &am33xx_timer_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_timer3_irqs, - .main_clk = "timer3_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_TIMER3_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -static struct omap_hwmod_irq_info am33xx_timer4_irqs[] = { - { .irq = 92 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_timer4_hwmod = { - .name = "timer4", - .class = &am33xx_timer_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_timer4_irqs, - .main_clk = "timer4_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_TIMER4_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -static struct omap_hwmod_irq_info am33xx_timer5_irqs[] = { - { .irq = 93 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_timer5_hwmod = { - .name = "timer5", - .class = &am33xx_timer_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_timer5_irqs, - .main_clk = "timer5_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_TIMER5_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -static struct omap_hwmod_irq_info am33xx_timer6_irqs[] = { - { .irq = 94 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_timer6_hwmod = { - .name = "timer6", - .class = &am33xx_timer_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_timer6_irqs, - .main_clk = "timer6_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_TIMER6_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -static struct omap_hwmod_irq_info am33xx_timer7_irqs[] = { - { .irq = 95 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_timer7_hwmod = { - .name = "timer7", - .class = &am33xx_timer_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_timer7_irqs, - .main_clk = "timer7_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_TIMER7_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* tpcc */ -static struct omap_hwmod_class am33xx_tpcc_hwmod_class = { - .name = "tpcc", -}; - -static struct omap_hwmod_irq_info am33xx_tpcc_irqs[] = { - { .name = "edma0", .irq = 12 + OMAP_INTC_START, }, - { .name = "edma0_mperr", .irq = 13 + OMAP_INTC_START, }, - { .name = "edma0_err", .irq = 14 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_tpcc_hwmod = { - .name = "tpcc", - .class = &am33xx_tpcc_hwmod_class, - .clkdm_name = "l3_clkdm", - .mpu_irqs = am33xx_tpcc_irqs, - .main_clk = "l3_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_TPCC_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -static struct omap_hwmod_class_sysconfig am33xx_tptc_sysc = { - .rev_offs = 0x0, - .sysc_offs = 0x10, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSC_HAS_MIDLEMODE), - .idlemodes = (SIDLE_FORCE | SIDLE_SMART | MSTANDBY_FORCE), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -/* 'tptc' class */ -static struct omap_hwmod_class am33xx_tptc_hwmod_class = { - .name = "tptc", - .sysc = &am33xx_tptc_sysc, -}; - -/* tptc0 */ -static struct omap_hwmod_irq_info am33xx_tptc0_irqs[] = { - { .irq = 112 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_tptc0_hwmod = { - .name = "tptc0", - .class = &am33xx_tptc_hwmod_class, - .clkdm_name = "l3_clkdm", - .mpu_irqs = am33xx_tptc0_irqs, - .main_clk = "l3_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_TPTC0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* tptc1 */ -static struct omap_hwmod_irq_info am33xx_tptc1_irqs[] = { - { .irq = 113 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_tptc1_hwmod = { - .name = "tptc1", - .class = &am33xx_tptc_hwmod_class, - .clkdm_name = "l3_clkdm", - .mpu_irqs = am33xx_tptc1_irqs, - .flags = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY), - .main_clk = "l3_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_TPTC1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* tptc2 */ -static struct omap_hwmod_irq_info am33xx_tptc2_irqs[] = { - { .irq = 114 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_tptc2_hwmod = { - .name = "tptc2", - .class = &am33xx_tptc_hwmod_class, - .clkdm_name = "l3_clkdm", - .mpu_irqs = am33xx_tptc2_irqs, - .flags = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY), - .main_clk = "l3_gclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_TPTC2_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* 'uart' class */ -static struct omap_hwmod_class_sysconfig uart_sysc = { - .rev_offs = 0x50, - .sysc_offs = 0x54, - .syss_offs = 0x58, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class uart_class = { - .name = "uart", - .sysc = &uart_sysc, -}; - -/* uart1 */ -static struct omap_hwmod_dma_info uart1_edma_reqs[] = { - { .name = "tx", .dma_req = 26, }, - { .name = "rx", .dma_req = 27, }, - { .dma_req = -1 } -}; - -static struct omap_hwmod_irq_info am33xx_uart1_irqs[] = { - { .irq = 72 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_uart1_hwmod = { - .name = "uart1", - .class = &uart_class, - .clkdm_name = "l4_wkup_clkdm", - .mpu_irqs = am33xx_uart1_irqs, - .sdma_reqs = uart1_edma_reqs, - .main_clk = "dpll_per_m2_div4_wkupdm_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_WKUP_UART0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -static struct omap_hwmod_irq_info am33xx_uart2_irqs[] = { - { .irq = 73 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_uart2_hwmod = { - .name = "uart2", - .class = &uart_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_uart2_irqs, - .sdma_reqs = uart1_edma_reqs, - .main_clk = "dpll_per_m2_div4_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_UART1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* uart3 */ -static struct omap_hwmod_dma_info uart3_edma_reqs[] = { - { .name = "tx", .dma_req = 30, }, - { .name = "rx", .dma_req = 31, }, - { .dma_req = -1 } -}; - -static struct omap_hwmod_irq_info am33xx_uart3_irqs[] = { - { .irq = 74 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_uart3_hwmod = { - .name = "uart3", - .class = &uart_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_uart3_irqs, - .sdma_reqs = uart3_edma_reqs, - .main_clk = "dpll_per_m2_div4_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_UART2_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -static struct omap_hwmod_irq_info am33xx_uart4_irqs[] = { - { .irq = 44 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_uart4_hwmod = { - .name = "uart4", - .class = &uart_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_uart4_irqs, - .sdma_reqs = uart1_edma_reqs, - .main_clk = "dpll_per_m2_div4_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_UART3_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -static struct omap_hwmod_irq_info am33xx_uart5_irqs[] = { - { .irq = 45 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_uart5_hwmod = { - .name = "uart5", - .class = &uart_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_uart5_irqs, - .sdma_reqs = uart1_edma_reqs, - .main_clk = "dpll_per_m2_div4_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_UART4_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -static struct omap_hwmod_irq_info am33xx_uart6_irqs[] = { - { .irq = 46 + OMAP_INTC_START, }, - { .irq = -1 }, -}; - -static struct omap_hwmod am33xx_uart6_hwmod = { - .name = "uart6", - .class = &uart_class, - .clkdm_name = "l4ls_clkdm", - .mpu_irqs = am33xx_uart6_irqs, - .sdma_reqs = uart1_edma_reqs, - .main_clk = "dpll_per_m2_div4_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_UART5_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* 'wd_timer' class */ -static struct omap_hwmod_class am33xx_wd_timer_hwmod_class = { - .name = "wd_timer", -}; - -/* - * XXX: device.c file uses hardcoded name for watchdog timer - * driver "wd_timer2, so we are also using same name as of now... - */ -static struct omap_hwmod am33xx_wd_timer1_hwmod = { - .name = "wd_timer2", - .class = &am33xx_wd_timer_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .main_clk = "wdt1_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_WKUP_WDT1_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* - * 'usb_otg' class - * high-speed on-the-go universal serial bus (usb_otg) controller - */ -static struct omap_hwmod_class_sysconfig am33xx_usbhsotg_sysc = { - .rev_offs = 0x0, - .sysc_offs = 0x10, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class am33xx_usbotg_class = { - .name = "usbotg", - .sysc = &am33xx_usbhsotg_sysc, -}; - -static struct omap_hwmod_irq_info am33xx_usbss_mpu_irqs[] = { - { .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, }, - { .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, }, - { .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, }, - { .irq = -1 + OMAP_INTC_START, }, -}; - -static struct omap_hwmod am33xx_usbss_hwmod = { - .name = "usb_otg_hs", - .class = &am33xx_usbotg_class, - .clkdm_name = "l3s_clkdm", - .mpu_irqs = am33xx_usbss_mpu_irqs, - .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, - .main_clk = "usbotg_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = AM33XX_CM_PER_USB0_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - - -/* - * Interfaces - */ - -/* l4 fw -> emif fw */ -static struct omap_hwmod_ocp_if am33xx_l4_fw__emif_fw = { - .master = &am33xx_l4_fw_hwmod, - .slave = &am33xx_emif_fw_hwmod, - .clk = "l4fw_gclk", - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space am33xx_emif_addrs[] = { - { - .pa_start = 0x4c000000, - .pa_end = 0x4c000fff, - .flags = ADDR_TYPE_RT - }, - { } -}; -/* l3 main -> emif */ -static struct omap_hwmod_ocp_if am33xx_l3_main__emif = { - .master = &am33xx_l3_main_hwmod, - .slave = &am33xx_emif_hwmod, - .clk = "dpll_core_m4_ck", - .addr = am33xx_emif_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mpu -> l3 main */ -static struct omap_hwmod_ocp_if am33xx_mpu__l3_main = { - .master = &am33xx_mpu_hwmod, - .slave = &am33xx_l3_main_hwmod, - .clk = "dpll_mpu_m2_ck", - .user = OCP_USER_MPU, -}; - -/* l3 main -> l4 hs */ -static struct omap_hwmod_ocp_if am33xx_l3_main__l4_hs = { - .master = &am33xx_l3_main_hwmod, - .slave = &am33xx_l4_hs_hwmod, - .clk = "l3s_gclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3 main -> l3 s */ -static struct omap_hwmod_ocp_if am33xx_l3_main__l3_s = { - .master = &am33xx_l3_main_hwmod, - .slave = &am33xx_l3_s_hwmod, - .clk = "l3s_gclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3 s -> l4 per/ls */ -static struct omap_hwmod_ocp_if am33xx_l3_s__l4_ls = { - .master = &am33xx_l3_s_hwmod, - .slave = &am33xx_l4_ls_hwmod, - .clk = "l3s_gclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3 s -> l4 wkup */ -static struct omap_hwmod_ocp_if am33xx_l3_s__l4_wkup = { - .master = &am33xx_l3_s_hwmod, - .slave = &am33xx_l4_wkup_hwmod, - .clk = "l3s_gclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3 s -> l4 fw */ -static struct omap_hwmod_ocp_if am33xx_l3_s__l4_fw = { - .master = &am33xx_l3_s_hwmod, - .slave = &am33xx_l4_fw_hwmod, - .clk = "l3s_gclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3 main -> l3 instr */ -static struct omap_hwmod_ocp_if am33xx_l3_main__l3_instr = { - .master = &am33xx_l3_main_hwmod, - .slave = &am33xx_l3_instr_hwmod, - .clk = "l3s_gclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mpu -> prcm */ -static struct omap_hwmod_ocp_if am33xx_mpu__prcm = { - .master = &am33xx_mpu_hwmod, - .slave = &am33xx_prcm_hwmod, - .clk = "dpll_mpu_m2_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3 s -> l3 main*/ -static struct omap_hwmod_ocp_if am33xx_l3_s__l3_main = { - .master = &am33xx_l3_s_hwmod, - .slave = &am33xx_l3_main_hwmod, - .clk = "l3s_gclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* pru-icss -> l3 main */ -static struct omap_hwmod_ocp_if am33xx_pruss__l3_main = { - .master = &am33xx_pruss_hwmod, - .slave = &am33xx_l3_main_hwmod, - .clk = "l3_gclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* wkup m3 -> l4 wkup */ -static struct omap_hwmod_ocp_if am33xx_wkup_m3__l4_wkup = { - .master = &am33xx_wkup_m3_hwmod, - .slave = &am33xx_l4_wkup_hwmod, - .clk = "dpll_core_m4_div2_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* gfx -> l3 main */ -static struct omap_hwmod_ocp_if am33xx_gfx__l3_main = { - .master = &am33xx_gfx_hwmod, - .slave = &am33xx_l3_main_hwmod, - .clk = "dpll_core_m4_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4 wkup -> wkup m3 */ -static struct omap_hwmod_addr_space am33xx_wkup_m3_addrs[] = { - { - .name = "umem", - .pa_start = 0x44d00000, - .pa_end = 0x44d00000 + SZ_16K - 1, - .flags = ADDR_TYPE_RT - }, - { - .name = "dmem", - .pa_start = 0x44d80000, - .pa_end = 0x44d80000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__wkup_m3 = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_wkup_m3_hwmod, - .clk = "dpll_core_m4_div2_ck", - .addr = am33xx_wkup_m3_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4 hs -> pru-icss */ -static struct omap_hwmod_addr_space am33xx_pruss_addrs[] = { - { - .pa_start = 0x4a300000, - .pa_end = 0x4a300000 + SZ_512K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_hs__pruss = { - .master = &am33xx_l4_hs_hwmod, - .slave = &am33xx_pruss_hwmod, - .clk = "dpll_core_m4_ck", - .addr = am33xx_pruss_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3 main -> gfx */ -static struct omap_hwmod_addr_space am33xx_gfx_addrs[] = { - { - .pa_start = 0x56000000, - .pa_end = 0x56000000 + SZ_16M - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l3_main__gfx = { - .master = &am33xx_l3_main_hwmod, - .slave = &am33xx_gfx_hwmod, - .clk = "dpll_core_m4_ck", - .addr = am33xx_gfx_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4 wkup -> smartreflex0 */ -static struct omap_hwmod_addr_space am33xx_smartreflex0_addrs[] = { - { - .pa_start = 0x44e37000, - .pa_end = 0x44e37000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__smartreflex0 = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_smartreflex0_hwmod, - .clk = "dpll_core_m4_div2_ck", - .addr = am33xx_smartreflex0_addrs, - .user = OCP_USER_MPU, -}; - -/* l4 wkup -> smartreflex1 */ -static struct omap_hwmod_addr_space am33xx_smartreflex1_addrs[] = { - { - .pa_start = 0x44e39000, - .pa_end = 0x44e39000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__smartreflex1 = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_smartreflex1_hwmod, - .clk = "dpll_core_m4_div2_ck", - .addr = am33xx_smartreflex1_addrs, - .user = OCP_USER_MPU, -}; - -/* l4 wkup -> control */ -static struct omap_hwmod_addr_space am33xx_control_addrs[] = { - { - .pa_start = 0x44e10000, - .pa_end = 0x44e10000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__control = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_control_hwmod, - .clk = "dpll_core_m4_div2_ck", - .addr = am33xx_control_addrs, - .user = OCP_USER_MPU, -}; - -/* l4 wkup -> rtc */ -static struct omap_hwmod_addr_space am33xx_rtc_addrs[] = { - { - .pa_start = 0x44e3e000, - .pa_end = 0x44e3e000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__rtc = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_rtc_hwmod, - .clk = "clkdiv32k_ick", - .addr = am33xx_rtc_addrs, - .user = OCP_USER_MPU, -}; - -/* l4 per/ls -> DCAN0 */ -static struct omap_hwmod_addr_space am33xx_dcan0_addrs[] = { - { - .pa_start = 0x481CC000, - .pa_end = 0x481CC000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_per__dcan0 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_dcan0_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_dcan0_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4 per/ls -> DCAN1 */ -static struct omap_hwmod_addr_space am33xx_dcan1_addrs[] = { - { - .pa_start = 0x481D0000, - .pa_end = 0x481D0000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_per__dcan1 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_dcan1_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_dcan1_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4 per/ls -> GPIO2 */ -static struct omap_hwmod_addr_space am33xx_gpio1_addrs[] = { - { - .pa_start = 0x4804C000, - .pa_end = 0x4804C000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_per__gpio1 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_gpio1_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_gpio1_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4 per/ls -> gpio3 */ -static struct omap_hwmod_addr_space am33xx_gpio2_addrs[] = { - { - .pa_start = 0x481AC000, - .pa_end = 0x481AC000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_per__gpio2 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_gpio2_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_gpio2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4 per/ls -> gpio4 */ -static struct omap_hwmod_addr_space am33xx_gpio3_addrs[] = { - { - .pa_start = 0x481AE000, - .pa_end = 0x481AE000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_per__gpio3 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_gpio3_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_gpio3_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* L4 WKUP -> I2C1 */ -static struct omap_hwmod_addr_space am33xx_i2c1_addr_space[] = { - { - .pa_start = 0x44E0B000, - .pa_end = 0x44E0B000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__i2c1 = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_i2c1_hwmod, - .clk = "dpll_core_m4_div2_ck", - .addr = am33xx_i2c1_addr_space, - .user = OCP_USER_MPU, -}; - -/* L4 WKUP -> GPIO1 */ -static struct omap_hwmod_addr_space am33xx_gpio0_addrs[] = { - { - .pa_start = 0x44E07000, - .pa_end = 0x44E07000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__gpio0 = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_gpio0_hwmod, - .clk = "dpll_core_m4_div2_ck", - .addr = am33xx_gpio0_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* L4 WKUP -> ADC_TSC */ -static struct omap_hwmod_addr_space am33xx_adc_tsc_addrs[] = { - { - .pa_start = 0x44E0D000, - .pa_end = 0x44E0D000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__adc_tsc = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_adc_tsc_hwmod, - .clk = "dpll_core_m4_div2_ck", - .addr = am33xx_adc_tsc_addrs, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space am33xx_cpgmac0_addr_space[] = { - /* cpsw ss */ - { - .pa_start = 0x4a100000, - .pa_end = 0x4a100000 + SZ_2K - 1, - .flags = ADDR_TYPE_RT, - }, - /* cpsw wr */ - { - .pa_start = 0x4a101200, - .pa_end = 0x4a101200 + SZ_256 - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = { - .master = &am33xx_l4_hs_hwmod, - .slave = &am33xx_cpgmac0_hwmod, - .clk = "cpsw_125mhz_gclk", - .addr = am33xx_cpgmac0_addr_space, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space am33xx_elm_addr_space[] = { - { - .pa_start = 0x48080000, - .pa_end = 0x48080000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__elm = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_elm_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_elm_addr_space, - .user = OCP_USER_MPU, -}; - -/* - * Splitting the resources to handle access of PWMSS config space - * and module specific part independently - */ -static struct omap_hwmod_addr_space am33xx_ehrpwm0_addr_space[] = { - { - .pa_start = 0x48300000, - .pa_end = 0x48300000 + SZ_16 - 1, - .flags = ADDR_TYPE_RT - }, - { - .pa_start = 0x48300200, - .pa_end = 0x48300200 + SZ_256 - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__ehrpwm0 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_ehrpwm0_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_ehrpwm0_addr_space, - .user = OCP_USER_MPU, -}; - -/* - * Splitting the resources to handle access of PWMSS config space - * and module specific part independently - */ -static struct omap_hwmod_addr_space am33xx_ehrpwm1_addr_space[] = { - { - .pa_start = 0x48302000, - .pa_end = 0x48302000 + SZ_16 - 1, - .flags = ADDR_TYPE_RT - }, - { - .pa_start = 0x48302200, - .pa_end = 0x48302200 + SZ_256 - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__ehrpwm1 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_ehrpwm1_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_ehrpwm1_addr_space, - .user = OCP_USER_MPU, -}; - -/* - * Splitting the resources to handle access of PWMSS config space - * and module specific part independently - */ -static struct omap_hwmod_addr_space am33xx_ehrpwm2_addr_space[] = { - { - .pa_start = 0x48304000, - .pa_end = 0x48304000 + SZ_16 - 1, - .flags = ADDR_TYPE_RT - }, - { - .pa_start = 0x48304200, - .pa_end = 0x48304200 + SZ_256 - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__ehrpwm2 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_ehrpwm2_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_ehrpwm2_addr_space, - .user = OCP_USER_MPU, -}; - -/* - * Splitting the resources to handle access of PWMSS config space - * and module specific part independently - */ -static struct omap_hwmod_addr_space am33xx_ecap0_addr_space[] = { - { - .pa_start = 0x48300000, - .pa_end = 0x48300000 + SZ_16 - 1, - .flags = ADDR_TYPE_RT - }, - { - .pa_start = 0x48300100, - .pa_end = 0x48300100 + SZ_256 - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__ecap0 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_ecap0_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_ecap0_addr_space, - .user = OCP_USER_MPU, -}; - -/* - * Splitting the resources to handle access of PWMSS config space - * and module specific part independently - */ -static struct omap_hwmod_addr_space am33xx_ecap1_addr_space[] = { - { - .pa_start = 0x48302000, - .pa_end = 0x48302000 + SZ_16 - 1, - .flags = ADDR_TYPE_RT - }, - { - .pa_start = 0x48302100, - .pa_end = 0x48302100 + SZ_256 - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__ecap1 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_ecap1_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_ecap1_addr_space, - .user = OCP_USER_MPU, -}; - -/* - * Splitting the resources to handle access of PWMSS config space - * and module specific part independently - */ -static struct omap_hwmod_addr_space am33xx_ecap2_addr_space[] = { - { - .pa_start = 0x48304000, - .pa_end = 0x48304000 + SZ_16 - 1, - .flags = ADDR_TYPE_RT - }, - { - .pa_start = 0x48304100, - .pa_end = 0x48304100 + SZ_256 - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__ecap2 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_ecap2_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_ecap2_addr_space, - .user = OCP_USER_MPU, -}; - -/* l3s cfg -> gpmc */ -static struct omap_hwmod_addr_space am33xx_gpmc_addr_space[] = { - { - .pa_start = 0x50000000, - .pa_end = 0x50000000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = { - .master = &am33xx_l3_s_hwmod, - .slave = &am33xx_gpmc_hwmod, - .clk = "l3s_gclk", - .addr = am33xx_gpmc_addr_space, - .user = OCP_USER_MPU, -}; - -/* i2c2 */ -static struct omap_hwmod_addr_space am33xx_i2c2_addr_space[] = { - { - .pa_start = 0x4802A000, - .pa_end = 0x4802A000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_per__i2c2 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_i2c2_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_i2c2_addr_space, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space am33xx_i2c3_addr_space[] = { - { - .pa_start = 0x4819C000, - .pa_end = 0x4819C000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_per__i2c3 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_i2c3_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_i2c3_addr_space, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space am33xx_lcdc_addr_space[] = { - { - .pa_start = 0x4830E000, - .pa_end = 0x4830E000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l3_main__lcdc = { - .master = &am33xx_l3_main_hwmod, - .slave = &am33xx_lcdc_hwmod, - .clk = "dpll_core_m4_ck", - .addr = am33xx_lcdc_addr_space, - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_addr_space am33xx_mailbox_addrs[] = { - { - .pa_start = 0x480C8000, - .pa_end = 0x480C8000 + (SZ_4K - 1), - .flags = ADDR_TYPE_RT - }, - { } -}; - -/* l4 ls -> mailbox */ -static struct omap_hwmod_ocp_if am33xx_l4_per__mailbox = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_mailbox_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_mailbox_addrs, - .user = OCP_USER_MPU, -}; - -/* l4 ls -> spinlock */ -static struct omap_hwmod_addr_space am33xx_spinlock_addrs[] = { - { - .pa_start = 0x480Ca000, - .pa_end = 0x480Ca000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__spinlock = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_spinlock_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_spinlock_addrs, - .user = OCP_USER_MPU, -}; - -/* l4 ls -> mcasp0 */ -static struct omap_hwmod_addr_space am33xx_mcasp0_addr_space[] = { - { - .pa_start = 0x48038000, - .pa_end = 0x48038000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp0 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_mcasp0_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_mcasp0_addr_space, - .user = OCP_USER_MPU, -}; - -/* l3 s -> mcasp0 data */ -static struct omap_hwmod_addr_space am33xx_mcasp0_data_addr_space[] = { - { - .pa_start = 0x46000000, - .pa_end = 0x46000000 + SZ_4M - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l3_s__mcasp0_data = { - .master = &am33xx_l3_s_hwmod, - .slave = &am33xx_mcasp0_hwmod, - .clk = "l3s_gclk", - .addr = am33xx_mcasp0_data_addr_space, - .user = OCP_USER_SDMA, -}; - -/* l4 ls -> mcasp1 */ -static struct omap_hwmod_addr_space am33xx_mcasp1_addr_space[] = { - { - .pa_start = 0x4803C000, - .pa_end = 0x4803C000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp1 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_mcasp1_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_mcasp1_addr_space, - .user = OCP_USER_MPU, -}; - -/* l3 s -> mcasp1 data */ -static struct omap_hwmod_addr_space am33xx_mcasp1_data_addr_space[] = { - { - .pa_start = 0x46400000, - .pa_end = 0x46400000 + SZ_4M - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l3_s__mcasp1_data = { - .master = &am33xx_l3_s_hwmod, - .slave = &am33xx_mcasp1_hwmod, - .clk = "l3s_gclk", - .addr = am33xx_mcasp1_data_addr_space, - .user = OCP_USER_SDMA, -}; - -/* l4 ls -> mmc0 */ -static struct omap_hwmod_addr_space am33xx_mmc0_addr_space[] = { - { - .pa_start = 0x48060100, - .pa_end = 0x48060100 + SZ_4K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__mmc0 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_mmc0_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_mmc0_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 ls -> mmc1 */ -static struct omap_hwmod_addr_space am33xx_mmc1_addr_space[] = { - { - .pa_start = 0x481d8100, - .pa_end = 0x481d8100 + SZ_4K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__mmc1 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_mmc1_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_mmc1_addr_space, - .user = OCP_USER_MPU, -}; - -/* l3 s -> mmc2 */ -static struct omap_hwmod_addr_space am33xx_mmc2_addr_space[] = { - { - .pa_start = 0x47810100, - .pa_end = 0x47810100 + SZ_64K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l3_s__mmc2 = { - .master = &am33xx_l3_s_hwmod, - .slave = &am33xx_mmc2_hwmod, - .clk = "l3s_gclk", - .addr = am33xx_mmc2_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 ls -> mcspi0 */ -static struct omap_hwmod_addr_space am33xx_mcspi0_addr_space[] = { - { - .pa_start = 0x48030000, - .pa_end = 0x48030000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__mcspi0 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_spi0_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_mcspi0_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 ls -> mcspi1 */ -static struct omap_hwmod_addr_space am33xx_mcspi1_addr_space[] = { - { - .pa_start = 0x481A0000, - .pa_end = 0x481A0000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__mcspi1 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_spi1_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_mcspi1_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 wkup -> timer1 */ -static struct omap_hwmod_addr_space am33xx_timer1_addr_space[] = { - { - .pa_start = 0x44E31000, - .pa_end = 0x44E31000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__timer1 = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_timer1_hwmod, - .clk = "dpll_core_m4_div2_ck", - .addr = am33xx_timer1_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 per -> timer2 */ -static struct omap_hwmod_addr_space am33xx_timer2_addr_space[] = { - { - .pa_start = 0x48040000, - .pa_end = 0x48040000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__timer2 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_timer2_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_timer2_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 per -> timer3 */ -static struct omap_hwmod_addr_space am33xx_timer3_addr_space[] = { - { - .pa_start = 0x48042000, - .pa_end = 0x48042000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__timer3 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_timer3_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_timer3_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 per -> timer4 */ -static struct omap_hwmod_addr_space am33xx_timer4_addr_space[] = { - { - .pa_start = 0x48044000, - .pa_end = 0x48044000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__timer4 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_timer4_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_timer4_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 per -> timer5 */ -static struct omap_hwmod_addr_space am33xx_timer5_addr_space[] = { - { - .pa_start = 0x48046000, - .pa_end = 0x48046000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__timer5 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_timer5_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_timer5_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 per -> timer6 */ -static struct omap_hwmod_addr_space am33xx_timer6_addr_space[] = { - { - .pa_start = 0x48048000, - .pa_end = 0x48048000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__timer6 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_timer6_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_timer6_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 per -> timer7 */ -static struct omap_hwmod_addr_space am33xx_timer7_addr_space[] = { - { - .pa_start = 0x4804A000, - .pa_end = 0x4804A000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__timer7 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_timer7_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_timer7_addr_space, - .user = OCP_USER_MPU, -}; - -/* l3 main -> tpcc */ -static struct omap_hwmod_addr_space am33xx_tpcc_addr_space[] = { - { - .pa_start = 0x49000000, - .pa_end = 0x49000000 + SZ_32K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l3_main__tpcc = { - .master = &am33xx_l3_main_hwmod, - .slave = &am33xx_tpcc_hwmod, - .clk = "l3_gclk", - .addr = am33xx_tpcc_addr_space, - .user = OCP_USER_MPU, -}; - -/* l3 main -> tpcc0 */ -static struct omap_hwmod_addr_space am33xx_tptc0_addr_space[] = { - { - .pa_start = 0x49800000, - .pa_end = 0x49800000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l3_main__tptc0 = { - .master = &am33xx_l3_main_hwmod, - .slave = &am33xx_tptc0_hwmod, - .clk = "l3_gclk", - .addr = am33xx_tptc0_addr_space, - .user = OCP_USER_MPU, -}; - -/* l3 main -> tpcc1 */ -static struct omap_hwmod_addr_space am33xx_tptc1_addr_space[] = { - { - .pa_start = 0x49900000, - .pa_end = 0x49900000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l3_main__tptc1 = { - .master = &am33xx_l3_main_hwmod, - .slave = &am33xx_tptc1_hwmod, - .clk = "l3_gclk", - .addr = am33xx_tptc1_addr_space, - .user = OCP_USER_MPU, -}; - -/* l3 main -> tpcc2 */ -static struct omap_hwmod_addr_space am33xx_tptc2_addr_space[] = { - { - .pa_start = 0x49a00000, - .pa_end = 0x49a00000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l3_main__tptc2 = { - .master = &am33xx_l3_main_hwmod, - .slave = &am33xx_tptc2_hwmod, - .clk = "l3_gclk", - .addr = am33xx_tptc2_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 wkup -> uart1 */ -static struct omap_hwmod_addr_space am33xx_uart1_addr_space[] = { - { - .pa_start = 0x44E09000, - .pa_end = 0x44E09000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__uart1 = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_uart1_hwmod, - .clk = "dpll_core_m4_div2_ck", - .addr = am33xx_uart1_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 ls -> uart2 */ -static struct omap_hwmod_addr_space am33xx_uart2_addr_space[] = { - { - .pa_start = 0x48022000, - .pa_end = 0x48022000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__uart2 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_uart2_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_uart2_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 ls -> uart3 */ -static struct omap_hwmod_addr_space am33xx_uart3_addr_space[] = { - { - .pa_start = 0x48024000, - .pa_end = 0x48024000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__uart3 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_uart3_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_uart3_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 ls -> uart4 */ -static struct omap_hwmod_addr_space am33xx_uart4_addr_space[] = { - { - .pa_start = 0x481A6000, - .pa_end = 0x481A6000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__uart4 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_uart4_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_uart4_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 ls -> uart5 */ -static struct omap_hwmod_addr_space am33xx_uart5_addr_space[] = { - { - .pa_start = 0x481A8000, - .pa_end = 0x481A8000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__uart5 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_uart5_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_uart5_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 ls -> uart6 */ -static struct omap_hwmod_addr_space am33xx_uart6_addr_space[] = { - { - .pa_start = 0x481aa000, - .pa_end = 0x481aa000 + SZ_8K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_ls__uart6 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_uart6_hwmod, - .clk = "l4ls_gclk", - .addr = am33xx_uart6_addr_space, - .user = OCP_USER_MPU, -}; - -/* l4 wkup -> wd_timer1 */ -static struct omap_hwmod_addr_space am33xx_wd_timer1_addrs[] = { - { - .pa_start = 0x44e35000, - .pa_end = 0x44e35000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__wd_timer1 = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_wd_timer1_hwmod, - .clk = "dpll_core_m4_div2_ck", - .addr = am33xx_wd_timer1_addrs, - .user = OCP_USER_MPU, -}; - -/* usbss */ -/* l3 s -> USBSS interface */ -static struct omap_hwmod_addr_space am33xx_usbss_addr_space[] = { - { - .name = "usbss", - .pa_start = 0x47400000, - .pa_end = 0x47400000 + SZ_4K - 1, - .flags = ADDR_TYPE_RT - }, - { - .name = "musb0", - .pa_start = 0x47401000, - .pa_end = 0x47401000 + SZ_2K - 1, - .flags = ADDR_TYPE_RT - }, - { - .name = "musb1", - .pa_start = 0x47401800, - .pa_end = 0x47401800 + SZ_2K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - -static struct omap_hwmod_ocp_if am33xx_l3_s__usbss = { - .master = &am33xx_l3_s_hwmod, - .slave = &am33xx_usbss_hwmod, - .clk = "l3s_gclk", - .addr = am33xx_usbss_addr_space, - .user = OCP_USER_MPU, - .flags = OCPIF_SWSUP_IDLE, -}; - -static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { - &am33xx_l4_fw__emif_fw, - &am33xx_l3_main__emif, - &am33xx_mpu__l3_main, - &am33xx_mpu__prcm, - &am33xx_l3_s__l4_ls, - &am33xx_l3_s__l4_wkup, - &am33xx_l3_s__l4_fw, - &am33xx_l3_main__l4_hs, - &am33xx_l3_main__l3_s, - &am33xx_l3_main__l3_instr, - &am33xx_l3_main__gfx, - &am33xx_l3_s__l3_main, - &am33xx_pruss__l3_main, - &am33xx_wkup_m3__l4_wkup, - &am33xx_gfx__l3_main, - &am33xx_l4_wkup__wkup_m3, - &am33xx_l4_wkup__control, - &am33xx_l4_wkup__smartreflex0, - &am33xx_l4_wkup__smartreflex1, - &am33xx_l4_wkup__uart1, - &am33xx_l4_wkup__timer1, - &am33xx_l4_wkup__rtc, - &am33xx_l4_wkup__i2c1, - &am33xx_l4_wkup__gpio0, - &am33xx_l4_wkup__adc_tsc, - &am33xx_l4_wkup__wd_timer1, - &am33xx_l4_hs__pruss, - &am33xx_l4_per__dcan0, - &am33xx_l4_per__dcan1, - &am33xx_l4_per__gpio1, - &am33xx_l4_per__gpio2, - &am33xx_l4_per__gpio3, - &am33xx_l4_per__i2c2, - &am33xx_l4_per__i2c3, - &am33xx_l4_per__mailbox, - &am33xx_l4_ls__mcasp0, - &am33xx_l3_s__mcasp0_data, - &am33xx_l4_ls__mcasp1, - &am33xx_l3_s__mcasp1_data, - &am33xx_l4_ls__mmc0, - &am33xx_l4_ls__mmc1, - &am33xx_l3_s__mmc2, - &am33xx_l4_ls__timer2, - &am33xx_l4_ls__timer3, - &am33xx_l4_ls__timer4, - &am33xx_l4_ls__timer5, - &am33xx_l4_ls__timer6, - &am33xx_l4_ls__timer7, - &am33xx_l3_main__tpcc, - &am33xx_l4_ls__uart2, - &am33xx_l4_ls__uart3, - &am33xx_l4_ls__uart4, - &am33xx_l4_ls__uart5, - &am33xx_l4_ls__uart6, - &am33xx_l4_ls__spinlock, - &am33xx_l4_ls__elm, - &am33xx_l4_ls__ehrpwm0, - &am33xx_l4_ls__ehrpwm1, - &am33xx_l4_ls__ehrpwm2, - &am33xx_l4_ls__ecap0, - &am33xx_l4_ls__ecap1, - &am33xx_l4_ls__ecap2, - &am33xx_l3_s__gpmc, - &am33xx_l3_main__lcdc, - &am33xx_l4_ls__mcspi0, - &am33xx_l4_ls__mcspi1, - &am33xx_l3_main__tptc0, - &am33xx_l3_main__tptc1, - &am33xx_l3_main__tptc2, - &am33xx_l3_s__usbss, - &am33xx_l4_hs__cpgmac0, - NULL, -}; - -int __init am33xx_hwmod_init(void) -{ - omap_hwmod_init(); - return omap_hwmod_register_links(am33xx_hwmod_ocp_ifs); -} diff --git a/trunk/arch/arm/mach-omap2/opp.c b/trunk/arch/arm/mach-omap2/opp.c index 45ad7f74f356..d8f6dbf45d16 100644 --- a/trunk/arch/arm/mach-omap2/opp.c +++ b/trunk/arch/arm/mach-omap2/opp.c @@ -64,22 +64,25 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def, } oh = omap_hwmod_lookup(opp_def->hwmod_name); if (!oh || !oh->od) { - pr_debug("%s: no hwmod or odev for %s, [%d] cannot add OPPs.\n", - __func__, opp_def->hwmod_name, i); + pr_debug("%s: no hwmod or odev for %s, [%d] " + "cannot add OPPs.\n", __func__, + opp_def->hwmod_name, i); continue; } dev = &oh->od->pdev->dev; r = opp_add(dev, opp_def->freq, opp_def->u_volt); if (r) { - dev_err(dev, "%s: add OPP %ld failed for %s [%d] result=%d\n", - __func__, opp_def->freq, - opp_def->hwmod_name, i, r); + dev_err(dev, "%s: add OPP %ld failed for %s [%d] " + "result=%d\n", + __func__, opp_def->freq, + opp_def->hwmod_name, i, r); } else { if (!opp_def->default_available) r = opp_disable(dev, opp_def->freq); if (r) - dev_err(dev, "%s: disable %ld failed for %s [%d] result=%d\n", + dev_err(dev, "%s: disable %ld failed for %s " + "[%d] result=%d\n", __func__, opp_def->freq, opp_def->hwmod_name, i, r); } diff --git a/trunk/arch/arm/mach-omap2/pm.c b/trunk/arch/arm/mach-omap2/pm.c index 939bd6f70b51..9cb5cede0f50 100644 --- a/trunk/arch/arm/mach-omap2/pm.c +++ b/trunk/arch/arm/mach-omap2/pm.c @@ -203,8 +203,8 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, bootup_volt = opp_get_voltage(opp); rcu_read_unlock(); if (!bootup_volt) { - pr_err("%s: unable to find voltage corresponding to the bootup OPP for vdd_%s\n", - __func__, vdd_name); + pr_err("%s: unable to find voltage corresponding " + "to the bootup OPP for vdd_%s\n", __func__, vdd_name); goto exit; } diff --git a/trunk/arch/arm/mach-omap2/pm34xx.c b/trunk/arch/arm/mach-omap2/pm34xx.c index ba670db1fd37..90480f759974 100644 --- a/trunk/arch/arm/mach-omap2/pm34xx.c +++ b/trunk/arch/arm/mach-omap2/pm34xx.c @@ -391,8 +391,9 @@ static int omap3_pm_suspend(void) list_for_each_entry(pwrst, &pwrst_list, node) { state = pwrdm_read_prev_pwrst(pwrst->pwrdm); if (state > pwrst->next_state) { - pr_info("Powerdomain (%s) didn't enter target state %d\n", - pwrst->pwrdm->name, pwrst->next_state); + pr_info("Powerdomain (%s) didn't enter " + "target state %d\n", + pwrst->pwrdm->name, pwrst->next_state); ret = -1; } omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); @@ -732,7 +733,8 @@ int __init omap3_pm_init(void) omap3_secure_ram_storage = kmalloc(0x803F, GFP_KERNEL); if (!omap3_secure_ram_storage) - pr_err("Memory allocation failed when allocating for secure sram context\n"); + pr_err("Memory allocation failed when " + "allocating for secure sram context\n"); local_irq_disable(); local_fiq_disable(); diff --git a/trunk/arch/arm/mach-omap2/pm44xx.c b/trunk/arch/arm/mach-omap2/pm44xx.c index 04922d149068..ea24174f5707 100644 --- a/trunk/arch/arm/mach-omap2/pm44xx.c +++ b/trunk/arch/arm/mach-omap2/pm44xx.c @@ -69,8 +69,9 @@ static int omap4_pm_suspend(void) list_for_each_entry(pwrst, &pwrst_list, node) { state = pwrdm_read_prev_pwrst(pwrst->pwrdm); if (state > pwrst->next_state) { - pr_info("Powerdomain (%s) didn't enter target state %d\n", - pwrst->pwrdm->name, pwrst->next_state); + pr_info("Powerdomain (%s) didn't enter " + "target state %d\n", + pwrst->pwrdm->name, pwrst->next_state); ret = -1; } omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); @@ -188,7 +189,8 @@ int __init omap4_pm_init(void) ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm); ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm); if (ret) { - pr_err("Failed to add MPUSS -> L3/EMIF/L4PER, DUCATI -> L3 wakeup dependency\n"); + pr_err("Failed to add MPUSS -> L3/EMIF/L4PER, DUCATI -> L3 " + "wakeup dependency\n"); goto err2; } diff --git a/trunk/arch/arm/mach-omap2/powerdomain.c b/trunk/arch/arm/mach-omap2/powerdomain.c index 1678a3284233..ca5be83d5019 100644 --- a/trunk/arch/arm/mach-omap2/powerdomain.c +++ b/trunk/arch/arm/mach-omap2/powerdomain.c @@ -341,8 +341,8 @@ int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm) if (!pwrdm || !clkdm) return -EINVAL; - pr_debug("powerdomain: %s: associating clockdomain %s\n", - pwrdm->name, clkdm->name); + pr_debug("powerdomain: associating clockdomain %s with powerdomain " + "%s\n", clkdm->name, pwrdm->name); for (i = 0; i < PWRDM_MAX_CLKDMS; i++) { if (!pwrdm->pwrdm_clkdms[i]) @@ -356,8 +356,8 @@ int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm) } if (i == PWRDM_MAX_CLKDMS) { - pr_debug("powerdomain: %s: increase PWRDM_MAX_CLKDMS for clkdm %s\n", - pwrdm->name, clkdm->name); + pr_debug("powerdomain: increase PWRDM_MAX_CLKDMS for " + "pwrdm %s clkdm %s\n", pwrdm->name, clkdm->name); WARN_ON(1); ret = -ENOMEM; goto pac_exit; @@ -389,16 +389,16 @@ int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm) if (!pwrdm || !clkdm) return -EINVAL; - pr_debug("powerdomain: %s: dissociating clockdomain %s\n", - pwrdm->name, clkdm->name); + pr_debug("powerdomain: dissociating clockdomain %s from powerdomain " + "%s\n", clkdm->name, pwrdm->name); for (i = 0; i < PWRDM_MAX_CLKDMS; i++) if (pwrdm->pwrdm_clkdms[i] == clkdm) break; if (i == PWRDM_MAX_CLKDMS) { - pr_debug("powerdomain: %s: clkdm %s not associated?!\n", - pwrdm->name, clkdm->name); + pr_debug("powerdomain: clkdm %s not associated with pwrdm " + "%s ?!\n", clkdm->name, pwrdm->name); ret = -ENOENT; goto pdc_exit; } @@ -487,7 +487,7 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) if (!(pwrdm->pwrsts & (1 << pwrst))) return -EINVAL; - pr_debug("powerdomain: %s: setting next powerstate to %0x\n", + pr_debug("powerdomain: setting next powerstate for %s to %0x\n", pwrdm->name, pwrst); if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst) { @@ -589,7 +589,7 @@ int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) if (!(pwrdm->pwrsts_logic_ret & (1 << pwrst))) return -EINVAL; - pr_debug("powerdomain: %s: setting next logic powerstate to %0x\n", + pr_debug("powerdomain: setting next logic powerstate for %s to %0x\n", pwrdm->name, pwrst); if (arch_pwrdm && arch_pwrdm->pwrdm_set_logic_retst) @@ -626,8 +626,8 @@ int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst))) return -EINVAL; - pr_debug("powerdomain: %s: setting next memory powerstate for bank %0x while pwrdm-ON to %0x\n", - pwrdm->name, bank, pwrst); + pr_debug("powerdomain: setting next memory powerstate for domain %s " + "bank %0x while pwrdm-ON to %0x\n", pwrdm->name, bank, pwrst); if (arch_pwrdm && arch_pwrdm->pwrdm_set_mem_onst) ret = arch_pwrdm->pwrdm_set_mem_onst(pwrdm, bank, pwrst); @@ -664,8 +664,8 @@ int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst))) return -EINVAL; - pr_debug("powerdomain: %s: setting next memory powerstate for bank %0x while pwrdm-RET to %0x\n", - pwrdm->name, bank, pwrst); + pr_debug("powerdomain: setting next memory powerstate for domain %s " + "bank %0x while pwrdm-RET to %0x\n", pwrdm->name, bank, pwrst); if (arch_pwrdm && arch_pwrdm->pwrdm_set_mem_retst) ret = arch_pwrdm->pwrdm_set_mem_retst(pwrdm, bank, pwrst); @@ -843,7 +843,7 @@ int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) * warn & fail if it is not ON. */ - pr_debug("powerdomain: %s: clearing previous power state reg\n", + pr_debug("powerdomain: clearing previous power state reg for %s\n", pwrdm->name); if (arch_pwrdm && arch_pwrdm->pwrdm_clear_all_prev_pwrst) @@ -873,7 +873,8 @@ int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) return ret; - pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n", pwrdm->name); + pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n", + pwrdm->name); if (arch_pwrdm && arch_pwrdm->pwrdm_enable_hdwr_sar) ret = arch_pwrdm->pwrdm_enable_hdwr_sar(pwrdm); @@ -902,7 +903,8 @@ int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) return ret; - pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n", pwrdm->name); + pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n", + pwrdm->name); if (arch_pwrdm && arch_pwrdm->pwrdm_disable_hdwr_sar) ret = arch_pwrdm->pwrdm_disable_hdwr_sar(pwrdm); diff --git a/trunk/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/trunk/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c index 3950ccfe5f4a..0f0a9f1592fe 100644 --- a/trunk/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c +++ b/trunk/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c @@ -122,8 +122,8 @@ static int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm) udelay(1); if (c > PWRDM_TRANSITION_BAILOUT) { - pr_err("powerdomain: %s: waited too long to complete transition\n", - pwrdm->name); + printk(KERN_ERR "powerdomain: waited too long for " + "powerdomain %s to complete transition\n", pwrdm->name); return -EAGAIN; } diff --git a/trunk/arch/arm/mach-omap2/powerdomain44xx.c b/trunk/arch/arm/mach-omap2/powerdomain44xx.c index aeac6f35ca10..601325b852a4 100644 --- a/trunk/arch/arm/mach-omap2/powerdomain44xx.c +++ b/trunk/arch/arm/mach-omap2/powerdomain44xx.c @@ -198,8 +198,8 @@ static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) udelay(1); if (c > PWRDM_TRANSITION_BAILOUT) { - pr_err("powerdomain: %s: waited too long to complete transition\n", - pwrdm->name); + printk(KERN_ERR "powerdomain: waited too long for " + "powerdomain %s to complete transition\n", pwrdm->name); return -EAGAIN; } diff --git a/trunk/arch/arm/mach-omap2/prcm.c b/trunk/arch/arm/mach-omap2/prcm.c index 0f51e034e0aa..9c9d23c10205 100644 --- a/trunk/arch/arm/mach-omap2/prcm.c +++ b/trunk/arch/arm/mach-omap2/prcm.c @@ -139,11 +139,11 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest, MAX_MODULE_ENABLE_WAIT, i); if (i < MAX_MODULE_ENABLE_WAIT) - pr_debug("cm: Module associated with clock %s ready after %d loops\n", - name, i); + pr_debug("cm: Module associated with clock %s ready after %d " + "loops\n", name, i); else - pr_err("cm: Module associated with clock %s didn't enable in %d tries\n", - name, MAX_MODULE_ENABLE_WAIT); + pr_err("cm: Module associated with clock %s didn't enable in " + "%d tries\n", name, MAX_MODULE_ENABLE_WAIT); return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0; }; diff --git a/trunk/arch/arm/mach-omap2/serial.c b/trunk/arch/arm/mach-omap2/serial.c index 0405c8190803..7ca266e987f6 100644 --- a/trunk/arch/arm/mach-omap2/serial.c +++ b/trunk/arch/arm/mach-omap2/serial.c @@ -232,8 +232,9 @@ static int __init omap_serial_early_init(void) if (console_loglevel >= 10) { uart_debug = true; - pr_info("%s used as console in debug mode: uart%d clocks will not be gated", - uart_name, uart->num); + pr_info("%s used as console in debug mode" + " uart%d clocks will not be" + " gated", uart_name, uart->num); } if (cmdline_find_option("no_console_suspend")) @@ -318,11 +319,8 @@ void __init omap_serial_init_port(struct omap_board_data *bdata, pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size, NULL, 0, false); - if (IS_ERR(pdev)) { - WARN(1, "Could not build omap_device for %s: %s.\n", name, - oh->name); - return; - } + WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n", + name, oh->name); if ((console_uart_id == bdata->id) && no_console_suspend) omap_device_disable_idle_on_suspend(pdev); diff --git a/trunk/arch/arm/mach-omap2/sr_device.c b/trunk/arch/arm/mach-omap2/sr_device.c index cbeae56b56a9..d033a65f4e4e 100644 --- a/trunk/arch/arm/mach-omap2/sr_device.c +++ b/trunk/arch/arm/mach-omap2/sr_device.c @@ -104,15 +104,16 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user) sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL); if (!sr_data) { - pr_err("%s: Unable to allocate memory for %s sr_data\n", - __func__, oh->name); + pr_err("%s: Unable to allocate memory for %s sr_data.Error!\n", + __func__, oh->name); return -ENOMEM; } sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr; if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) { - pr_err("%s: No voltage domain specified for %s. Cannot initialize\n", - __func__, oh->name); + pr_err("%s: No voltage domain specified for %s." + "Cannot initialize\n", __func__, + oh->name); goto exit; } @@ -130,8 +131,8 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user) omap_voltage_get_volttable(sr_data->voltdm, &volt_data); if (!volt_data) { - pr_err("%s: No Voltage table registered for VDD%d\n", - __func__, i + 1); + pr_warning("%s: No Voltage table registered fo VDD%d." + "Something really wrong\n\n", __func__, i + 1); goto exit; } diff --git a/trunk/arch/arm/mach-omap2/timer.c b/trunk/arch/arm/mach-omap2/timer.c index 5214d5bfba27..207b94f2cccc 100644 --- a/trunk/arch/arm/mach-omap2/timer.c +++ b/trunk/arch/arm/mach-omap2/timer.c @@ -213,7 +213,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); BUG_ON(res); - omap2_gp_timer_irq.dev_id = &clkev; + omap2_gp_timer_irq.dev_id = (void *)&clkev; setup_irq(clkev.irq, &omap2_gp_timer_irq); __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); diff --git a/trunk/arch/arm/mach-omap2/vc.c b/trunk/arch/arm/mach-omap2/vc.c index 880249b17012..b451f3c13292 100644 --- a/trunk/arch/arm/mach-omap2/vc.c +++ b/trunk/arch/arm/mach-omap2/vc.c @@ -115,8 +115,9 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, } if (!voltdm->pmic->uv_to_vsel) { - pr_err("%s: PMIC function to convert voltage in uV to vsel not registered. Hence unable to scale voltage for vdd_%s\n", - __func__, voltdm->name); + pr_err("%s: PMIC function to convert voltage in uV to" + "vsel not registered. Hence unable to scale voltage" + "for vdd_%s\n", __func__, voltdm->name); return -ENODATA; } diff --git a/trunk/arch/arm/mach-omap2/voltage.c b/trunk/arch/arm/mach-omap2/voltage.c index 3ac8fe1d8213..4dc60e83e00d 100644 --- a/trunk/arch/arm/mach-omap2/voltage.c +++ b/trunk/arch/arm/mach-omap2/voltage.c @@ -195,8 +195,8 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, return &voltdm->volt_data[i]; } - pr_notice("%s: Unable to match the current voltage with the voltage table for vdd_%s\n", - __func__, voltdm->name); + pr_notice("%s: Unable to match the current voltage with the voltage" + "table for vdd_%s\n", __func__, voltdm->name); return ERR_PTR(-ENODATA); } @@ -249,8 +249,8 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, voltdm->scale = omap_vc_bypass_scale; return; default: - pr_warn("%s: Trying to change the method of voltage scaling to an unsupported one!\n", - __func__); + pr_warning("%s: Trying to change the method of voltage scaling" + "to an unsupported one!\n", __func__); } } @@ -331,8 +331,8 @@ int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm) if (!voltdm || !pwrdm) return -EINVAL; - pr_debug("voltagedomain: %s: associating powerdomain %s\n", - voltdm->name, pwrdm->name); + pr_debug("voltagedomain: associating powerdomain %s with voltagedomain " + "%s\n", pwrdm->name, voltdm->name); list_add(&pwrdm->voltdm_node, &voltdm->pwrdm_list); diff --git a/trunk/arch/arm/mach-omap2/vp.c b/trunk/arch/arm/mach-omap2/vp.c index 85241b828c02..f95c1bad9dc6 100644 --- a/trunk/arch/arm/mach-omap2/vp.c +++ b/trunk/arch/arm/mach-omap2/vp.c @@ -138,8 +138,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, udelay(1); } if (timeout >= VP_TRANXDONE_TIMEOUT) { - pr_warn("%s: vdd_%s TRANXDONE timeout exceeded. Voltage change aborted", - __func__, voltdm->name); + pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." + "Voltage change aborted", __func__, voltdm->name); return -ETIMEDOUT; } @@ -157,8 +157,9 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, omap_test_timeout(vp->common->ops->check_txdone(vp->id), VP_TRANXDONE_TIMEOUT, timeout); if (timeout >= VP_TRANXDONE_TIMEOUT) - pr_err("%s: vdd_%s TRANXDONE timeout exceeded. TRANXDONE never got set after the voltage update\n", - __func__, voltdm->name); + pr_err("%s: vdd_%s TRANXDONE timeout exceeded." + "TRANXDONE never got set after the voltage update\n", + __func__, voltdm->name); omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); @@ -175,7 +176,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, } if (timeout >= VP_TRANXDONE_TIMEOUT) - pr_warn("%s: vdd_%s TRANXDONE timeout exceeded while trying to clear the TRANXDONE status\n", + pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying" + "to clear the TRANXDONE status\n", __func__, voltdm->name); /* Clear force bit */ @@ -255,8 +257,8 @@ void omap_vp_disable(struct voltagedomain *voltdm) /* If VP is already disabled, do nothing. Return */ if (!vp->enabled) { - pr_warn("%s: Trying to disable VP for vdd_%s when it is already disabled\n", - __func__, voltdm->name); + pr_warning("%s: Trying to disable VP for vdd_%s when" + "it is already disabled\n", __func__, voltdm->name); return; } diff --git a/trunk/arch/arm/plat-omap/dma.c b/trunk/arch/arm/plat-omap/dma.c index c76ed8bff838..6dcad5873d57 100644 --- a/trunk/arch/arm/plat-omap/dma.c +++ b/trunk/arch/arm/plat-omap/dma.c @@ -968,7 +968,8 @@ void omap_stop_dma(int lch) l = p->dma_read(CCR, lch); } if (i >= 100) - pr_err("DMA drain did not complete on lch %d\n", lch); + printk(KERN_ERR "DMA drain did not complete on " + "lch %d\n", lch); /* Restore OCP_SYSCONFIG */ p->dma_write(sys_cf, OCP_SYSCONFIG, lch); } else { @@ -1152,7 +1153,8 @@ void omap_dma_link_lch(int lch_head, int lch_queue) if ((dma_chan[lch_head].dev_id == -1) || (dma_chan[lch_queue].dev_id == -1)) { - pr_err("omap_dma: trying to link non requested channels\n"); + printk(KERN_ERR "omap_dma: trying to link " + "non requested channels\n"); dump_stack(); } @@ -1178,13 +1180,15 @@ void omap_dma_unlink_lch(int lch_head, int lch_queue) if (dma_chan[lch_head].next_lch != lch_queue || dma_chan[lch_head].next_lch == -1) { - pr_err("omap_dma: trying to unlink non linked channels\n"); + printk(KERN_ERR "omap_dma: trying to unlink " + "non linked channels\n"); dump_stack(); } if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) || (dma_chan[lch_queue].flags & OMAP_DMA_ACTIVE)) { - pr_err("omap_dma: You need to stop the DMA channels before unlinking\n"); + printk(KERN_ERR "omap_dma: You need to stop the DMA channels " + "before unlinking\n"); dump_stack(); } @@ -1826,15 +1830,16 @@ static int omap1_dma_handle_ch(int ch) if ((csr & 0x3f) == 0) return 0; if (unlikely(dma_chan[ch].dev_id == -1)) { - pr_warn("Spurious interrupt from DMA channel %d (CSR %04x)\n", - ch, csr); + printk(KERN_WARNING "Spurious interrupt from DMA channel " + "%d (CSR %04x)\n", ch, csr); return 0; } if (unlikely(csr & OMAP1_DMA_TOUT_IRQ)) - pr_warn("DMA timeout with device %d\n", dma_chan[ch].dev_id); + printk(KERN_WARNING "DMA timeout with device %d\n", + dma_chan[ch].dev_id); if (unlikely(csr & OMAP_DMA_DROP_IRQ)) - pr_warn("DMA synchronization event drop occurred with device %d\n", - dma_chan[ch].dev_id); + printk(KERN_WARNING "DMA synchronization event drop occurred " + "with device %d\n", dma_chan[ch].dev_id); if (likely(csr & OMAP_DMA_BLOCK_IRQ)) dma_chan[ch].flags &= ~OMAP_DMA_ACTIVE; if (likely(dma_chan[ch].callback != NULL)) @@ -1874,19 +1879,21 @@ static int omap2_dma_handle_ch(int ch) if (!status) { if (printk_ratelimit()) - pr_warn("Spurious DMA IRQ for lch %d\n", ch); + printk(KERN_WARNING "Spurious DMA IRQ for lch %d\n", + ch); p->dma_write(1 << ch, IRQSTATUS_L0, ch); return 0; } if (unlikely(dma_chan[ch].dev_id == -1)) { if (printk_ratelimit()) - pr_warn("IRQ %04x for non-allocated DMA channel %d\n", - status, ch); + printk(KERN_WARNING "IRQ %04x for non-allocated DMA" + "channel %d\n", status, ch); return 0; } if (unlikely(status & OMAP_DMA_DROP_IRQ)) - pr_info("DMA synchronization event drop occurred with device %d\n", - dma_chan[ch].dev_id); + printk(KERN_INFO + "DMA synchronization event drop occurred with device " + "%d\n", dma_chan[ch].dev_id); if (unlikely(status & OMAP2_DMA_TRANS_ERR_IRQ)) { printk(KERN_INFO "DMA transaction error with device %d\n", dma_chan[ch].dev_id); @@ -2006,9 +2013,8 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev) p = pdev->dev.platform_data; if (!p) { - dev_err(&pdev->dev, - "%s: System DMA initialized without platform data\n", - __func__); + dev_err(&pdev->dev, "%s: System DMA initialized without" + "platform data\n", __func__); return -EINVAL; } @@ -2083,8 +2089,8 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev) } ret = setup_irq(dma_irq, &omap24xx_dma_irq); if (ret) { - dev_err(&pdev->dev, "set_up failed for IRQ %d for DMA (error %d)\n", - dma_irq, ret); + dev_err(&pdev->dev, "set_up failed for IRQ %d" + "for DMA (error %d)\n", dma_irq, ret); goto exit_dma_lch_fail; } } @@ -2092,7 +2098,8 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev) /* reserve dma channels 0 and 1 in high security devices */ if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP)) { - pr_info("Reserving DMA channels 0 and 1 for HS ROM code\n"); + printk(KERN_INFO "Reserving DMA channels 0 and 1 for " + "HS ROM code\n"); dma_chan[0].dev_id = 0; dma_chan[1].dev_id = 1; } @@ -2100,8 +2107,8 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev) return 0; exit_dma_irq_fail: - dev_err(&pdev->dev, "unable to request IRQ %d for DMA (error %d)\n", - dma_irq, ret); + dev_err(&pdev->dev, "unable to request IRQ %d" + "for DMA (error %d)\n", dma_irq, ret); for (irq_rel = 0; irq_rel < ch; irq_rel++) { dma_irq = platform_get_irq(pdev, irq_rel); free_irq(dma_irq, (void *)(irq_rel + 1)); diff --git a/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h b/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h index 9b9646c3673d..6132972aff37 100644 --- a/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -658,7 +658,6 @@ extern int omap2420_hwmod_init(void); extern int omap2430_hwmod_init(void); extern int omap3xxx_hwmod_init(void); extern int omap44xx_hwmod_init(void); -extern int am33xx_hwmod_init(void); extern int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois); diff --git a/trunk/arch/arm/plat-omap/mux.c b/trunk/arch/arm/plat-omap/mux.c index fd0d3aad00ef..cff8712122bb 100644 --- a/trunk/arch/arm/plat-omap/mux.c +++ b/trunk/arch/arm/plat-omap/mux.c @@ -76,7 +76,7 @@ int __init_or_module omap_cfg_reg(const unsigned long index) return -ENODEV; } - reg = &mux_cfg->pins[index]; + reg = (struct pin_config *)&mux_cfg->pins[index]; if (!mux_cfg->cfg_reg) return -ENODEV; diff --git a/trunk/arch/arm/plat-omap/omap-pm-noop.c b/trunk/arch/arm/plat-omap/omap-pm-noop.c index 9f6413324df9..5a97b4d98d41 100644 --- a/trunk/arch/arm/plat-omap/omap-pm-noop.c +++ b/trunk/arch/arm/plat-omap/omap-pm-noop.c @@ -41,11 +41,11 @@ int omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t) }; if (t == -1) - pr_debug("OMAP PM: remove max MPU wakeup latency constraint: dev %s\n", - dev_name(dev)); + pr_debug("OMAP PM: remove max MPU wakeup latency constraint: " + "dev %s\n", dev_name(dev)); else - pr_debug("OMAP PM: add max MPU wakeup latency constraint: dev %s, t = %ld usec\n", - dev_name(dev), t); + pr_debug("OMAP PM: add max MPU wakeup latency constraint: " + "dev %s, t = %ld usec\n", dev_name(dev), t); /* * For current Linux, this needs to map the MPU to a @@ -70,10 +70,11 @@ int omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r) }; if (r == 0) - pr_debug("OMAP PM: remove min bus tput constraint: dev %s for agent_id %d\n", - dev_name(dev), agent_id); + pr_debug("OMAP PM: remove min bus tput constraint: " + "dev %s for agent_id %d\n", dev_name(dev), agent_id); else - pr_debug("OMAP PM: add min bus tput constraint: dev %s for agent_id %d: rate %ld KiB\n", + pr_debug("OMAP PM: add min bus tput constraint: " + "dev %s for agent_id %d: rate %ld KiB\n", dev_name(dev), agent_id, r); /* @@ -96,11 +97,11 @@ int omap_pm_set_max_dev_wakeup_lat(struct device *req_dev, struct device *dev, }; if (t == -1) - pr_debug("OMAP PM: remove max device latency constraint: dev %s\n", - dev_name(dev)); + pr_debug("OMAP PM: remove max device latency constraint: " + "dev %s\n", dev_name(dev)); else - pr_debug("OMAP PM: add max device latency constraint: dev %s, t = %ld usec\n", - dev_name(dev), t); + pr_debug("OMAP PM: add max device latency constraint: " + "dev %s, t = %ld usec\n", dev_name(dev), t); /* * For current Linux, this needs to map the device to a @@ -126,11 +127,11 @@ int omap_pm_set_max_sdma_lat(struct device *dev, long t) }; if (t == -1) - pr_debug("OMAP PM: remove max DMA latency constraint: dev %s\n", - dev_name(dev)); + pr_debug("OMAP PM: remove max DMA latency constraint: " + "dev %s\n", dev_name(dev)); else - pr_debug("OMAP PM: add max DMA latency constraint: dev %s, t = %ld usec\n", - dev_name(dev), t); + pr_debug("OMAP PM: add max DMA latency constraint: " + "dev %s, t = %ld usec\n", dev_name(dev), t); /* * For current Linux PM QOS params, this code should scan the @@ -155,11 +156,11 @@ int omap_pm_set_min_clk_rate(struct device *dev, struct clk *c, long r) } if (r == 0) - pr_debug("OMAP PM: remove min clk rate constraint: dev %s\n", - dev_name(dev)); + pr_debug("OMAP PM: remove min clk rate constraint: " + "dev %s\n", dev_name(dev)); else - pr_debug("OMAP PM: add min clk rate constraint: dev %s, rate = %ld Hz\n", - dev_name(dev), r); + pr_debug("OMAP PM: add min clk rate constraint: " + "dev %s, rate = %ld Hz\n", dev_name(dev), r); /* * Code in a real implementation should keep track of these diff --git a/trunk/arch/arm/plat-omap/omap_device.c b/trunk/arch/arm/plat-omap/omap_device.c index b59edb065c70..c490240bb82c 100644 --- a/trunk/arch/arm/plat-omap/omap_device.c +++ b/trunk/arch/arm/plat-omap/omap_device.c @@ -1,3 +1,4 @@ + /* * omap_device implementation * @@ -152,19 +153,21 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) act_lat = timespec_to_ns(&c); dev_dbg(&od->pdev->dev, - "omap_device: pm_lat %d: activate: elapsed time %llu nsec\n", - od->pm_lat_level, act_lat); + "omap_device: pm_lat %d: activate: elapsed time " + "%llu nsec\n", od->pm_lat_level, act_lat); if (act_lat > odpl->activate_lat) { odpl->activate_lat_worst = act_lat; if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { odpl->activate_lat = act_lat; dev_dbg(&od->pdev->dev, - "new worst case activate latency %d: %llu\n", + "new worst case activate latency " + "%d: %llu\n", od->pm_lat_level, act_lat); } else dev_warn(&od->pdev->dev, - "activate latency %d higher than expected. (%llu > %d)\n", + "activate latency %d " + "higher than exptected. (%llu > %d)\n", od->pm_lat_level, act_lat, odpl->activate_lat); } @@ -217,19 +220,21 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) deact_lat = timespec_to_ns(&c); dev_dbg(&od->pdev->dev, - "omap_device: pm_lat %d: deactivate: elapsed time %llu nsec\n", - od->pm_lat_level, deact_lat); + "omap_device: pm_lat %d: deactivate: elapsed time " + "%llu nsec\n", od->pm_lat_level, deact_lat); if (deact_lat > odpl->deactivate_lat) { odpl->deactivate_lat_worst = deact_lat; if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { odpl->deactivate_lat = deact_lat; dev_dbg(&od->pdev->dev, - "new worst case deactivate latency %d: %llu\n", + "new worst case deactivate latency " + "%d: %llu\n", od->pm_lat_level, deact_lat); } else dev_warn(&od->pdev->dev, - "deactivate latency %d higher than expected. (%llu > %d)\n", + "deactivate latency %d " + "higher than exptected. (%llu > %d)\n", od->pm_lat_level, deact_lat, odpl->deactivate_lat); } @@ -444,8 +449,8 @@ static int omap_device_count_resources(struct omap_device *od) for (i = 0; i < od->hwmods_cnt; i++) c += omap_hwmod_count_resources(od->hwmods[i]); - pr_debug("omap_device: %s: counted %d total resources across %d hwmods\n", - od->pdev->name, c, od->hwmods_cnt); + pr_debug("omap_device: %s: counted %d total resources across %d " + "hwmods\n", od->pdev->name, c, od->hwmods_cnt); return c; }