From 832bb2461d361bb079f43304a451159410a9691b Mon Sep 17 00:00:00 2001 From: ashish kalra Date: Wed, 31 Oct 2007 19:28:02 +0800 Subject: [PATCH] --- yaml --- r: 73049 b: refs/heads/master c: e7eac96e8f0e57a6e9f94943557bc2b23be31471 h: refs/heads/master i: 73047: 728106342c8e225c3ff44901963d272c569bd826 v: v3 --- [refs] | 2 +- trunk/drivers/ata/sata_fsl.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 1f97af8fcfd5..15390530b633 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 520d3a1a8cb3eb8794e3dbb822dbc40c20f18e52 +refs/heads/master: e7eac96e8f0e57a6e9f94943557bc2b23be31471 diff --git a/trunk/drivers/ata/sata_fsl.c b/trunk/drivers/ata/sata_fsl.c index 5892472a5681..e076e1f2e4d1 100644 --- a/trunk/drivers/ata/sata_fsl.c +++ b/trunk/drivers/ata/sata_fsl.c @@ -652,6 +652,7 @@ static int sata_fsl_port_start(struct ata_port *ap) VPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); VPRINTK("CHBA = 0x%x\n", ioread32(hcr_base + CHBA)); +#ifdef CONFIG_MPC8315_DS /* * Workaround for 8315DS board 3gbps link-up issue, * currently limit SATA port to GEN1 speed @@ -664,6 +665,7 @@ static int sata_fsl_port_start(struct ata_port *ap) sata_fsl_scr_read(ap, SCR_CONTROL, &temp); dev_printk(KERN_WARNING, dev, "scr_control, speed limited to %x\n", temp); +#endif return 0; }