From 8347f89da3a205ad2400ec5bb478a3f8adb6ba2e Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Wed, 31 Oct 2007 15:15:29 -0400 Subject: [PATCH] --- yaml --- r: 77511 b: refs/heads/master c: 15754bf98ff564e8bb5296c7f5e67bc59b5700aa h: refs/heads/master i: 77509: 8e756e7db1a04983d681ca9c22ebb7e3f9e1c070 77507: a2b1e25fc0af8c56ad989324148f0047dec2c503 77503: 5a9cc99ac2c357d979b4635bd5cb04c0fd77c388 v: v3 --- [refs] | 2 +- trunk/arch/arm/boot/compressed/head.S | 9 ++++++++- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 5a89ba0d131c..66384d55f0b3 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: e50d64097b6e63278789ee3a4394d127bd6e4254 +refs/heads/master: 15754bf98ff564e8bb5296c7f5e67bc59b5700aa diff --git a/trunk/arch/arm/boot/compressed/head.S b/trunk/arch/arm/boot/compressed/head.S index 5cac46a19bb7..2073bf080523 100644 --- a/trunk/arch/arm/boot/compressed/head.S +++ b/trunk/arch/arm/boot/compressed/head.S @@ -641,7 +641,7 @@ proc_types: .word 0x000f0000 b __armv4_mmu_cache_on b __armv4_mmu_cache_off - b __armv4_mmu_cache_flush + b __armv5tej_mmu_cache_flush .word 0x0007b000 @ ARMv6 .word 0x000ff000 @@ -821,6 +821,13 @@ iflush: mcr p15, 0, r10, c7, c10, 4 @ drain WB mov pc, lr +__armv5tej_mmu_cache_flush: +1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache + bne 1b + mcr p15, 0, r0, c7, c5, 0 @ flush I cache + mcr p15, 0, r0, c7, c10, 4 @ drain WB + mov pc, lr + __armv4_mmu_cache_flush: mov r2, #64*1024 @ default: 32K dcache size (*2) mov r11, #32 @ default: 32 byte line size