diff --git a/[refs] b/[refs]
index e03c2f8e16fd..288e8e0d60f4 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 7fd0da4085d5b012a6bdcbbd63da7ead9fc69ad4
+refs/heads/master: d4c4d09415c48ecb621804cd4ec4a7a4d9a3662f
diff --git a/trunk/arch/x86/kernel/setup_64.c b/trunk/arch/x86/kernel/setup_64.c
index 185d3cc9129b..5e269a5dde2e 100644
--- a/trunk/arch/x86/kernel/setup_64.c
+++ b/trunk/arch/x86/kernel/setup_64.c
@@ -751,14 +751,21 @@ static void __cpuinit fam10h_check_enable_mmcfg(struct cpuinfo_x86 *c)
 
 	/* try to make sure that AP's setting is identical to BSP setting */
 	if (val & FAM10H_MMIO_CONF_ENABLE) {
-		u64 base;
-		base = val & (0xffffULL << 32);
-		if (fam10h_pci_mmconf_base_status <= 0) {
-			fam10h_pci_mmconf_base = base;
-			fam10h_pci_mmconf_base_status = 1;
-			return;
-		} else if (fam10h_pci_mmconf_base ==  base)
-			return;
+		unsigned busnbits;
+		busnbits = (val >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
+			FAM10H_MMIO_CONF_BUSRANGE_MASK;
+
+		/* only trust the one handle 256 buses, if acpi=off */
+		if (!acpi_pci_disabled || busnbits >= 8) {
+			u64 base;
+			base = val & (0xffffULL << 32);
+			if (fam10h_pci_mmconf_base_status <= 0) {
+				fam10h_pci_mmconf_base = base;
+				fam10h_pci_mmconf_base_status = 1;
+				return;
+			} else if (fam10h_pci_mmconf_base ==  base)
+				return;
+		}
 	}
 
 	/*