From 84a1ae1c28a9f88854c6e02a482779e8637d35b7 Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Sun, 4 Nov 2012 12:24:47 +0100 Subject: [PATCH] --- yaml --- r: 345285 b: refs/heads/master c: b3fcabb15bb83202fb5e4e5b296711b91c4942a3 h: refs/heads/master i: 345283: 081e0243a7ac70c985fefa36baf5b2474c7007a6 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 8e7d953174e9..dffb6d144968 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 1abd02e2dd7e0bd577000301fb2fd47780637387 +refs/heads/master: b3fcabb15bb83202fb5e4e5b296711b91c4942a3 diff --git a/trunk/drivers/gpu/drm/i915/intel_ringbuffer.c b/trunk/drivers/gpu/drm/i915/intel_ringbuffer.c index f7617a4e005f..a035ac223fb0 100644 --- a/trunk/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/trunk/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -1475,7 +1475,7 @@ static int blt_ring_flush(struct intel_ring_buffer *ring, */ if (invalidate & I915_GEM_DOMAIN_RENDER) cmd |= MI_INVALIDATE_TLB | MI_FLUSH_DW_STORE_INDEX | - MI_FLUSH_DW_OP_STOREDW | MI_FLUSH_DW_OP_STOREDW; + MI_FLUSH_DW_OP_STOREDW; intel_ring_emit(ring, cmd); intel_ring_emit(ring, I915_GEM_HWS_SCRATCH_ADDR | MI_FLUSH_DW_USE_GTT); intel_ring_emit(ring, 0);