From 84f3d1575689bda0da167899f9a87d0d1c988d88 Mon Sep 17 00:00:00 2001 From: "Antonino A. Daplas" Date: Tue, 8 May 2007 00:38:24 -0700 Subject: [PATCH] --- yaml --- r: 54906 b: refs/heads/master c: e296927bcc910ffa9e171c0108a4bf74c0836553 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/video/nvidia/nv_i2c.c | 18 ++++++------------ 2 files changed, 7 insertions(+), 13 deletions(-) diff --git a/[refs] b/[refs] index d5c9e8f14ad0..50e571c130a2 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: b9b2696de920e7366e2ce0cdc3b3b7fc11e44e99 +refs/heads/master: e296927bcc910ffa9e171c0108a4bf74c0836553 diff --git a/trunk/drivers/video/nvidia/nv_i2c.c b/trunk/drivers/video/nvidia/nv_i2c.c index 4fc7118397fe..afe4567e1ff4 100644 --- a/trunk/drivers/video/nvidia/nv_i2c.c +++ b/trunk/drivers/video/nvidia/nv_i2c.c @@ -30,16 +30,14 @@ static void nvidia_gpio_setscl(void *data, int state) struct nvidia_par *par = chan->par; u32 val; - VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1); - val = VGA_RD08(par->PCIO, 0x3d5) & 0xf0; + val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0; if (state) val |= 0x20; else val &= ~0x20; - VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1); - VGA_WR08(par->PCIO, 0x3d5, val | 0x1); + NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01); } static void nvidia_gpio_setsda(void *data, int state) @@ -48,16 +46,14 @@ static void nvidia_gpio_setsda(void *data, int state) struct nvidia_par *par = chan->par; u32 val; - VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1); - val = VGA_RD08(par->PCIO, 0x3d5) & 0xf0; + val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0; if (state) val |= 0x10; else val &= ~0x10; - VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1); - VGA_WR08(par->PCIO, 0x3d5, val | 0x1); + NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01); } static int nvidia_gpio_getscl(void *data) @@ -66,8 +62,7 @@ static int nvidia_gpio_getscl(void *data) struct nvidia_par *par = chan->par; u32 val = 0; - VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base); - if (VGA_RD08(par->PCIO, 0x3d5) & 0x04) + if (NVReadCrtc(par, chan->ddc_base) & 0x04) val = 1; return val; @@ -79,8 +74,7 @@ static int nvidia_gpio_getsda(void *data) struct nvidia_par *par = chan->par; u32 val = 0; - VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base); - if (VGA_RD08(par->PCIO, 0x3d5) & 0x08) + if (NVReadCrtc(par, chan->ddc_base) & 0x08) val = 1; return val;