From 87a5a50db3c10d4375b4b9e04c3874da09559894 Mon Sep 17 00:00:00 2001
From: Paul Mundt <lethal@linux-sh.org>
Date: Tue, 2 Feb 2010 17:38:04 +0900
Subject: [PATCH] --- yaml --- r: 181169 b: refs/heads/master c:
 c7a967273a539a9a38413753c58125e777e2d30d h: refs/heads/master i:   181167:
 9bee39c04a8e35ef82218180b3ab99c5bbc698bb v: v3

---
 [refs]                                  |  2 +-
 trunk/arch/sh/Kconfig                   |  2 +-
 trunk/arch/sh/boards/mach-se/7724/irq.c | 38 ++++++++++++++++++-------
 3 files changed, 29 insertions(+), 13 deletions(-)

diff --git a/[refs] b/[refs]
index 504736edb95e..fa3437d41d6a 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: e9867c569970d8afb4b882bafbbe81426bd46333
+refs/heads/master: c7a967273a539a9a38413753c58125e777e2d30d
diff --git a/trunk/arch/sh/Kconfig b/trunk/arch/sh/Kconfig
index bae53831c06b..0f023bb62f99 100644
--- a/trunk/arch/sh/Kconfig
+++ b/trunk/arch/sh/Kconfig
@@ -731,7 +731,7 @@ config GUSA_RB
 config SPARSE_IRQ
 	def_bool y
 	depends on SUPERH32 && !SH_DREAMCAST && !SH_HIGHLANDER && \
-		   !SH_RTS7751R2D && !HD64461 && !SH_7724_SOLUTION_ENGINE
+		   !SH_RTS7751R2D && !HD64461
 	help
 	  This enables support for sparse irqs. This is useful in general
 	  as most CPUs have a fairly sparse array of IRQ vectors, which
diff --git a/trunk/arch/sh/boards/mach-se/7724/irq.c b/trunk/arch/sh/boards/mach-se/7724/irq.c
index e5e021a7d1e6..0942be2daef6 100644
--- a/trunk/arch/sh/boards/mach-se/7724/irq.c
+++ b/trunk/arch/sh/boards/mach-se/7724/irq.c
@@ -93,18 +93,15 @@ static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
 	struct fpga_irq set = get_fpga_irq(irq);
 	unsigned short intv = __raw_readw(set.sraddr);
-	struct irq_desc *ext_desc;
 	unsigned int ext_irq = set.base;
 
 	intv &= set.mask;
 
-	while (intv) {
-		if (intv & 0x0001) {
-			ext_desc = irq_desc + ext_irq;
-			handle_level_irq(ext_irq, ext_desc);
-		}
-		intv >>= 1;
-		ext_irq++;
+	for (; intv; intv >>= 1, ext_irq++) {
+		if (!(intv & 1))
+			continue;
+
+		generic_handle_irq(ext_irq);
 	}
 }
 
@@ -113,7 +110,7 @@ static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
  */
 void __init init_se7724_IRQ(void)
 {
-	int i;
+	int i, nid = cpu_to_node(boot_cpu_data);
 
 	__raw_writew(0xffff, IRQ0_MR);  /* mask all */
 	__raw_writew(0xffff, IRQ1_MR);  /* mask all */
@@ -123,10 +120,29 @@ void __init init_se7724_IRQ(void)
 	__raw_writew(0x0000, IRQ2_SR);  /* clear irq */
 	__raw_writew(0x002a, IRQ_MODE); /* set irq type */
 
-	for (i = 0; i < SE7724_FPGA_IRQ_NR; i++)
-		set_irq_chip_and_handler_name(SE7724_FPGA_IRQ_BASE + i,
+	for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) {
+		int irq, wanted;
+
+		wanted = SE7724_FPGA_IRQ_BASE + i;
+
+		irq = create_irq_nr(wanted, nid);
+		if (unlikely(irq == 0)) {
+			pr_err("%s: failed hooking irq %d for FPGA\n",
+			       __func__, wanted);
+			return;
+		}
+
+		if (unlikely(irq != wanted)) {
+			pr_err("%s: got irq %d but wanted %d, bailing.\n",
+			       __func__, irq, wanted);
+			destroy_irq(irq);
+			return;
+		}
+
+		set_irq_chip_and_handler_name(irq,
 					      &se7724_irq_chip,
 					      handle_level_irq, "level");
+	}
 
 	set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux);
 	set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);