From 8814ec5b153aaaaa7c6a29febed34d726d636faa Mon Sep 17 00:00:00 2001 From: Jike Song Date: Tue, 9 Sep 2008 23:42:03 +0800 Subject: [PATCH] --- yaml --- r: 116709 b: refs/heads/master c: 5993760f7fc75b77e4701f1e56dc84c0d6cf18d5 h: refs/heads/master i: 116707: 00f76503ee8eff2b33711e483baa2dcd4732a13a v: v3 --- [refs] | 2 +- trunk/drivers/pci/msi.c | 10 ++++------ 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/[refs] b/[refs] index 9dbf79937443..16a54f77749c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7f2feec140f1f1e4f701e013a2bf8284a9ec2a3c +refs/heads/master: 5993760f7fc75b77e4701f1e56dc84c0d6cf18d5 diff --git a/trunk/drivers/pci/msi.c b/trunk/drivers/pci/msi.c index 4a10b5624f72..d2812013fd22 100644 --- a/trunk/drivers/pci/msi.c +++ b/trunk/drivers/pci/msi.c @@ -378,23 +378,21 @@ static int msi_capability_init(struct pci_dev *dev) entry->msi_attrib.masked = 1; entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ entry->msi_attrib.pos = pos; - if (is_mask_bit_support(control)) { + if (entry->msi_attrib.maskbit) { entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos, - is_64bit_address(control)); + entry->msi_attrib.is_64); } entry->dev = dev; if (entry->msi_attrib.maskbit) { unsigned int maskbits, temp; /* All MSIs are unmasked by default, Mask them all */ pci_read_config_dword(dev, - msi_mask_bits_reg(pos, is_64bit_address(control)), + msi_mask_bits_reg(pos, entry->msi_attrib.is_64), &maskbits); temp = (1 << multi_msi_capable(control)); temp = ((temp - 1) & ~temp); maskbits |= temp; - pci_write_config_dword(dev, - msi_mask_bits_reg(pos, is_64bit_address(control)), - maskbits); + pci_write_config_dword(dev, entry->msi_attrib.is_64, maskbits); entry->msi_attrib.maskbits_mask = temp; } list_add_tail(&entry->list, &dev->msi_list);