From 88981b5a2f823a2d2d7e4a828716cf539986510d Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Fri, 8 Oct 2010 12:09:12 -0400 Subject: [PATCH] --- yaml --- r: 211465 b: refs/heads/master c: 3555e53b5b4915bc58d08ece6cb2bfa97dda1f9e h: refs/heads/master i: 211463: 5785d9adb2a39211781e0d27fc7eca4bbc9d0c73 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/evergreen.c | 2 +- trunk/drivers/gpu/drm/radeon/r600.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 730fe7a3607c..a1da7816d375 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c919b371cb734f42b1130e706ecee262f8d9261d +refs/heads/master: 3555e53b5b4915bc58d08ece6cb2bfa97dda1f9e diff --git a/trunk/drivers/gpu/drm/radeon/evergreen.c b/trunk/drivers/gpu/drm/radeon/evergreen.c index 315e1341a942..a90f0c03b838 100644 --- a/trunk/drivers/gpu/drm/radeon/evergreen.c +++ b/trunk/drivers/gpu/drm/radeon/evergreen.c @@ -1521,7 +1521,7 @@ void evergreen_disable_interrupt_state(struct radeon_device *rdev) { u32 tmp; - WREG32(CP_INT_CNTL, 0); + WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); WREG32(GRBM_INT_CNTL, 0); WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); diff --git a/trunk/drivers/gpu/drm/radeon/r600.c b/trunk/drivers/gpu/drm/radeon/r600.c index ba05d3e7d145..7b65e4efe8af 100644 --- a/trunk/drivers/gpu/drm/radeon/r600.c +++ b/trunk/drivers/gpu/drm/radeon/r600.c @@ -2912,7 +2912,7 @@ static void r600_disable_interrupt_state(struct radeon_device *rdev) { u32 tmp; - WREG32(CP_INT_CNTL, 0); + WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); WREG32(GRBM_INT_CNTL, 0); WREG32(DxMODE_INT_MASK, 0); if (ASIC_IS_DCE3(rdev)) {