From 88b5519cea22d61b605a0cf8d81070565c7a7a13 Mon Sep 17 00:00:00 2001
From: David Gibson <david@gibson.dropbear.id.au>
Date: Fri, 19 Aug 2005 14:52:31 +1000
Subject: [PATCH] --- yaml --- r: 6195 b: refs/heads/master c:
 c59c464a3e29830bcfae5eea1777cad9e00087f3 h: refs/heads/master i:   6193:
 e64913ea443040ee6e09c2d2fa22bfeb1787bc11   6191:
 b1f45ec68a44cfbfca12583967ea04af6be66565 v: v3

---
 [refs]                             |  2 +-
 trunk/arch/ppc64/kernel/head.S     | 32 ++++++++++++++++--------------
 trunk/arch/ppc64/kernel/pacaData.c |  4 ++--
 trunk/include/asm-ppc64/mmu.h      |  7 +++++--
 4 files changed, 25 insertions(+), 20 deletions(-)

diff --git a/[refs] b/[refs]
index 732615d8a94a..7cf9eabd4bfa 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: ec465515eeb662f66725c8c483a46b6bdd9bdd48
+refs/heads/master: c59c464a3e29830bcfae5eea1777cad9e00087f3
diff --git a/trunk/arch/ppc64/kernel/head.S b/trunk/arch/ppc64/kernel/head.S
index eb54f0548b01..7de38ebbe973 100644
--- a/trunk/arch/ppc64/kernel/head.S
+++ b/trunk/arch/ppc64/kernel/head.S
@@ -52,9 +52,10 @@
  * We layout physical memory as follows:
  * 0x0000 - 0x00ff : Secondary processor spin code
  * 0x0100 - 0x2fff : pSeries Interrupt prologs
- * 0x3000 - 0x6fff : interrupt support, iSeries and common interrupt prologs
+ * 0x3000 - 0x5fff : interrupt support, iSeries and common interrupt prologs
+ * 0x6000 - 0x6fff : Initial (CPU0) segment table
  * 0x7000 - 0x7fff : FWNMI data area
- * 0x9000 - 0x9fff : Initial segment table
+ * 0x8000 -        : Early init and support code
  */
 
 /*
@@ -1256,6 +1257,20 @@ unrecov_slb:
 	bl	.unrecoverable_exception
 	b	1b
 
+/*
+ * Space for CPU0's segment table.
+ *
+ * On iSeries, the hypervisor must fill in at least one entry before
+ * we get control (with relocate on).  The address is give to the hv
+ * as a page number (see xLparMap in LparData.c), so this must be at a
+ * fixed address (the linker can't compute (u64)&initial_stab >>
+ * PAGE_SHIFT).
+ */
+	. = STAB0_PHYS_ADDR	/* 0x6000 */
+	.globl initial_stab
+initial_stab:
+	.space	4096
+
 /*
  * Data area reserved for FWNMI option.
  * This address (0x7000) is fixed by the RPA.
@@ -1265,19 +1280,6 @@ unrecov_slb:
 fwnmi_data_area:
 	.space	PAGE_SIZE
 
-	/*
-	 * Space for the initial segment table
-	 * For LPAR, the hypervisor must fill in at least one entry
-	 * before we get control (with relocate on)
-	 */
-	. = STAB0_PHYS_ADDR
-	.globl __start_stab
-__start_stab:
-
-	. = (STAB0_PHYS_ADDR + PAGE_SIZE)
-	.globl __end_stab
-__end_stab:
-
 /*
  * On pSeries, secondary processors spin in the following code.
  * At entry, r3 = this processor's number (physical cpu id)
diff --git a/trunk/arch/ppc64/kernel/pacaData.c b/trunk/arch/ppc64/kernel/pacaData.c
index 6316188737b6..6182a2cd90a5 100644
--- a/trunk/arch/ppc64/kernel/pacaData.c
+++ b/trunk/arch/ppc64/kernel/pacaData.c
@@ -78,7 +78,7 @@ extern unsigned long __toc_start;
 
 #define BOOTCPU_PACA_INIT(number)					    \
 {									    \
-	PACA_INIT_COMMON(number, 1, 0, STAB0_VIRT_ADDR)			    \
+	PACA_INIT_COMMON(number, 1, 0, (u64)&initial_stab)		    \
 	PACA_INIT_ISERIES(number)					    \
 }
 
@@ -90,7 +90,7 @@ extern unsigned long __toc_start;
 
 #define BOOTCPU_PACA_INIT(number)					    \
 {									    \
-	PACA_INIT_COMMON(number, 1, STAB0_PHYS_ADDR, STAB0_VIRT_ADDR)	    \
+	PACA_INIT_COMMON(number, 1, STAB0_PHYS_ADDR, (u64)&initial_stab)    \
 }
 #endif
 
diff --git a/trunk/include/asm-ppc64/mmu.h b/trunk/include/asm-ppc64/mmu.h
index 959a4bfdcd6a..789c2693483c 100644
--- a/trunk/include/asm-ppc64/mmu.h
+++ b/trunk/include/asm-ppc64/mmu.h
@@ -28,9 +28,12 @@
 #define STE_VSID_SHIFT	12
 
 /* Location of cpu0's segment table */
-#define STAB0_PAGE	0x9
+#define STAB0_PAGE	0x6
 #define STAB0_PHYS_ADDR	(STAB0_PAGE<<PAGE_SHIFT)
-#define STAB0_VIRT_ADDR	(KERNELBASE+STAB0_PHYS_ADDR)
+
+#ifndef __ASSEMBLY__
+extern char initial_stab[];
+#endif /* ! __ASSEMBLY */
 
 /*
  * SLB