From 88e7923d038cea7eaf00a60d58dd1899899273d8 Mon Sep 17 00:00:00 2001
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date: Tue, 20 Nov 2012 13:27:40 -0200
Subject: [PATCH] --- yaml --- r: 345495 b: refs/heads/master c:
 79935fca3f1259e0a6fe203b55008f84ab8f3087 h: refs/heads/master i:   345493:
 81d4b140a6f8b9a9d01f85e7c48ce5a0e54177eb   345491:
 d011a6af2865c8f79be79136c90e5ba3026da87f   345487:
 1dc439ac6532350ba3f4409f0611f27084482cfc v: v3

---
 [refs]                                     | 2 +-
 trunk/drivers/gpu/drm/i915/i915_reg.h      | 1 +
 trunk/drivers/gpu/drm/i915/intel_display.c | 4 +++-
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index 5f024aacc7ad..8f256763611d 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 17a303ec7cd5a245c621b6d0898eb3ef9fc96329
+refs/heads/master: 79935fca3f1259e0a6fe203b55008f84ab8f3087
diff --git a/trunk/drivers/gpu/drm/i915/i915_reg.h b/trunk/drivers/gpu/drm/i915/i915_reg.h
index 2d838766418b..5aba146300d3 100644
--- a/trunk/drivers/gpu/drm/i915/i915_reg.h
+++ b/trunk/drivers/gpu/drm/i915/i915_reg.h
@@ -4515,6 +4515,7 @@
 #define  DDI_BUF_EMP_800MV_3_5DB_HSW		(8<<24)   /* Sel8 */
 #define  DDI_BUF_EMP_MASK			(0xf<<24)
 #define  DDI_BUF_IS_IDLE			(1<<7)
+#define  DDI_A_4_LANES				(1<<4)
 #define  DDI_PORT_WIDTH_X1			(0<<1)
 #define  DDI_PORT_WIDTH_X2			(1<<1)
 #define  DDI_PORT_WIDTH_X4			(3<<1)
diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c
index 4e303cf7ead6..e233541d4c9f 100644
--- a/trunk/drivers/gpu/drm/i915/intel_display.c
+++ b/trunk/drivers/gpu/drm/i915/intel_display.c
@@ -8267,7 +8267,9 @@ static void intel_setup_outputs(struct drm_device *dev)
 		I915_WRITE(PFIT_CONTROL, 0);
 	}
 
-	intel_crt_init(dev);
+	if (!(IS_HASWELL(dev) &&
+	      (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES)))
+		intel_crt_init(dev);
 
 	if (IS_HASWELL(dev)) {
 		int found;