From 897baa7c06cb915ffa5c17e2b5c8e0059951170e Mon Sep 17 00:00:00 2001 From: Mark Maule Date: Mon, 7 Nov 2005 15:48:50 -0600 Subject: [PATCH] --- yaml --- r: 13515 b: refs/heads/master c: 6fb93a92ec2a012fa525499c330522bbb8c18d80 h: refs/heads/master i: 13513: fae0e5de744aad8c2151211406f0e31fcf29432e 13511: 4f828a746f56b0cdab7dbc6084ddfdfa3e7e67b1 v: v3 --- [refs] | 2 +- trunk/arch/ia64/sn/pci/pcibr/pcibr_provider.c | 4 ++-- trunk/arch/ia64/sn/pci/pcibr/pcibr_reg.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 7e295539a396..da7350ec96a9 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: cbb921443424fb8019e52bae83e442d01f7715ef +refs/heads/master: 6fb93a92ec2a012fa525499c330522bbb8c18d80 diff --git a/trunk/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/trunk/arch/ia64/sn/pci/pcibr/pcibr_provider.c index 7b03b8084ffc..1f500c81002c 100644 --- a/trunk/arch/ia64/sn/pci/pcibr/pcibr_provider.c +++ b/trunk/arch/ia64/sn/pci/pcibr/pcibr_provider.c @@ -212,13 +212,13 @@ void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info) pdi_pcibus_info; /* Disable the device's IRQ */ - pcireg_intr_enable_bit_clr(pcibus_info, bit); + pcireg_intr_enable_bit_clr(pcibus_info, (1 << bit)); /* Change the device's IRQ */ pcireg_intr_addr_addr_set(pcibus_info, bit, xtalk_addr); /* Re-enable the device's IRQ */ - pcireg_intr_enable_bit_set(pcibus_info, bit); + pcireg_intr_enable_bit_set(pcibus_info, (1 << bit)); pcibr_force_interrupt(sn_irq_info); } diff --git a/trunk/arch/ia64/sn/pci/pcibr/pcibr_reg.c b/trunk/arch/ia64/sn/pci/pcibr/pcibr_reg.c index 4f718c3e93d3..5d534091262c 100644 --- a/trunk/arch/ia64/sn/pci/pcibr/pcibr_reg.c +++ b/trunk/arch/ia64/sn/pci/pcibr/pcibr_reg.c @@ -131,7 +131,7 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits) __sn_clrq_relaxed(&ptr->tio.cp_int_enable, bits); break; case PCIBR_BRIDGETYPE_PIC: - __sn_clrq_relaxed(&ptr->pic.p_int_enable, ~bits); + __sn_clrq_relaxed(&ptr->pic.p_int_enable, bits); break; default: panic