From 8990bdca431b42923c858387fce17cc02db9a25c Mon Sep 17 00:00:00 2001 From: Ayaz Abdulla Date: Mon, 4 Feb 2008 15:14:09 -0500 Subject: [PATCH] --- yaml --- r: 83665 b: refs/heads/master c: 4e84f9b10461ad3c869ced4373dd85771dd67d20 h: refs/heads/master i: 83663: 15233b0a9b01ac6dff189d43fa6aadf19c4d1689 v: v3 --- [refs] | 2 +- trunk/drivers/net/forcedeth.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index c78c329a9733..d7a4a1013e02 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: eb79842838b6a3860d70be404fbb6e3b8f2a65de +refs/heads/master: 4e84f9b10461ad3c869ced4373dd85771dd67d20 diff --git a/trunk/drivers/net/forcedeth.c b/trunk/drivers/net/forcedeth.c index 6d5cd94f33ae..d4843d014bc9 100644 --- a/trunk/drivers/net/forcedeth.c +++ b/trunk/drivers/net/forcedeth.c @@ -1435,16 +1435,30 @@ static void nv_mac_reset(struct net_device *dev) { struct fe_priv *np = netdev_priv(dev); u8 __iomem *base = get_hwbase(dev); + u32 temp1, temp2, temp3; dprintk(KERN_DEBUG "%s: nv_mac_reset\n", dev->name); + writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); pci_push(base); + + /* save registers since they will be cleared on reset */ + temp1 = readl(base + NvRegMacAddrA); + temp2 = readl(base + NvRegMacAddrB); + temp3 = readl(base + NvRegTransmitPoll); + writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset); pci_push(base); udelay(NV_MAC_RESET_DELAY); writel(0, base + NvRegMacReset); pci_push(base); udelay(NV_MAC_RESET_DELAY); + + /* restore saved registers */ + writel(temp1, base + NvRegMacAddrA); + writel(temp2, base + NvRegMacAddrB); + writel(temp3, base + NvRegTransmitPoll); + writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl); pci_push(base); }