From 8a28a1c5ca539dd02ebbdad86b30fe1148c046c3 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Thu, 4 Apr 2013 15:16:14 -0500 Subject: [PATCH] --- yaml --- r: 373643 b: refs/heads/master c: 3513cdeccc647d41c4a9ff923af17deaaac04a66 h: refs/heads/master i: 373641: c50fc3d9293cacc1dc61f9e897ca407174dae209 373639: 8c4c94b2aed8528038b358897046d15d5220fa4a v: v3 --- [refs] | 2 +- trunk/drivers/gpio/gpio-omap.c | 14 +++++++------- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/[refs] b/[refs] index 25c37b81eb20..bb2454948b20 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 60b18b9aa4daa616a8b360feb35d1bfe4d606019 +refs/heads/master: 3513cdeccc647d41c4a9ff923af17deaaac04a66 diff --git a/trunk/drivers/gpio/gpio-omap.c b/trunk/drivers/gpio/gpio-omap.c index 405ce6fd2e5c..f46b600e5e56 100644 --- a/trunk/drivers/gpio/gpio-omap.c +++ b/trunk/drivers/gpio/gpio-omap.c @@ -689,7 +689,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) { void __iomem *isr_reg = NULL; u32 isr; - unsigned int i; + unsigned int bit; struct gpio_bank *bank; int unmasked = 0; struct irq_chip *chip = irq_desc_get_chip(desc); @@ -730,9 +730,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) if (!isr) break; - for (i = 0; isr != 0; isr >>= 1, i++) { - if (!(isr & 1)) - continue; + while (isr) { + bit = __ffs(isr); + isr &= ~(1 << bit); /* * Some chips can't respond to both rising and falling @@ -741,10 +741,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) * to respond to the IRQ for the opposite direction. * This will be indicated in the bank toggle_mask. */ - if (bank->toggle_mask & (1 << i)) - _toggle_gpio_edge_triggering(bank, i); + if (bank->toggle_mask & (1 << bit)) + _toggle_gpio_edge_triggering(bank, bit); - generic_handle_irq(irq_find_mapping(bank->domain, i)); + generic_handle_irq(irq_find_mapping(bank->domain, bit)); } } /* if bank has any level sensitive GPIO pin interrupt