diff --git a/[refs] b/[refs]
index 4dd46da0639a..3a1ff033935c 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
---
-refs/heads/master: 28bf41a1fedad76e9b4de70c9573bb3f8afc3709
+refs/heads/master: 5986453b7fe495687e4eafad8a3dd1ffd106bc80
diff --git a/trunk/CREDITS b/trunk/CREDITS
index afaa7cec6ea5..948e0fb9a70e 100644
--- a/trunk/CREDITS
+++ b/trunk/CREDITS
@@ -953,11 +953,11 @@ S: Blacksburg, Virginia 24061
S: USA
N: Randy Dunlap
-E: rdunlap@infradead.org
-W: http://www.infradead.org/~rdunlap/
+E: rdunlap@xenotime.net
+W: http://www.xenotime.net/linux/linux.html
+W: http://www.linux-usb.org
D: Linux-USB subsystem, USB core/UHCI/printer/storage drivers
D: x86 SMP, ACPI, bootflag hacking
-D: documentation, builds
S: (ask for current address)
S: USA
@@ -1510,14 +1510,6 @@ D: Natsemi ethernet
D: Cobalt Networks (x86) support
D: This-and-That
-N: Mark M. Hoffman
-E: mhoffman@lightlink.com
-D: asb100, lm93 and smsc47b397 hardware monitoring drivers
-D: hwmon subsystem core
-D: hwmon subsystem maintainer
-D: i2c-sis96x and i2c-stub SMBus drivers
-S: USA
-
N: Dirk Hohndel
E: hohndel@suse.de
D: The XFree86[tm] Project
diff --git a/trunk/Documentation/DocBook/device-drivers.tmpl b/trunk/Documentation/DocBook/device-drivers.tmpl
index c36892c072da..7514dbf0a679 100644
--- a/trunk/Documentation/DocBook/device-drivers.tmpl
+++ b/trunk/Documentation/DocBook/device-drivers.tmpl
@@ -227,7 +227,7 @@ X!Isound/sound_firmware.c
16x50 UART Driver
!Edrivers/tty/serial/serial_core.c
-!Edrivers/tty/serial/8250/8250_core.c
+!Edrivers/tty/serial/8250/8250.c
diff --git a/trunk/Documentation/SubmittingPatches b/trunk/Documentation/SubmittingPatches
index aa0c1e63f050..c379a2a6949f 100644
--- a/trunk/Documentation/SubmittingPatches
+++ b/trunk/Documentation/SubmittingPatches
@@ -60,7 +60,8 @@ own source tree. For example:
"dontdiff" is a list of files which are generated by the kernel during
the build process, and should be ignored in any diff(1)-generated
patch. The "dontdiff" file is included in the kernel tree in
-2.6.12 and later.
+2.6.12 and later. For earlier kernel versions, you can get it
+from .
Make sure your patch does not include any extra files which do not
belong in a patch submission. Make sure to review your patch -after-
diff --git a/trunk/Documentation/device-mapper/dm-raid.txt b/trunk/Documentation/device-mapper/dm-raid.txt
index b428556197c9..56fb62b09fc5 100644
--- a/trunk/Documentation/device-mapper/dm-raid.txt
+++ b/trunk/Documentation/device-mapper/dm-raid.txt
@@ -30,7 +30,6 @@ The target is named "raid" and it accepts the following parameters:
raid10 Various RAID10 inspired algorithms chosen by additional params
- RAID10: Striped Mirrors (aka 'Striping on top of mirrors')
- RAID1E: Integrated Adjacent Stripe Mirroring
- - RAID1E: Integrated Offset Stripe Mirroring
- and other similar RAID10 variants
Reference: Chapter 4 of
@@ -65,15 +64,15 @@ The target is named "raid" and it accepts the following parameters:
synchronisation state for each region.
[raid10_copies <# copies>]
- [raid10_format ]
+ [raid10_format near]
These two options are used to alter the default layout of
a RAID10 configuration. The number of copies is can be
- specified, but the default is 2. There are also three
- variations to how the copies are laid down - the default
- is "near". Near copies are what most people think of with
- respect to mirroring. If these options are left unspecified,
- or 'raid10_copies 2' and/or 'raid10_format near' are given,
- then the layouts for 2, 3 and 4 devices are:
+ specified, but the default is 2. There are other variations
+ to how the copies are laid down - the default and only current
+ option is "near". Near copies are what most people think of
+ with respect to mirroring. If these options are left
+ unspecified, or 'raid10_copies 2' and/or 'raid10_format near'
+ are given, then the layouts for 2, 3 and 4 devices are:
2 drives 3 drives 4 drives
-------- ---------- --------------
A1 A1 A1 A1 A2 A1 A1 A2 A2
@@ -86,33 +85,6 @@ The target is named "raid" and it accepts the following parameters:
3-device layout is what might be called a 'RAID1E - Integrated
Adjacent Stripe Mirroring'.
- If 'raid10_copies 2' and 'raid10_format far', then the layouts
- for 2, 3 and 4 devices are:
- 2 drives 3 drives 4 drives
- -------- -------------- --------------------
- A1 A2 A1 A2 A3 A1 A2 A3 A4
- A3 A4 A4 A5 A6 A5 A6 A7 A8
- A5 A6 A7 A8 A9 A9 A10 A11 A12
- .. .. .. .. .. .. .. .. ..
- A2 A1 A3 A1 A2 A2 A1 A4 A3
- A4 A3 A6 A4 A5 A6 A5 A8 A7
- A6 A5 A9 A7 A8 A10 A9 A12 A11
- .. .. .. .. .. .. .. .. ..
-
- If 'raid10_copies 2' and 'raid10_format offset', then the
- layouts for 2, 3 and 4 devices are:
- 2 drives 3 drives 4 drives
- -------- ------------ -----------------
- A1 A2 A1 A2 A3 A1 A2 A3 A4
- A2 A1 A3 A1 A2 A2 A1 A4 A3
- A3 A4 A4 A5 A6 A5 A6 A7 A8
- A4 A3 A6 A4 A5 A6 A5 A8 A7
- A5 A6 A7 A8 A9 A9 A10 A11 A12
- A6 A5 A9 A7 A8 A10 A9 A12 A11
- .. .. .. .. .. .. .. .. ..
- Here we see layouts closely akin to 'RAID1E - Integrated
- Offset Stripe Mirroring'.
-
<#raid_devs>: The number of devices composing the array.
Each device consists of two entries. The first is the device
containing the metadata (if any); the second is the one containing the
@@ -170,5 +142,3 @@ Version History
1.3.0 Added support for RAID 10
1.3.1 Allow device replacement/rebuild for RAID 10
1.3.2 Fix/improve redundancy checking for RAID10
-1.4.0 Non-functional change. Removes arg from mapping function.
-1.4.1 Add RAID10 "far" and "offset" algorithm support.
diff --git a/trunk/Documentation/devicetree/bindings/mfd/ab8500.txt b/trunk/Documentation/devicetree/bindings/mfd/ab8500.txt
index c3a14e0ad0ad..13b707b7355c 100644
--- a/trunk/Documentation/devicetree/bindings/mfd/ab8500.txt
+++ b/trunk/Documentation/devicetree/bindings/mfd/ab8500.txt
@@ -13,6 +13,9 @@ Required parent device properties:
4 = active high level-sensitive
8 = active low level-sensitive
+Optional parent device properties:
+- reg : contains the PRCMU mailbox address for the AB8500 i2c port
+
The AB8500 consists of a large and varied group of sub-devices:
Device IRQ Names Supply Names Description
@@ -83,8 +86,9 @@ Non-standard child device properties:
- stericsson,amic2-bias-vamic1 : Analoge Mic wishes to use a non-standard Vamic
- stericsson,earpeice-cmv : Earpeice voltage (only: 950 | 1100 | 1270 | 1580)
-ab8500 {
+ab8500@5 {
compatible = "stericsson,ab8500";
+ reg = <5>; /* mailbox 5 is i2c */
interrupts = <0 40 0x4>;
interrupt-controller;
#interrupt-cells = <2>;
diff --git a/trunk/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt b/trunk/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt
new file mode 100644
index 000000000000..922c30ad90d1
--- /dev/null
+++ b/trunk/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt
@@ -0,0 +1,22 @@
+===================================================================
+Power Architecture CPU Binding
+Copyright 2013 Freescale Semiconductor Inc.
+
+Power Architecture CPUs in Freescale SOCs are represented in device trees as
+per the definition in ePAPR.
+
+In addition to the ePAPR definitions, the properties defined below may be
+present on CPU nodes.
+
+PROPERTIES
+
+ - fsl,eref-*
+ Usage: optional
+ Value type:
+ Definition: The EREF (EREF: A Programmer.s Reference Manual for
+ Freescale Power Architecture) defines the architecture for Freescale
+ Power CPUs. The EREF defines some architecture categories not defined
+ by the Power ISA. For these EREF-specific categories, the existence of
+ a property named fsl,eref-[CAT], where [CAT] is the abbreviated category
+ name with all uppercase letters converted to lowercase, indicates that
+ the category is supported by the implementation.
diff --git a/trunk/Documentation/devicetree/bindings/tty/serial/of-serial.txt b/trunk/Documentation/devicetree/bindings/tty/serial/of-serial.txt
index 8f01cb190f25..1e1145ca4f3c 100644
--- a/trunk/Documentation/devicetree/bindings/tty/serial/of-serial.txt
+++ b/trunk/Documentation/devicetree/bindings/tty/serial/of-serial.txt
@@ -11,9 +11,6 @@ Required properties:
- "nvidia,tegra20-uart"
- "nxp,lpc3220-uart"
- "ibm,qpace-nwp-serial"
- - "altr,16550-FIFO32"
- - "altr,16550-FIFO64"
- - "altr,16550-FIFO128"
- "serial" if the port type is unknown.
- reg : offset and length of the register set for the device.
- interrupts : should contain uart interrupt.
diff --git a/trunk/Documentation/hwmon/adm1275 b/trunk/Documentation/hwmon/adm1275
index 15b4a20d5062..2cfa25667123 100644
--- a/trunk/Documentation/hwmon/adm1275
+++ b/trunk/Documentation/hwmon/adm1275
@@ -15,7 +15,7 @@ Supported chips:
Addresses scanned: -
Datasheet: www.analog.com/static/imported-files/data_sheets/ADM1276.pdf
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/adt7410 b/trunk/Documentation/hwmon/adt7410
index 58150c480e56..96004000dc2a 100644
--- a/trunk/Documentation/hwmon/adt7410
+++ b/trunk/Documentation/hwmon/adt7410
@@ -4,14 +4,9 @@ Kernel driver adt7410
Supported chips:
* Analog Devices ADT7410
Prefix: 'adt7410'
- Addresses scanned: None
+ Addresses scanned: I2C 0x48 - 0x4B
Datasheet: Publicly available at the Analog Devices website
http://www.analog.com/static/imported-files/data_sheets/ADT7410.pdf
- * Analog Devices ADT7420
- Prefix: 'adt7420'
- Addresses scanned: None
- Datasheet: Publicly available at the Analog Devices website
- http://www.analog.com/static/imported-files/data_sheets/ADT7420.pdf
Author: Hartmut Knaack
@@ -32,10 +27,6 @@ value per second or even justget one sample on demand for power saving.
Besides, it can completely power down its ADC, if power management is
required.
-The ADT7420 is register compatible, the only differences being the package,
-a slightly narrower operating temperature range (-40°C to +150°C), and a
-better accuracy (0.25°C instead of 0.50°C.)
-
Configuration Notes
-------------------
diff --git a/trunk/Documentation/hwmon/jc42 b/trunk/Documentation/hwmon/jc42
index 868d74d6b773..165077121238 100644
--- a/trunk/Documentation/hwmon/jc42
+++ b/trunk/Documentation/hwmon/jc42
@@ -49,7 +49,7 @@ Supported chips:
Addresses scanned: I2C 0x18 - 0x1f
Author:
- Guenter Roeck
+ Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/lineage-pem b/trunk/Documentation/hwmon/lineage-pem
index 83b2ddc160c8..2ba5ed126858 100644
--- a/trunk/Documentation/hwmon/lineage-pem
+++ b/trunk/Documentation/hwmon/lineage-pem
@@ -8,7 +8,7 @@ Supported devices:
Documentation:
http://www.lineagepower.com/oem/pdf/CPLI2C.pdf
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/lm25066 b/trunk/Documentation/hwmon/lm25066
index 26025e419d35..a21db81c4591 100644
--- a/trunk/Documentation/hwmon/lm25066
+++ b/trunk/Documentation/hwmon/lm25066
@@ -19,7 +19,7 @@ Supported chips:
Datasheet:
http://www.national.com/pf/LM/LM5066.html
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/lm75 b/trunk/Documentation/hwmon/lm75
index 69af1c7db6b7..c91a1d15fa28 100644
--- a/trunk/Documentation/hwmon/lm75
+++ b/trunk/Documentation/hwmon/lm75
@@ -23,7 +23,7 @@ Supported chips:
Datasheet: Publicly available at the Maxim website
http://www.maxim-ic.com/
* Microchip (TelCom) TCN75
- Prefix: 'tcn75'
+ Prefix: 'lm75'
Addresses scanned: none
Datasheet: Publicly available at the Microchip website
http://www.microchip.com/
diff --git a/trunk/Documentation/hwmon/ltc2978 b/trunk/Documentation/hwmon/ltc2978
index e4d75c606c97..c365f9beb5dd 100644
--- a/trunk/Documentation/hwmon/ltc2978
+++ b/trunk/Documentation/hwmon/ltc2978
@@ -5,13 +5,13 @@ Supported chips:
* Linear Technology LTC2978
Prefix: 'ltc2978'
Addresses scanned: -
- Datasheet: http://www.linear.com/product/ltc2978
+ Datasheet: http://cds.linear.com/docs/Datasheet/2978fa.pdf
* Linear Technology LTC3880
Prefix: 'ltc3880'
Addresses scanned: -
- Datasheet: http://www.linear.com/product/ltc3880
+ Datasheet: http://cds.linear.com/docs/Datasheet/3880f.pdf
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/ltc4261 b/trunk/Documentation/hwmon/ltc4261
index 9378a75c6134..eba2e2c4b94d 100644
--- a/trunk/Documentation/hwmon/ltc4261
+++ b/trunk/Documentation/hwmon/ltc4261
@@ -8,7 +8,7 @@ Supported chips:
Datasheet:
http://cds.linear.com/docs/Datasheet/42612fb.pdf
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/max16064 b/trunk/Documentation/hwmon/max16064
index d59cc7829bec..f8b478076f6d 100644
--- a/trunk/Documentation/hwmon/max16064
+++ b/trunk/Documentation/hwmon/max16064
@@ -7,7 +7,7 @@ Supported chips:
Addresses scanned: -
Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX16064.pdf
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/max16065 b/trunk/Documentation/hwmon/max16065
index 208a29e43010..c11f64a1f2ad 100644
--- a/trunk/Documentation/hwmon/max16065
+++ b/trunk/Documentation/hwmon/max16065
@@ -24,7 +24,7 @@ Supported chips:
http://datasheets.maxim-ic.com/en/ds/MAX16070-MAX16071.pdf
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/max34440 b/trunk/Documentation/hwmon/max34440
index 37cbf472a19d..47651ff341ae 100644
--- a/trunk/Documentation/hwmon/max34440
+++ b/trunk/Documentation/hwmon/max34440
@@ -27,7 +27,7 @@ Supported chips:
Addresses scanned: -
Datasheet: http://datasheets.maximintegrated.com/en/ds/MAX34461.pdf
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/max8688 b/trunk/Documentation/hwmon/max8688
index e78078638b91..fe849871df32 100644
--- a/trunk/Documentation/hwmon/max8688
+++ b/trunk/Documentation/hwmon/max8688
@@ -7,7 +7,7 @@ Supported chips:
Addresses scanned: -
Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX8688.pdf
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/pmbus b/trunk/Documentation/hwmon/pmbus
index cf756ed48ff9..3d3a0f97f966 100644
--- a/trunk/Documentation/hwmon/pmbus
+++ b/trunk/Documentation/hwmon/pmbus
@@ -34,7 +34,7 @@ Supported chips:
Addresses scanned: -
Datasheet: n.a.
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/smm665 b/trunk/Documentation/hwmon/smm665
index a341eeedab75..59e316140542 100644
--- a/trunk/Documentation/hwmon/smm665
+++ b/trunk/Documentation/hwmon/smm665
@@ -29,7 +29,7 @@ Supported chips:
http://www.summitmicro.com/prod_select/summary/SMM766/SMM766_2086.pdf
http://www.summitmicro.com/prod_select/summary/SMM766B/SMM766B_2122.pdf
-Author: Guenter Roeck
+Author: Guenter Roeck
Module Parameters
diff --git a/trunk/Documentation/hwmon/ucd9000 b/trunk/Documentation/hwmon/ucd9000
index 805e33edb978..0df5f276505b 100644
--- a/trunk/Documentation/hwmon/ucd9000
+++ b/trunk/Documentation/hwmon/ucd9000
@@ -11,7 +11,7 @@ Supported chips:
http://focus.ti.com/lit/ds/symlink/ucd9090.pdf
http://focus.ti.com/lit/ds/symlink/ucd90910.pdf
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/ucd9200 b/trunk/Documentation/hwmon/ucd9200
index 1e8060e631bd..fd7d07b1908a 100644
--- a/trunk/Documentation/hwmon/ucd9200
+++ b/trunk/Documentation/hwmon/ucd9200
@@ -15,7 +15,7 @@ Supported chips:
http://focus.ti.com/lit/ds/symlink/ucd9246.pdf
http://focus.ti.com/lit/ds/symlink/ucd9248.pdf
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/hwmon/zl6100 b/trunk/Documentation/hwmon/zl6100
index 756b57c6b73e..3d924b6b59e9 100644
--- a/trunk/Documentation/hwmon/zl6100
+++ b/trunk/Documentation/hwmon/zl6100
@@ -54,7 +54,7 @@ http://archive.ericsson.net/service/internet/picov/get?DocNo=28701-EN/LZT146401
http://archive.ericsson.net/service/internet/picov/get?DocNo=28701-EN/LZT146256
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
diff --git a/trunk/Documentation/i2c/busses/i2c-diolan-u2c b/trunk/Documentation/i2c/busses/i2c-diolan-u2c
index 0d6018c316c7..30fe4bb9a069 100644
--- a/trunk/Documentation/i2c/busses/i2c-diolan-u2c
+++ b/trunk/Documentation/i2c/busses/i2c-diolan-u2c
@@ -5,7 +5,7 @@ Supported adapters:
Documentation:
http://www.diolan.com/i2c/u2c12.html
-Author: Guenter Roeck
+Author: Guenter Roeck
Description
-----------
diff --git a/trunk/Documentation/input/alps.txt b/trunk/Documentation/input/alps.txt
index e544c7ff8cfa..3262b6e4d686 100644
--- a/trunk/Documentation/input/alps.txt
+++ b/trunk/Documentation/input/alps.txt
@@ -3,26 +3,10 @@ ALPS Touchpad Protocol
Introduction
------------
-Currently the ALPS touchpad driver supports five protocol versions in use by
-ALPS touchpads, called versions 1, 2, 3, 4 and 5.
-
-Since roughly mid-2010 several new ALPS touchpads have been released and
-integrated into a variety of laptops and netbooks. These new touchpads
-have enough behavior differences that the alps_model_data definition
-table, describing the properties of the different versions, is no longer
-adequate. The design choices were to re-define the alps_model_data
-table, with the risk of regression testing existing devices, or isolate
-the new devices outside of the alps_model_data table. The latter design
-choice was made. The new touchpad signatures are named: "Rushmore",
-"Pinnacle", and "Dolphin", which you will see in the alps.c code.
-For the purposes of this document, this group of ALPS touchpads will
-generically be called "new ALPS touchpads".
-
-We experimented with probing the ACPI interface _HID (Hardware ID)/_CID
-(Compatibility ID) definition as a way to uniquely identify the
-different ALPS variants but there did not appear to be a 1:1 mapping.
-In fact, it appeared to be an m:n mapping between the _HID and actual
-hardware type.
+
+Currently the ALPS touchpad driver supports four protocol versions in use by
+ALPS touchpads, called versions 1, 2, 3, and 4. Information about the various
+protocol versions is contained in the following sections.
Detection
---------
@@ -36,13 +20,9 @@ If the E6 report is successful, the touchpad model is identified using the "E7
report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
matched against known models in the alps_model_data_array.
-For older touchpads supporting protocol versions 3 and 4, the E7 report
-model signature is always 73-02-64. To differentiate between these
-versions, the response from the "Enter Command Mode" sequence must be
-inspected as described below.
-
-The new ALPS touchpads have an E7 signature of 73-03-50 or 73-03-0A but
-seem to be better differentiated by the EC Command Mode response.
+With protocol versions 3 and 4, the E7 report model signature is always
+73-02-64. To differentiate between these versions, the response from the
+"Enter Command Mode" sequence must be inspected as described below.
Command Mode
------------
@@ -67,14 +47,6 @@ address of the register being read, and the third contains the value of the
register. Registers are written by writing the value one nibble at a time
using the same encoding used for addresses.
-For the new ALPS touchpads, the EC command is used to enter command
-mode. The response in the new ALPS touchpads is significantly different,
-and more important in determining the behavior. This code has been
-separated from the original alps_model_data table and put in the
-alps_identify function. For example, there seem to be two hardware init
-sequences for the "Dolphin" touchpads as determined by the second byte
-of the EC response.
-
Packet Format
-------------
@@ -215,28 +187,3 @@ There are several things worth noting here.
well.
So far no v4 devices with tracksticks have been encountered.
-
-ALPS Absolute Mode - Protocol Version 5
----------------------------------------
-This is basically Protocol Version 3 but with different logic for packet
-decode. It uses the same alps_process_touchpad_packet_v3 call with a
-specialized decode_fields function pointer to correctly interpret the
-packets. This appears to only be used by the Dolphin devices.
-
-For single-touch, the 6-byte packet format is:
-
- byte 0: 1 1 0 0 1 0 0 0
- byte 1: 0 x6 x5 x4 x3 x2 x1 x0
- byte 2: 0 y6 y5 y4 y3 y2 y1 y0
- byte 3: 0 M R L 1 m r l
- byte 4: y10 y9 y8 y7 x10 x9 x8 x7
- byte 5: 0 z6 z5 z4 z3 z2 z1 z0
-
-For mt, the format is:
-
- byte 0: 1 1 1 n3 1 n2 n1 x24
- byte 1: 1 y7 y6 y5 y4 y3 y2 y1
- byte 2: ? x2 x1 y12 y11 y10 y9 y8
- byte 3: 0 x23 x22 x21 x20 x19 x18 x17
- byte 4: 0 x9 x8 x7 x6 x5 x4 x3
- byte 5: 0 x16 x15 x14 x13 x12 x11 x10
diff --git a/trunk/Documentation/kernel-parameters.txt b/trunk/Documentation/kernel-parameters.txt
index 8ccbf27aead4..4609e81dbc37 100644
--- a/trunk/Documentation/kernel-parameters.txt
+++ b/trunk/Documentation/kernel-parameters.txt
@@ -596,6 +596,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
is selected automatically. Check
Documentation/kdump/kdump.txt for further details.
+ crashkernel_low=size[KMG]
+ [KNL, x86] parts under 4G.
+
crashkernel=range1:size1[,range2:size2,...][@offset]
[KNL] Same as above, but depends on the memory
in the running system. The syntax of range is
@@ -603,26 +606,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
a memory unit (amount[KMG]). See also
Documentation/kdump/kdump.txt for an example.
- crashkernel=size[KMG],high
- [KNL, x86_64] range could be above 4G. Allow kernel
- to allocate physical memory region from top, so could
- be above 4G if system have more than 4G ram installed.
- Otherwise memory region will be allocated below 4G, if
- available.
- It will be ignored if crashkernel=X is specified.
- crashkernel=size[KMG],low
- [KNL, x86_64] range under 4G. When crashkernel=X,high
- is passed, kernel could allocate physical memory region
- above 4G, that cause second kernel crash on system
- that require some amount of low memory, e.g. swiotlb
- requires at least 64M+32K low memory. Kernel would
- try to allocate 72M below 4G automatically.
- This one let user to specify own low range under 4G
- for second kernel instead.
- 0: to disable low allocation.
- It will be ignored when crashkernel=X,high is not used
- or memory reserved is below 4G.
-
cs89x0_dma= [HW,NET]
Format:
@@ -805,12 +788,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
edd= [EDD]
Format: {"off" | "on" | "skip[mbr]"}
- efi_no_storage_paranoia [EFI; X86]
- Using this parameter you can use more than 50% of
- your efi variable storage. Use this parameter only if
- you are really sure that your UEFI does sane gc and
- fulfills the spec otherwise your board may brick.
-
eisa_irq_edge= [PARISC,HW]
See header of drivers/parisc/eisa.c.
diff --git a/trunk/Documentation/networking/ipvs-sysctl.txt b/trunk/Documentation/networking/ipvs-sysctl.txt
index 9573d0c48c6e..f2a2488f1bf3 100644
--- a/trunk/Documentation/networking/ipvs-sysctl.txt
+++ b/trunk/Documentation/networking/ipvs-sysctl.txt
@@ -15,13 +15,6 @@ amemthresh - INTEGER
enabled and the variable is automatically set to 2, otherwise
the strategy is disabled and the variable is set to 1.
-backup_only - BOOLEAN
- 0 - disabled (default)
- not 0 - enabled
-
- If set, disable the director function while the server is
- in backup mode to avoid packet loops for DR/TUN methods.
-
conntrack - BOOLEAN
0 - disabled (default)
not 0 - enabled
diff --git a/trunk/Documentation/networking/tuntap.txt b/trunk/Documentation/networking/tuntap.txt
index 949d5dcdd9a3..c0aab985bad9 100644
--- a/trunk/Documentation/networking/tuntap.txt
+++ b/trunk/Documentation/networking/tuntap.txt
@@ -105,83 +105,6 @@ Copyright (C) 1999-2000 Maxim Krasnyansky
Proto [2 bytes]
Raw protocol(IP, IPv6, etc) frame.
- 3.3 Multiqueue tuntap interface:
-
- From version 3.8, Linux supports multiqueue tuntap which can uses multiple
- file descriptors (queues) to parallelize packets sending or receiving. The
- device allocation is the same as before, and if user wants to create multiple
- queues, TUNSETIFF with the same device name must be called many times with
- IFF_MULTI_QUEUE flag.
-
- char *dev should be the name of the device, queues is the number of queues to
- be created, fds is used to store and return the file descriptors (queues)
- created to the caller. Each file descriptor were served as the interface of a
- queue which could be accessed by userspace.
-
- #include
- #include
-
- int tun_alloc_mq(char *dev, int queues, int *fds)
- {
- struct ifreq ifr;
- int fd, err, i;
-
- if (!dev)
- return -1;
-
- memset(&ifr, 0, sizeof(ifr));
- /* Flags: IFF_TUN - TUN device (no Ethernet headers)
- * IFF_TAP - TAP device
- *
- * IFF_NO_PI - Do not provide packet information
- * IFF_MULTI_QUEUE - Create a queue of multiqueue device
- */
- ifr.ifr_flags = IFF_TAP | IFF_NO_PI | IFF_MULTI_QUEUE;
- strcpy(ifr.ifr_name, dev);
-
- for (i = 0; i < queues; i++) {
- if ((fd = open("/dev/net/tun", O_RDWR)) < 0)
- goto err;
- err = ioctl(fd, TUNSETIFF, (void *)&ifr);
- if (err) {
- close(fd);
- goto err;
- }
- fds[i] = fd;
- }
-
- return 0;
- err:
- for (--i; i >= 0; i--)
- close(fds[i]);
- return err;
- }
-
- A new ioctl(TUNSETQUEUE) were introduced to enable or disable a queue. When
- calling it with IFF_DETACH_QUEUE flag, the queue were disabled. And when
- calling it with IFF_ATTACH_QUEUE flag, the queue were enabled. The queue were
- enabled by default after it was created through TUNSETIFF.
-
- fd is the file descriptor (queue) that we want to enable or disable, when
- enable is true we enable it, otherwise we disable it
-
- #include
- #include
-
- int tun_set_queue(int fd, int enable)
- {
- struct ifreq ifr;
-
- memset(&ifr, 0, sizeof(ifr));
-
- if (enable)
- ifr.ifr_flags = IFF_ATTACH_QUEUE;
- else
- ifr.ifr_flags = IFF_DETACH_QUEUE;
-
- return ioctl(fd, TUNSETQUEUE, (void *)&ifr);
- }
-
Universal TUN/TAP device driver Frequently Asked Question.
1. What platforms are supported by TUN/TAP driver ?
diff --git a/trunk/Documentation/power/opp.txt b/trunk/Documentation/power/opp.txt
index 425c51d56aef..3035d00757ad 100644
--- a/trunk/Documentation/power/opp.txt
+++ b/trunk/Documentation/power/opp.txt
@@ -1,5 +1,6 @@
-Operating Performance Points (OPP) Library
-==========================================
+*=============*
+* OPP Library *
+*=============*
(C) 2009-2010 Nishanth Menon , Texas Instruments Incorporated
@@ -15,31 +16,15 @@ Contents
1. Introduction
===============
-1.1 What is an Operating Performance Point (OPP)?
-
Complex SoCs of today consists of a multiple sub-modules working in conjunction.
In an operational system executing varied use cases, not all modules in the SoC
need to function at their highest performing frequency all the time. To
facilitate this, sub-modules in a SoC are grouped into domains, allowing some
-domains to run at lower voltage and frequency while other domains run at
-voltage/frequency pairs that are higher.
-
-The set of discrete tuples consisting of frequency and voltage pairs that
+domains to run at lower voltage and frequency while other domains are loaded
+more. The set of discrete tuples consisting of frequency and voltage pairs that
the device will support per domain are called Operating Performance Points or
OPPs.
-As an example:
-Let us consider an MPU device which supports the following:
-{300MHz at minimum voltage of 1V}, {800MHz at minimum voltage of 1.2V},
-{1GHz at minimum voltage of 1.3V}
-
-We can represent these as three OPPs as the following {Hz, uV} tuples:
-{300000000, 1000000}
-{800000000, 1200000}
-{1000000000, 1300000}
-
-1.2 Operating Performance Points Library
-
OPP library provides a set of helper functions to organize and query the OPP
information. The library is located in drivers/base/power/opp.c and the header
is located in include/linux/opp.h. OPP library can be enabled by enabling
diff --git a/trunk/Documentation/powerpc/00-INDEX b/trunk/Documentation/powerpc/00-INDEX
index dd9e92802ec0..5620fb5ac425 100644
--- a/trunk/Documentation/powerpc/00-INDEX
+++ b/trunk/Documentation/powerpc/00-INDEX
@@ -14,6 +14,10 @@ hvcs.txt
- IBM "Hypervisor Virtual Console Server" Installation Guide
mpc52xx.txt
- Linux 2.6.x on MPC52xx family
+sound.txt
+ - info on sound support under Linux/PPC
+zImage_layout.txt
+ - info on the kernel images for Linux/PPC
qe_firmware.txt
- describes the layout of firmware binaries for the Freescale QUICC
Engine and the code that parses and uploads the microcode therein.
diff --git a/trunk/Documentation/powerpc/ptrace.txt b/trunk/Documentation/powerpc/ptrace.txt
index 99c5ce88d0fe..f2a7a3919772 100644
--- a/trunk/Documentation/powerpc/ptrace.txt
+++ b/trunk/Documentation/powerpc/ptrace.txt
@@ -40,7 +40,6 @@ features will have bits indicating whether there is support for:
#define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
#define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
#define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
-#define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
2. PTRACE_SETHWDEBUG
diff --git a/trunk/Documentation/powerpc/sound.txt b/trunk/Documentation/powerpc/sound.txt
new file mode 100644
index 000000000000..df23d95e03a0
--- /dev/null
+++ b/trunk/Documentation/powerpc/sound.txt
@@ -0,0 +1,81 @@
+ Information about PowerPC Sound support
+=====================================================================
+
+Please mail me (Cort Dougan, cort@fsmlabs.com) if you have questions,
+comments or corrections.
+
+Last Change: 6.16.99
+
+This just covers sound on the PReP and CHRP systems for now and later
+will contain information on the PowerMac's.
+
+Sound on PReP has been tested and is working with the PowerStack and IBM
+Power Series onboard sound systems which are based on the cs4231(2) chip.
+The sound options when doing the make config are a bit different from
+the default, though.
+
+The I/O base, irq and dma lines that you enter during the make config
+are ignored and are set when booting according to the machine type.
+This is so that one binary can be used for Motorola and IBM machines
+which use different values and isn't allowed by the driver, so things
+are hacked together in such a way as to allow this information to be
+set automatically on boot.
+
+1. Motorola PowerStack PReP machines
+
+ Enable support for "Crystal CS4232 based (PnP) cards" and for the
+ Microsoft Sound System. The MSS isn't used, but some of the routines
+ that the CS4232 driver uses are in it.
+
+ Although the options you set are ignored and determined automatically
+ on boot these are included for information only:
+
+ (830) CS4232 audio I/O base 530, 604, E80 or F40
+ (10) CS4232 audio IRQ 5, 7, 9, 11, 12 or 15
+ (6) CS4232 audio DMA 0, 1 or 3
+ (7) CS4232 second (duplex) DMA 0, 1 or 3
+
+ This will allow simultaneous record and playback, as 2 different dma
+ channels are used.
+
+ The sound will be all left channel and very low volume since the
+ auxiliary input isn't muted by default. I had the changes necessary
+ for this in the kernel but the sound driver maintainer didn't want
+ to include them since it wasn't common in other machines. To fix this
+ you need to mute it using a mixer utility of some sort (if you find one
+ please let me know) or by patching the driver yourself and recompiling.
+
+ There is a problem on the PowerStack 2's (PowerStack Pro's) using a
+ different irq/drq than the kernel expects. Unfortunately, I don't know
+ which irq/drq it is so if anyone knows please email me.
+
+ Midi is not supported since the cs4232 driver doesn't support midi yet.
+
+2. IBM PowerPersonal PReP machines
+
+ I've only tested sound on the Power Personal Series of IBM workstations
+ so if you try it on others please let me know the result. I'm especially
+ interested in the 43p's sound system, which I know nothing about.
+
+ Enable support for "Crystal CS4232 based (PnP) cards" and for the
+ Microsoft Sound System. The MSS isn't used, but some of the routines
+ that the CS4232 driver uses are in it.
+
+ Although the options you set are ignored and determined automatically
+ on boot these are included for information only:
+
+ (530) CS4232 audio I/O base 530, 604, E80 or F40
+ (5) CS4232 audio IRQ 5, 7, 9, 11, 12 or 15
+ (1) CS4232 audio DMA 0, 1 or 3
+ (7) CS4232 second (duplex) DMA 0, 1 or 3
+ (330) CS4232 MIDI I/O base 330, 370, 3B0 or 3F0
+ (9) CS4232 MIDI IRQ 5, 7, 9, 11, 12 or 15
+
+ This setup does _NOT_ allow for recording yet.
+
+ Midi is not supported since the cs4232 driver doesn't support midi yet.
+
+2. IBM CHRP
+
+ I have only tested this on the 43P-150. Build the kernel with the cs4232
+ set as a module and load the module with irq=9 dma=1 dma2=2 io=0x550
diff --git a/trunk/Documentation/powerpc/zImage_layout.txt b/trunk/Documentation/powerpc/zImage_layout.txt
new file mode 100644
index 000000000000..048e0150f571
--- /dev/null
+++ b/trunk/Documentation/powerpc/zImage_layout.txt
@@ -0,0 +1,47 @@
+ Information about the Linux/PPC kernel images
+=====================================================================
+
+Please mail me (Cort Dougan, cort@fsmlabs.com) if you have questions,
+comments or corrections.
+
+This document is meant to answer several questions I've had about how
+the PReP system boots and how Linux/PPC interacts with that mechanism.
+It would be nice if we could have information on how other architectures
+boot here as well. If you have anything to contribute, please
+let me know.
+
+
+1. PReP boot file
+
+ This is the file necessary to boot PReP systems from floppy or
+ hard drive. The firmware reads the PReP partition table entry
+ and will load the image accordingly.
+
+ To boot the zImage, copy it onto a floppy with dd if=zImage of=/dev/fd0h1440
+ or onto a PReP hard drive partition with dd if=zImage of=/dev/sda4
+ assuming you've created a PReP partition (type 0x41) with fdisk on
+ /dev/sda4.
+
+ The layout of the image format is:
+
+ 0x0 +------------+
+ | | PReP partition table entry
+ | |
+ 0x400 +------------+
+ | | Bootstrap program code + data
+ | |
+ | |
+ +------------+
+ | | compressed kernel, elf header removed
+ +------------+
+ | | initrd (if loaded)
+ +------------+
+ | | Elf section table for bootstrap program
+ +------------+
+
+
+2. MBX boot file
+
+ The MBX boards can load an elf image, and relocate it to the
+ proper location in memory - it copies the image to the location it was
+ linked at.
diff --git a/trunk/Documentation/printk-formats.txt b/trunk/Documentation/printk-formats.txt
index 6e953564de03..e8a6aa473bab 100644
--- a/trunk/Documentation/printk-formats.txt
+++ b/trunk/Documentation/printk-formats.txt
@@ -170,5 +170,5 @@ Reminder: sizeof() result is of type size_t.
Thank you for your cooperation and attention.
-By Randy Dunlap and
+By Randy Dunlap and
Andrew Murray
diff --git a/trunk/Documentation/scsi/LICENSE.qla2xxx b/trunk/Documentation/scsi/LICENSE.qla2xxx
index 5020b7b5a244..27a91cf43d6d 100644
--- a/trunk/Documentation/scsi/LICENSE.qla2xxx
+++ b/trunk/Documentation/scsi/LICENSE.qla2xxx
@@ -1,4 +1,4 @@
-Copyright (c) 2003-2013 QLogic Corporation
+Copyright (c) 2003-2012 QLogic Corporation
QLogic Linux FC-FCoE Driver
This program includes a device driver for Linux 3.x.
diff --git a/trunk/Documentation/sound/alsa/ALSA-Configuration.txt b/trunk/Documentation/sound/alsa/ALSA-Configuration.txt
index 95731a08f257..ce6581c8ca26 100644
--- a/trunk/Documentation/sound/alsa/ALSA-Configuration.txt
+++ b/trunk/Documentation/sound/alsa/ALSA-Configuration.txt
@@ -890,8 +890,9 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
enable_msi - Enable Message Signaled Interrupt (MSI) (default = off)
power_save - Automatic power-saving timeout (in second, 0 =
disable)
- power_save_controller - Reset HD-audio controller in power-saving mode
- (default = on)
+ power_save_controller - Support runtime D3 of HD-audio controller
+ (-1 = on for supported chip (default), false = off,
+ true = force to on even for unsupported hardware)
align_buffer_size - Force rounding of buffer/period sizes to multiples
of 128 bytes. This is more efficient in terms of memory
access but isn't required by the HDA spec and prevents
@@ -911,7 +912,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
models depending on the codec chip. The list of available models
is found in HD-Audio-Models.txt
- The model name "generic" is treated as a special case. When this
+ The model name "genric" is treated as a special case. When this
model is given, the driver uses the generic codec parser without
"codec-patch". It's sometimes good for testing and debugging.
diff --git a/trunk/Documentation/sound/alsa/seq_oss.html b/trunk/Documentation/sound/alsa/seq_oss.html
index 9663b45f6fde..d9776cf60c07 100644
--- a/trunk/Documentation/sound/alsa/seq_oss.html
+++ b/trunk/Documentation/sound/alsa/seq_oss.html
@@ -285,7 +285,7 @@
7.2.4 Close Callback
The close callback is called when this device is closed by the
-application. If any private data was allocated in open callback, it must
+applicaion. If any private data was allocated in open callback, it must
be released in the close callback. The deletion of ALSA port should be
done here, too. This callback must not be NULL.
diff --git a/trunk/Documentation/trace/ftrace.txt b/trunk/Documentation/trace/ftrace.txt
index a372304aef10..53d6a3c51d87 100644
--- a/trunk/Documentation/trace/ftrace.txt
+++ b/trunk/Documentation/trace/ftrace.txt
@@ -1873,7 +1873,7 @@ feature:
status\input | 0 | 1 | else |
--------------+------------+------------+------------+
- not allocated |(do nothing)| alloc+swap |(do nothing)|
+ not allocated |(do nothing)| alloc+swap | EINVAL |
--------------+------------+------------+------------+
allocated | free | swap | clear |
--------------+------------+------------+------------+
diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS
index 8bdd7a7ef2f4..e95b1e944eb7 100644
--- a/trunk/MAINTAINERS
+++ b/trunk/MAINTAINERS
@@ -114,6 +114,12 @@ Maintainers List (try to look for most precise areas first)
-----------------------------------
+3C505 NETWORK DRIVER
+M: Philip Blundell
+L: netdev@vger.kernel.org
+S: Maintained
+F: drivers/net/ethernet/i825xx/3c505*
+
3C59X NETWORK DRIVER
M: Steffen Klassert
L: netdev@vger.kernel.org
@@ -1338,6 +1344,12 @@ S: Maintained
F: drivers/platform/x86/asus*.c
F: drivers/platform/x86/eeepc*.c
+ASUS ASB100 HARDWARE MONITOR DRIVER
+M: "Mark M. Hoffman"
+L: lm-sensors@lm-sensors.org
+S: Maintained
+F: drivers/hwmon/asb100.c
+
ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API
M: Dan Williams
W: http://sourceforge.net/projects/xscaleiop
@@ -1461,12 +1473,6 @@ F: drivers/dma/at_hdmac.c
F: drivers/dma/at_hdmac_regs.h
F: include/linux/platform_data/dma-atmel.h
-ATMEL I2C DRIVER
-M: Ludovic Desroches
-L: linux-i2c@vger.kernel.org
-S: Supported
-F: drivers/i2c/busses/i2c-at91.c
-
ATMEL ISI DRIVER
M: Josh Wu
L: linux-media@vger.kernel.org
@@ -2355,6 +2361,12 @@ W: http://www.arm.linux.org.uk/
S: Maintained
F: drivers/video/cyber2000fb.*
+CYCLADES 2X SYNC CARD DRIVER
+M: Arnaldo Carvalho de Melo
+W: http://oops.ghostprotocols.net:81/blog
+S: Maintained
+F: drivers/net/wan/cycx*
+
CYCLADES ASYNC MUX DRIVER
W: http://www.cyclades.com/
S: Orphan
@@ -2629,7 +2641,7 @@ F: include/uapi/drm/
INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets)
M: Daniel Vetter
-L: intel-gfx@lists.freedesktop.org
+L: intel-gfx@lists.freedesktop.org (subscribers-only)
L: dri-devel@lists.freedesktop.org
T: git git://people.freedesktop.org/~danvet/drm-intel
S: Supported
@@ -3055,6 +3067,12 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/kristoffer/linux-hpc.git
F: drivers/video/s1d13xxxfb.c
F: include/video/s1d13xxxfb.h
+ETHEREXPRESS-16 NETWORK DRIVER
+M: Philip Blundell
+L: netdev@vger.kernel.org
+S: Maintained
+F: drivers/net/ethernet/i825xx/eexpress.*
+
ETHERNET BRIDGE
M: Stephen Hemminger
L: bridge@lists.linux-foundation.org
@@ -3242,12 +3260,6 @@ F: Documentation/firmware_class/
F: drivers/base/firmware*.c
F: include/linux/firmware.h
-FLASHSYSTEM DRIVER (IBM FlashSystem 70/80 PCI SSD Flash Card)
-M: Joshua Morris
-M: Philip Kelleher
-S: Maintained
-F: drivers/block/rsxx/
-
FLOPPY DRIVER
M: Jiri Kosina
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/floppy.git
@@ -3857,7 +3869,7 @@ F: drivers/i2c/busses/i2c-ismt.c
F: Documentation/i2c/busses/i2c-ismt
I2C/SMBUS STUB DRIVER
-M: Jean Delvare
+M: "Mark M. Hoffman"
L: linux-i2c@vger.kernel.org
S: Maintained
F: drivers/i2c/i2c-stub.c
@@ -4011,22 +4023,6 @@ M: Stanislaw Gruszka
S: Maintained
F: drivers/usb/atm/ueagle-atm.c
-INA209 HARDWARE MONITOR DRIVER
-M: Guenter Roeck
-L: lm-sensors@lm-sensors.org
-S: Maintained
-F: Documentation/hwmon/ina209
-F: Documentation/devicetree/bindings/i2c/ina209.txt
-F: drivers/hwmon/ina209.c
-
-INA2XX HARDWARE MONITOR DRIVER
-M: Guenter Roeck
-L: lm-sensors@lm-sensors.org
-S: Maintained
-F: Documentation/hwmon/ina2xx
-F: drivers/hwmon/ina2xx.c
-F: include/linux/platform_data/ina2xx.h
-
INDUSTRY PACK SUBSYSTEM (IPACK)
M: Samuel Iglesias Gonsalvez
M: Jens Taprogge
@@ -4941,12 +4937,6 @@ W: logfs.org
S: Maintained
F: fs/logfs/
-LPC32XX MACHINE SUPPORT
-M: Roland Stigge
-L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S: Maintained
-F: arch/arm/mach-lpc32xx/
-
LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
M: Nagalakshmi Nandigama
M: Sreekanth Reddy
@@ -5071,8 +5061,9 @@ S: Maintained
F: drivers/net/ethernet/marvell/sk*
MARVELL LIBERTAS WIRELESS DRIVER
+M: Dan Williams
L: libertas-dev@lists.infradead.org
-S: Orphan
+S: Maintained
F: drivers/net/wireless/libertas/
MARVELL MV643XX ETHERNET DRIVER
@@ -5125,15 +5116,6 @@ S: Maintained
F: Documentation/hwmon/max6650
F: drivers/hwmon/max6650.c
-MAX6697 HARDWARE MONITOR DRIVER
-M: Guenter Roeck
-L: lm-sensors@lm-sensors.org
-S: Maintained
-F: Documentation/hwmon/max6697
-F: Documentation/devicetree/bindings/i2c/max6697.txt
-F: drivers/hwmon/max6697.c
-F: include/linux/platform_data/max6697.h
-
MAXIRADIO FM RADIO RECEIVER DRIVER
M: Hans Verkuil
L: linux-media@vger.kernel.org
@@ -5574,7 +5556,6 @@ F: include/uapi/linux/if_*
F: include/uapi/linux/netdevice.h
NETXEN (1/10) GbE SUPPORT
-M: Manish Chopra
M: Sony Chacko
M: Rajesh Borundia
L: netdev@vger.kernel.org
@@ -5659,14 +5640,6 @@ S: Maintained
F: drivers/video/riva/
F: drivers/video/nvidia/
-NVM EXPRESS DRIVER
-M: Matthew Wilcox
-L: linux-nvme@lists.infradead.org
-T: git git://git.infradead.org/users/willy/linux-nvme.git
-S: Supported
-F: drivers/block/nvme.c
-F: include/linux/nvme.h
-
OMAP SUPPORT
M: Tony Lindgren
L: linux-omap@vger.kernel.org
@@ -5695,7 +5668,7 @@ S: Maintained
F: arch/arm/*omap*/*clock*
OMAP POWER MANAGEMENT SUPPORT
-M: Kevin Hilman
+M: Kevin Hilman
L: linux-omap@vger.kernel.org
S: Maintained
F: arch/arm/*omap*/*pm*
@@ -5789,7 +5762,7 @@ F: arch/arm/*omap*/usb*
OMAP GPIO DRIVER
M: Santosh Shilimkar
-M: Kevin Hilman
+M: Kevin Hilman
L: linux-omap@vger.kernel.org
S: Maintained
F: drivers/gpio/gpio-omap.c
@@ -6221,7 +6194,7 @@ F: include/linux/power_supply.h
F: drivers/power/
PNP SUPPORT
-M: Rafael J. Wysocki
+M: Adam Belay
M: Bjorn Helgaas
S: Maintained
F: drivers/pnp/
@@ -6457,8 +6430,6 @@ F: Documentation/networking/LICENSE.qla3xxx
F: drivers/net/ethernet/qlogic/qla3xxx.*
QLOGIC QLCNIC (1/10)Gb ETHERNET DRIVER
-M: Rajesh Borundia
-M: Shahed Shaikh
M: Jitendra Kalsaria
M: Sony Chacko
M: linux-driver@qlogic.com
@@ -6563,6 +6534,12 @@ S: Maintained
F: Documentation/blockdev/ramdisk.txt
F: drivers/block/brd.c
+RAMSAM DRIVER (IBM RamSan 70/80 PCI SSD Flash Card)
+M: Joshua Morris
+M: Philip Kelleher
+S: Maintained
+F: drivers/block/rsxx/
+
RANDOM NUMBER DRIVER
M: Theodore Ts'o"
S: Maintained
@@ -6631,7 +6608,7 @@ S: Supported
F: fs/reiserfs/
REGISTER MAP ABSTRACTION
-M: Mark Brown
+M: Mark Brown
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git
S: Supported
F: drivers/base/regmap/
@@ -6957,6 +6934,7 @@ F: drivers/scsi/st*
SCTP PROTOCOL
M: Vlad Yasevich
+M: Sridhar Samudrala
M: Neil Horman
L: linux-sctp@vger.kernel.org
W: http://lksctp.sourceforge.net
@@ -7178,7 +7156,7 @@ F: arch/arm/mach-s3c2410/bast-irq.c
TI DAVINCI MACHINE SUPPORT
M: Sekhar Nori
-M: Kevin Hilman
+M: Kevin Hilman
L: davinci-linux-open-source@linux.davincidsp.com (moderated for non-subscribers)
T: git git://gitorious.org/linux-davinci/linux-davinci.git
Q: http://patchwork.kernel.org/project/linux-davinci/list/
@@ -7211,6 +7189,13 @@ L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/ethernet/sis/sis900.*
+SIS 96X I2C/SMBUS DRIVER
+M: "Mark M. Hoffman"
+L: linux-i2c@vger.kernel.org
+S: Maintained
+F: Documentation/i2c/busses/i2c-sis96x
+F: drivers/i2c/busses/i2c-sis96x.c
+
SIS FRAMEBUFFER DRIVER
M: Thomas Winischhofer
W: http://www.winischhofer.net/linuxsisvga.shtml
@@ -7288,7 +7273,7 @@ F: Documentation/hwmon/sch5627
F: drivers/hwmon/sch5627.c
SMSC47B397 HARDWARE MONITOR DRIVER
-M: Jean Delvare
+M: "Mark M. Hoffman"
L: lm-sensors@lm-sensors.org
S: Maintained
F: Documentation/hwmon/smsc47b397
@@ -7379,7 +7364,7 @@ F: sound/
SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT (ASoC)
M: Liam Girdwood
-M: Mark Brown
+M: Mark Brown
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
W: http://alsa-project.org/main/index.php/ASoC
@@ -7468,7 +7453,7 @@ F: drivers/clk/spear/
SPI SUBSYSTEM
M: Grant Likely
-M: Mark Brown
+M: Mark Brown
L: spi-devel-general@lists.sourceforge.net
Q: http://patchwork.kernel.org/project/spi-devel-general/list/
T: git git://git.secretlab.ca/git/linux-2.6.git
@@ -7711,10 +7696,9 @@ F: include/linux/swiotlb.h
SYNOPSYS ARC ARCHITECTURE
M: Vineet Gupta
+L: linux-snps-arc@vger.kernel.org
S: Supported
F: arch/arc/
-F: Documentation/devicetree/bindings/arc/
-F: drivers/tty/serial/arc-uart.c
SYSV FILESYSTEM
M: Christoph Hellwig
@@ -8713,7 +8697,7 @@ F: drivers/scsi/vmw_pvscsi.h
VOLTAGE AND CURRENT REGULATOR FRAMEWORK
M: Liam Girdwood
-M: Mark Brown
+M: Mark Brown
W: http://opensource.wolfsonmicro.com/node/15
W: http://www.slimlogic.co.uk/?p=48
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lrg/regulator.git
diff --git a/trunk/Makefile b/trunk/Makefile
index 46263d808876..5bd9f7700eb9 100644
--- a/trunk/Makefile
+++ b/trunk/Makefile
@@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 9
SUBLEVEL = 0
-EXTRAVERSION = -rc8
+EXTRAVERSION = -rc1
NAME = Unicycling Gorilla
# *DOCUMENTATION*
@@ -513,8 +513,7 @@ ifeq ($(KBUILD_EXTMOD),)
# Carefully list dependencies so we do not try to build scripts twice
# in parallel
PHONY += scripts
-scripts: scripts_basic include/config/auto.conf include/config/tristate.conf \
- asm-generic
+scripts: scripts_basic include/config/auto.conf include/config/tristate.conf
$(Q)$(MAKE) $(build)=$(@)
# Objects we will link into vmlinux / subdirs we need to visit
diff --git a/trunk/arch/Kconfig b/trunk/arch/Kconfig
index 1455579791ec..5a1779c93940 100644
--- a/trunk/arch/Kconfig
+++ b/trunk/arch/Kconfig
@@ -319,6 +319,13 @@ config ARCH_WANT_OLD_COMPAT_IPC
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
bool
+config HAVE_VIRT_TO_BUS
+ bool
+ help
+ An architecture should select this if it implements the
+ deprecated interface virt_to_bus(). All new architectures
+ should probably not select this.
+
config HAVE_ARCH_SECCOMP_FILTER
bool
help
diff --git a/trunk/arch/alpha/Kconfig b/trunk/arch/alpha/Kconfig
index 8a33ba01301f..5833aa441481 100644
--- a/trunk/arch/alpha/Kconfig
+++ b/trunk/arch/alpha/Kconfig
@@ -9,7 +9,7 @@ config ALPHA
select HAVE_PERF_EVENTS
select HAVE_DMA_ATTRS
select HAVE_GENERIC_HARDIRQS
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select GENERIC_IRQ_PROBE
select AUTO_IRQ_AFFINITY if SMP
select GENERIC_IRQ_SHOW
diff --git a/trunk/arch/alpha/Makefile b/trunk/arch/alpha/Makefile
index 2cc3cc519c54..4759fe751aa1 100644
--- a/trunk/arch/alpha/Makefile
+++ b/trunk/arch/alpha/Makefile
@@ -12,7 +12,7 @@ NM := $(NM) -B
LDFLAGS_vmlinux := -static -N #-relax
CHECKFLAGS += -D__alpha__ -m64
-cflags-y := -pipe -mno-fp-regs -ffixed-8
+cflags-y := -pipe -mno-fp-regs -ffixed-8 -msmall-data
cflags-y += $(call cc-option, -fno-jump-tables)
cpuflags-$(CONFIG_ALPHA_EV4) := -mcpu=ev4
diff --git a/trunk/arch/alpha/boot/head.S b/trunk/arch/alpha/boot/head.S
index 8efb26686d47..b06812bcac83 100644
--- a/trunk/arch/alpha/boot/head.S
+++ b/trunk/arch/alpha/boot/head.S
@@ -4,7 +4,6 @@
* initial bootloader stuff..
*/
-#include
.set noreorder
.globl __start
diff --git a/trunk/arch/alpha/include/asm/floppy.h b/trunk/arch/alpha/include/asm/floppy.h
index bae97eb19d26..46cefbd50e73 100644
--- a/trunk/arch/alpha/include/asm/floppy.h
+++ b/trunk/arch/alpha/include/asm/floppy.h
@@ -26,7 +26,7 @@
#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
#define fd_cacheflush(addr,size) /* nothing */
#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt,\
- 0, "floppy", NULL)
+ IRQF_DISABLED, "floppy", NULL)
#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL)
#ifdef CONFIG_PCI
diff --git a/trunk/arch/alpha/kernel/irq.c b/trunk/arch/alpha/kernel/irq.c
index 7b2be251c30f..2872accd2215 100644
--- a/trunk/arch/alpha/kernel/irq.c
+++ b/trunk/arch/alpha/kernel/irq.c
@@ -117,6 +117,13 @@ handle_irq(int irq)
return;
}
+ /*
+ * From here we must proceed with IPL_MAX. Note that we do not
+ * explicitly enable interrupts afterwards - some MILO PALcode
+ * (namely LX164 one) seems to have severe problems with RTI
+ * at IPL 0.
+ */
+ local_irq_disable();
irq_enter();
generic_handle_irq_desc(irq, desc);
irq_exit();
diff --git a/trunk/arch/alpha/kernel/irq_alpha.c b/trunk/arch/alpha/kernel/irq_alpha.c
index f433fc11877a..772ddfdb71a8 100644
--- a/trunk/arch/alpha/kernel/irq_alpha.c
+++ b/trunk/arch/alpha/kernel/irq_alpha.c
@@ -45,14 +45,6 @@ do_entInt(unsigned long type, unsigned long vector,
unsigned long la_ptr, struct pt_regs *regs)
{
struct pt_regs *old_regs;
-
- /*
- * Disable interrupts during IRQ handling.
- * Note that there is no matching local_irq_enable() due to
- * severe problems with RTI at IPL0 and some MILO PALcode
- * (namely LX164).
- */
- local_irq_disable();
switch (type) {
case 0:
#ifdef CONFIG_SMP
@@ -70,6 +62,7 @@ do_entInt(unsigned long type, unsigned long vector,
{
long cpu;
+ local_irq_disable();
smp_percpu_timer_interrupt(regs);
cpu = smp_processor_id();
if (cpu != boot_cpuid) {
@@ -229,6 +222,7 @@ process_mcheck_info(unsigned long vector, unsigned long la_ptr,
struct irqaction timer_irqaction = {
.handler = timer_interrupt,
+ .flags = IRQF_DISABLED,
.name = "timer",
};
diff --git a/trunk/arch/alpha/kernel/sys_nautilus.c b/trunk/arch/alpha/kernel/sys_nautilus.c
index 1383f8601a93..4d4c046f708d 100644
--- a/trunk/arch/alpha/kernel/sys_nautilus.c
+++ b/trunk/arch/alpha/kernel/sys_nautilus.c
@@ -188,10 +188,6 @@ nautilus_machine_check(unsigned long vector, unsigned long la_ptr)
extern void free_reserved_mem(void *, void *);
extern void pcibios_claim_one_bus(struct pci_bus *);
-static struct resource irongate_io = {
- .name = "Irongate PCI IO",
- .flags = IORESOURCE_IO,
-};
static struct resource irongate_mem = {
.name = "Irongate PCI MEM",
.flags = IORESOURCE_MEM,
@@ -213,7 +209,6 @@ nautilus_init_pci(void)
irongate = pci_get_bus_and_slot(0, 0);
bus->self = irongate;
- bus->resource[0] = &irongate_io;
bus->resource[1] = &irongate_mem;
pci_bus_size_bridges(bus);
diff --git a/trunk/arch/alpha/kernel/sys_titan.c b/trunk/arch/alpha/kernel/sys_titan.c
index a53cf03f49d5..5cf4a481b8c5 100644
--- a/trunk/arch/alpha/kernel/sys_titan.c
+++ b/trunk/arch/alpha/kernel/sys_titan.c
@@ -280,15 +280,15 @@ titan_late_init(void)
* all reported to the kernel as machine checks, so the handler
* is a nop so it can be called to count the individual events.
*/
- titan_request_irq(63+16, titan_intr_nop, 0,
+ titan_request_irq(63+16, titan_intr_nop, IRQF_DISABLED,
"CChip Error", NULL);
- titan_request_irq(62+16, titan_intr_nop, 0,
+ titan_request_irq(62+16, titan_intr_nop, IRQF_DISABLED,
"PChip 0 H_Error", NULL);
- titan_request_irq(61+16, titan_intr_nop, 0,
+ titan_request_irq(61+16, titan_intr_nop, IRQF_DISABLED,
"PChip 1 H_Error", NULL);
- titan_request_irq(60+16, titan_intr_nop, 0,
+ titan_request_irq(60+16, titan_intr_nop, IRQF_DISABLED,
"PChip 0 C_Error", NULL);
- titan_request_irq(59+16, titan_intr_nop, 0,
+ titan_request_irq(59+16, titan_intr_nop, IRQF_DISABLED,
"PChip 1 C_Error", NULL);
/*
@@ -348,9 +348,9 @@ privateer_init_pci(void)
* Hook a couple of extra err interrupts that the
* common titan code won't.
*/
- titan_request_irq(53+16, titan_intr_nop, 0,
+ titan_request_irq(53+16, titan_intr_nop, IRQF_DISABLED,
"NMI", NULL);
- titan_request_irq(50+16, titan_intr_nop, 0,
+ titan_request_irq(50+16, titan_intr_nop, IRQF_DISABLED,
"Temperature Warning", NULL);
/*
diff --git a/trunk/arch/arc/include/asm/dma-mapping.h b/trunk/arch/arc/include/asm/dma-mapping.h
index 45b8e0cea176..31f77aec0823 100644
--- a/trunk/arch/arc/include/asm/dma-mapping.h
+++ b/trunk/arch/arc/include/asm/dma-mapping.h
@@ -126,7 +126,7 @@ dma_map_sg(struct device *dev, struct scatterlist *sg,
int i;
for_each_sg(sg, s, nents, i)
- s->dma_address = dma_map_page(dev, sg_page(s), s->offset,
+ sg->dma_address = dma_map_page(dev, sg_page(s), s->offset,
s->length, dir);
return nents;
diff --git a/trunk/arch/arc/include/asm/elf.h b/trunk/arch/arc/include/asm/elf.h
index a26282857683..f4c8d36ebecb 100644
--- a/trunk/arch/arc/include/asm/elf.h
+++ b/trunk/arch/arc/include/asm/elf.h
@@ -72,4 +72,7 @@ extern int elf_check_arch(const struct elf32_hdr *);
*/
#define ELF_PLATFORM (NULL)
+#define SET_PERSONALITY(ex) \
+ set_personality(PER_LINUX | (current->personality & (~PER_MASK)))
+
#endif
diff --git a/trunk/arch/arc/include/asm/entry.h b/trunk/arch/arc/include/asm/entry.h
index eb2ae53187d9..23daa326fc9b 100644
--- a/trunk/arch/arc/include/asm/entry.h
+++ b/trunk/arch/arc/include/asm/entry.h
@@ -415,7 +415,7 @@
*-------------------------------------------------------------*/
.macro SAVE_ALL_EXCEPTION marker
- st \marker, [sp, 8] /* orig_r8 */
+ st \marker, [sp, 8]
st r0, [sp, 4] /* orig_r0, needed only for sys calls */
/* Restore r9 used to code the early prologue */
diff --git a/trunk/arch/arc/include/asm/irqflags.h b/trunk/arch/arc/include/asm/irqflags.h
index eac071668201..ccd84806b62f 100644
--- a/trunk/arch/arc/include/asm/irqflags.h
+++ b/trunk/arch/arc/include/asm/irqflags.h
@@ -39,7 +39,7 @@ static inline long arch_local_irq_save(void)
" flag.nz %0 \n"
: "=r"(temp), "=r"(flags)
: "n"((STATUS_E1_MASK | STATUS_E2_MASK))
- : "memory", "cc");
+ : "cc");
return flags;
}
@@ -53,8 +53,7 @@ static inline void arch_local_irq_restore(unsigned long flags)
__asm__ __volatile__(
" flag %0 \n"
:
- : "r"(flags)
- : "memory");
+ : "r"(flags));
}
/*
@@ -74,8 +73,7 @@ static inline void arch_local_irq_disable(void)
" and %0, %0, %1 \n"
" flag %0 \n"
: "=&r"(temp)
- : "n"(~(STATUS_E1_MASK | STATUS_E2_MASK))
- : "memory");
+ : "n"(~(STATUS_E1_MASK | STATUS_E2_MASK)));
}
/*
@@ -87,9 +85,7 @@ static inline long arch_local_save_flags(void)
__asm__ __volatile__(
" lr %0, [status32] \n"
- : "=&r"(temp)
- :
- : "memory");
+ : "=&r"(temp));
return temp;
}
diff --git a/trunk/arch/arc/include/asm/kgdb.h b/trunk/arch/arc/include/asm/kgdb.h
index 4930957ca3d3..f3c4934f0ca9 100644
--- a/trunk/arch/arc/include/asm/kgdb.h
+++ b/trunk/arch/arc/include/asm/kgdb.h
@@ -13,7 +13,7 @@
#ifdef CONFIG_KGDB
-#include
+#include
/* to ensure compatibility with Linux 2.6.35, we don't implement the get/set
* register API yet */
@@ -53,7 +53,9 @@ enum arc700_linux_regnums {
};
#else
-#define kgdb_trap(regs, param)
+static inline void kgdb_trap(struct pt_regs *regs, int param)
+{
+}
#endif
#endif /* __ARC_KGDB_H__ */
diff --git a/trunk/arch/arc/include/asm/ptrace.h b/trunk/arch/arc/include/asm/ptrace.h
index 6179de7e07c2..8ae783d20a81 100644
--- a/trunk/arch/arc/include/asm/ptrace.h
+++ b/trunk/arch/arc/include/asm/ptrace.h
@@ -123,7 +123,7 @@ static inline long regs_return_value(struct pt_regs *regs)
#define orig_r8_IS_SCALL 0x0001
#define orig_r8_IS_SCALL_RESTARTED 0x0002
#define orig_r8_IS_BRKPT 0x0004
-#define orig_r8_IS_EXCPN 0x0008
+#define orig_r8_IS_EXCPN 0x0004
#define orig_r8_IS_IRQ1 0x0010
#define orig_r8_IS_IRQ2 0x0020
diff --git a/trunk/arch/arc/include/asm/syscalls.h b/trunk/arch/arc/include/asm/syscalls.h
index dd785befe7fd..e53a5340ba4f 100644
--- a/trunk/arch/arc/include/asm/syscalls.h
+++ b/trunk/arch/arc/include/asm/syscalls.h
@@ -16,6 +16,8 @@
#include
int sys_clone_wrapper(int, int, int, int, int);
+int sys_fork_wrapper(void);
+int sys_vfork_wrapper(void);
int sys_cacheflush(uint32_t, uint32_t uint32_t);
int sys_arc_settls(void *);
int sys_arc_gettls(void);
diff --git a/trunk/arch/arc/include/uapi/asm/ptrace.h b/trunk/arch/arc/include/uapi/asm/ptrace.h
index 30333cec0fef..6afa4f702075 100644
--- a/trunk/arch/arc/include/uapi/asm/ptrace.h
+++ b/trunk/arch/arc/include/uapi/asm/ptrace.h
@@ -28,14 +28,14 @@
*/
struct user_regs_struct {
- struct {
+ struct scratch {
long pad;
long bta, lp_start, lp_end, lp_count;
long status32, ret, blink, fp, gp;
long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
long sp;
} scratch;
- struct {
+ struct callee {
long pad;
long r25, r24, r23, r22, r21, r20;
long r19, r18, r17, r16, r15, r14, r13;
diff --git a/trunk/arch/arc/kernel/entry.S b/trunk/arch/arc/kernel/entry.S
index 91eeab81f52d..ef6800ba2f03 100644
--- a/trunk/arch/arc/kernel/entry.S
+++ b/trunk/arch/arc/kernel/entry.S
@@ -452,7 +452,7 @@ tracesys:
; using ERET won't work since next-PC has already committed
lr r12, [efa]
GET_CURR_TASK_FIELD_PTR TASK_THREAD, r11
- st r12, [r11, THREAD_FAULT_ADDR] ; thread.fault_address
+ st r12, [r11, THREAD_FAULT_ADDR]
; PRE Sys Call Ptrace hook
mov r0, sp ; pt_regs needed
@@ -792,6 +792,31 @@ ARC_EXIT ret_from_fork
;################### Special Sys Call Wrappers ##########################
+; TBD: call do_fork directly from here
+ARC_ENTRY sys_fork_wrapper
+ SAVE_CALLEE_SAVED_USER
+ bl @sys_fork
+ DISCARD_CALLEE_SAVED_USER
+
+ GET_CURR_THR_INFO_FLAGS r10
+ btst r10, TIF_SYSCALL_TRACE
+ bnz tracesys_exit
+
+ b ret_from_system_call
+ARC_EXIT sys_fork_wrapper
+
+ARC_ENTRY sys_vfork_wrapper
+ SAVE_CALLEE_SAVED_USER
+ bl @sys_vfork
+ DISCARD_CALLEE_SAVED_USER
+
+ GET_CURR_THR_INFO_FLAGS r10
+ btst r10, TIF_SYSCALL_TRACE
+ bnz tracesys_exit
+
+ b ret_from_system_call
+ARC_EXIT sys_vfork_wrapper
+
ARC_ENTRY sys_clone_wrapper
SAVE_CALLEE_SAVED_USER
bl @sys_clone
diff --git a/trunk/arch/arc/kernel/kgdb.c b/trunk/arch/arc/kernel/kgdb.c
index 52bdc83c1495..2888ba5be47e 100644
--- a/trunk/arch/arc/kernel/kgdb.c
+++ b/trunk/arch/arc/kernel/kgdb.c
@@ -9,7 +9,6 @@
*/
#include
-#include
#include
#include
diff --git a/trunk/arch/arc/kernel/setup.c b/trunk/arch/arc/kernel/setup.c
index 2d95ac07df7b..dc0f968dae0a 100644
--- a/trunk/arch/arc/kernel/setup.c
+++ b/trunk/arch/arc/kernel/setup.c
@@ -232,8 +232,10 @@ char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
n += scnprintf(buf + n, len - n, "\n");
+#ifdef _ASM_GENERIC_UNISTD_H
n += scnprintf(buf + n, len - n,
- "OS ABI [v3]\t: no-legacy-syscalls\n");
+ "OS ABI [v2]\t: asm-generic/{unistd,stat,fcntl}\n");
+#endif
return buf;
}
diff --git a/trunk/arch/arc/kernel/sys.c b/trunk/arch/arc/kernel/sys.c
index 9d6c1ca26af6..f6bdd07583f3 100644
--- a/trunk/arch/arc/kernel/sys.c
+++ b/trunk/arch/arc/kernel/sys.c
@@ -6,6 +6,8 @@
#include
#define sys_clone sys_clone_wrapper
+#define sys_fork sys_fork_wrapper
+#define sys_vfork sys_vfork_wrapper
#undef __SYSCALL
#define __SYSCALL(nr, call) [nr] = (call),
diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig
index 1cacda426a0e..5b714695b01b 100644
--- a/trunk/arch/arm/Kconfig
+++ b/trunk/arch/arm/Kconfig
@@ -49,6 +49,7 @@ config ARM
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_UID16
+ select HAVE_VIRT_TO_BUS
select KTIME_SCALAR
select PERF_USE_VMALLOC
select RTC_LIB
@@ -555,6 +556,7 @@ config ARCH_IXP4XX
config ARCH_DOVE
bool "Marvell Dove"
select ARCH_REQUIRE_GPIOLIB
+ select COMMON_CLK_DOVE
select CPU_V7
select GENERIC_CLOCKEVENTS
select MIGHT_HAVE_PCI
@@ -742,7 +744,6 @@ config ARCH_RPC
select NEED_MACH_IO_H
select NEED_MACH_MEMORY_H
select NO_IOPORT
- select VIRT_TO_BUS
help
On the Acorn Risc-PC, Linux can support the internal IDE disk and
CD-ROM interface, serial and parallel port, and the floppy drive.
@@ -878,7 +879,6 @@ config ARCH_SHARK
select ISA_DMA
select NEED_MACH_MEMORY_H
select PCI
- select VIRT_TO_BUS
select ZONE_DMA
help
Support for the StrongARM based Digital DNARD machine, also known
@@ -1006,12 +1006,12 @@ config ARCH_MULTI_V4_V5
bool
config ARCH_MULTI_V6
- bool "ARMv6 based platforms (ARM11)"
+ bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
select ARCH_MULTI_V6_V7
select CPU_V6
config ARCH_MULTI_V7
- bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
+ bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
default y
select ARCH_MULTI_V6_V7
select ARCH_VEXPRESS
@@ -1183,9 +1183,9 @@ config ARM_NR_BANKS
default 8
config IWMMXT
- bool "Enable iWMMXt support" if !CPU_PJ4
+ bool "Enable iWMMXt support"
depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
- default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
+ default y if PXA27x || PXA3xx || ARCH_MMP
help
Enable support for iWMMXt context switching at run time if
running on a CPU that supports it.
@@ -1439,16 +1439,6 @@ config ARM_ERRATA_775420
to deadlock. This workaround puts DSB before executing ISB if
an abort may occur on cache maintenance.
-config ARM_ERRATA_798181
- bool "ARM errata: TLBI/DSB failure on Cortex-A15"
- depends on CPU_V7 && SMP
- help
- On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
- adequately shooting down all use of the old entries. This
- option enables the Linux kernel workaround for this erratum
- which sends an IPI to the CPUs that are running the same ASID
- as the one being invalidated.
-
endmenu
source "arch/arm/common/Kconfig"
@@ -1472,6 +1462,10 @@ config ISA_DMA
bool
select ISA_DMA_API
+config ARCH_NO_VIRT_TO_BUS
+ def_bool y
+ depends on !ARCH_RPC && !ARCH_NETWINDER && !ARCH_SHARK
+
# Select ISA DMA interface
config ISA_DMA_API
bool
@@ -1663,16 +1657,13 @@ config LOCAL_TIMERS
accounting to be spread across the timer interval, preventing a
"thundering herd" at every timer tick.
-# The GPIO number here must be sorted by descending number. In case of
-# a multiplatform kernel, we just want the highest value required by the
-# selected platforms.
config ARCH_NR_GPIO
int
default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
- default 512 if SOC_OMAP5
default 355 if ARCH_U8500
- default 288 if ARCH_VT8500 || ARCH_SUNXI
default 264 if MACH_H4700
+ default 512 if SOC_OMAP5
+ default 288 if ARCH_VT8500 || ARCH_SUNXI
default 0
help
Maximum number of GPIOs in the system.
@@ -1896,9 +1887,8 @@ config XEN_DOM0
config XEN
bool "Xen guest support on ARM (EXPERIMENTAL)"
- depends on ARM && AEABI && OF
+ depends on ARM && OF
depends on CPU_V7 && !CPU_V6
- depends on !GENERIC_ATOMIC64
help
Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
diff --git a/trunk/arch/arm/Kconfig.debug b/trunk/arch/arm/Kconfig.debug
index 9b31f4311ea2..acddddac7ee4 100644
--- a/trunk/arch/arm/Kconfig.debug
+++ b/trunk/arch/arm/Kconfig.debug
@@ -492,10 +492,9 @@ config DEBUG_IMX_UART_PORT
DEBUG_IMX31_UART || \
DEBUG_IMX35_UART || \
DEBUG_IMX51_UART || \
- DEBUG_IMX53_UART || \
+ DEBUG_IMX50_IMX53_UART || \
DEBUG_IMX6Q_UART
default 1
- depends on ARCH_MXC
help
Choose UART port on which kernel low-level debug messages
should be output.
diff --git a/trunk/arch/arm/boot/Makefile b/trunk/arch/arm/boot/Makefile
index 84aa2caf07ed..71768b8a1ab9 100644
--- a/trunk/arch/arm/boot/Makefile
+++ b/trunk/arch/arm/boot/Makefile
@@ -115,4 +115,4 @@ i:
$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
$(obj)/Image System.map "$(INSTALL_PATH)"
-subdir- := bootp compressed dts
+subdir- := bootp compressed
diff --git a/trunk/arch/arm/boot/compressed/Makefile b/trunk/arch/arm/boot/compressed/Makefile
index afed28e37ea5..5cad8a6dadb0 100644
--- a/trunk/arch/arm/boot/compressed/Makefile
+++ b/trunk/arch/arm/boot/compressed/Makefile
@@ -120,7 +120,7 @@ ORIG_CFLAGS := $(KBUILD_CFLAGS)
KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
endif
-ccflags-y := -fpic -mno-single-pic-base -fno-builtin -I$(obj)
+ccflags-y := -fpic -fno-builtin -I$(obj)
asflags-y := -Wa,-march=all -DZIMAGE
# Supply kernel BSS size to the decompressor via a linker symbol.
diff --git a/trunk/arch/arm/boot/dts/armada-370-mirabox.dts b/trunk/arch/arm/boot/dts/armada-370-mirabox.dts
index 3234875824dc..dd0c57dd9f30 100644
--- a/trunk/arch/arm/boot/dts/armada-370-mirabox.dts
+++ b/trunk/arch/arm/boot/dts/armada-370-mirabox.dts
@@ -54,7 +54,7 @@
};
mvsdio@d00d4000 {
- pinctrl-0 = <&sdio_pins3>;
+ pinctrl-0 = <&sdio_pins2>;
pinctrl-names = "default";
status = "okay";
/*
diff --git a/trunk/arch/arm/boot/dts/armada-370-rd.dts b/trunk/arch/arm/boot/dts/armada-370-rd.dts
index 070bba4f2585..f8e4855bc9a5 100644
--- a/trunk/arch/arm/boot/dts/armada-370-rd.dts
+++ b/trunk/arch/arm/boot/dts/armada-370-rd.dts
@@ -64,13 +64,5 @@
status = "okay";
/* No CD or WP GPIOs */
};
-
- usb@d0050000 {
- status = "okay";
- };
-
- usb@d0051000 {
- status = "okay";
- };
};
};
diff --git a/trunk/arch/arm/boot/dts/armada-370-xp.dtsi b/trunk/arch/arm/boot/dts/armada-370-xp.dtsi
index 5b708208b607..6f1acc75e155 100644
--- a/trunk/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/trunk/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -31,6 +31,7 @@
mpic: interrupt-controller@d0020000 {
compatible = "marvell,mpic";
#interrupt-cells = <1>;
+ #address-cells = <1>;
#size-cells = <1>;
interrupt-controller;
};
@@ -53,7 +54,7 @@
reg = <0xd0012000 0x100>;
reg-shift = <2>;
interrupts = <41>;
- reg-io-width = <1>;
+ reg-io-width = <4>;
status = "disabled";
};
serial@d0012100 {
@@ -61,7 +62,7 @@
reg = <0xd0012100 0x100>;
reg-shift = <2>;
interrupts = <42>;
- reg-io-width = <1>;
+ reg-io-width = <4>;
status = "disabled";
};
diff --git a/trunk/arch/arm/boot/dts/armada-370.dtsi b/trunk/arch/arm/boot/dts/armada-370.dtsi
index a195debb67d3..8188d138020e 100644
--- a/trunk/arch/arm/boot/dts/armada-370.dtsi
+++ b/trunk/arch/arm/boot/dts/armada-370.dtsi
@@ -59,12 +59,6 @@
"mpp50", "mpp51", "mpp52";
marvell,function = "sd0";
};
-
- sdio_pins3: sdio-pins3 {
- marvell,pins = "mpp48", "mpp49", "mpp50",
- "mpp51", "mpp52", "mpp53";
- marvell,function = "sd0";
- };
};
gpio0: gpio@d0018100 {
diff --git a/trunk/arch/arm/boot/dts/armada-xp.dtsi b/trunk/arch/arm/boot/dts/armada-xp.dtsi
index ca00d8326c87..1443949c165e 100644
--- a/trunk/arch/arm/boot/dts/armada-xp.dtsi
+++ b/trunk/arch/arm/boot/dts/armada-xp.dtsi
@@ -46,7 +46,7 @@
reg = <0xd0012200 0x100>;
reg-shift = <2>;
interrupts = <43>;
- reg-io-width = <1>;
+ reg-io-width = <4>;
status = "disabled";
};
serial@d0012300 {
@@ -54,7 +54,7 @@
reg = <0xd0012300 0x100>;
reg-shift = <2>;
interrupts = <44>;
- reg-io-width = <1>;
+ reg-io-width = <4>;
status = "disabled";
};
diff --git a/trunk/arch/arm/boot/dts/at91sam9x5.dtsi b/trunk/arch/arm/boot/dts/at91sam9x5.dtsi
index a98c0d50fbbe..aa98e641931f 100644
--- a/trunk/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/trunk/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -238,32 +238,8 @@
nand {
pinctrl_nand: nand-0 {
atmel,pins =
- <3 0 0x1 0x0 /* PD0 periph A Read Enable */
- 3 1 0x1 0x0 /* PD1 periph A Write Enable */
- 3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */
- 3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */
- 3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */
- 3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */
- 3 6 0x1 0x0 /* PD6 periph A Data bit 0 */
- 3 7 0x1 0x0 /* PD7 periph A Data bit 1 */
- 3 8 0x1 0x0 /* PD8 periph A Data bit 2 */
- 3 9 0x1 0x0 /* PD9 periph A Data bit 3 */
- 3 10 0x1 0x0 /* PD10 periph A Data bit 4 */
- 3 11 0x1 0x0 /* PD11 periph A Data bit 5 */
- 3 12 0x1 0x0 /* PD12 periph A Data bit 6 */
- 3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
- };
-
- pinctrl_nand_16bits: nand_16bits-0 {
- atmel,pins =
- <3 14 0x1 0x0 /* PD14 periph A Data bit 8 */
- 3 15 0x1 0x0 /* PD15 periph A Data bit 9 */
- 3 16 0x1 0x0 /* PD16 periph A Data bit 10 */
- 3 17 0x1 0x0 /* PD17 periph A Data bit 11 */
- 3 18 0x1 0x0 /* PD18 periph A Data bit 12 */
- 3 19 0x1 0x0 /* PD19 periph A Data bit 13 */
- 3 20 0x1 0x0 /* PD20 periph A Data bit 14 */
- 3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
+ <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
+ 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
};
};
diff --git a/trunk/arch/arm/boot/dts/bcm2835.dtsi b/trunk/arch/arm/boot/dts/bcm2835.dtsi
index 7e0481e2441a..4bf2a8774aa7 100644
--- a/trunk/arch/arm/boot/dts/bcm2835.dtsi
+++ b/trunk/arch/arm/boot/dts/bcm2835.dtsi
@@ -105,7 +105,7 @@
compatible = "fixed-clock";
reg = <1>;
#clock-cells = <0>;
- clock-frequency = <250000000>;
+ clock-frequency = <150000000>;
};
};
};
diff --git a/trunk/arch/arm/boot/dts/dbx5x0.dtsi b/trunk/arch/arm/boot/dts/dbx5x0.dtsi
index aaa63d0a8096..69140ba99f46 100644
--- a/trunk/arch/arm/boot/dts/dbx5x0.dtsi
+++ b/trunk/arch/arm/boot/dts/dbx5x0.dtsi
@@ -191,8 +191,8 @@
prcmu: prcmu@80157000 {
compatible = "stericsson,db8500-prcmu";
- reg = <0x80157000 0x1000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
- reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
+ reg = <0x80157000 0x1000>;
+ reg-names = "prcmu";
interrupts = <0 47 0x4>;
#address-cells = <1>;
#size-cells = <1>;
@@ -319,8 +319,9 @@
};
};
- ab8500 {
+ ab8500@5 {
compatible = "stericsson,ab8500";
+ reg = <5>; /* mailbox 5 is i2c */
interrupt-parent = <&intc>;
interrupts = <0 40 0x4>;
interrupt-controller;
diff --git a/trunk/arch/arm/boot/dts/dove.dtsi b/trunk/arch/arm/boot/dts/dove.dtsi
index f7509cafc377..67dbe20868a2 100644
--- a/trunk/arch/arm/boot/dts/dove.dtsi
+++ b/trunk/arch/arm/boot/dts/dove.dtsi
@@ -197,11 +197,6 @@
status = "disabled";
};
- rtc@d8500 {
- compatible = "marvell,orion-rtc";
- reg = <0xd8500 0x20>;
- };
-
crypto: crypto@30000 {
compatible = "marvell,orion-crypto";
reg = <0x30000 0x10000>,
diff --git a/trunk/arch/arm/boot/dts/exynos4.dtsi b/trunk/arch/arm/boot/dts/exynos4.dtsi
index 1a62bcf18aa3..e1347fceb5bc 100644
--- a/trunk/arch/arm/boot/dts/exynos4.dtsi
+++ b/trunk/arch/arm/boot/dts/exynos4.dtsi
@@ -275,27 +275,18 @@
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <0 35 0>;
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
pdma1: pdma@12690000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12690000 0x1000>;
interrupts = <0 36 0>;
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
mdma1: mdma@12850000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12850000 0x1000>;
interrupts = <0 34 0>;
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
};
};
};
diff --git a/trunk/arch/arm/boot/dts/exynos5440.dtsi b/trunk/arch/arm/boot/dts/exynos5440.dtsi
index 9a99755920c0..5f3562ad6746 100644
--- a/trunk/arch/arm/boot/dts/exynos5440.dtsi
+++ b/trunk/arch/arm/boot/dts/exynos5440.dtsi
@@ -142,18 +142,12 @@
compatible = "arm,pl330", "arm,primecell";
reg = <0x120000 0x1000>;
interrupts = <0 34 0>;
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
pdma1: pdma@121B0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121000 0x1000>;
interrupts = <0 35 0>;
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
};
diff --git a/trunk/arch/arm/boot/dts/href.dtsi b/trunk/arch/arm/boot/dts/href.dtsi
index 379128eb9d98..592fb9dc35bd 100644
--- a/trunk/arch/arm/boot/dts/href.dtsi
+++ b/trunk/arch/arm/boot/dts/href.dtsi
@@ -221,7 +221,7 @@
};
};
- ab8500 {
+ ab8500@5 {
ab8500-regulators {
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
regulator-name = "V-DISPLAY";
diff --git a/trunk/arch/arm/boot/dts/hrefv60plus.dts b/trunk/arch/arm/boot/dts/hrefv60plus.dts
index 2b587a74b813..55f4191a626e 100644
--- a/trunk/arch/arm/boot/dts/hrefv60plus.dts
+++ b/trunk/arch/arm/boot/dts/hrefv60plus.dts
@@ -158,7 +158,7 @@
};
};
- ab8500 {
+ ab8500@5 {
ab8500-regulators {
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
regulator-name = "V-DISPLAY";
diff --git a/trunk/arch/arm/boot/dts/imx28-m28evk.dts b/trunk/arch/arm/boot/dts/imx28-m28evk.dts
index fd36e1cca104..6ce3d17c3a29 100644
--- a/trunk/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/trunk/arch/arm/boot/dts/imx28-m28evk.dts
@@ -152,6 +152,7 @@
i2c0: i2c@80058000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
+ clock-frequency = <400000>;
status = "okay";
sgtl5000: codec@0a {
diff --git a/trunk/arch/arm/boot/dts/imx28-sps1.dts b/trunk/arch/arm/boot/dts/imx28-sps1.dts
index 6c6a5442800a..e6cde8aa7fff 100644
--- a/trunk/arch/arm/boot/dts/imx28-sps1.dts
+++ b/trunk/arch/arm/boot/dts/imx28-sps1.dts
@@ -70,6 +70,7 @@
i2c0: i2c@80058000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
+ clock-frequency = <400000>;
status = "okay";
rtc: rtc@51 {
diff --git a/trunk/arch/arm/boot/dts/imx53-mba53.dts b/trunk/arch/arm/boot/dts/imx53-mba53.dts
index 468c0a1d48d9..e54fffd48369 100644
--- a/trunk/arch/arm/boot/dts/imx53-mba53.dts
+++ b/trunk/arch/arm/boot/dts/imx53-mba53.dts
@@ -42,9 +42,10 @@
fsl,pins = <689 0x10000 /* DISP1_DRDY */
482 0x10000 /* DISP1_HSYNC */
489 0x10000 /* DISP1_VSYNC */
+ 684 0x10000 /* DISP1_DAT_0 */
515 0x10000 /* DISP1_DAT_22 */
523 0x10000 /* DISP1_DAT_23 */
- 545 0x10000 /* DISP1_DAT_21 */
+ 543 0x10000 /* DISP1_DAT_21 */
553 0x10000 /* DISP1_DAT_20 */
558 0x10000 /* DISP1_DAT_19 */
564 0x10000 /* DISP1_DAT_18 */
diff --git a/trunk/arch/arm/boot/dts/imx6qdl.dtsi b/trunk/arch/arm/boot/dts/imx6qdl.dtsi
index 281a223591ff..06ec460b4581 100644
--- a/trunk/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/trunk/arch/arm/boot/dts/imx6qdl.dtsi
@@ -91,7 +91,6 @@
compatible = "arm,cortex-a9-twd-timer";
reg = <0x00a00600 0x20>;
interrupts = <1 13 0xf01>;
- clocks = <&clks 15>;
};
L2: l2-cache@00a02000 {
diff --git a/trunk/arch/arm/boot/dts/kirkwood-dns320.dts b/trunk/arch/arm/boot/dts/kirkwood-dns320.dts
index c9c44b2f62d7..5bb0bf39d3b8 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-dns320.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-dns320.dts
@@ -42,10 +42,12 @@
ocp@f1000000 {
serial@12000 {
+ clock-frequency = <166666667>;
status = "okay";
};
serial@12100 {
+ clock-frequency = <166666667>;
status = "okay";
};
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-dns325.dts b/trunk/arch/arm/boot/dts/kirkwood-dns325.dts
index e4e4930dc5cf..d430713ea9b9 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-dns325.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-dns325.dts
@@ -50,6 +50,7 @@
};
};
serial@12000 {
+ clock-frequency = <200000000>;
status = "okay";
};
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-dockstar.dts b/trunk/arch/arm/boot/dts/kirkwood-dockstar.dts
index 0196cf6b0ef2..2e3dd34e21a5 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-dockstar.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-dockstar.dts
@@ -37,6 +37,7 @@
};
};
serial@12000 {
+ clock-frequency = <200000000>;
status = "ok";
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-dreamplug.dts b/trunk/arch/arm/boot/dts/kirkwood-dreamplug.dts
index 289e51d86372..ef2d8c705709 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-dreamplug.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-dreamplug.dts
@@ -38,6 +38,7 @@
};
};
serial@12000 {
+ clock-frequency = <200000000>;
status = "ok";
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-goflexnet.dts b/trunk/arch/arm/boot/dts/kirkwood-goflexnet.dts
index c3573be7b92c..1b133e0c566e 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-goflexnet.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-goflexnet.dts
@@ -73,11 +73,11 @@
};
};
serial@12000 {
+ clock-frequency = <200000000>;
status = "ok";
};
nand@3000000 {
- chip-delay = <40>;
status = "okay";
partition@0 {
diff --git a/trunk/arch/arm/boot/dts/kirkwood-ib62x0.dts b/trunk/arch/arm/boot/dts/kirkwood-ib62x0.dts
index 5335b1aa8601..71902da33d63 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-ib62x0.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-ib62x0.dts
@@ -51,6 +51,7 @@
};
};
serial@12000 {
+ clock-frequency = <200000000>;
status = "okay";
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-iconnect.dts b/trunk/arch/arm/boot/dts/kirkwood-iconnect.dts
index 12ccf74ac3c4..504f16be8b54 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-iconnect.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -78,6 +78,7 @@
};
};
serial@12000 {
+ clock-frequency = <200000000>;
status = "ok";
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/trunk/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
index 3694e94f6e99..6cae4599c4b3 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -96,11 +96,11 @@
marvell,function = "gpio";
};
pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 {
- marvell,pins = "mpp46";
+ marvell,pins = "mpp44";
marvell,function = "gpio";
};
pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 {
- marvell,pins = "mpp47";
+ marvell,pins = "mpp45";
marvell,function = "gpio";
};
@@ -115,6 +115,7 @@
};
serial@12000 {
+ clock-frequency = <200000000>;
status = "ok";
};
@@ -157,14 +158,14 @@
gpios = <&gpio0 16 0>;
linux,default-trigger = "default-on";
};
- rebuild_led {
- label = "status:white:rebuild_led";
- gpios = <&gpio1 4 0>;
- };
- health_led {
+ health_led1 {
label = "status:red:health_led";
gpios = <&gpio1 5 0>;
};
+ health_led2 {
+ label = "status:white:health_led";
+ gpios = <&gpio1 4 0>;
+ };
backup_led {
label = "status:blue:backup_led";
gpios = <&gpio0 15 0>;
diff --git a/trunk/arch/arm/boot/dts/kirkwood-km_kirkwood.dts b/trunk/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
index 5bbd0542cdd3..8db3123ac80f 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
@@ -34,6 +34,7 @@
};
serial@12000 {
+ clock-frequency = <200000000>;
status = "ok";
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-lschlv2.dts b/trunk/arch/arm/boot/dts/kirkwood-lschlv2.dts
index 9f55d95f35f5..9510c9ea666c 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-lschlv2.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-lschlv2.dts
@@ -13,6 +13,7 @@
ocp@f1000000 {
serial@12000 {
+ clock-frequency = <166666667>;
status = "okay";
};
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-lsxhl.dts b/trunk/arch/arm/boot/dts/kirkwood-lsxhl.dts
index 5c84c118ed8d..739019c4cba9 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-lsxhl.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-lsxhl.dts
@@ -13,6 +13,7 @@
ocp@f1000000 {
serial@12000 {
+ clock-frequency = <200000000>;
status = "okay";
};
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-mplcec4.dts b/trunk/arch/arm/boot/dts/kirkwood-mplcec4.dts
index 758824118a9a..662dfd81b1ce 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-mplcec4.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-mplcec4.dts
@@ -90,6 +90,7 @@
};
serial@12000 {
+ clock-frequency = <200000000>;
status = "ok";
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-ns2-common.dtsi b/trunk/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
index 6affd924fe11..e8e7ecef1650 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
+++ b/trunk/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
@@ -23,6 +23,7 @@
};
serial@12000 {
+ clock-frequency = <166666667>;
status = "okay";
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-nsa310.dts b/trunk/arch/arm/boot/dts/kirkwood-nsa310.dts
index a7412b937a8a..3a178cf708d7 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-nsa310.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-nsa310.dts
@@ -117,6 +117,7 @@
};
serial@12000 {
+ clock-frequency = <200000000>;
status = "ok";
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/trunk/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
index d27f7245f8e7..ede7fe0d7a87 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
@@ -18,10 +18,12 @@
ocp@f1000000 {
serial@12000 {
+ clock-frequency = <200000000>;
status = "ok";
};
serial@12100 {
+ clock-frequency = <200000000>;
status = "ok";
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood-topkick.dts b/trunk/arch/arm/boot/dts/kirkwood-topkick.dts
index 66eb45b00b25..842ff95d60df 100644
--- a/trunk/arch/arm/boot/dts/kirkwood-topkick.dts
+++ b/trunk/arch/arm/boot/dts/kirkwood-topkick.dts
@@ -108,6 +108,7 @@
};
serial@12000 {
+ clock-frequency = <200000000>;
status = "ok";
};
diff --git a/trunk/arch/arm/boot/dts/kirkwood.dtsi b/trunk/arch/arm/boot/dts/kirkwood.dtsi
index fada7e6d24d8..2c738d9dc82a 100644
--- a/trunk/arch/arm/boot/dts/kirkwood.dtsi
+++ b/trunk/arch/arm/boot/dts/kirkwood.dtsi
@@ -38,7 +38,6 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <35>, <36>, <37>, <38>;
- clocks = <&gate_clk 7>;
};
gpio1: gpio@10140 {
@@ -50,7 +49,6 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <39>, <40>, <41>;
- clocks = <&gate_clk 7>;
};
serial@12000 {
@@ -59,6 +57,7 @@
reg-shift = <2>;
interrupts = <33>;
clocks = <&gate_clk 7>;
+ /* set clock-frequency in board dts */
status = "disabled";
};
@@ -68,6 +67,7 @@
reg-shift = <2>;
interrupts = <34>;
clocks = <&gate_clk 7>;
+ /* set clock-frequency in board dts */
status = "disabled";
};
@@ -75,7 +75,6 @@
compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
reg = <0x10300 0x20>;
interrupts = <53>;
- clocks = <&gate_clk 7>;
};
spi@10600 {
diff --git a/trunk/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/trunk/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index 0077fc8510b7..5a3a58b7e18f 100644
--- a/trunk/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/trunk/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -11,7 +11,7 @@
/ {
model = "LaCie Ethernet Disk mini V2";
- compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x";
+ compatible = "lacie,ethernet-disk-mini-v2", "marvell-orion5x-88f5182", "marvell,orion5x";
memory {
reg = <0x00000000 0x4000000>; /* 64 MB */
diff --git a/trunk/arch/arm/boot/dts/orion5x.dtsi b/trunk/arch/arm/boot/dts/orion5x.dtsi
index f7bec3b1ba32..8aad00f81ed9 100644
--- a/trunk/arch/arm/boot/dts/orion5x.dtsi
+++ b/trunk/arch/arm/boot/dts/orion5x.dtsi
@@ -13,9 +13,6 @@
compatible = "marvell,orion5x";
interrupt-parent = <&intc>;
- aliases {
- gpio0 = &gpio0;
- };
intc: interrupt-controller {
compatible = "marvell,orion-intc", "marvell,intc";
interrupt-controller;
@@ -35,9 +32,7 @@
#gpio-cells = <2>;
gpio-controller;
reg = <0x10100 0x40>;
- ngpios = <32>;
- interrupt-controller;
- #interrupt-cells = <2>;
+ ngpio = <32>;
interrupts = <6>, <7>, <8>, <9>;
};
@@ -96,7 +91,7 @@
reg = <0x90000 0x10000>,
<0xf2200000 0x800>;
reg-names = "regs", "sram";
- interrupts = <28>;
+ interrupts = <22>;
status = "okay";
};
};
diff --git a/trunk/arch/arm/boot/dts/snowball.dts b/trunk/arch/arm/boot/dts/snowball.dts
index d3ec32f6b790..27f31a5fa494 100644
--- a/trunk/arch/arm/boot/dts/snowball.dts
+++ b/trunk/arch/arm/boot/dts/snowball.dts
@@ -298,7 +298,7 @@
};
};
- ab8500 {
+ ab8500@5 {
ab8500-regulators {
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
regulator-name = "V-DISPLAY";
diff --git a/trunk/arch/arm/boot/dts/socfpga.dtsi b/trunk/arch/arm/boot/dts/socfpga.dtsi
index 7e8769bd5977..936d2306e7e1 100644
--- a/trunk/arch/arm/boot/dts/socfpga.dtsi
+++ b/trunk/arch/arm/boot/dts/socfpga.dtsi
@@ -75,9 +75,6 @@
compatible = "arm,pl330", "arm,primecell";
reg = <0xffe01000 0x1000>;
interrupts = <0 180 4>;
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
};
diff --git a/trunk/arch/arm/boot/dts/tegra20.dtsi b/trunk/arch/arm/boot/dts/tegra20.dtsi
index 3d3f64d2111a..9a428931d042 100644
--- a/trunk/arch/arm/boot/dts/tegra20.dtsi
+++ b/trunk/arch/arm/boot/dts/tegra20.dtsi
@@ -118,7 +118,6 @@
compatible = "arm,cortex-a9-twd-timer";
reg = <0x50040600 0x20>;
interrupts = <1 13 0x304>;
- clocks = <&tegra_car 132>;
};
intc: interrupt-controller {
@@ -385,7 +384,7 @@
spi@7000d800 {
compatible = "nvidia,tegra20-slink";
- reg = <0x7000d800 0x200>;
+ reg = <0x7000d480 0x200>;
interrupts = <0 83 0x04>;
nvidia,dma-request-selector = <&apbdma 17>;
#address-cells = <1>;
diff --git a/trunk/arch/arm/boot/dts/tegra30.dtsi b/trunk/arch/arm/boot/dts/tegra30.dtsi
index dbf46c272562..767803e1fd55 100644
--- a/trunk/arch/arm/boot/dts/tegra30.dtsi
+++ b/trunk/arch/arm/boot/dts/tegra30.dtsi
@@ -119,7 +119,6 @@
compatible = "arm,cortex-a9-twd-timer";
reg = <0x50040600 0x20>;
interrupts = <1 13 0xf04>;
- clocks = <&tegra_car 214>;
};
intc: interrupt-controller {
@@ -372,7 +371,7 @@
spi@7000d800 {
compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
- reg = <0x7000d800 0x200>;
+ reg = <0x7000d480 0x200>;
interrupts = <0 83 0x04>;
nvidia,dma-request-selector = <&apbdma 17>;
#address-cells = <1>;
diff --git a/trunk/arch/arm/configs/mxs_defconfig b/trunk/arch/arm/configs/mxs_defconfig
index 6a99e30f81d2..fbbc5bb022d5 100644
--- a/trunk/arch/arm/configs/mxs_defconfig
+++ b/trunk/arch/arm/configs/mxs_defconfig
@@ -116,7 +116,6 @@ CONFIG_SND_SOC=y
CONFIG_SND_MXS_SOC=y
CONFIG_SND_SOC_MXS_SGTL5000=y
CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_STORAGE=y
diff --git a/trunk/arch/arm/configs/omap2plus_defconfig b/trunk/arch/arm/configs/omap2plus_defconfig
index bd07864f14a0..b16bae2c9a60 100644
--- a/trunk/arch/arm/configs/omap2plus_defconfig
+++ b/trunk/arch/arm/configs/omap2plus_defconfig
@@ -126,8 +126,6 @@ CONFIG_INPUT_MISC=y
CONFIG_INPUT_TWL4030_PWRBUTTON=y
CONFIG_VT_HW_CONSOLE_BINDING=y
# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
diff --git a/trunk/arch/arm/include/asm/delay.h b/trunk/arch/arm/include/asm/delay.h
index dff714d886d5..720799fd3a81 100644
--- a/trunk/arch/arm/include/asm/delay.h
+++ b/trunk/arch/arm/include/asm/delay.h
@@ -24,7 +24,7 @@ extern struct arm_delay_ops {
void (*delay)(unsigned long);
void (*const_udelay)(unsigned long);
void (*udelay)(unsigned long);
- unsigned long ticks_per_jiffy;
+ bool const_clock;
} arm_delay_ops;
#define __delay(n) arm_delay_ops.delay(n)
diff --git a/trunk/arch/arm/include/asm/glue-cache.h b/trunk/arch/arm/include/asm/glue-cache.h
index ea289e1435e7..cca9f15704ed 100644
--- a/trunk/arch/arm/include/asm/glue-cache.h
+++ b/trunk/arch/arm/include/asm/glue-cache.h
@@ -19,6 +19,14 @@
#undef _CACHE
#undef MULTI_CACHE
+#if defined(CONFIG_CPU_CACHE_V3)
+# ifdef _CACHE
+# define MULTI_CACHE 1
+# else
+# define _CACHE v3
+# endif
+#endif
+
#if defined(CONFIG_CPU_CACHE_V4)
# ifdef _CACHE
# define MULTI_CACHE 1
diff --git a/trunk/arch/arm/include/asm/hardware/iop3xx.h b/trunk/arch/arm/include/asm/hardware/iop3xx.h
index ed94b1a366ae..02fe2fbe2477 100644
--- a/trunk/arch/arm/include/asm/hardware/iop3xx.h
+++ b/trunk/arch/arm/include/asm/hardware/iop3xx.h
@@ -37,7 +37,7 @@ extern int iop3xx_get_init_atu(void);
* IOP3XX processor registers
*/
#define IOP3XX_PERIPHERAL_PHYS_BASE 0xffffe000
-#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfedfe000
+#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfeffe000
#define IOP3XX_PERIPHERAL_SIZE 0x00002000
#define IOP3XX_PERIPHERAL_UPPER_PA (IOP3XX_PERIPHERAL_PHYS_BASE +\
IOP3XX_PERIPHERAL_SIZE - 1)
diff --git a/trunk/arch/arm/include/asm/highmem.h b/trunk/arch/arm/include/asm/highmem.h
index 91b99abe7a95..8c5e828f484d 100644
--- a/trunk/arch/arm/include/asm/highmem.h
+++ b/trunk/arch/arm/include/asm/highmem.h
@@ -41,13 +41,6 @@ extern void kunmap_high(struct page *page);
#endif
#endif
-/*
- * Needed to be able to broadcast the TLB invalidation for kmap.
- */
-#ifdef CONFIG_ARM_ERRATA_798181
-#undef ARCH_NEEDS_KMAP_HIGH_GET
-#endif
-
#ifdef ARCH_NEEDS_KMAP_HIGH_GET
extern void *kmap_high_get(struct page *page);
#else
diff --git a/trunk/arch/arm/include/asm/mmu.h b/trunk/arch/arm/include/asm/mmu.h
index e3d55547e755..9f77e7804f3b 100644
--- a/trunk/arch/arm/include/asm/mmu.h
+++ b/trunk/arch/arm/include/asm/mmu.h
@@ -5,15 +5,15 @@
typedef struct {
#ifdef CONFIG_CPU_HAS_ASID
- atomic64_t id;
+ u64 id;
#endif
- unsigned int vmalloc_seq;
+ unsigned int vmalloc_seq;
} mm_context_t;
#ifdef CONFIG_CPU_HAS_ASID
#define ASID_BITS 8
#define ASID_MASK ((~0ULL) << ASID_BITS)
-#define ASID(mm) ((mm)->context.id.counter & ~ASID_MASK)
+#define ASID(mm) ((mm)->context.id & ~ASID_MASK)
#else
#define ASID(mm) (0)
#endif
@@ -26,7 +26,7 @@ typedef struct {
* modified for 2.6 by Hyok S. Choi
*/
typedef struct {
- unsigned long end_brk;
+ unsigned long end_brk;
} mm_context_t;
#endif
diff --git a/trunk/arch/arm/include/asm/mmu_context.h b/trunk/arch/arm/include/asm/mmu_context.h
index a7b85e0d0cc1..e1f644bc7cc5 100644
--- a/trunk/arch/arm/include/asm/mmu_context.h
+++ b/trunk/arch/arm/include/asm/mmu_context.h
@@ -25,9 +25,7 @@ void __check_vmalloc_seq(struct mm_struct *mm);
#ifdef CONFIG_CPU_HAS_ASID
void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk);
-#define init_new_context(tsk,mm) ({ atomic64_set(&mm->context.id, 0); 0; })
-
-DECLARE_PER_CPU(atomic64_t, active_asids);
+#define init_new_context(tsk,mm) ({ mm->context.id = 0; })
#else /* !CONFIG_CPU_HAS_ASID */
diff --git a/trunk/arch/arm/include/asm/pgtable-3level.h b/trunk/arch/arm/include/asm/pgtable-3level.h
index 86b8fe398b95..6ef8afd1b64c 100644
--- a/trunk/arch/arm/include/asm/pgtable-3level.h
+++ b/trunk/arch/arm/include/asm/pgtable-3level.h
@@ -111,7 +111,7 @@
#define L_PTE_S2_MT_WRITETHROUGH (_AT(pteval_t, 0xa) << 2) /* MemAttr[3:0] */
#define L_PTE_S2_MT_WRITEBACK (_AT(pteval_t, 0xf) << 2) /* MemAttr[3:0] */
#define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */
-#define L_PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */
+#define L_PTE_S2_RDWR (_AT(pteval_t, 2) << 6) /* HAP[2:1] */
/*
* Hyp-mode PL2 PTE definitions for LPAE.
diff --git a/trunk/arch/arm/include/asm/tlbflush.h b/trunk/arch/arm/include/asm/tlbflush.h
index ab865e65a84c..6e924d3a77eb 100644
--- a/trunk/arch/arm/include/asm/tlbflush.h
+++ b/trunk/arch/arm/include/asm/tlbflush.h
@@ -14,6 +14,7 @@
#include
+#define TLB_V3_PAGE (1 << 0)
#define TLB_V4_U_PAGE (1 << 1)
#define TLB_V4_D_PAGE (1 << 2)
#define TLB_V4_I_PAGE (1 << 3)
@@ -21,6 +22,7 @@
#define TLB_V6_D_PAGE (1 << 5)
#define TLB_V6_I_PAGE (1 << 6)
+#define TLB_V3_FULL (1 << 8)
#define TLB_V4_U_FULL (1 << 9)
#define TLB_V4_D_FULL (1 << 10)
#define TLB_V4_I_FULL (1 << 11)
@@ -32,13 +34,10 @@
#define TLB_V6_D_ASID (1 << 17)
#define TLB_V6_I_ASID (1 << 18)
-#define TLB_V6_BP (1 << 19)
-
/* Unified Inner Shareable TLB operations (ARMv7 MP extensions) */
-#define TLB_V7_UIS_PAGE (1 << 20)
-#define TLB_V7_UIS_FULL (1 << 21)
-#define TLB_V7_UIS_ASID (1 << 22)
-#define TLB_V7_UIS_BP (1 << 23)
+#define TLB_V7_UIS_PAGE (1 << 19)
+#define TLB_V7_UIS_FULL (1 << 20)
+#define TLB_V7_UIS_ASID (1 << 21)
#define TLB_BARRIER (1 << 28)
#define TLB_L2CLEAN_FR (1 << 29) /* Feroceon */
@@ -50,6 +49,7 @@
* =============
*
* We have the following to choose from:
+ * v3 - ARMv3
* v4 - ARMv4 without write buffer
* v4wb - ARMv4 with write buffer without I TLB flush entry instruction
* v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
@@ -150,8 +150,7 @@
#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
TLB_V6_I_FULL | TLB_V6_D_FULL | \
TLB_V6_I_PAGE | TLB_V6_D_PAGE | \
- TLB_V6_I_ASID | TLB_V6_D_ASID | \
- TLB_V6_BP)
+ TLB_V6_I_ASID | TLB_V6_D_ASID)
#ifdef CONFIG_CPU_TLB_V6
# define v6wbi_possible_flags v6wbi_tlb_flags
@@ -167,11 +166,9 @@
#endif
#define v7wbi_tlb_flags_smp (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
- TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | \
- TLB_V7_UIS_ASID | TLB_V7_UIS_BP)
+ TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID)
#define v7wbi_tlb_flags_up (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
- TLB_V6_U_FULL | TLB_V6_U_PAGE | \
- TLB_V6_U_ASID | TLB_V6_BP)
+ TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID)
#ifdef CONFIG_CPU_TLB_V7
@@ -327,6 +324,7 @@ static inline void local_flush_tlb_all(void)
if (tlb_flag(TLB_WB))
dsb();
+ tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero);
tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero);
tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero);
@@ -347,8 +345,9 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
if (tlb_flag(TLB_WB))
dsb();
- if (possible_tlb_flags & (TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) {
+ if (possible_tlb_flags & (TLB_V3_FULL|TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) {
if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
+ tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero);
tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero);
tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero);
@@ -380,8 +379,9 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
if (tlb_flag(TLB_WB))
dsb();
- if (possible_tlb_flags & (TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
+ if (possible_tlb_flags & (TLB_V3_PAGE|TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
+ tlb_op(TLB_V3_PAGE, "c6, c0, 0", uaddr);
tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);
tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr);
tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr);
@@ -412,6 +412,7 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
if (tlb_flag(TLB_WB))
dsb();
+ tlb_op(TLB_V3_PAGE, "c6, c0, 0", kaddr);
tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);
tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr);
tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr);
@@ -429,35 +430,6 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
}
}
-static inline void local_flush_bp_all(void)
-{
- const int zero = 0;
- const unsigned int __tlb_flag = __cpu_tlb_flags;
-
- if (tlb_flag(TLB_V7_UIS_BP))
- asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero));
- else if (tlb_flag(TLB_V6_BP))
- asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero));
-
- if (tlb_flag(TLB_BARRIER))
- isb();
-}
-
-#ifdef CONFIG_ARM_ERRATA_798181
-static inline void dummy_flush_tlb_a15_erratum(void)
-{
- /*
- * Dummy TLBIMVAIS. Using the unmapped address 0 and ASID 0.
- */
- asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
- dsb();
-}
-#else
-static inline void dummy_flush_tlb_a15_erratum(void)
-{
-}
-#endif
-
/*
* flush_pmd_entry
*
@@ -508,7 +480,6 @@ static inline void clean_pmd_entry(void *pmd)
#define flush_tlb_kernel_page local_flush_tlb_kernel_page
#define flush_tlb_range local_flush_tlb_range
#define flush_tlb_kernel_range local_flush_tlb_kernel_range
-#define flush_bp_all local_flush_bp_all
#else
extern void flush_tlb_all(void);
extern void flush_tlb_mm(struct mm_struct *mm);
@@ -516,7 +487,6 @@ extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr);
extern void flush_tlb_kernel_page(unsigned long kaddr);
extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
-extern void flush_bp_all(void);
#endif
/*
diff --git a/trunk/arch/arm/include/asm/xen/events.h b/trunk/arch/arm/include/asm/xen/events.h
index 8b1f37bfeeec..5c27696de14f 100644
--- a/trunk/arch/arm/include/asm/xen/events.h
+++ b/trunk/arch/arm/include/asm/xen/events.h
@@ -2,7 +2,6 @@
#define _ASM_ARM_XEN_EVENTS_H
#include
-#include
enum ipi_vector {
XEN_PLACEHOLDER_VECTOR,
@@ -16,8 +15,26 @@ static inline int xen_irqs_disabled(struct pt_regs *regs)
return raw_irqs_disabled_flags(regs->ARM_cpsr);
}
-#define xchg_xen_ulong(ptr, val) atomic64_xchg(container_of((ptr), \
- atomic64_t, \
- counter), (val))
+/*
+ * We cannot use xchg because it does not support 8-byte
+ * values. However it is safe to use {ldr,dtd}exd directly because all
+ * platforms which Xen can run on support those instructions.
+ */
+static inline xen_ulong_t xchg_xen_ulong(xen_ulong_t *ptr, xen_ulong_t val)
+{
+ xen_ulong_t oldval;
+ unsigned int tmp;
+
+ wmb();
+ asm volatile("@ xchg_xen_ulong\n"
+ "1: ldrexd %0, %H0, [%3]\n"
+ " strexd %1, %2, %H2, [%3]\n"
+ " teq %1, #0\n"
+ " bne 1b"
+ : "=&r" (oldval), "=&r" (tmp)
+ : "r" (val), "r" (ptr)
+ : "memory", "cc");
+ return oldval;
+}
#endif /* _ASM_ARM_XEN_EVENTS_H */
diff --git a/trunk/arch/arm/include/uapi/asm/unistd.h b/trunk/arch/arm/include/uapi/asm/unistd.h
index af33b44990ed..4da7cde70b5d 100644
--- a/trunk/arch/arm/include/uapi/asm/unistd.h
+++ b/trunk/arch/arm/include/uapi/asm/unistd.h
@@ -404,7 +404,7 @@
#define __NR_setns (__NR_SYSCALL_BASE+375)
#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376)
#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377)
-#define __NR_kcmp (__NR_SYSCALL_BASE+378)
+ /* 378 for kcmp */
#define __NR_finit_module (__NR_SYSCALL_BASE+379)
/*
diff --git a/trunk/arch/arm/kernel/asm-offsets.c b/trunk/arch/arm/kernel/asm-offsets.c
index 923eec7105cf..5ce738b43508 100644
--- a/trunk/arch/arm/kernel/asm-offsets.c
+++ b/trunk/arch/arm/kernel/asm-offsets.c
@@ -110,7 +110,7 @@ int main(void)
BLANK();
#endif
#ifdef CONFIG_CPU_HAS_ASID
- DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
+ DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id));
BLANK();
#endif
DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
diff --git a/trunk/arch/arm/kernel/calls.S b/trunk/arch/arm/kernel/calls.S
index c6ca7e376773..0cc57611fc4f 100644
--- a/trunk/arch/arm/kernel/calls.S
+++ b/trunk/arch/arm/kernel/calls.S
@@ -387,7 +387,7 @@
/* 375 */ CALL(sys_setns)
CALL(sys_process_vm_readv)
CALL(sys_process_vm_writev)
- CALL(sys_kcmp)
+ CALL(sys_ni_syscall) /* reserved for sys_kcmp */
CALL(sys_finit_module)
#ifndef syscalls_counted
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
diff --git a/trunk/arch/arm/kernel/entry-common.S b/trunk/arch/arm/kernel/entry-common.S
index fefd7f971437..3248cde504ed 100644
--- a/trunk/arch/arm/kernel/entry-common.S
+++ b/trunk/arch/arm/kernel/entry-common.S
@@ -276,13 +276,7 @@ ENDPROC(ftrace_graph_caller_old)
*/
.macro mcount_enter
-/*
- * This pad compensates for the push {lr} at the call site. Note that we are
- * unable to unwind through a function which does not otherwise save its lr.
- */
- UNWIND(.pad #4)
stmdb sp!, {r0-r3, lr}
- UNWIND(.save {r0-r3, lr})
.endm
.macro mcount_get_lr reg
@@ -295,7 +289,6 @@ ENDPROC(ftrace_graph_caller_old)
.endm
ENTRY(__gnu_mcount_nc)
-UNWIND(.fnstart)
#ifdef CONFIG_DYNAMIC_FTRACE
mov ip, lr
ldmia sp!, {lr}
@@ -303,22 +296,17 @@ UNWIND(.fnstart)
#else
__mcount
#endif
-UNWIND(.fnend)
ENDPROC(__gnu_mcount_nc)
#ifdef CONFIG_DYNAMIC_FTRACE
ENTRY(ftrace_caller)
-UNWIND(.fnstart)
__ftrace_caller
-UNWIND(.fnend)
ENDPROC(ftrace_caller)
#endif
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
ENTRY(ftrace_graph_caller)
-UNWIND(.fnstart)
__ftrace_graph_caller
-UNWIND(.fnend)
ENDPROC(ftrace_graph_caller)
#endif
diff --git a/trunk/arch/arm/kernel/head.S b/trunk/arch/arm/kernel/head.S
index 8bac553fe213..486a15ae9011 100644
--- a/trunk/arch/arm/kernel/head.S
+++ b/trunk/arch/arm/kernel/head.S
@@ -184,22 +184,13 @@ __create_page_tables:
orr r3, r3, #3 @ PGD block type
mov r6, #4 @ PTRS_PER_PGD
mov r7, #1 << (55 - 32) @ L_PGD_SWAPPER
-1:
-#ifdef CONFIG_CPU_ENDIAN_BE8
+1: str r3, [r0], #4 @ set bottom PGD entry bits
str r7, [r0], #4 @ set top PGD entry bits
- str r3, [r0], #4 @ set bottom PGD entry bits
-#else
- str r3, [r0], #4 @ set bottom PGD entry bits
- str r7, [r0], #4 @ set top PGD entry bits
-#endif
add r3, r3, #0x1000 @ next PMD table
subs r6, r6, #1
bne 1b
add r4, r4, #0x1000 @ point to the PMD tables
-#ifdef CONFIG_CPU_ENDIAN_BE8
- add r4, r4, #4 @ we only write the bottom word
-#endif
#endif
ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
@@ -267,11 +258,6 @@ __create_page_tables:
addne r6, r6, #1 << SECTION_SHIFT
strne r6, [r3]
-#if defined(CONFIG_ARM_LPAE) && defined(CONFIG_CPU_ENDIAN_BE8)
- sub r4, r4, #4 @ Fixup page table pointer
- @ for 64-bit descriptors
-#endif
-
#ifdef CONFIG_DEBUG_LL
#if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING)
/*
@@ -290,16 +276,12 @@ __create_page_tables:
orr r3, r7, r3, lsl #SECTION_SHIFT
#ifdef CONFIG_ARM_LPAE
mov r7, #1 << (54 - 32) @ XN
-#ifdef CONFIG_CPU_ENDIAN_BE8
- str r7, [r0], #4
- str r3, [r0], #4
-#else
- str r3, [r0], #4
- str r7, [r0], #4
-#endif
#else
orr r3, r3, #PMD_SECT_XN
+#endif
str r3, [r0], #4
+#ifdef CONFIG_ARM_LPAE
+ str r7, [r0], #4
#endif
#else /* CONFIG_DEBUG_ICEDCC || CONFIG_DEBUG_SEMIHOSTING */
diff --git a/trunk/arch/arm/kernel/hw_breakpoint.c b/trunk/arch/arm/kernel/hw_breakpoint.c
index 1fd749ee4a1b..5eae53e7a2e1 100644
--- a/trunk/arch/arm/kernel/hw_breakpoint.c
+++ b/trunk/arch/arm/kernel/hw_breakpoint.c
@@ -966,7 +966,7 @@ static void reset_ctrl_regs(void *unused)
}
if (err) {
- pr_warn_once("CPU %d debug is powered down!\n", cpu);
+ pr_warning("CPU %d debug is powered down!\n", cpu);
cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu));
return;
}
@@ -987,7 +987,7 @@ static void reset_ctrl_regs(void *unused)
isb();
if (cpumask_intersects(&debug_err_mask, cpumask_of(cpu))) {
- pr_warn_once("CPU %d failed to disable vector catch\n", cpu);
+ pr_warning("CPU %d failed to disable vector catch\n", cpu);
return;
}
@@ -1007,7 +1007,7 @@ static void reset_ctrl_regs(void *unused)
}
if (cpumask_intersects(&debug_err_mask, cpumask_of(cpu))) {
- pr_warn_once("CPU %d failed to clear debug register pairs\n", cpu);
+ pr_warning("CPU %d failed to clear debug register pairs\n", cpu);
return;
}
@@ -1023,7 +1023,7 @@ static void reset_ctrl_regs(void *unused)
static int __cpuinit dbg_reset_notify(struct notifier_block *self,
unsigned long action, void *cpu)
{
- if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
+ if (action == CPU_ONLINE)
smp_call_function_single((int)cpu, reset_ctrl_regs, NULL, 1);
return NOTIFY_OK;
@@ -1043,7 +1043,7 @@ static int dbg_cpu_pm_notify(struct notifier_block *self, unsigned long action,
return NOTIFY_OK;
}
-static struct notifier_block dbg_cpu_pm_nb = {
+static struct notifier_block __cpuinitdata dbg_cpu_pm_nb = {
.notifier_call = dbg_cpu_pm_notify,
};
diff --git a/trunk/arch/arm/kernel/perf_event.c b/trunk/arch/arm/kernel/perf_event.c
index 8c3094d0f7b7..31e0eb353cd8 100644
--- a/trunk/arch/arm/kernel/perf_event.c
+++ b/trunk/arch/arm/kernel/perf_event.c
@@ -253,10 +253,7 @@ validate_event(struct pmu_hw_events *hw_events,
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
struct pmu *leader_pmu = event->group_leader->pmu;
- if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF)
- return 1;
-
- if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
+ if (event->pmu != leader_pmu || event->state <= PERF_EVENT_STATE_OFF)
return 1;
return armpmu->get_event_idx(hw_events, event) >= 0;
@@ -403,7 +400,7 @@ __hw_perf_event_init(struct perf_event *event)
}
if (event->group_leader != event) {
- if (validate_group(event) != 0)
+ if (validate_group(event) != 0);
return -EINVAL;
}
@@ -487,7 +484,7 @@ const struct dev_pm_ops armpmu_dev_pm_ops = {
SET_RUNTIME_PM_OPS(armpmu_runtime_suspend, armpmu_runtime_resume, NULL)
};
-static void armpmu_init(struct arm_pmu *armpmu)
+static void __init armpmu_init(struct arm_pmu *armpmu)
{
atomic_set(&armpmu->active_events, 0);
mutex_init(&armpmu->reserve_mutex);
diff --git a/trunk/arch/arm/kernel/perf_event_v7.c b/trunk/arch/arm/kernel/perf_event_v7.c
index 039cffb053a7..8c79a9e70b83 100644
--- a/trunk/arch/arm/kernel/perf_event_v7.c
+++ b/trunk/arch/arm/kernel/perf_event_v7.c
@@ -774,7 +774,7 @@ static const unsigned armv7_a7_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
/*
* PMXEVTYPER: Event selection reg
*/
-#define ARMV7_EVTYPE_MASK 0xc80000ff /* Mask for writable bits */
+#define ARMV7_EVTYPE_MASK 0xc00000ff /* Mask for writable bits */
#define ARMV7_EVTYPE_EVENT 0xff /* Mask for EVENT bits */
/*
diff --git a/trunk/arch/arm/kernel/sched_clock.c b/trunk/arch/arm/kernel/sched_clock.c
index 59d2adb764a9..bd6f56b9ec21 100644
--- a/trunk/arch/arm/kernel/sched_clock.c
+++ b/trunk/arch/arm/kernel/sched_clock.c
@@ -45,12 +45,12 @@ static u32 notrace jiffy_sched_clock_read(void)
static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
-static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift)
+static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
{
return (cyc * mult) >> shift;
}
-static unsigned long long notrace cyc_to_sched_clock(u32 cyc, u32 mask)
+static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
{
u64 epoch_ns;
u32 epoch_cyc;
diff --git a/trunk/arch/arm/kernel/setup.c b/trunk/arch/arm/kernel/setup.c
index 234e339196c0..3f6cbb2e3eda 100644
--- a/trunk/arch/arm/kernel/setup.c
+++ b/trunk/arch/arm/kernel/setup.c
@@ -56,6 +56,7 @@
#include
#include "atags.h"
+#include "tcm.h"
#if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
@@ -352,23 +353,6 @@ void __init early_print(const char *str, ...)
printk("%s", buf);
}
-static void __init cpuid_init_hwcaps(void)
-{
- unsigned int divide_instrs;
-
- if (cpu_architecture() < CPU_ARCH_ARMv7)
- return;
-
- divide_instrs = (read_cpuid_ext(CPUID_EXT_ISAR0) & 0x0f000000) >> 24;
-
- switch (divide_instrs) {
- case 2:
- elf_hwcap |= HWCAP_IDIVA;
- case 1:
- elf_hwcap |= HWCAP_IDIVT;
- }
-}
-
static void __init feat_v6_fixup(void)
{
int id = read_cpuid_id();
@@ -499,11 +483,8 @@ static void __init setup_processor(void)
snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c",
list->elf_name, ENDIANNESS);
elf_hwcap = list->elf_hwcap;
-
- cpuid_init_hwcaps();
-
#ifndef CONFIG_ARM_THUMB
- elf_hwcap &= ~(HWCAP_THUMB | HWCAP_IDIVT);
+ elf_hwcap &= ~HWCAP_THUMB;
#endif
feat_v6_fixup();
@@ -543,7 +524,7 @@ int __init arm_add_memory(phys_addr_t start, phys_addr_t size)
size -= start & ~PAGE_MASK;
bank->start = PAGE_ALIGN(start);
-#ifndef CONFIG_ARM_LPAE
+#ifndef CONFIG_LPAE
if (bank->start + size < bank->start) {
printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in "
"32-bit physical address space\n", (long long)start);
@@ -797,6 +778,8 @@ void __init setup_arch(char **cmdline_p)
reserve_crashkernel();
+ tcm_init();
+
#ifdef CONFIG_MULTI_IRQ_HANDLER
handle_arch_irq = mdesc->handle_irq;
#endif
diff --git a/trunk/arch/arm/kernel/smp.c b/trunk/arch/arm/kernel/smp.c
index 1f2ccccaf009..1bdfd87c8e41 100644
--- a/trunk/arch/arm/kernel/smp.c
+++ b/trunk/arch/arm/kernel/smp.c
@@ -285,7 +285,6 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
* switch away from it before attempting any exclusive accesses.
*/
cpu_switch_mm(mm->pgd, mm);
- local_flush_bp_all();
enter_lazy_tlb(mm, current);
local_flush_tlb_all();
@@ -480,7 +479,7 @@ static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt)
evt->features = CLOCK_EVT_FEAT_ONESHOT |
CLOCK_EVT_FEAT_PERIODIC |
CLOCK_EVT_FEAT_DUMMY;
- evt->rating = 100;
+ evt->rating = 400;
evt->mult = 1;
evt->set_mode = broadcast_timer_set_mode;
@@ -673,6 +672,9 @@ static int cpufreq_callback(struct notifier_block *nb,
if (freq->flags & CPUFREQ_CONST_LOOPS)
return NOTIFY_OK;
+ if (arm_delay_ops.const_clock)
+ return NOTIFY_OK;
+
if (!per_cpu(l_p_j_ref, cpu)) {
per_cpu(l_p_j_ref, cpu) =
per_cpu(cpu_data, cpu).loops_per_jiffy;
diff --git a/trunk/arch/arm/kernel/smp_tlb.c b/trunk/arch/arm/kernel/smp_tlb.c
index e82e1d248772..02c5d2ce23bf 100644
--- a/trunk/arch/arm/kernel/smp_tlb.c
+++ b/trunk/arch/arm/kernel/smp_tlb.c
@@ -12,7 +12,6 @@
#include
#include
-#include
/**********************************************************************/
@@ -65,77 +64,12 @@ static inline void ipi_flush_tlb_kernel_range(void *arg)
local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
}
-static inline void ipi_flush_bp_all(void *ignored)
-{
- local_flush_bp_all();
-}
-
-#ifdef CONFIG_ARM_ERRATA_798181
-static int erratum_a15_798181(void)
-{
- unsigned int midr = read_cpuid_id();
-
- /* Cortex-A15 r0p0..r3p2 affected */
- if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
- return 0;
- return 1;
-}
-#else
-static int erratum_a15_798181(void)
-{
- return 0;
-}
-#endif
-
-static void ipi_flush_tlb_a15_erratum(void *arg)
-{
- dmb();
-}
-
-static void broadcast_tlb_a15_erratum(void)
-{
- if (!erratum_a15_798181())
- return;
-
- dummy_flush_tlb_a15_erratum();
- smp_call_function_many(cpu_online_mask, ipi_flush_tlb_a15_erratum,
- NULL, 1);
-}
-
-static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
-{
- int cpu;
- cpumask_t mask = { CPU_BITS_NONE };
-
- if (!erratum_a15_798181())
- return;
-
- dummy_flush_tlb_a15_erratum();
- for_each_online_cpu(cpu) {
- if (cpu == smp_processor_id())
- continue;
- /*
- * We only need to send an IPI if the other CPUs are running
- * the same ASID as the one being invalidated. There is no
- * need for locking around the active_asids check since the
- * switch_mm() function has at least one dmb() (as required by
- * this workaround) in case a context switch happens on
- * another CPU after the condition below.
- */
- if (atomic64_read(&mm->context.id) ==
- atomic64_read(&per_cpu(active_asids, cpu)))
- cpumask_set_cpu(cpu, &mask);
- }
- smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
-}
-
void flush_tlb_all(void)
{
if (tlb_ops_need_broadcast())
on_each_cpu(ipi_flush_tlb_all, NULL, 1);
else
local_flush_tlb_all();
- broadcast_tlb_a15_erratum();
}
void flush_tlb_mm(struct mm_struct *mm)
@@ -144,7 +78,6 @@ void flush_tlb_mm(struct mm_struct *mm)
on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
else
local_flush_tlb_mm(mm);
- broadcast_tlb_mm_a15_erratum(mm);
}
void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
@@ -157,7 +90,6 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
&ta, 1);
} else
local_flush_tlb_page(vma, uaddr);
- broadcast_tlb_mm_a15_erratum(vma->vm_mm);
}
void flush_tlb_kernel_page(unsigned long kaddr)
@@ -168,7 +100,6 @@ void flush_tlb_kernel_page(unsigned long kaddr)
on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
} else
local_flush_tlb_kernel_page(kaddr);
- broadcast_tlb_a15_erratum();
}
void flush_tlb_range(struct vm_area_struct *vma,
@@ -183,7 +114,6 @@ void flush_tlb_range(struct vm_area_struct *vma,
&ta, 1);
} else
local_flush_tlb_range(vma, start, end);
- broadcast_tlb_mm_a15_erratum(vma->vm_mm);
}
void flush_tlb_kernel_range(unsigned long start, unsigned long end)
@@ -195,13 +125,5 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
} else
local_flush_tlb_kernel_range(start, end);
- broadcast_tlb_a15_erratum();
}
-void flush_bp_all(void)
-{
- if (tlb_ops_need_broadcast())
- on_each_cpu(ipi_flush_bp_all, NULL, 1);
- else
- local_flush_bp_all();
-}
diff --git a/trunk/arch/arm/kernel/smp_twd.c b/trunk/arch/arm/kernel/smp_twd.c
index 3f2565037480..c092115d903a 100644
--- a/trunk/arch/arm/kernel/smp_twd.c
+++ b/trunk/arch/arm/kernel/smp_twd.c
@@ -22,7 +22,6 @@
#include
#include
-#include
#include
#include
@@ -374,9 +373,6 @@ void __init twd_local_timer_of_register(void)
struct device_node *np;
int err;
- if (!is_smp() || !setup_max_cpus)
- return;
-
np = of_find_matching_node(NULL, twd_of_match);
if (!np)
return;
diff --git a/trunk/arch/arm/kernel/suspend.c b/trunk/arch/arm/kernel/suspend.c
index c59c97ea8268..358bca3a995e 100644
--- a/trunk/arch/arm/kernel/suspend.c
+++ b/trunk/arch/arm/kernel/suspend.c
@@ -68,7 +68,6 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
ret = __cpu_suspend(arg, fn);
if (ret == 0) {
cpu_switch_mm(mm->pgd, mm);
- local_flush_bp_all();
local_flush_tlb_all();
}
diff --git a/trunk/arch/arm/kernel/tcm.c b/trunk/arch/arm/kernel/tcm.c
index f50f19e5c138..30ae6bb4a310 100644
--- a/trunk/arch/arm/kernel/tcm.c
+++ b/trunk/arch/arm/kernel/tcm.c
@@ -17,6 +17,7 @@
#include
#include
#include
+#include "tcm.h"
static struct gen_pool *tcm_pool;
static bool dtcm_present;
diff --git a/trunk/arch/arm/mm/tcm.h b/trunk/arch/arm/kernel/tcm.h
similarity index 100%
rename from trunk/arch/arm/mm/tcm.h
rename to trunk/arch/arm/kernel/tcm.h
diff --git a/trunk/arch/arm/kvm/arm.c b/trunk/arch/arm/kvm/arm.c
index c1fe498983ac..5a936988eb24 100644
--- a/trunk/arch/arm/kvm/arm.c
+++ b/trunk/arch/arm/kvm/arm.c
@@ -201,7 +201,6 @@ int kvm_dev_ioctl_check_extension(long ext)
break;
case KVM_CAP_ARM_SET_DEVICE_ADDR:
r = 1;
- break;
case KVM_CAP_NR_VCPUS:
r = num_online_cpus();
break;
diff --git a/trunk/arch/arm/kvm/coproc.c b/trunk/arch/arm/kvm/coproc.c
index 7bed7556077a..4ea9a982269c 100644
--- a/trunk/arch/arm/kvm/coproc.c
+++ b/trunk/arch/arm/kvm/coproc.c
@@ -79,11 +79,11 @@ static bool access_dcsw(struct kvm_vcpu *vcpu,
u32 val;
int cpu;
+ cpu = get_cpu();
+
if (!p->is_write)
return read_from_write_only(vcpu, p);
- cpu = get_cpu();
-
cpumask_setall(&vcpu->arch.require_dcache_flush);
cpumask_clear_cpu(cpu, &vcpu->arch.require_dcache_flush);
diff --git a/trunk/arch/arm/kvm/vgic.c b/trunk/arch/arm/kvm/vgic.c
index 0e4cfe123b38..c9a17316e9fe 100644
--- a/trunk/arch/arm/kvm/vgic.c
+++ b/trunk/arch/arm/kvm/vgic.c
@@ -883,7 +883,8 @@ static bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq)
lr, irq, vgic_cpu->vgic_lr[lr]);
BUG_ON(!test_bit(lr, vgic_cpu->lr_used));
vgic_cpu->vgic_lr[lr] |= GICH_LR_PENDING_BIT;
- return true;
+
+ goto out;
}
/* Try to use another LR for this interrupt */
@@ -897,6 +898,7 @@ static bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq)
vgic_cpu->vgic_irq_lr_map[irq] = lr;
set_bit(lr, vgic_cpu->lr_used);
+out:
if (!vgic_irq_is_edge(vcpu, irq))
vgic_cpu->vgic_lr[lr] |= GICH_LR_EOI;
@@ -1016,6 +1018,21 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
kvm_debug("MISR = %08x\n", vgic_cpu->vgic_misr);
+ /*
+ * We do not need to take the distributor lock here, since the only
+ * action we perform is clearing the irq_active_bit for an EOIed
+ * level interrupt. There is a potential race with
+ * the queuing of an interrupt in __kvm_vgic_flush_hwstate(), where we
+ * check if the interrupt is already active. Two possibilities:
+ *
+ * - The queuing is occurring on the same vcpu: cannot happen,
+ * as we're already in the context of this vcpu, and
+ * executing the handler
+ * - The interrupt has been migrated to another vcpu, and we
+ * ignore this interrupt for this run. Big deal. It is still
+ * pending though, and will get considered when this vcpu
+ * exits.
+ */
if (vgic_cpu->vgic_misr & GICH_MISR_EOI) {
/*
* Some level interrupts have been EOIed. Clear their
@@ -1037,13 +1054,6 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
} else {
vgic_cpu_irq_clear(vcpu, irq);
}
-
- /*
- * Despite being EOIed, the LR may not have
- * been marked as empty.
- */
- set_bit(lr, (unsigned long *)vgic_cpu->vgic_elrsr);
- vgic_cpu->vgic_lr[lr] &= ~GICH_LR_ACTIVE_BIT;
}
}
@@ -1054,8 +1064,9 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
}
/*
- * Sync back the VGIC state after a guest run. The distributor lock is
- * needed so we don't get preempted in the middle of the state processing.
+ * Sync back the VGIC state after a guest run. We do not really touch
+ * the distributor here (the irq_pending_on_cpu bit is safe to set),
+ * so there is no need for taking its lock.
*/
static void __kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
{
@@ -1101,14 +1112,10 @@ void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
{
- struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
-
if (!irqchip_in_kernel(vcpu->kvm))
return;
- spin_lock(&dist->lock);
__kvm_vgic_sync_hwstate(vcpu);
- spin_unlock(&dist->lock);
}
int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu)
diff --git a/trunk/arch/arm/lib/delay.c b/trunk/arch/arm/lib/delay.c
index 64dbfa57204a..6b93f6a1a3c7 100644
--- a/trunk/arch/arm/lib/delay.c
+++ b/trunk/arch/arm/lib/delay.c
@@ -58,7 +58,7 @@ static void __timer_delay(unsigned long cycles)
static void __timer_const_udelay(unsigned long xloops)
{
unsigned long long loops = xloops;
- loops *= arm_delay_ops.ticks_per_jiffy;
+ loops *= loops_per_jiffy;
__timer_delay(loops >> UDELAY_SHIFT);
}
@@ -73,13 +73,11 @@ void __init register_current_timer_delay(const struct delay_timer *timer)
pr_info("Switching to timer-based delay loop\n");
delay_timer = timer;
lpj_fine = timer->freq / HZ;
-
- /* cpufreq may scale loops_per_jiffy, so keep a private copy */
- arm_delay_ops.ticks_per_jiffy = lpj_fine;
+ loops_per_jiffy = lpj_fine;
arm_delay_ops.delay = __timer_delay;
arm_delay_ops.const_udelay = __timer_const_udelay;
arm_delay_ops.udelay = __timer_udelay;
-
+ arm_delay_ops.const_clock = true;
delay_calibrated = true;
} else {
pr_info("Ignoring duplicate/late registration of read_current_timer delay\n");
diff --git a/trunk/arch/arm/lib/memset.S b/trunk/arch/arm/lib/memset.S
index 94b0650ea98f..650d5923ab83 100644
--- a/trunk/arch/arm/lib/memset.S
+++ b/trunk/arch/arm/lib/memset.S
@@ -14,15 +14,27 @@
.text
.align 5
+ .word 0
+
+1: subs r2, r2, #4 @ 1 do we have enough
+ blt 5f @ 1 bytes to align with?
+ cmp r3, #2 @ 1
+ strltb r1, [r0], #1 @ 1
+ strleb r1, [r0], #1 @ 1
+ strb r1, [r0], #1 @ 1
+ add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
+/*
+ * The pointer is now aligned and the length is adjusted. Try doing the
+ * memset again.
+ */
ENTRY(memset)
ands r3, r0, #3 @ 1 unaligned?
- mov ip, r0 @ preserve r0 as return value
- bne 6f @ 1
+ bne 1b @ 1
/*
- * we know that the pointer in ip is aligned to a word boundary.
+ * we know that the pointer in r0 is aligned to a word boundary.
*/
-1: orr r1, r1, r1, lsl #8
+ orr r1, r1, r1, lsl #8
orr r1, r1, r1, lsl #16
mov r3, r1
cmp r2, #16
@@ -31,28 +43,29 @@ ENTRY(memset)
#if ! CALGN(1)+0
/*
- * We need 2 extra registers for this loop - use r8 and the LR
+ * We need an extra register for this loop - save the return address and
+ * use the LR
*/
- stmfd sp!, {r8, lr}
- mov r8, r1
+ str lr, [sp, #-4]!
+ mov ip, r1
mov lr, r1
2: subs r2, r2, #64
- stmgeia ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
- stmgeia ip!, {r1, r3, r8, lr}
- stmgeia ip!, {r1, r3, r8, lr}
- stmgeia ip!, {r1, r3, r8, lr}
+ stmgeia r0!, {r1, r3, ip, lr} @ 64 bytes at a time.
+ stmgeia r0!, {r1, r3, ip, lr}
+ stmgeia r0!, {r1, r3, ip, lr}
+ stmgeia r0!, {r1, r3, ip, lr}
bgt 2b
- ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go.
+ ldmeqfd sp!, {pc} @ Now <64 bytes to go.
/*
* No need to correct the count; we're only testing bits from now on
*/
tst r2, #32
- stmneia ip!, {r1, r3, r8, lr}
- stmneia ip!, {r1, r3, r8, lr}
+ stmneia r0!, {r1, r3, ip, lr}
+ stmneia r0!, {r1, r3, ip, lr}
tst r2, #16
- stmneia ip!, {r1, r3, r8, lr}
- ldmfd sp!, {r8, lr}
+ stmneia r0!, {r1, r3, ip, lr}
+ ldr lr, [sp], #4
#else
@@ -61,63 +74,54 @@ ENTRY(memset)
* whole cache lines at once.
*/
- stmfd sp!, {r4-r8, lr}
+ stmfd sp!, {r4-r7, lr}
mov r4, r1
mov r5, r1
mov r6, r1
mov r7, r1
- mov r8, r1
+ mov ip, r1
mov lr, r1
cmp r2, #96
- tstgt ip, #31
+ tstgt r0, #31
ble 3f
- and r8, ip, #31
- rsb r8, r8, #32
- sub r2, r2, r8
- movs r8, r8, lsl #(32 - 4)
- stmcsia ip!, {r4, r5, r6, r7}
- stmmiia ip!, {r4, r5}
- tst r8, #(1 << 30)
- mov r8, r1
- strne r1, [ip], #4
+ and ip, r0, #31
+ rsb ip, ip, #32
+ sub r2, r2, ip
+ movs ip, ip, lsl #(32 - 4)
+ stmcsia r0!, {r4, r5, r6, r7}
+ stmmiia r0!, {r4, r5}
+ tst ip, #(1 << 30)
+ mov ip, r1
+ strne r1, [r0], #4
3: subs r2, r2, #64
- stmgeia ip!, {r1, r3-r8, lr}
- stmgeia ip!, {r1, r3-r8, lr}
+ stmgeia r0!, {r1, r3-r7, ip, lr}
+ stmgeia r0!, {r1, r3-r7, ip, lr}
bgt 3b
- ldmeqfd sp!, {r4-r8, pc}
+ ldmeqfd sp!, {r4-r7, pc}
tst r2, #32
- stmneia ip!, {r1, r3-r8, lr}
+ stmneia r0!, {r1, r3-r7, ip, lr}
tst r2, #16
- stmneia ip!, {r4-r7}
- ldmfd sp!, {r4-r8, lr}
+ stmneia r0!, {r4-r7}
+ ldmfd sp!, {r4-r7, lr}
#endif
4: tst r2, #8
- stmneia ip!, {r1, r3}
+ stmneia r0!, {r1, r3}
tst r2, #4
- strne r1, [ip], #4
+ strne r1, [r0], #4
/*
* When we get here, we've got less than 4 bytes to zero. We
* may have an unaligned pointer as well.
*/
5: tst r2, #2
- strneb r1, [ip], #1
- strneb r1, [ip], #1
+ strneb r1, [r0], #1
+ strneb r1, [r0], #1
tst r2, #1
- strneb r1, [ip], #1
+ strneb r1, [r0], #1
mov pc, lr
-
-6: subs r2, r2, #4 @ 1 do we have enough
- blt 5b @ 1 bytes to align with?
- cmp r3, #2 @ 1
- strltb r1, [ip], #1 @ 1
- strleb r1, [ip], #1 @ 1
- strb r1, [ip], #1 @ 1
- add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
- b 1b
ENDPROC(memset)
diff --git a/trunk/arch/arm/mach-at91/board-foxg20.c b/trunk/arch/arm/mach-at91/board-foxg20.c
index c20a870ea9c9..2ea7059b840b 100644
--- a/trunk/arch/arm/mach-at91/board-foxg20.c
+++ b/trunk/arch/arm/mach-at91/board-foxg20.c
@@ -176,7 +176,6 @@ static struct w1_gpio_platform_data w1_gpio_pdata = {
/* If you choose to use a pin other than PB16 it needs to be 3.3V */
.pin = AT91_PIN_PB16,
.is_open_drain = 1,
- .ext_pullup_enable_pin = -EINVAL,
};
static struct platform_device w1_device = {
diff --git a/trunk/arch/arm/mach-at91/board-stamp9g20.c b/trunk/arch/arm/mach-at91/board-stamp9g20.c
index 869cbecf00b7..a033b8df9fb2 100644
--- a/trunk/arch/arm/mach-at91/board-stamp9g20.c
+++ b/trunk/arch/arm/mach-at91/board-stamp9g20.c
@@ -188,7 +188,6 @@ static struct spi_board_info portuxg20_spi_devices[] = {
static struct w1_gpio_platform_data w1_gpio_pdata = {
.pin = AT91_PIN_PA29,
.is_open_drain = 1,
- .ext_pullup_enable_pin = -EINVAL,
};
static struct platform_device w1_device = {
diff --git a/trunk/arch/arm/mach-at91/include/mach/gpio.h b/trunk/arch/arm/mach-at91/include/mach/gpio.h
index 5fc23771c154..eed465ab0dd7 100644
--- a/trunk/arch/arm/mach-at91/include/mach/gpio.h
+++ b/trunk/arch/arm/mach-at91/include/mach/gpio.h
@@ -209,14 +209,6 @@ extern int at91_get_gpio_value(unsigned pin);
extern void at91_gpio_suspend(void);
extern void at91_gpio_resume(void);
-#ifdef CONFIG_PINCTRL_AT91
-extern void at91_pinctrl_gpio_suspend(void);
-extern void at91_pinctrl_gpio_resume(void);
-#else
-static inline void at91_pinctrl_gpio_suspend(void) {}
-static inline void at91_pinctrl_gpio_resume(void) {}
-#endif
-
#endif /* __ASSEMBLY__ */
#endif
diff --git a/trunk/arch/arm/mach-at91/irq.c b/trunk/arch/arm/mach-at91/irq.c
index e0ca59171022..8e210262aeee 100644
--- a/trunk/arch/arm/mach-at91/irq.c
+++ b/trunk/arch/arm/mach-at91/irq.c
@@ -92,21 +92,23 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value)
void at91_irq_suspend(void)
{
- int bit = -1;
+ int i = 0, bit;
if (has_aic5()) {
/* disable enabled irqs */
- while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
+ while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
at91_aic_write(AT91_AIC5_SSR,
bit & AT91_AIC5_INTSEL_MSK);
at91_aic_write(AT91_AIC5_IDCR, 1);
+ i = bit;
}
/* enable wakeup irqs */
- bit = -1;
- while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
+ i = 0;
+ while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
at91_aic_write(AT91_AIC5_SSR,
bit & AT91_AIC5_INTSEL_MSK);
at91_aic_write(AT91_AIC5_IECR, 1);
+ i = bit;
}
} else {
at91_aic_write(AT91_AIC_IDCR, *backups);
@@ -116,21 +118,23 @@ void at91_irq_suspend(void)
void at91_irq_resume(void)
{
- int bit = -1;
+ int i = 0, bit;
if (has_aic5()) {
/* disable wakeup irqs */
- while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
+ while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
at91_aic_write(AT91_AIC5_SSR,
bit & AT91_AIC5_INTSEL_MSK);
at91_aic_write(AT91_AIC5_IDCR, 1);
+ i = bit;
}
/* enable irqs disabled for suspend */
- bit = -1;
- while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
+ i = 0;
+ while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
at91_aic_write(AT91_AIC5_SSR,
bit & AT91_AIC5_INTSEL_MSK);
at91_aic_write(AT91_AIC5_IECR, 1);
+ i = bit;
}
} else {
at91_aic_write(AT91_AIC_IDCR, *wakeups);
diff --git a/trunk/arch/arm/mach-at91/pm.c b/trunk/arch/arm/mach-at91/pm.c
index 73f1f250403a..adb6db888a1f 100644
--- a/trunk/arch/arm/mach-at91/pm.c
+++ b/trunk/arch/arm/mach-at91/pm.c
@@ -201,10 +201,7 @@ extern u32 at91_slow_clock_sz;
static int at91_pm_enter(suspend_state_t state)
{
- if (of_have_populated_dt())
- at91_pinctrl_gpio_suspend();
- else
- at91_gpio_suspend();
+ at91_gpio_suspend();
at91_irq_suspend();
pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
@@ -289,10 +286,7 @@ static int at91_pm_enter(suspend_state_t state)
error:
target_state = PM_SUSPEND_ON;
at91_irq_resume();
- if (of_have_populated_dt())
- at91_pinctrl_gpio_resume();
- else
- at91_gpio_resume();
+ at91_gpio_resume();
return 0;
}
diff --git a/trunk/arch/arm/mach-cns3xxx/core.c b/trunk/arch/arm/mach-cns3xxx/core.c
index 52e4bb5cf12d..e698f26cc0cb 100644
--- a/trunk/arch/arm/mach-cns3xxx/core.c
+++ b/trunk/arch/arm/mach-cns3xxx/core.c
@@ -22,9 +22,19 @@
static struct map_desc cns3xxx_io_desc[] __initdata = {
{
- .virtual = CNS3XXX_TC11MP_SCU_BASE_VIRT,
- .pfn = __phys_to_pfn(CNS3XXX_TC11MP_SCU_BASE),
- .length = SZ_8K,
+ .virtual = CNS3XXX_TC11MP_TWD_BASE_VIRT,
+ .pfn = __phys_to_pfn(CNS3XXX_TC11MP_TWD_BASE),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT,
+ .pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_CPU_BASE),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT,
+ .pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_DIST_BASE),
+ .length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = CNS3XXX_TIMER1_2_3_BASE_VIRT,
diff --git a/trunk/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h b/trunk/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
index b1021aafa481..191c8e57f289 100644
--- a/trunk/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
+++ b/trunk/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
@@ -94,10 +94,10 @@
#define RTC_INTR_STS_OFFSET 0x34
#define CNS3XXX_MISC_BASE 0x76000000 /* Misc Control */
-#define CNS3XXX_MISC_BASE_VIRT 0xFB000000 /* Misc Control */
+#define CNS3XXX_MISC_BASE_VIRT 0xFFF07000 /* Misc Control */
#define CNS3XXX_PM_BASE 0x77000000 /* Power Management Control */
-#define CNS3XXX_PM_BASE_VIRT 0xFB001000
+#define CNS3XXX_PM_BASE_VIRT 0xFFF08000
#define PM_CLK_GATE_OFFSET 0x00
#define PM_SOFT_RST_OFFSET 0x04
@@ -109,7 +109,7 @@
#define PM_PLL_HM_PD_OFFSET 0x1C
#define CNS3XXX_UART0_BASE 0x78000000 /* UART 0 */
-#define CNS3XXX_UART0_BASE_VIRT 0xFB002000
+#define CNS3XXX_UART0_BASE_VIRT 0xFFF09000
#define CNS3XXX_UART1_BASE 0x78400000 /* UART 1 */
#define CNS3XXX_UART1_BASE_VIRT 0xFFF0A000
@@ -130,7 +130,7 @@
#define CNS3XXX_I2S_BASE_VIRT 0xFFF10000
#define CNS3XXX_TIMER1_2_3_BASE 0x7C800000 /* Timer */
-#define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFB003000
+#define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFFF10800
#define TIMER1_COUNTER_OFFSET 0x00
#define TIMER1_AUTO_RELOAD_OFFSET 0x04
@@ -227,16 +227,16 @@
* Testchip peripheral and fpga gic regions
*/
#define CNS3XXX_TC11MP_SCU_BASE 0x90000000 /* IRQ, Test chip */
-#define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFB004000
+#define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFF000000
#define CNS3XXX_TC11MP_GIC_CPU_BASE 0x90000100 /* Test chip interrupt controller CPU interface */
-#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x100)
+#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT 0xFF000100
#define CNS3XXX_TC11MP_TWD_BASE 0x90000600
-#define CNS3XXX_TC11MP_TWD_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x600)
+#define CNS3XXX_TC11MP_TWD_BASE_VIRT 0xFF000600
#define CNS3XXX_TC11MP_GIC_DIST_BASE 0x90001000 /* Test chip interrupt controller distributor */
-#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x1000)
+#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT 0xFF001000
#define CNS3XXX_TC11MP_L220_BASE 0x92002000 /* L220 registers */
#define CNS3XXX_TC11MP_L220_BASE_VIRT 0xFF002000
diff --git a/trunk/arch/arm/mach-davinci/dma.c b/trunk/arch/arm/mach-davinci/dma.c
index 45b7c71d9cc1..a685e9706b7b 100644
--- a/trunk/arch/arm/mach-davinci/dma.c
+++ b/trunk/arch/arm/mach-davinci/dma.c
@@ -743,9 +743,6 @@ EXPORT_SYMBOL(edma_free_channel);
*/
int edma_alloc_slot(unsigned ctlr, int slot)
{
- if (!edma_cc[ctlr])
- return -EINVAL;
-
if (slot >= 0)
slot = EDMA_CHAN_SLOT(slot);
diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/uncompress.h b/trunk/arch/arm/mach-ep93xx/include/mach/uncompress.h
index b5cc77d2380b..d2afb4dd82ab 100644
--- a/trunk/arch/arm/mach-ep93xx/include/mach/uncompress.h
+++ b/trunk/arch/arm/mach-ep93xx/include/mach/uncompress.h
@@ -47,13 +47,9 @@ static void __raw_writel(unsigned int value, unsigned int ptr)
static inline void putc(int c)
{
- int i;
-
- for (i = 0; i < 10000; i++) {
- /* Transmit fifo not full? */
- if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF))
- break;
- }
+ /* Transmit fifo not full? */
+ while (__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF)
+ ;
__raw_writeb(c, PHYS_UART_DATA);
}
diff --git a/trunk/arch/arm/mach-footbridge/Kconfig b/trunk/arch/arm/mach-footbridge/Kconfig
index 0f2111a11315..abda5a18a664 100644
--- a/trunk/arch/arm/mach-footbridge/Kconfig
+++ b/trunk/arch/arm/mach-footbridge/Kconfig
@@ -67,7 +67,6 @@ config ARCH_NETWINDER
select ISA
select ISA_DMA
select PCI
- select VIRT_TO_BUS
help
Say Y here if you intend to run this kernel on the Rebel.COM
NetWinder. Information about this machine can be found at:
diff --git a/trunk/arch/arm/mach-highbank/hotplug.c b/trunk/arch/arm/mach-highbank/hotplug.c
index 890cae23c12a..f30c52843396 100644
--- a/trunk/arch/arm/mach-highbank/hotplug.c
+++ b/trunk/arch/arm/mach-highbank/hotplug.c
@@ -28,11 +28,13 @@ extern void secondary_startup(void);
*/
void __ref highbank_cpu_die(unsigned int cpu)
{
- highbank_set_cpu_jump(cpu, phys_to_virt(0));
+ flush_cache_all();
- flush_cache_louis();
+ highbank_set_cpu_jump(cpu, phys_to_virt(0));
highbank_set_core_pwr();
- while (1)
- cpu_do_idle();
+ cpu_do_idle();
+
+ /* We should never return from idle */
+ panic("highbank: cpu %d unexpectedly exit from shutdown\n", cpu);
}
diff --git a/trunk/arch/arm/mach-imx/clk-imx35.c b/trunk/arch/arm/mach-imx/clk-imx35.c
index 2193c834f55c..74e3a34d78b8 100644
--- a/trunk/arch/arm/mach-imx/clk-imx35.c
+++ b/trunk/arch/arm/mach-imx/clk-imx35.c
@@ -257,7 +257,6 @@ int __init mx35_clocks_init(void)
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
- clk_register_clkdev(clk[admux_gate], "audmux", NULL);
clk_prepare_enable(clk[spba_gate]);
clk_prepare_enable(clk[gpio1_gate]);
@@ -265,8 +264,6 @@ int __init mx35_clocks_init(void)
clk_prepare_enable(clk[gpio3_gate]);
clk_prepare_enable(clk[iim_gate]);
clk_prepare_enable(clk[emi_gate]);
- clk_prepare_enable(clk[max_gate]);
- clk_prepare_enable(clk[iomuxc_gate]);
/*
* SCC is needed to boot via mmc after a watchdog reset. The clock code
diff --git a/trunk/arch/arm/mach-imx/clk-imx6q.c b/trunk/arch/arm/mach-imx/clk-imx6q.c
index d38e54f5b6d7..7b025ee528a5 100644
--- a/trunk/arch/arm/mach-imx/clk-imx6q.c
+++ b/trunk/arch/arm/mach-imx/clk-imx6q.c
@@ -115,7 +115,7 @@ static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m"
static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", };
static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
-static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
+static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_pfd1_540m", };
static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
@@ -172,7 +172,7 @@ static struct clk *clk[clk_max];
static struct clk_onecell_data clk_data;
static enum mx6q_clks const clks_init_on[] __initconst = {
- mmdc_ch0_axi, rom, pll1_sys,
+ mmdc_ch0_axi, rom,
};
static struct clk_div_table clk_enet_ref_table[] = {
@@ -443,6 +443,7 @@ int __init mx6q_clocks_init(void)
clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0");
clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
+ clk_register_clkdev(clk[twd], NULL, "smp_twd");
clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL);
clk_register_clkdev(clk[ahb], "ahb", NULL);
clk_register_clkdev(clk[cko1], "cko1", NULL);
diff --git a/trunk/arch/arm/mach-imx/common.h b/trunk/arch/arm/mach-imx/common.h
index 5bf4a97ab241..5a800bfcec5b 100644
--- a/trunk/arch/arm/mach-imx/common.h
+++ b/trunk/arch/arm/mach-imx/common.h
@@ -110,8 +110,6 @@ void tzic_handle_irq(struct pt_regs *);
extern void imx_enable_cpu(int cpu, bool enable);
extern void imx_set_cpu_jump(int cpu, void *jump_addr);
-extern u32 imx_get_cpu_arg(int cpu);
-extern void imx_set_cpu_arg(int cpu, u32 arg);
extern void v7_cpu_resume(void);
extern u32 *pl310_get_save_ptr(void);
#ifdef CONFIG_SMP
diff --git a/trunk/arch/arm/mach-imx/headsmp.S b/trunk/arch/arm/mach-imx/headsmp.S
index a58c8b0527cc..921fc1555854 100644
--- a/trunk/arch/arm/mach-imx/headsmp.S
+++ b/trunk/arch/arm/mach-imx/headsmp.S
@@ -26,16 +26,16 @@ ENDPROC(v7_secondary_startup)
#ifdef CONFIG_PM
/*
- * The following code must assume it is running from physical address
- * where absolute virtual addresses to the data section have to be
- * turned into relative ones.
+ * The following code is located into the .data section. This is to
+ * allow phys_l2x0_saved_regs to be accessed with a relative load
+ * as we are running on physical address here.
*/
+ .data
+ .align
#ifdef CONFIG_CACHE_L2X0
.macro pl310_resume
- adr r0, l2x0_saved_regs_offset
- ldr r2, [r0]
- add r2, r2, r0
+ ldr r2, phys_l2x0_saved_regs
ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0
ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value
str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl
@@ -43,9 +43,9 @@ ENDPROC(v7_secondary_startup)
str r1, [r0, #L2X0_CTRL] @ re-enable L2
.endm
-l2x0_saved_regs_offset:
- .word l2x0_saved_regs - .
-
+ .globl phys_l2x0_saved_regs
+phys_l2x0_saved_regs:
+ .long 0
#else
.macro pl310_resume
.endm
diff --git a/trunk/arch/arm/mach-imx/hotplug.c b/trunk/arch/arm/mach-imx/hotplug.c
index 361a253e2b63..7bc5fe15dda2 100644
--- a/trunk/arch/arm/mach-imx/hotplug.c
+++ b/trunk/arch/arm/mach-imx/hotplug.c
@@ -46,23 +46,11 @@ static inline void cpu_enter_lowpower(void)
void imx_cpu_die(unsigned int cpu)
{
cpu_enter_lowpower();
- /*
- * We use the cpu jumping argument register to sync with
- * imx_cpu_kill() which is running on cpu0 and waiting for
- * the register being cleared to kill the cpu.
- */
- imx_set_cpu_arg(cpu, ~0);
cpu_do_idle();
}
int imx_cpu_kill(unsigned int cpu)
{
- unsigned long timeout = jiffies + msecs_to_jiffies(50);
-
- while (imx_get_cpu_arg(cpu) == 0)
- if (time_after(jiffies, timeout))
- return 0;
imx_enable_cpu(cpu, false);
- imx_set_cpu_arg(cpu, 0);
return 1;
}
diff --git a/trunk/arch/arm/mach-imx/imx25-dt.c b/trunk/arch/arm/mach-imx/imx25-dt.c
index 82348391582a..03b65e5ea541 100644
--- a/trunk/arch/arm/mach-imx/imx25-dt.c
+++ b/trunk/arch/arm/mach-imx/imx25-dt.c
@@ -27,11 +27,6 @@ static const char * const imx25_dt_board_compat[] __initconst = {
NULL
};
-static void __init imx25_timer_init(void)
-{
- mx25_clocks_init_dt();
-}
-
DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
.map_io = mx25_map_io,
.init_early = imx25_init_early,
diff --git a/trunk/arch/arm/mach-imx/pm-imx6q.c b/trunk/arch/arm/mach-imx/pm-imx6q.c
index 5faba7a3c95f..ee42d20cba19 100644
--- a/trunk/arch/arm/mach-imx/pm-imx6q.c
+++ b/trunk/arch/arm/mach-imx/pm-imx6q.c
@@ -22,6 +22,8 @@
#include "common.h"
#include "hardware.h"
+extern unsigned long phys_l2x0_saved_regs;
+
static int imx6q_suspend_finish(unsigned long val)
{
cpu_do_idle();
@@ -55,5 +57,18 @@ static const struct platform_suspend_ops imx6q_pm_ops = {
void __init imx6q_pm_init(void)
{
+ /*
+ * The l2x0 core code provides an infrastucture to save and restore
+ * l2x0 registers across suspend/resume cycle. But because imx6q
+ * retains L2 content during suspend and needs to resume L2 before
+ * MMU is enabled, it can only utilize register saving support and
+ * have to take care of restoring on its own. So we save physical
+ * address of the data structure used by l2x0 core to save registers,
+ * and later restore the necessary ones in imx6q resume entry.
+ */
+#ifdef CONFIG_CACHE_L2X0
+ phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
+#endif
+
suspend_set_ops(&imx6q_pm_ops);
}
diff --git a/trunk/arch/arm/mach-imx/src.c b/trunk/arch/arm/mach-imx/src.c
index 09a742f8c7ab..e15f1555c59b 100644
--- a/trunk/arch/arm/mach-imx/src.c
+++ b/trunk/arch/arm/mach-imx/src.c
@@ -43,18 +43,6 @@ void imx_set_cpu_jump(int cpu, void *jump_addr)
src_base + SRC_GPR1 + cpu * 8);
}
-u32 imx_get_cpu_arg(int cpu)
-{
- cpu = cpu_logical_map(cpu);
- return readl_relaxed(src_base + SRC_GPR1 + cpu * 8 + 4);
-}
-
-void imx_set_cpu_arg(int cpu, u32 arg)
-{
- cpu = cpu_logical_map(cpu);
- writel_relaxed(arg, src_base + SRC_GPR1 + cpu * 8 + 4);
-}
-
void imx_src_prepare_restart(void)
{
u32 val;
diff --git a/trunk/arch/arm/mach-ixp4xx/vulcan-setup.c b/trunk/arch/arm/mach-ixp4xx/vulcan-setup.c
index d599e354ca57..d42730a1d4ab 100644
--- a/trunk/arch/arm/mach-ixp4xx/vulcan-setup.c
+++ b/trunk/arch/arm/mach-ixp4xx/vulcan-setup.c
@@ -163,7 +163,6 @@ static struct platform_device vulcan_max6369 = {
static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
.pin = 14,
- .ext_pullup_enable_pin = -EINVAL,
};
static struct platform_device vulcan_w1_gpio = {
diff --git a/trunk/arch/arm/mach-kirkwood/board-dt.c b/trunk/arch/arm/mach-kirkwood/board-dt.c
index d367aa6b47bb..2e73e9d53f70 100644
--- a/trunk/arch/arm/mach-kirkwood/board-dt.c
+++ b/trunk/arch/arm/mach-kirkwood/board-dt.c
@@ -41,12 +41,16 @@ static void __init kirkwood_legacy_clk_init(void)
struct device_node *np = of_find_compatible_node(
NULL, NULL, "marvell,kirkwood-gating-clock");
+
struct of_phandle_args clkspec;
- struct clk *clk;
clkspec.np = np;
clkspec.args_count = 1;
+ clkspec.args[0] = CGC_BIT_GE0;
+ orion_clkdev_add(NULL, "mv643xx_eth_port.0",
+ of_clk_get_from_provider(&clkspec));
+
clkspec.args[0] = CGC_BIT_PEX0;
orion_clkdev_add("0", "pcie",
of_clk_get_from_provider(&clkspec));
@@ -55,24 +59,9 @@ static void __init kirkwood_legacy_clk_init(void)
orion_clkdev_add("1", "pcie",
of_clk_get_from_provider(&clkspec));
- clkspec.args[0] = CGC_BIT_SDIO;
- orion_clkdev_add(NULL, "mvsdio",
- of_clk_get_from_provider(&clkspec));
-
- /*
- * The ethernet interfaces forget the MAC address assigned by
- * u-boot if the clocks are turned off. Until proper DT support
- * is available we always enable them for now.
- */
- clkspec.args[0] = CGC_BIT_GE0;
- clk = of_clk_get_from_provider(&clkspec);
- orion_clkdev_add(NULL, "mv643xx_eth_port.0", clk);
- clk_prepare_enable(clk);
-
clkspec.args[0] = CGC_BIT_GE1;
- clk = of_clk_get_from_provider(&clkspec);
- orion_clkdev_add(NULL, "mv643xx_eth_port.1", clk);
- clk_prepare_enable(clk);
+ orion_clkdev_add(NULL, "mv643xx_eth_port.1",
+ of_clk_get_from_provider(&clkspec));
}
static void __init kirkwood_of_clk_init(void)
diff --git a/trunk/arch/arm/mach-kirkwood/board-iomega_ix2_200.c b/trunk/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
index e5f70415905a..f655b2637b0e 100644
--- a/trunk/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
+++ b/trunk/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
@@ -20,15 +20,10 @@ static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = {
.duplex = DUPLEX_FULL,
};
-static struct mv643xx_eth_platform_data iomega_ix2_200_ge01_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(11),
-};
-
void __init iomega_ix2_200_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
- kirkwood_ge00_init(&iomega_ix2_200_ge00_data);
- kirkwood_ge01_init(&iomega_ix2_200_ge01_data);
+ kirkwood_ge01_init(&iomega_ix2_200_ge00_data);
}
diff --git a/trunk/arch/arm/mach-kirkwood/guruplug-setup.c b/trunk/arch/arm/mach-kirkwood/guruplug-setup.c
index 08dd739aa709..1c6e736cbbf8 100644
--- a/trunk/arch/arm/mach-kirkwood/guruplug-setup.c
+++ b/trunk/arch/arm/mach-kirkwood/guruplug-setup.c
@@ -53,8 +53,6 @@ static struct mv_sata_platform_data guruplug_sata_data = {
static struct mvsdio_platform_data guruplug_mvsdio_data = {
/* unfortunately the CD signal has not been connected */
- .gpio_card_detect = -1,
- .gpio_write_protect = -1,
};
static struct gpio_led guruplug_led_pins[] = {
diff --git a/trunk/arch/arm/mach-kirkwood/openrd-setup.c b/trunk/arch/arm/mach-kirkwood/openrd-setup.c
index 6a6eb548307d..8ddd69fdc937 100644
--- a/trunk/arch/arm/mach-kirkwood/openrd-setup.c
+++ b/trunk/arch/arm/mach-kirkwood/openrd-setup.c
@@ -55,7 +55,6 @@ static struct mv_sata_platform_data openrd_sata_data = {
static struct mvsdio_platform_data openrd_mvsdio_data = {
.gpio_card_detect = 29, /* MPP29 used as SD card detect */
- .gpio_write_protect = -1,
};
static unsigned int openrd_mpp_config[] __initdata = {
diff --git a/trunk/arch/arm/mach-kirkwood/rd88f6281-setup.c b/trunk/arch/arm/mach-kirkwood/rd88f6281-setup.c
index d24223166e06..c7d93b48926b 100644
--- a/trunk/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/trunk/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -69,7 +69,6 @@ static struct mv_sata_platform_data rd88f6281_sata_data = {
static struct mvsdio_platform_data rd88f6281_mvsdio_data = {
.gpio_card_detect = 28,
- .gpio_write_protect = -1,
};
static unsigned int rd88f6281_mpp_config[] __initdata = {
diff --git a/trunk/arch/arm/mach-mmp/gplugd.c b/trunk/arch/arm/mach-mmp/gplugd.c
index f62b68d926f4..d1e2d595e79c 100644
--- a/trunk/arch/arm/mach-mmp/gplugd.c
+++ b/trunk/arch/arm/mach-mmp/gplugd.c
@@ -9,7 +9,6 @@
*/
#include
-#include
#include
#include
diff --git a/trunk/arch/arm/mach-msm/timer.c b/trunk/arch/arm/mach-msm/timer.c
index f9fd77e8f1f5..2969027f02fa 100644
--- a/trunk/arch/arm/mach-msm/timer.c
+++ b/trunk/arch/arm/mach-msm/timer.c
@@ -62,10 +62,7 @@ static int msm_timer_set_next_event(unsigned long cycles,
{
u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE);
- ctrl &= ~TIMER_ENABLE_EN;
- writel_relaxed(ctrl, event_base + TIMER_ENABLE);
-
- writel_relaxed(ctrl, event_base + TIMER_CLEAR);
+ writel_relaxed(0, event_base + TIMER_CLEAR);
writel_relaxed(cycles, event_base + TIMER_MATCH_VAL);
writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE);
return 0;
diff --git a/trunk/arch/arm/mach-mvebu/irq-armada-370-xp.c b/trunk/arch/arm/mach-mvebu/irq-armada-370-xp.c
index d5970f5a1e8d..274ff58271de 100644
--- a/trunk/arch/arm/mach-mvebu/irq-armada-370-xp.c
+++ b/trunk/arch/arm/mach-mvebu/irq-armada-370-xp.c
@@ -44,8 +44,6 @@
#define ARMADA_370_XP_MAX_PER_CPU_IRQS (28)
-#define ARMADA_370_XP_TIMER0_PER_CPU_IRQ (5)
-
#define ACTIVE_DOORBELLS (8)
static DEFINE_RAW_SPINLOCK(irq_controller_lock);
@@ -61,26 +59,36 @@ static struct irq_domain *armada_370_xp_mpic_domain;
*/
static void armada_370_xp_irq_mask(struct irq_data *d)
{
+#ifdef CONFIG_SMP
irq_hw_number_t hwirq = irqd_to_hwirq(d);
- if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
+ if (hwirq > ARMADA_370_XP_MAX_PER_CPU_IRQS)
writel(hwirq, main_int_base +
ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS);
else
writel(hwirq, per_cpu_int_base +
ARMADA_370_XP_INT_SET_MASK_OFFS);
+#else
+ writel(irqd_to_hwirq(d),
+ per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS);
+#endif
}
static void armada_370_xp_irq_unmask(struct irq_data *d)
{
+#ifdef CONFIG_SMP
irq_hw_number_t hwirq = irqd_to_hwirq(d);
- if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
+ if (hwirq > ARMADA_370_XP_MAX_PER_CPU_IRQS)
writel(hwirq, main_int_base +
ARMADA_370_XP_INT_SET_ENABLE_OFFS);
else
writel(hwirq, per_cpu_int_base +
ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
+#else
+ writel(irqd_to_hwirq(d),
+ per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
+#endif
}
#ifdef CONFIG_SMP
@@ -136,14 +144,10 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,
unsigned int virq, irq_hw_number_t hw)
{
armada_370_xp_irq_mask(irq_get_irq_data(virq));
- if (hw != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
- writel(hw, per_cpu_int_base +
- ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
- else
- writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
+ writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
irq_set_status_flags(virq, IRQ_LEVEL);
- if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) {
+ if (hw < ARMADA_370_XP_MAX_PER_CPU_IRQS) {
irq_set_percpu_devid(virq);
irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,
handle_percpu_devid_irq);
diff --git a/trunk/arch/arm/mach-mxs/icoll.c b/trunk/arch/arm/mach-mxs/icoll.c
index e26eeba46598..8fb23af154b3 100644
--- a/trunk/arch/arm/mach-mxs/icoll.c
+++ b/trunk/arch/arm/mach-mxs/icoll.c
@@ -100,7 +100,7 @@ static struct irq_domain_ops icoll_irq_domain_ops = {
.xlate = irq_domain_xlate_onecell,
};
-static void __init icoll_of_init(struct device_node *np,
+void __init icoll_of_init(struct device_node *np,
struct device_node *interrupt_parent)
{
/*
diff --git a/trunk/arch/arm/mach-mxs/mach-mxs.c b/trunk/arch/arm/mach-mxs/mach-mxs.c
index e7b781d3788f..052186713347 100644
--- a/trunk/arch/arm/mach-mxs/mach-mxs.c
+++ b/trunk/arch/arm/mach-mxs/mach-mxs.c
@@ -41,6 +41,8 @@ static struct fb_videomode mx23evk_video_modes[] = {
.lower_margin = 4,
.hsync_len = 1,
.vsync_len = 1,
+ .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
+ FB_SYNC_DOTCLK_FAILING_ACT,
},
};
@@ -57,6 +59,8 @@ static struct fb_videomode mx28evk_video_modes[] = {
.lower_margin = 10,
.hsync_len = 10,
.vsync_len = 10,
+ .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
+ FB_SYNC_DOTCLK_FAILING_ACT,
},
};
@@ -73,6 +77,7 @@ static struct fb_videomode m28evk_video_modes[] = {
.lower_margin = 45,
.hsync_len = 1,
.vsync_len = 1,
+ .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
},
};
@@ -89,7 +94,9 @@ static struct fb_videomode apx4devkit_video_modes[] = {
.lower_margin = 13,
.hsync_len = 48,
.vsync_len = 3,
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
+ FB_SYNC_DATA_ENABLE_HIGH_ACT |
+ FB_SYNC_DOTCLK_FAILING_ACT,
},
};
@@ -106,7 +113,9 @@ static struct fb_videomode apf28dev_video_modes[] = {
.lower_margin = 0x15,
.hsync_len = 64,
.vsync_len = 4,
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
+ FB_SYNC_DATA_ENABLE_HIGH_ACT |
+ FB_SYNC_DOTCLK_FAILING_ACT,
},
};
@@ -123,6 +132,7 @@ static struct fb_videomode cfa10049_video_modes[] = {
.lower_margin = 2,
.hsync_len = 15,
.vsync_len = 15,
+ .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT
},
};
@@ -249,8 +259,6 @@ static void __init imx23_evk_init(void)
mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
mxsfb_pdata.default_bpp = 32;
mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
- mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
- MXSFB_SYNC_DOTCLK_FAILING_ACT;
}
static inline void enable_clk_enet_out(void)
@@ -270,8 +278,6 @@ static void __init imx28_evk_init(void)
mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
mxsfb_pdata.default_bpp = 32;
mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
- mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
- MXSFB_SYNC_DOTCLK_FAILING_ACT;
mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
}
@@ -291,7 +297,6 @@ static void __init m28evk_init(void)
mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
mxsfb_pdata.default_bpp = 16;
mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
- mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
}
static void __init sc_sps1_init(void)
@@ -317,8 +322,6 @@ static void __init apx4devkit_init(void)
mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
mxsfb_pdata.default_bpp = 32;
mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
- mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
- MXSFB_SYNC_DOTCLK_FAILING_ACT;
}
#define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
@@ -399,18 +402,17 @@ static void __init cfa10049_init(void)
{
enable_clk_enet_out();
update_fec_mac_prop(OUI_CRYSTALFONTZ);
-
- mxsfb_pdata.mode_list = cfa10049_video_modes;
- mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
- mxsfb_pdata.default_bpp = 32;
- mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
- mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
}
static void __init cfa10037_init(void)
{
enable_clk_enet_out();
update_fec_mac_prop(OUI_CRYSTALFONTZ);
+
+ mxsfb_pdata.mode_list = cfa10049_video_modes;
+ mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
+ mxsfb_pdata.default_bpp = 32;
+ mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
}
static void __init apf28_init(void)
@@ -421,8 +423,6 @@ static void __init apf28_init(void)
mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes);
mxsfb_pdata.default_bpp = 16;
mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT;
- mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
- MXSFB_SYNC_DOTCLK_FAILING_ACT;
}
static void __init mxs_machine_init(void)
diff --git a/trunk/arch/arm/mach-mxs/mm.c b/trunk/arch/arm/mach-mxs/mm.c
index e63b7d87acbd..a4294aa9f301 100644
--- a/trunk/arch/arm/mach-mxs/mm.c
+++ b/trunk/arch/arm/mach-mxs/mm.c
@@ -18,7 +18,6 @@
#include
#include
-#include
/*
* Define the MX23 memory map.
diff --git a/trunk/arch/arm/mach-mxs/ocotp.c b/trunk/arch/arm/mach-mxs/ocotp.c
index 1dff46703753..54add60f94c9 100644
--- a/trunk/arch/arm/mach-mxs/ocotp.c
+++ b/trunk/arch/arm/mach-mxs/ocotp.c
@@ -19,7 +19,6 @@
#include /* for cpu_relax() */
#include
-#include
#define OCOTP_WORD_OFFSET 0x20
#define OCOTP_WORD_COUNT 0x20
diff --git a/trunk/arch/arm/mach-netx/generic.c b/trunk/arch/arm/mach-netx/generic.c
index 1504b68f4c66..27c2cb7ab813 100644
--- a/trunk/arch/arm/mach-netx/generic.c
+++ b/trunk/arch/arm/mach-netx/generic.c
@@ -168,7 +168,7 @@ void __init netx_init_irq(void)
{
int irq;
- vic_init(io_p2v(NETX_PA_VIC), NETX_IRQ_VIC_START, ~0, 0);
+ vic_init(io_p2v(NETX_PA_VIC), 0, ~0, 0);
for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
irq_set_chip_and_handler(irq, &netx_hif_chip,
diff --git a/trunk/arch/arm/mach-netx/include/mach/irqs.h b/trunk/arch/arm/mach-netx/include/mach/irqs.h
index 8f74a844a775..6ce914d54a30 100644
--- a/trunk/arch/arm/mach-netx/include/mach/irqs.h
+++ b/trunk/arch/arm/mach-netx/include/mach/irqs.h
@@ -17,42 +17,42 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-#define NETX_IRQ_VIC_START 64
-#define NETX_IRQ_SOFTINT (NETX_IRQ_VIC_START + 0)
-#define NETX_IRQ_TIMER0 (NETX_IRQ_VIC_START + 1)
-#define NETX_IRQ_TIMER1 (NETX_IRQ_VIC_START + 2)
-#define NETX_IRQ_TIMER2 (NETX_IRQ_VIC_START + 3)
-#define NETX_IRQ_SYSTIME_NS (NETX_IRQ_VIC_START + 4)
-#define NETX_IRQ_SYSTIME_S (NETX_IRQ_VIC_START + 5)
-#define NETX_IRQ_GPIO_15 (NETX_IRQ_VIC_START + 6)
-#define NETX_IRQ_WATCHDOG (NETX_IRQ_VIC_START + 7)
-#define NETX_IRQ_UART0 (NETX_IRQ_VIC_START + 8)
-#define NETX_IRQ_UART1 (NETX_IRQ_VIC_START + 9)
-#define NETX_IRQ_UART2 (NETX_IRQ_VIC_START + 10)
-#define NETX_IRQ_USB (NETX_IRQ_VIC_START + 11)
-#define NETX_IRQ_SPI (NETX_IRQ_VIC_START + 12)
-#define NETX_IRQ_I2C (NETX_IRQ_VIC_START + 13)
-#define NETX_IRQ_LCD (NETX_IRQ_VIC_START + 14)
-#define NETX_IRQ_HIF (NETX_IRQ_VIC_START + 15)
-#define NETX_IRQ_GPIO_0_14 (NETX_IRQ_VIC_START + 16)
-#define NETX_IRQ_XPEC0 (NETX_IRQ_VIC_START + 17)
-#define NETX_IRQ_XPEC1 (NETX_IRQ_VIC_START + 18)
-#define NETX_IRQ_XPEC2 (NETX_IRQ_VIC_START + 19)
-#define NETX_IRQ_XPEC3 (NETX_IRQ_VIC_START + 20)
-#define NETX_IRQ_XPEC(no) (NETX_IRQ_VIC_START + 17 + (no))
-#define NETX_IRQ_MSYNC0 (NETX_IRQ_VIC_START + 21)
-#define NETX_IRQ_MSYNC1 (NETX_IRQ_VIC_START + 22)
-#define NETX_IRQ_MSYNC2 (NETX_IRQ_VIC_START + 23)
-#define NETX_IRQ_MSYNC3 (NETX_IRQ_VIC_START + 24)
-#define NETX_IRQ_IRQ_PHY (NETX_IRQ_VIC_START + 25)
-#define NETX_IRQ_ISO_AREA (NETX_IRQ_VIC_START + 26)
+#define NETX_IRQ_VIC_START 0
+#define NETX_IRQ_SOFTINT 0
+#define NETX_IRQ_TIMER0 1
+#define NETX_IRQ_TIMER1 2
+#define NETX_IRQ_TIMER2 3
+#define NETX_IRQ_SYSTIME_NS 4
+#define NETX_IRQ_SYSTIME_S 5
+#define NETX_IRQ_GPIO_15 6
+#define NETX_IRQ_WATCHDOG 7
+#define NETX_IRQ_UART0 8
+#define NETX_IRQ_UART1 9
+#define NETX_IRQ_UART2 10
+#define NETX_IRQ_USB 11
+#define NETX_IRQ_SPI 12
+#define NETX_IRQ_I2C 13
+#define NETX_IRQ_LCD 14
+#define NETX_IRQ_HIF 15
+#define NETX_IRQ_GPIO_0_14 16
+#define NETX_IRQ_XPEC0 17
+#define NETX_IRQ_XPEC1 18
+#define NETX_IRQ_XPEC2 19
+#define NETX_IRQ_XPEC3 20
+#define NETX_IRQ_XPEC(no) (17 + (no))
+#define NETX_IRQ_MSYNC0 21
+#define NETX_IRQ_MSYNC1 22
+#define NETX_IRQ_MSYNC2 23
+#define NETX_IRQ_MSYNC3 24
+#define NETX_IRQ_IRQ_PHY 25
+#define NETX_IRQ_ISO_AREA 26
/* int 27 is reserved */
/* int 28 is reserved */
-#define NETX_IRQ_TIMER3 (NETX_IRQ_VIC_START + 29)
-#define NETX_IRQ_TIMER4 (NETX_IRQ_VIC_START + 30)
+#define NETX_IRQ_TIMER3 29
+#define NETX_IRQ_TIMER4 30
/* int 31 is reserved */
-#define NETX_IRQS (NETX_IRQ_VIC_START + 32)
+#define NETX_IRQS 32
/* for multiplexed irqs on gpio 0..14 */
#define NETX_IRQ_GPIO(x) (NETX_IRQS + (x))
diff --git a/trunk/arch/arm/mach-omap1/clock_data.c b/trunk/arch/arm/mach-omap1/clock_data.c
index 6c4f766365a2..cb7c6ae2e3fc 100644
--- a/trunk/arch/arm/mach-omap1/clock_data.c
+++ b/trunk/arch/arm/mach-omap1/clock_data.c
@@ -538,6 +538,15 @@ static struct clk usb_hhc_ck16xx = {
};
static struct clk usb_dc_ck = {
+ .name = "usb_dc_ck",
+ .ops = &clkops_generic,
+ /* Direct from ULPD, no parent */
+ .rate = 48000000,
+ .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+ .enable_bit = USB_REQ_EN_SHIFT,
+};
+
+static struct clk usb_dc_ck7xx = {
.name = "usb_dc_ck",
.ops = &clkops_generic,
/* Direct from ULPD, no parent */
@@ -718,7 +727,8 @@ static struct omap_clk omap_clks[] = {
CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310),
CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310),
CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX),
- CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX | CK_7XX),
+ CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX),
+ CLK(NULL, "usb_dc_ck", &usb_dc_ck7xx, CK_7XX),
CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310),
CLK(NULL, "mclk", &mclk_16xx, CK_16XX),
CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310),
diff --git a/trunk/arch/arm/mach-omap1/common.h b/trunk/arch/arm/mach-omap1/common.h
index 14f7e9920479..fb18831e88aa 100644
--- a/trunk/arch/arm/mach-omap1/common.h
+++ b/trunk/arch/arm/mach-omap1/common.h
@@ -31,8 +31,6 @@
#include
-#include
-
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
void omap7xx_map_io(void);
#else
diff --git a/trunk/arch/arm/mach-omap2/Kconfig b/trunk/arch/arm/mach-omap2/Kconfig
index 8111cd9ff3e5..49ac3dfebef9 100644
--- a/trunk/arch/arm/mach-omap2/Kconfig
+++ b/trunk/arch/arm/mach-omap2/Kconfig
@@ -311,6 +311,9 @@ config MACH_OMAP_ZOOM2
default y
select OMAP_PACKAGE_CBB
select REGULATOR_FIXED_VOLTAGE if REGULATOR
+ select SERIAL_8250
+ select SERIAL_8250_CONSOLE
+ select SERIAL_CORE_CONSOLE
config MACH_OMAP_ZOOM3
bool "OMAP3630 Zoom3 board"
@@ -318,6 +321,9 @@ config MACH_OMAP_ZOOM3
default y
select OMAP_PACKAGE_CBP
select REGULATOR_FIXED_VOLTAGE if REGULATOR
+ select SERIAL_8250
+ select SERIAL_8250_CONSOLE
+ select SERIAL_CORE_CONSOLE
config MACH_CM_T35
bool "CompuLab CM-T35/CM-T3730 modules"
diff --git a/trunk/arch/arm/mach-omap2/board-generic.c b/trunk/arch/arm/mach-omap2/board-generic.c
index e54a48060198..0274ff7a2a2b 100644
--- a/trunk/arch/arm/mach-omap2/board-generic.c
+++ b/trunk/arch/arm/mach-omap2/board-generic.c
@@ -102,7 +102,6 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
.init_irq = omap_intc_of_init,
.handle_irq = omap3_intc_handle_irq,
.init_machine = omap_generic_init,
- .init_late = omap3_init_late,
.init_time = omap3_sync32k_timer_init,
.dt_compat = omap3_boards_compat,
.restart = omap3xxx_restart,
@@ -120,7 +119,6 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
.init_irq = omap_intc_of_init,
.handle_irq = omap3_intc_handle_irq,
.init_machine = omap_generic_init,
- .init_late = omap3_init_late,
.init_time = omap3_secure_sync32k_timer_init,
.dt_compat = omap3_gp_boards_compat,
.restart = omap3xxx_restart,
diff --git a/trunk/arch/arm/mach-omap2/board-rx51.c b/trunk/arch/arm/mach-omap2/board-rx51.c
index d2ea68ea678a..f7c4616cbb60 100644
--- a/trunk/arch/arm/mach-omap2/board-rx51.c
+++ b/trunk/arch/arm/mach-omap2/board-rx51.c
@@ -17,7 +17,6 @@
#include
#include
#include
-#include
#include
#include
@@ -99,7 +98,6 @@ static void __init rx51_init(void)
sdrc_params = nokia_get_sdram_timings();
omap_sdrc_init(sdrc_params, sdrc_params);
- usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
usb_musb_init(&musb_board_data);
rx51_peripherals_init();
diff --git a/trunk/arch/arm/mach-omap2/cclock44xx_data.c b/trunk/arch/arm/mach-omap2/cclock44xx_data.c
index 0c6834ae1fc4..3d58f335f173 100644
--- a/trunk/arch/arm/mach-omap2/cclock44xx_data.c
+++ b/trunk/arch/arm/mach-omap2/cclock44xx_data.c
@@ -52,13 +52,6 @@
*/
#define OMAP4_DPLL_ABE_DEFFREQ 98304000
-/*
- * OMAP4 USB DPLL default frequency. In OMAP4430 TRM version V, section
- * "3.6.3.9.5 DPLL_USB Preferred Settings" shows that the preferred
- * locked frequency for the USB DPLL is 960MHz.
- */
-#define OMAP4_DPLL_USB_DEFFREQ 960000000
-
/* Root clocks */
DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0);
@@ -1018,10 +1011,6 @@ DEFINE_CLK_OMAP_MUX(hsmmc2_fclk, "l3_init_clkdm", hsmmc1_fclk_sel,
OMAP4430_CM_L3INIT_MMC2_CLKCTRL, OMAP4430_CLKSEL_MASK,
hsmmc1_fclk_parents, func_dmic_abe_gfclk_ops);
-DEFINE_CLK_GATE(ocp2scp_usb_phy_phy_48m, "func_48m_fclk", &func_48m_fclk, 0x0,
- OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL,
- OMAP4430_OPTFCLKEN_PHY_48M_SHIFT, 0x0, NULL);
-
DEFINE_CLK_GATE(sha2md5_fck, "l3_div_ck", &l3_div_ck, 0x0,
OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL,
OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
@@ -1549,7 +1538,6 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "per_mcbsp4_gfclk", &per_mcbsp4_gfclk, CK_443X),
CLK(NULL, "hsmmc1_fclk", &hsmmc1_fclk, CK_443X),
CLK(NULL, "hsmmc2_fclk", &hsmmc2_fclk, CK_443X),
- CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m, CK_443X),
CLK(NULL, "sha2md5_fck", &sha2md5_fck, CK_443X),
CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1, CK_443X),
CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0, CK_443X),
@@ -1717,13 +1705,5 @@ int __init omap4xxx_clk_init(void)
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
- /*
- * Lock USB DPLL on OMAP4 devices so that the L3INIT power
- * domain can transition to retention state when not in use.
- */
- rc = clk_set_rate(&dpll_usb_ck, OMAP4_DPLL_USB_DEFFREQ);
- if (rc)
- pr_err("%s: failed to configure USB DPLL!\n", __func__);
-
return 0;
}
diff --git a/trunk/arch/arm/mach-omap2/common.h b/trunk/arch/arm/mach-omap2/common.h
index d6ba13e1c540..0a6b9c7a63da 100644
--- a/trunk/arch/arm/mach-omap2/common.h
+++ b/trunk/arch/arm/mach-omap2/common.h
@@ -108,6 +108,7 @@ void omap35xx_init_late(void);
void omap3630_init_late(void);
void am35xx_init_late(void);
void ti81xx_init_late(void);
+void omap4430_init_late(void);
int omap2_common_pm_late_init(void);
#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
@@ -293,8 +294,5 @@ extern void omap_reserve(void);
struct omap_hwmod;
extern int omap_dss_reset(struct omap_hwmod *);
-/* SoC specific clock initializer */
-extern int (*omap_clk_init)(void);
-
#endif /* __ASSEMBLER__ */
#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/trunk/arch/arm/mach-omap2/gpmc.c b/trunk/arch/arm/mach-omap2/gpmc.c
index 410e1bac7815..e4b16c8efe8b 100644
--- a/trunk/arch/arm/mach-omap2/gpmc.c
+++ b/trunk/arch/arm/mach-omap2/gpmc.c
@@ -1122,6 +1122,9 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
/* TODO: remove, see function definition */
gpmc_convert_ps_to_ns(gpmc_t);
+ /* Now the GPMC is initialised, unreserve the chip-selects */
+ gpmc_cs_map = 0;
+
return 0;
}
@@ -1380,9 +1383,6 @@ static int gpmc_probe(struct platform_device *pdev)
if (IS_ERR_VALUE(gpmc_setup_irq()))
dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
- /* Now the GPMC is initialised, unreserve the chip-selects */
- gpmc_cs_map = 0;
-
rc = gpmc_probe_dt(pdev);
if (rc < 0) {
clk_disable_unprepare(gpmc_l3_clk);
diff --git a/trunk/arch/arm/mach-omap2/io.c b/trunk/arch/arm/mach-omap2/io.c
index 5c445ca1e271..2c3fdd65387b 100644
--- a/trunk/arch/arm/mach-omap2/io.c
+++ b/trunk/arch/arm/mach-omap2/io.c
@@ -54,12 +54,6 @@
#include "prm3xxx.h"
#include "prm44xx.h"
-/*
- * omap_clk_init: points to a function that does the SoC-specific
- * clock initializations
- */
-int (*omap_clk_init)(void);
-
/*
* The machine specific code may provide the extra mapping besides the
* default mapping provided here.
@@ -403,7 +397,7 @@ void __init omap2420_init_early(void)
omap242x_clockdomains_init();
omap2420_hwmod_init();
omap_hwmod_init_postsetup();
- omap_clk_init = omap2420_clk_init;
+ omap2420_clk_init();
}
void __init omap2420_init_late(void)
@@ -433,7 +427,7 @@ void __init omap2430_init_early(void)
omap243x_clockdomains_init();
omap2430_hwmod_init();
omap_hwmod_init_postsetup();
- omap_clk_init = omap2430_clk_init;
+ omap2430_clk_init();
}
void __init omap2430_init_late(void)
@@ -468,7 +462,7 @@ void __init omap3_init_early(void)
omap3xxx_clockdomains_init();
omap3xxx_hwmod_init();
omap_hwmod_init_postsetup();
- omap_clk_init = omap3xxx_clk_init;
+ omap3xxx_clk_init();
}
void __init omap3430_init_early(void)
@@ -506,7 +500,7 @@ void __init ti81xx_init_early(void)
omap3xxx_clockdomains_init();
omap3xxx_hwmod_init();
omap_hwmod_init_postsetup();
- omap_clk_init = omap3xxx_clk_init;
+ omap3xxx_clk_init();
}
void __init omap3_init_late(void)
@@ -574,7 +568,7 @@ void __init am33xx_init_early(void)
am33xx_clockdomains_init();
am33xx_hwmod_init();
omap_hwmod_init_postsetup();
- omap_clk_init = am33xx_clk_init;
+ am33xx_clk_init();
}
#endif
@@ -599,7 +593,7 @@ void __init omap4430_init_early(void)
omap44xx_clockdomains_init();
omap44xx_hwmod_init();
omap_hwmod_init_postsetup();
- omap_clk_init = omap4xxx_clk_init;
+ omap4xxx_clk_init();
}
void __init omap4430_init_late(void)
diff --git a/trunk/arch/arm/mach-omap2/mux.c b/trunk/arch/arm/mach-omap2/mux.c
index f82cf878d6af..6a217c98db54 100644
--- a/trunk/arch/arm/mach-omap2/mux.c
+++ b/trunk/arch/arm/mach-omap2/mux.c
@@ -211,6 +211,8 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
return -EINVAL;
}
+ pr_err("%s: Could not find signal %s\n", __func__, muxname);
+
return -ENODEV;
}
@@ -232,8 +234,6 @@ int __init omap_mux_get_by_name(const char *muxname,
return mux_mode;
}
- pr_err("%s: Could not find signal %s\n", __func__, muxname);
-
return -ENODEV;
}
@@ -739,9 +739,8 @@ static void __init omap_mux_dbg_create_entry(
list_for_each_entry(e, &partition->muxmodes, node) {
struct omap_mux *m = &e->mux;
- (void)debugfs_create_file(m->muxnames[0], S_IWUSR | S_IRUGO,
- mux_dbg_dir, m,
- &omap_mux_dbg_signal_fops);
+ (void)debugfs_create_file(m->muxnames[0], S_IWUSR, mux_dbg_dir,
+ m, &omap_mux_dbg_signal_fops);
}
}
diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod.c b/trunk/arch/arm/mach-omap2/omap_hwmod.c
index a202a4785104..c2c798c08c2b 100644
--- a/trunk/arch/arm/mach-omap2/omap_hwmod.c
+++ b/trunk/arch/arm/mach-omap2/omap_hwmod.c
@@ -1368,9 +1368,7 @@ static void _enable_sysc(struct omap_hwmod *oh)
}
if (sf & SYSC_HAS_MIDLEMODE) {
- if (oh->flags & HWMOD_FORCE_MSTANDBY) {
- idlemode = HWMOD_IDLEMODE_FORCE;
- } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
+ if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
idlemode = HWMOD_IDLEMODE_NO;
} else {
if (sf & SYSC_HAS_ENAWAKEUP)
@@ -1442,8 +1440,7 @@ static void _idle_sysc(struct omap_hwmod *oh)
}
if (sf & SYSC_HAS_MIDLEMODE) {
- if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
- (oh->flags & HWMOD_FORCE_MSTANDBY)) {
+ if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
idlemode = HWMOD_IDLEMODE_FORCE;
} else {
if (sf & SYSC_HAS_ENAWAKEUP)
diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod.h b/trunk/arch/arm/mach-omap2/omap_hwmod.h
index d5dc935f6060..d43d9b608eda 100644
--- a/trunk/arch/arm/mach-omap2/omap_hwmod.h
+++ b/trunk/arch/arm/mach-omap2/omap_hwmod.h
@@ -427,8 +427,8 @@ struct omap_hwmod_omap4_prcm {
*
* HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
* of idle, rather than relying on module smart-idle
- * HWMOD_SWSUP_MSTANDBY: omap_hwmod code should manually bring module in and
- * out of standby, rather than relying on module smart-standby
+ * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
+ * of standby, rather than relying on module smart-standby
* HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
* SDRAM controller, etc. XXX probably belongs outside the main hwmod file
* XXX Should be HWMOD_SETUP_NO_RESET
@@ -459,10 +459,6 @@ struct omap_hwmod_omap4_prcm {
* correctly, or this is being abused to deal with some PM latency
* issues -- but we're currently suffering from a shortage of
* folks who are able to track these issues down properly.
- * HWMOD_FORCE_MSTANDBY: Always keep MIDLEMODE bits cleared so that device
- * is kept in force-standby mode. Failing to do so causes PM problems
- * with musb on OMAP3630 at least. Note that musb has a dedicated register
- * to control MSTANDBY signal when MIDLEMODE is set to force-standby.
*/
#define HWMOD_SWSUP_SIDLE (1 << 0)
#define HWMOD_SWSUP_MSTANDBY (1 << 1)
@@ -475,7 +471,6 @@ struct omap_hwmod_omap4_prcm {
#define HWMOD_16BIT_REG (1 << 8)
#define HWMOD_EXT_OPT_MAIN_CLK (1 << 9)
#define HWMOD_BLOCK_WFI (1 << 10)
-#define HWMOD_FORCE_MSTANDBY (1 << 11)
/*
* omap_hwmod._int_flags definitions
diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 5112d04e7b79..ac7e03ec952f 100644
--- a/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1707,14 +1707,9 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
* Erratum ID: i479 idle_req / idle_ack mechanism potentially
* broken when autoidle is enabled
* workaround is to disable the autoidle bit at module level.
- *
- * Enabling the device in any other MIDLEMODE setting but force-idle
- * causes core_pwrdm not enter idle states at least on OMAP3630.
- * Note that musb has OTG_FORCESTDBY register that controls MSTANDBY
- * signal when MIDLEMODE is set to force-idle.
*/
.flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
- | HWMOD_FORCE_MSTANDBY,
+ | HWMOD_SWSUP_MSTANDBY,
};
/* usb_otg_hs */
diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 9e0576569e07..0e47d2e1687c 100644
--- a/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2714,10 +2714,6 @@ static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = {
{ }
};
-static struct omap_hwmod_opt_clk ocp2scp_usb_phy_opt_clks[] = {
- { .role = "48mhz", .clk = "ocp2scp_usb_phy_phy_48m" },
-};
-
/* ocp2scp_usb_phy */
static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
.name = "ocp2scp_usb_phy",
@@ -2732,8 +2728,6 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
},
},
.dev_attr = ocp2scp_dev_attr,
- .opt_clks = ocp2scp_usb_phy_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(ocp2scp_usb_phy_opt_clks),
};
/*
diff --git a/trunk/arch/arm/mach-omap2/timer.c b/trunk/arch/arm/mach-omap2/timer.c
index f62b509ed08d..2bdd4cf17a8f 100644
--- a/trunk/arch/arm/mach-omap2/timer.c
+++ b/trunk/arch/arm/mach-omap2/timer.c
@@ -547,8 +547,6 @@ static inline void __init realtime_counter_init(void)
clksrc_nr, clksrc_src) \
void __init omap##name##_gptimer_timer_init(void) \
{ \
- if (omap_clk_init) \
- omap_clk_init(); \
omap_dmtimer_init(); \
omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \
omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src); \
@@ -558,8 +556,6 @@ void __init omap##name##_gptimer_timer_init(void) \
clksrc_nr, clksrc_src) \
void __init omap##name##_sync32k_timer_init(void) \
{ \
- if (omap_clk_init) \
- omap_clk_init(); \
omap_dmtimer_init(); \
omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \
/* Enable the use of clocksource="gp_timer" kernel parameter */ \
diff --git a/trunk/arch/arm/mach-pxa/raumfeld.c b/trunk/arch/arm/mach-pxa/raumfeld.c
index 969b0ba7fa70..af41888acbd6 100644
--- a/trunk/arch/arm/mach-pxa/raumfeld.c
+++ b/trunk/arch/arm/mach-pxa/raumfeld.c
@@ -505,7 +505,6 @@ static struct w1_gpio_platform_data w1_gpio_platform_data = {
.pin = GPIO_ONE_WIRE,
.is_open_drain = 0,
.enable_external_pullup = w1_enable_external_pullup,
- .ext_pullup_enable_pin = -EINVAL,
};
struct platform_device raumfeld_w1_gpio_device = {
diff --git a/trunk/arch/arm/mach-s3c24xx/include/mach/irqs.h b/trunk/arch/arm/mach-s3c24xx/include/mach/irqs.h
index 1e73f5fa8659..b7a9f4d469e8 100644
--- a/trunk/arch/arm/mach-s3c24xx/include/mach/irqs.h
+++ b/trunk/arch/arm/mach-s3c24xx/include/mach/irqs.h
@@ -188,8 +188,10 @@
#if defined(CONFIG_CPU_S3C2416)
#define NR_IRQS (IRQ_S3C2416_I2S1 + 1)
+#elif defined(CONFIG_CPU_S3C2443)
+#define NR_IRQS (IRQ_S3C2443_AC97+1)
#else
-#define NR_IRQS (IRQ_S3C2443_AC97 + 1)
+#define NR_IRQS (IRQ_S3C2440_AC97+1)
#endif
/* compatibility define. */
diff --git a/trunk/arch/arm/mach-s3c24xx/irq.c b/trunk/arch/arm/mach-s3c24xx/irq.c
index d8ba9bee4c7e..cb9f5e011e73 100644
--- a/trunk/arch/arm/mach-s3c24xx/irq.c
+++ b/trunk/arch/arm/mach-s3c24xx/irq.c
@@ -500,7 +500,7 @@ struct s3c_irq_intc *s3c24xx_init_intc(struct device_node *np,
base = (void *)0xfd000000;
intc->reg_mask = base + 0xa4;
- intc->reg_pending = base + 0xa8;
+ intc->reg_pending = base + 0x08;
irq_num = 20;
irq_start = S3C2410_IRQ(32);
irq_offset = 4;
diff --git a/trunk/arch/arm/mach-s5pv210/clock.c b/trunk/arch/arm/mach-s5pv210/clock.c
index f051f53e35b7..fcdf52dbcc49 100644
--- a/trunk/arch/arm/mach-s5pv210/clock.c
+++ b/trunk/arch/arm/mach-s5pv210/clock.c
@@ -214,6 +214,11 @@ static struct clk clk_pcmcdclk2 = {
.name = "pcmcdclk",
};
+static struct clk dummy_apb_pclk = {
+ .name = "apb_pclk",
+ .id = -1,
+};
+
static struct clk *clkset_vpllsrc_list[] = {
[0] = &clk_fin_vpll,
[1] = &clk_sclk_hdmi27m,
@@ -300,6 +305,18 @@ static struct clk_ops clk_fout_apll_ops = {
static struct clk init_clocks_off[] = {
{
+ .name = "dma",
+ .devname = "dma-pl330.0",
+ .parent = &clk_hclk_psys.clk,
+ .enable = s5pv210_clk_ip0_ctrl,
+ .ctrlbit = (1 << 3),
+ }, {
+ .name = "dma",
+ .devname = "dma-pl330.1",
+ .parent = &clk_hclk_psys.clk,
+ .enable = s5pv210_clk_ip0_ctrl,
+ .ctrlbit = (1 << 4),
+ }, {
.name = "rot",
.parent = &clk_hclk_dsys.clk,
.enable = s5pv210_clk_ip0_ctrl,
@@ -556,20 +573,6 @@ static struct clk clk_hsmmc3 = {
.ctrlbit = (1<<19),
};
-static struct clk clk_pdma0 = {
- .name = "pdma0",
- .parent = &clk_hclk_psys.clk,
- .enable = s5pv210_clk_ip0_ctrl,
- .ctrlbit = (1 << 3),
-};
-
-static struct clk clk_pdma1 = {
- .name = "pdma1",
- .parent = &clk_hclk_psys.clk,
- .enable = s5pv210_clk_ip0_ctrl,
- .ctrlbit = (1 << 4),
-};
-
static struct clk *clkset_uart_list[] = {
[6] = &clk_mout_mpll.clk,
[7] = &clk_mout_epll.clk,
@@ -1072,8 +1075,6 @@ static struct clk *clk_cdev[] = {
&clk_hsmmc1,
&clk_hsmmc2,
&clk_hsmmc3,
- &clk_pdma0,
- &clk_pdma1,
};
/* Clock initialisation code */
@@ -1332,8 +1333,6 @@ static struct clk_lookup s5pv210_clk_lookup[] = {
CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
CLKDEV_INIT("s5pv210-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
CLKDEV_INIT("s5pv210-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
- CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
- CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
};
void __init s5pv210_register_clocks(void)
@@ -1362,5 +1361,6 @@ void __init s5pv210_register_clocks(void)
for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
s3c_disable_clocks(clk_cdev[ptr], 1);
+ s3c24xx_register_clock(&dummy_apb_pclk);
s3c_pwmclk_init();
}
diff --git a/trunk/arch/arm/mach-s5pv210/mach-goni.c b/trunk/arch/arm/mach-s5pv210/mach-goni.c
index e373de44a8b6..3a38f7b34b94 100644
--- a/trunk/arch/arm/mach-s5pv210/mach-goni.c
+++ b/trunk/arch/arm/mach-s5pv210/mach-goni.c
@@ -845,7 +845,7 @@ static struct fimc_source_info goni_camera_sensors[] = {
.mux_id = 0,
.flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
V4L2_MBUS_VSYNC_ACTIVE_LOW,
- .fimc_bus_type = FIMC_BUS_TYPE_ITU_601,
+ .bus_type = FIMC_BUS_TYPE_ITU_601,
.board_info = &noon010pc30_board_info,
.i2c_bus_num = 0,
.clk_frequency = 16000000UL,
diff --git a/trunk/arch/arm/mach-shmobile/board-marzen.c b/trunk/arch/arm/mach-shmobile/board-marzen.c
index fec49ebc359a..cdcb799e802f 100644
--- a/trunk/arch/arm/mach-shmobile/board-marzen.c
+++ b/trunk/arch/arm/mach-shmobile/board-marzen.c
@@ -32,7 +32,6 @@
#include
#include
#include
-#include
#include
#include
#include
diff --git a/trunk/arch/arm/mach-spear3xx/spear3xx.c b/trunk/arch/arm/mach-spear3xx/spear3xx.c
index d2b3937c4014..f9d754f90c59 100644
--- a/trunk/arch/arm/mach-spear3xx/spear3xx.c
+++ b/trunk/arch/arm/mach-spear3xx/spear3xx.c
@@ -14,7 +14,7 @@
#define pr_fmt(fmt) "SPEAr3xx: " fmt
#include
-#include
+#include
#include
#include
#include
diff --git a/trunk/arch/arm/mach-ux500/board-mop500-sdi.c b/trunk/arch/arm/mach-ux500/board-mop500-sdi.c
index 7f2cb6c5e2c1..051b62c27102 100644
--- a/trunk/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/trunk/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -81,6 +81,7 @@ static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {
#endif
struct mmci_platform_data mop500_sdi0_data = {
+ .ios_handler = mop500_sdi0_ios_handler,
.ocr_mask = MMC_VDD_29_30,
.f_max = 50000000,
.capabilities = MMC_CAP_4_BIT_DATA |
diff --git a/trunk/arch/arm/mach-ux500/board-mop500.c b/trunk/arch/arm/mach-ux500/board-mop500.c
index 87d2d7b38ce9..b03457881c4b 100644
--- a/trunk/arch/arm/mach-ux500/board-mop500.c
+++ b/trunk/arch/arm/mach-ux500/board-mop500.c
@@ -12,7 +12,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -440,15 +439,6 @@ static void mop500_prox_deactivate(struct device *dev)
regulator_put(prox_regulator);
}
-void mop500_snowball_ethernet_clock_enable(void)
-{
- struct clk *clk;
-
- clk = clk_get_sys("fsmc", NULL);
- if (!IS_ERR(clk))
- clk_prepare_enable(clk);
-}
-
static struct cryp_platform_data u8500_cryp1_platform_data = {
.mem_to_engine = {
.dir = STEDMA40_MEM_TO_PERIPH,
@@ -693,8 +683,6 @@ static void __init snowball_init_machine(void)
mop500_audio_init(parent);
mop500_uart_init(parent);
- mop500_snowball_ethernet_clock_enable();
-
/* This board has full regulator constraints */
regulator_has_full_constraints();
}
diff --git a/trunk/arch/arm/mach-ux500/board-mop500.h b/trunk/arch/arm/mach-ux500/board-mop500.h
index d38951be70df..eaa605f5d90d 100644
--- a/trunk/arch/arm/mach-ux500/board-mop500.h
+++ b/trunk/arch/arm/mach-ux500/board-mop500.h
@@ -104,7 +104,6 @@ void __init mop500_pinmaps_init(void);
void __init snowball_pinmaps_init(void);
void __init hrefv60_pinmaps_init(void);
void mop500_audio_init(struct device *parent);
-void mop500_snowball_ethernet_clock_enable(void);
int __init mop500_uib_init(void);
void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,
diff --git a/trunk/arch/arm/mach-ux500/cpu-db8500.c b/trunk/arch/arm/mach-ux500/cpu-db8500.c
index f1a581844372..19235cf7bbe3 100644
--- a/trunk/arch/arm/mach-ux500/cpu-db8500.c
+++ b/trunk/arch/arm/mach-ux500/cpu-db8500.c
@@ -312,10 +312,9 @@ static void __init u8500_init_machine(void)
/* Pinmaps must be in place before devices register */
if (of_machine_is_compatible("st-ericsson,mop500"))
mop500_pinmaps_init();
- else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
+ else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
snowball_pinmaps_init();
- mop500_snowball_ethernet_clock_enable();
- } else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
+ else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
hrefv60_pinmaps_init();
else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
/* TODO: Add pinmaps for ccu9540 board. */
diff --git a/trunk/arch/arm/mm/Kconfig b/trunk/arch/arm/mm/Kconfig
index 4045c4931a30..025d17328730 100644
--- a/trunk/arch/arm/mm/Kconfig
+++ b/trunk/arch/arm/mm/Kconfig
@@ -43,7 +43,7 @@ config CPU_ARM740T
depends on !MMU
select CPU_32v4T
select CPU_ABRT_LV4T
- select CPU_CACHE_V4
+ select CPU_CACHE_V3 # although the core is v4t
select CPU_CP15_MPU
select CPU_PABRT_LEGACY
help
@@ -469,6 +469,9 @@ config CPU_PABRT_V7
bool
# The cache model
+config CPU_CACHE_V3
+ bool
+
config CPU_CACHE_V4
bool
diff --git a/trunk/arch/arm/mm/Makefile b/trunk/arch/arm/mm/Makefile
index 9e51be96f635..4e333fa2756f 100644
--- a/trunk/arch/arm/mm/Makefile
+++ b/trunk/arch/arm/mm/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o
obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o
obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
+obj-$(CONFIG_CPU_CACHE_V3) += cache-v3.o
obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o
obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o
obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o
diff --git a/trunk/arch/arm/mm/cache-feroceon-l2.c b/trunk/arch/arm/mm/cache-feroceon-l2.c
index 48bc3c0a87ce..dd3d59122cc3 100644
--- a/trunk/arch/arm/mm/cache-feroceon-l2.c
+++ b/trunk/arch/arm/mm/cache-feroceon-l2.c
@@ -343,7 +343,6 @@ void __init feroceon_l2_init(int __l2_wt_override)
outer_cache.inv_range = feroceon_l2_inv_range;
outer_cache.clean_range = feroceon_l2_clean_range;
outer_cache.flush_range = feroceon_l2_flush_range;
- outer_cache.inv_all = l2_inv_all;
enable_l2();
diff --git a/trunk/arch/arm/mm/cache-l2x0.c b/trunk/arch/arm/mm/cache-l2x0.c
index c465faca51b0..c2f37390308a 100644
--- a/trunk/arch/arm/mm/cache-l2x0.c
+++ b/trunk/arch/arm/mm/cache-l2x0.c
@@ -299,7 +299,7 @@ static void l2x0_unlock(u32 cache_id)
int lockregs;
int i;
- switch (cache_id & L2X0_CACHE_ID_PART_MASK) {
+ switch (cache_id) {
case L2X0_CACHE_ID_PART_L310:
lockregs = 8;
break;
@@ -333,14 +333,15 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
if (cache_id_part_number_from_dt)
cache_id = cache_id_part_number_from_dt;
else
- cache_id = readl_relaxed(l2x0_base + L2X0_CACHE_ID);
+ cache_id = readl_relaxed(l2x0_base + L2X0_CACHE_ID)
+ & L2X0_CACHE_ID_PART_MASK;
aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
aux &= aux_mask;
aux |= aux_val;
/* Determine the number of ways */
- switch (cache_id & L2X0_CACHE_ID_PART_MASK) {
+ switch (cache_id) {
case L2X0_CACHE_ID_PART_L310:
if (aux & (1 << 16))
ways = 16;
@@ -724,6 +725,7 @@ static const struct l2x0_of_data pl310_data = {
.flush_all = l2x0_flush_all,
.inv_all = l2x0_inv_all,
.disable = l2x0_disable,
+ .set_debug = pl310_set_debug,
},
};
@@ -812,9 +814,10 @@ int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
data->save();
of_init = true;
- memcpy(&outer_cache, &data->outer_cache, sizeof(outer_cache));
l2x0_init(l2x0_base, aux_val, aux_mask);
+ memcpy(&outer_cache, &data->outer_cache, sizeof(outer_cache));
+
return 0;
}
#endif
diff --git a/trunk/arch/arm/mm/cache-v3.S b/trunk/arch/arm/mm/cache-v3.S
new file mode 100644
index 000000000000..8a3fadece8d3
--- /dev/null
+++ b/trunk/arch/arm/mm/cache-v3.S
@@ -0,0 +1,137 @@
+/*
+ * linux/arch/arm/mm/cache-v3.S
+ *
+ * Copyright (C) 1997-2002 Russell king
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include
+#include
+#include
+#include "proc-macros.S"
+
+/*
+ * flush_icache_all()
+ *
+ * Unconditionally clean and invalidate the entire icache.
+ */
+ENTRY(v3_flush_icache_all)
+ mov pc, lr
+ENDPROC(v3_flush_icache_all)
+
+/*
+ * flush_user_cache_all()
+ *
+ * Invalidate all cache entries in a particular address
+ * space.
+ *
+ * - mm - mm_struct describing address space
+ */
+ENTRY(v3_flush_user_cache_all)
+ /* FALLTHROUGH */
+/*
+ * flush_kern_cache_all()
+ *
+ * Clean and invalidate the entire cache.
+ */
+ENTRY(v3_flush_kern_cache_all)
+ /* FALLTHROUGH */
+
+/*
+ * flush_user_cache_range(start, end, flags)
+ *
+ * Invalidate a range of cache entries in the specified
+ * address space.
+ *
+ * - start - start address (may not be aligned)
+ * - end - end address (exclusive, may not be aligned)
+ * - flags - vma_area_struct flags describing address space
+ */
+ENTRY(v3_flush_user_cache_range)
+ mov ip, #0
+ mcreq p15, 0, ip, c7, c0, 0 @ flush ID cache
+ mov pc, lr
+
+/*
+ * coherent_kern_range(start, end)
+ *
+ * Ensure coherency between the Icache and the Dcache in the
+ * region described by start. If you have non-snooping
+ * Harvard caches, you need to implement this function.
+ *
+ * - start - virtual start address
+ * - end - virtual end address
+ */
+ENTRY(v3_coherent_kern_range)
+ /* FALLTHROUGH */
+
+/*
+ * coherent_user_range(start, end)
+ *
+ * Ensure coherency between the Icache and the Dcache in the
+ * region described by start. If you have non-snooping
+ * Harvard caches, you need to implement this function.
+ *
+ * - start - virtual start address
+ * - end - virtual end address
+ */
+ENTRY(v3_coherent_user_range)
+ mov r0, #0
+ mov pc, lr
+
+/*
+ * flush_kern_dcache_area(void *page, size_t size)
+ *
+ * Ensure no D cache aliasing occurs, either with itself or
+ * the I cache
+ *
+ * - addr - kernel address
+ * - size - region size
+ */
+ENTRY(v3_flush_kern_dcache_area)
+ /* FALLTHROUGH */
+
+/*
+ * dma_flush_range(start, end)
+ *
+ * Clean and invalidate the specified virtual address range.
+ *
+ * - start - virtual start address
+ * - end - virtual end address
+ */
+ENTRY(v3_dma_flush_range)
+ mov r0, #0
+ mcr p15, 0, r0, c7, c0, 0 @ flush ID cache
+ mov pc, lr
+
+/*
+ * dma_unmap_area(start, size, dir)
+ * - start - kernel virtual start address
+ * - size - size of region
+ * - dir - DMA direction
+ */
+ENTRY(v3_dma_unmap_area)
+ teq r2, #DMA_TO_DEVICE
+ bne v3_dma_flush_range
+ /* FALLTHROUGH */
+
+/*
+ * dma_map_area(start, size, dir)
+ * - start - kernel virtual start address
+ * - size - size of region
+ * - dir - DMA direction
+ */
+ENTRY(v3_dma_map_area)
+ mov pc, lr
+ENDPROC(v3_dma_unmap_area)
+ENDPROC(v3_dma_map_area)
+
+ .globl v3_flush_kern_cache_louis
+ .equ v3_flush_kern_cache_louis, v3_flush_kern_cache_all
+
+ __INITDATA
+
+ @ define struct cpu_cache_fns (see and proc-macros.S)
+ define_cache_functions v3
diff --git a/trunk/arch/arm/mm/cache-v4.S b/trunk/arch/arm/mm/cache-v4.S
index a7ba68f59f0c..43e5d77be677 100644
--- a/trunk/arch/arm/mm/cache-v4.S
+++ b/trunk/arch/arm/mm/cache-v4.S
@@ -58,7 +58,7 @@ ENTRY(v4_flush_kern_cache_all)
ENTRY(v4_flush_user_cache_range)
#ifdef CONFIG_CPU_CP15
mov ip, #0
- mcr p15, 0, ip, c7, c7, 0 @ flush ID cache
+ mcreq p15, 0, ip, c7, c7, 0 @ flush ID cache
mov pc, lr
#else
/* FALLTHROUGH */
diff --git a/trunk/arch/arm/mm/context.c b/trunk/arch/arm/mm/context.c
index 2ac37372ef52..7a0511191f6b 100644
--- a/trunk/arch/arm/mm/context.c
+++ b/trunk/arch/arm/mm/context.c
@@ -48,7 +48,7 @@ static DEFINE_RAW_SPINLOCK(cpu_asid_lock);
static atomic64_t asid_generation = ATOMIC64_INIT(ASID_FIRST_VERSION);
static DECLARE_BITMAP(asid_map, NUM_USER_ASIDS);
-DEFINE_PER_CPU(atomic64_t, active_asids);
+static DEFINE_PER_CPU(atomic64_t, active_asids);
static DEFINE_PER_CPU(u64, reserved_asids);
static cpumask_t tlb_flush_pending;
@@ -152,9 +152,9 @@ static int is_reserved_asid(u64 asid)
return 0;
}
-static u64 new_context(struct mm_struct *mm, unsigned int cpu)
+static void new_context(struct mm_struct *mm, unsigned int cpu)
{
- u64 asid = atomic64_read(&mm->context.id);
+ u64 asid = mm->context.id;
u64 generation = atomic64_read(&asid_generation);
if (asid != 0 && is_reserved_asid(asid)) {
@@ -181,14 +181,13 @@ static u64 new_context(struct mm_struct *mm, unsigned int cpu)
cpumask_clear(mm_cpumask(mm));
}
- return asid;
+ mm->context.id = asid;
}
void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
{
unsigned long flags;
unsigned int cpu = smp_processor_id();
- u64 asid;
if (unlikely(mm->context.vmalloc_seq != init_mm.context.vmalloc_seq))
__check_vmalloc_seq(mm);
@@ -199,27 +198,20 @@ void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
*/
cpu_set_reserved_ttbr0();
- asid = atomic64_read(&mm->context.id);
- if (!((asid ^ atomic64_read(&asid_generation)) >> ASID_BITS)
- && atomic64_xchg(&per_cpu(active_asids, cpu), asid))
+ if (!((mm->context.id ^ atomic64_read(&asid_generation)) >> ASID_BITS)
+ && atomic64_xchg(&per_cpu(active_asids, cpu), mm->context.id))
goto switch_mm_fastpath;
raw_spin_lock_irqsave(&cpu_asid_lock, flags);
/* Check that our ASID belongs to the current generation. */
- asid = atomic64_read(&mm->context.id);
- if ((asid ^ atomic64_read(&asid_generation)) >> ASID_BITS) {
- asid = new_context(mm, cpu);
- atomic64_set(&mm->context.id, asid);
- }
+ if ((mm->context.id ^ atomic64_read(&asid_generation)) >> ASID_BITS)
+ new_context(mm, cpu);
- if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) {
- local_flush_bp_all();
- local_flush_tlb_all();
- dummy_flush_tlb_a15_erratum();
- }
-
- atomic64_set(&per_cpu(active_asids, cpu), asid);
+ atomic64_set(&per_cpu(active_asids, cpu), mm->context.id);
cpumask_set_cpu(cpu, mm_cpumask(mm));
+
+ if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending))
+ local_flush_tlb_all();
raw_spin_unlock_irqrestore(&cpu_asid_lock, flags);
switch_mm_fastpath:
diff --git a/trunk/arch/arm/mm/dma-mapping.c b/trunk/arch/arm/mm/dma-mapping.c
index e9db6b4bf65a..c7e3759f16d3 100644
--- a/trunk/arch/arm/mm/dma-mapping.c
+++ b/trunk/arch/arm/mm/dma-mapping.c
@@ -342,7 +342,6 @@ static int __init atomic_pool_init(void)
{
struct dma_pool *pool = &atomic_pool;
pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
- gfp_t gfp = GFP_KERNEL | GFP_DMA;
unsigned long nr_pages = pool->size >> PAGE_SHIFT;
unsigned long *bitmap;
struct page *page;
@@ -362,8 +361,8 @@ static int __init atomic_pool_init(void)
ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page,
atomic_pool_init);
else
- ptr = __alloc_remap_buffer(NULL, pool->size, gfp, prot, &page,
- atomic_pool_init);
+ ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot,
+ &page, atomic_pool_init);
if (ptr) {
int i;
diff --git a/trunk/arch/arm/mm/idmap.c b/trunk/arch/arm/mm/idmap.c
index 5ee505c937d1..2dffc010cc41 100644
--- a/trunk/arch/arm/mm/idmap.c
+++ b/trunk/arch/arm/mm/idmap.c
@@ -141,7 +141,6 @@ void setup_mm_for_reboot(void)
{
/* Switch to the identity mapping. */
cpu_switch_mm(idmap_pgd, &init_mm);
- local_flush_bp_all();
#ifdef CONFIG_CPU_HAS_ASID
/*
diff --git a/trunk/arch/arm/mm/mmu.c b/trunk/arch/arm/mm/mmu.c
index a84ff763ac39..e95a996ab78f 100644
--- a/trunk/arch/arm/mm/mmu.c
+++ b/trunk/arch/arm/mm/mmu.c
@@ -34,7 +34,6 @@
#include
#include "mm.h"
-#include "tcm.h"
/*
* empty_zero_page is a special page that is used for
@@ -599,60 +598,39 @@ static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr,
} while (pte++, addr += PAGE_SIZE, addr != end);
}
-static void __init map_init_section(pmd_t *pmd, unsigned long addr,
- unsigned long end, phys_addr_t phys,
- const struct mem_type *type)
-{
-#ifndef CONFIG_ARM_LPAE
- /*
- * In classic MMU format, puds and pmds are folded in to
- * the pgds. pmd_offset gives the PGD entry. PGDs refer to a
- * group of L1 entries making up one logical pointer to
- * an L2 table (2MB), where as PMDs refer to the individual
- * L1 entries (1MB). Hence increment to get the correct
- * offset for odd 1MB sections.
- * (See arch/arm/include/asm/pgtable-2level.h)
- */
- if (addr & SECTION_SIZE)
- pmd++;
-#endif
- do {
- *pmd = __pmd(phys | type->prot_sect);
- phys += SECTION_SIZE;
- } while (pmd++, addr += SECTION_SIZE, addr != end);
-
- flush_pmd_entry(pmd);
-}
-
-static void __init alloc_init_pmd(pud_t *pud, unsigned long addr,
+static void __init alloc_init_section(pud_t *pud, unsigned long addr,
unsigned long end, phys_addr_t phys,
const struct mem_type *type)
{
pmd_t *pmd = pmd_offset(pud, addr);
- unsigned long next;
- do {
- /*
- * With LPAE, we must loop over to map
- * all the pmds for the given range.
- */
- next = pmd_addr_end(addr, end);
+ /*
+ * Try a section mapping - end, addr and phys must all be aligned
+ * to a section boundary. Note that PMDs refer to the individual
+ * L1 entries, whereas PGDs refer to a group of L1 entries making
+ * up one logical pointer to an L2 table.
+ */
+ if (type->prot_sect && ((addr | end | phys) & ~SECTION_MASK) == 0) {
+ pmd_t *p = pmd;
- /*
- * Try a section mapping - addr, next and phys must all be
- * aligned to a section boundary.
- */
- if (type->prot_sect &&
- ((addr | next | phys) & ~SECTION_MASK) == 0) {
- map_init_section(pmd, addr, next, phys, type);
- } else {
- alloc_init_pte(pmd, addr, next,
- __phys_to_pfn(phys), type);
- }
+#ifndef CONFIG_ARM_LPAE
+ if (addr & SECTION_SIZE)
+ pmd++;
+#endif
- phys += next - addr;
+ do {
+ *pmd = __pmd(phys | type->prot_sect);
+ phys += SECTION_SIZE;
+ } while (pmd++, addr += SECTION_SIZE, addr != end);
- } while (pmd++, addr = next, addr != end);
+ flush_pmd_entry(p);
+ } else {
+ /*
+ * No need to loop; pte's aren't interested in the
+ * individual L1 entries.
+ */
+ alloc_init_pte(pmd, addr, end, __phys_to_pfn(phys), type);
+ }
}
static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr,
@@ -663,7 +641,7 @@ static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr,
do {
next = pud_addr_end(addr, end);
- alloc_init_pmd(pud, addr, next, phys, type);
+ alloc_init_section(pud, addr, next, phys, type);
phys += next - addr;
} while (pud++, addr = next, addr != end);
}
@@ -1278,7 +1256,6 @@ void __init paging_init(struct machine_desc *mdesc)
dma_contiguous_remap();
devicemaps_init(mdesc);
kmap_init();
- tcm_init();
top_pmd = pmd_off_k(0xffff0000);
diff --git a/trunk/arch/arm/mm/proc-arm740.S b/trunk/arch/arm/mm/proc-arm740.S
index fde2d2a794cf..dc5de5d53f20 100644
--- a/trunk/arch/arm/mm/proc-arm740.S
+++ b/trunk/arch/arm/mm/proc-arm740.S
@@ -77,27 +77,24 @@ __arm740_setup:
mcr p15, 0, r0, c6, c0 @ set area 0, default
ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
- ldr r3, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB)
- mov r4, #10 @ 11 is the minimum (4KB)
-1: add r4, r4, #1 @ area size *= 2
- movs r3, r3, lsr #1
+ ldr r1, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB)
+ mov r2, #10 @ 11 is the minimum (4KB)
+1: add r2, r2, #1 @ area size *= 2
+ mov r1, r1, lsr #1
bne 1b @ count not zero r-shift
- orr r0, r0, r4, lsl #1 @ the area register value
+ orr r0, r0, r2, lsl #1 @ the area register value
orr r0, r0, #1 @ set enable bit
mcr p15, 0, r0, c6, c1 @ set area 1, RAM
ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
- ldr r3, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB)
- cmp r3, #0
- moveq r0, #0
- beq 2f
- mov r4, #10 @ 11 is the minimum (4KB)
-1: add r4, r4, #1 @ area size *= 2
- movs r3, r3, lsr #1
+ ldr r1, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB)
+ mov r2, #10 @ 11 is the minimum (4KB)
+1: add r2, r2, #1 @ area size *= 2
+ mov r1, r1, lsr #1
bne 1b @ count not zero r-shift
- orr r0, r0, r4, lsl #1 @ the area register value
+ orr r0, r0, r2, lsl #1 @ the area register value
orr r0, r0, #1 @ set enable bit
-2: mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
+ mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
mov r0, #0x06
mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable
@@ -140,14 +137,13 @@ __arm740_proc_info:
.long 0x41807400
.long 0xfffffff0
.long 0
- .long 0
b __arm740_setup
.long cpu_arch_name
.long cpu_elf_name
- .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_26BIT
+ .long HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
.long cpu_arm740_name
.long arm740_processor_functions
.long 0
.long 0
- .long v4_cache_fns @ cache model
+ .long v3_cache_fns @ cache model
.size __arm740_proc_info, . - __arm740_proc_info
diff --git a/trunk/arch/arm/mm/proc-arm920.S b/trunk/arch/arm/mm/proc-arm920.S
index 2556cf1c2da1..2c3b9421ab5e 100644
--- a/trunk/arch/arm/mm/proc-arm920.S
+++ b/trunk/arch/arm/mm/proc-arm920.S
@@ -387,7 +387,7 @@ ENTRY(cpu_arm920_set_pte_ext)
/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
.globl cpu_arm920_suspend_size
.equ cpu_arm920_suspend_size, 4 * 3
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_arm920_do_suspend)
stmfd sp!, {r4 - r6, lr}
mrc p15, 0, r4, c13, c0, 0 @ PID
diff --git a/trunk/arch/arm/mm/proc-arm926.S b/trunk/arch/arm/mm/proc-arm926.S
index 344c8a548cc0..f1803f7e2972 100644
--- a/trunk/arch/arm/mm/proc-arm926.S
+++ b/trunk/arch/arm/mm/proc-arm926.S
@@ -402,7 +402,7 @@ ENTRY(cpu_arm926_set_pte_ext)
/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
.globl cpu_arm926_suspend_size
.equ cpu_arm926_suspend_size, 4 * 3
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_arm926_do_suspend)
stmfd sp!, {r4 - r6, lr}
mrc p15, 0, r4, c13, c0, 0 @ PID
diff --git a/trunk/arch/arm/mm/proc-mohawk.S b/trunk/arch/arm/mm/proc-mohawk.S
index 0b60dd3d742a..82f9cdc751d6 100644
--- a/trunk/arch/arm/mm/proc-mohawk.S
+++ b/trunk/arch/arm/mm/proc-mohawk.S
@@ -350,7 +350,7 @@ ENTRY(cpu_mohawk_set_pte_ext)
.globl cpu_mohawk_suspend_size
.equ cpu_mohawk_suspend_size, 4 * 6
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_mohawk_do_suspend)
stmfd sp!, {r4 - r9, lr}
mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
diff --git a/trunk/arch/arm/mm/proc-sa1100.S b/trunk/arch/arm/mm/proc-sa1100.S
index d92dfd081429..3aa0da11fd84 100644
--- a/trunk/arch/arm/mm/proc-sa1100.S
+++ b/trunk/arch/arm/mm/proc-sa1100.S
@@ -172,7 +172,7 @@ ENTRY(cpu_sa1100_set_pte_ext)
.globl cpu_sa1100_suspend_size
.equ cpu_sa1100_suspend_size, 4 * 3
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_sa1100_do_suspend)
stmfd sp!, {r4 - r6, lr}
mrc p15, 0, r4, c3, c0, 0 @ domain ID
diff --git a/trunk/arch/arm/mm/proc-syms.c b/trunk/arch/arm/mm/proc-syms.c
index 054b491ff764..3e6210b4d6d4 100644
--- a/trunk/arch/arm/mm/proc-syms.c
+++ b/trunk/arch/arm/mm/proc-syms.c
@@ -17,9 +17,7 @@
#ifndef MULTI_CPU
EXPORT_SYMBOL(cpu_dcache_clean_area);
-#ifdef CONFIG_MMU
EXPORT_SYMBOL(cpu_set_pte_ext);
-#endif
#else
EXPORT_SYMBOL(processor);
#endif
diff --git a/trunk/arch/arm/mm/proc-v6.S b/trunk/arch/arm/mm/proc-v6.S
index 5c07ee4fe3eb..bcaaa8de9325 100644
--- a/trunk/arch/arm/mm/proc-v6.S
+++ b/trunk/arch/arm/mm/proc-v6.S
@@ -138,7 +138,7 @@ ENTRY(cpu_v6_set_pte_ext)
/* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */
.globl cpu_v6_suspend_size
.equ cpu_v6_suspend_size, 4 * 6
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_v6_do_suspend)
stmfd sp!, {r4 - r9, lr}
mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID
diff --git a/trunk/arch/arm/mm/proc-v7-3level.S b/trunk/arch/arm/mm/proc-v7-3level.S
index 6ffd78c0f9ab..50bf1dafc9ea 100644
--- a/trunk/arch/arm/mm/proc-v7-3level.S
+++ b/trunk/arch/arm/mm/proc-v7-3level.S
@@ -48,7 +48,7 @@
ENTRY(cpu_v7_switch_mm)
#ifdef CONFIG_MMU
mmid r1, r1 @ get mm->context.id
- asid r3, r1
+ and r3, r1, #0xff
mov r3, r3, lsl #(48 - 32) @ ASID
mcrr p15, 0, r0, r3, c2 @ set TTB 0
isb
diff --git a/trunk/arch/arm/mm/proc-v7.S b/trunk/arch/arm/mm/proc-v7.S
index f584d3f5b37c..3a3c015f8d5c 100644
--- a/trunk/arch/arm/mm/proc-v7.S
+++ b/trunk/arch/arm/mm/proc-v7.S
@@ -420,7 +420,7 @@ __v7_pj4b_proc_info:
__v7_ca7mp_proc_info:
.long 0x410fc070
.long 0xff0ffff0
- __v7_proc __v7_ca7mp_setup
+ __v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV
.size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
/*
@@ -430,24 +430,9 @@ __v7_ca7mp_proc_info:
__v7_ca15mp_proc_info:
.long 0x410fc0f0
.long 0xff0ffff0
- __v7_proc __v7_ca15mp_setup
+ __v7_proc __v7_ca15mp_setup, hwcaps = HWCAP_IDIV
.size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info
- /*
- * Qualcomm Inc. Krait processors.
- */
- .type __krait_proc_info, #object
-__krait_proc_info:
- .long 0x510f0400 @ Required ID value
- .long 0xff0ffc00 @ Mask for ID
- /*
- * Some Krait processors don't indicate support for SDIV and UDIV
- * instructions in the ARM instruction set, even though they actually
- * do support them.
- */
- __v7_proc __v7_setup, hwcaps = HWCAP_IDIV
- .size __krait_proc_info, . - __krait_proc_info
-
/*
* Match any ARMv7 processor core.
*/
diff --git a/trunk/arch/arm/mm/proc-xsc3.S b/trunk/arch/arm/mm/proc-xsc3.S
index e8efd83b6f25..eb93d6487f35 100644
--- a/trunk/arch/arm/mm/proc-xsc3.S
+++ b/trunk/arch/arm/mm/proc-xsc3.S
@@ -413,7 +413,7 @@ ENTRY(cpu_xsc3_set_pte_ext)
.globl cpu_xsc3_suspend_size
.equ cpu_xsc3_suspend_size, 4 * 6
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_xsc3_do_suspend)
stmfd sp!, {r4 - r9, lr}
mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
diff --git a/trunk/arch/arm/mm/proc-xscale.S b/trunk/arch/arm/mm/proc-xscale.S
index e766f889bfd6..25510361aa18 100644
--- a/trunk/arch/arm/mm/proc-xscale.S
+++ b/trunk/arch/arm/mm/proc-xscale.S
@@ -528,7 +528,7 @@ ENTRY(cpu_xscale_set_pte_ext)
.globl cpu_xscale_suspend_size
.equ cpu_xscale_suspend_size, 4 * 6
-#ifdef CONFIG_ARM_CPU_SUSPEND
+#ifdef CONFIG_PM_SLEEP
ENTRY(cpu_xscale_do_suspend)
stmfd sp!, {r4 - r9, lr}
mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
diff --git a/trunk/arch/arm/net/bpf_jit_32.c b/trunk/arch/arm/net/bpf_jit_32.c
index a0bd8a755bdf..6828ef6ce80e 100644
--- a/trunk/arch/arm/net/bpf_jit_32.c
+++ b/trunk/arch/arm/net/bpf_jit_32.c
@@ -576,7 +576,7 @@ static int build_body(struct jit_ctx *ctx)
/* x = ((*(frame + k)) & 0xf) << 2; */
ctx->seen |= SEEN_X | SEEN_DATA | SEEN_CALL;
/* the interpreter should deal with the negative K */
- if ((int)k < 0)
+ if (k < 0)
return -1;
/* offset in r1: we might have to take the slow path */
emit_mov_i(r_off, k, ctx);
diff --git a/trunk/arch/arm/plat-orion/addr-map.c b/trunk/arch/arm/plat-orion/addr-map.c
index 807ac8e5cbc0..febe3862873c 100644
--- a/trunk/arch/arm/plat-orion/addr-map.c
+++ b/trunk/arch/arm/plat-orion/addr-map.c
@@ -157,12 +157,9 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i));
/*
- * We only take care of entries for which the chip
- * select is enabled, and that don't have high base
- * address bits set (devices can only access the first
- * 32 bits of the memory).
+ * Chip select enabled?
*/
- if ((size & 1) && !(base & 0xF)) {
+ if (size & 1) {
struct mbus_dram_window *w;
w = &orion_mbus_dram_info.cs[cs++];
diff --git a/trunk/arch/arm/plat-spear/Kconfig b/trunk/arch/arm/plat-spear/Kconfig
index 8a08c31b5e20..739d016eb273 100644
--- a/trunk/arch/arm/plat-spear/Kconfig
+++ b/trunk/arch/arm/plat-spear/Kconfig
@@ -10,7 +10,7 @@ choice
config ARCH_SPEAR13XX
bool "ST SPEAr13xx with Device Tree"
- select ARCH_HAS_CPUFREQ
+ select ARCH_HAVE_CPUFREQ
select ARM_GIC
select CPU_V7
select GPIO_SPEAR_SPICS
diff --git a/trunk/arch/arm64/Kconfig b/trunk/arch/arm64/Kconfig
index 9b6d19f74078..fd70a68387eb 100644
--- a/trunk/arch/arm64/Kconfig
+++ b/trunk/arch/arm64/Kconfig
@@ -9,6 +9,7 @@ config ARM64
select CLONE_BACKWARDS
select COMMON_CLK
select GENERIC_CLOCKEVENTS
+ select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IOMAP
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
diff --git a/trunk/arch/arm64/Kconfig.debug b/trunk/arch/arm64/Kconfig.debug
index 1a6bfe954d49..51493430f142 100644
--- a/trunk/arch/arm64/Kconfig.debug
+++ b/trunk/arch/arm64/Kconfig.debug
@@ -6,6 +6,17 @@ config FRAME_POINTER
bool
default y
+config DEBUG_ERRORS
+ bool "Verbose kernel error messages"
+ depends on DEBUG_KERNEL
+ help
+ This option controls verbose debugging information which can be
+ printed when the kernel detects an internal error. This debugging
+ information is useful to kernel hackers when tracking down problems,
+ but mostly meaningless to other people. It's safe to say Y unless
+ you are concerned with the code size or don't want to see these
+ messages.
+
config DEBUG_STACK_USAGE
bool "Enable stack utilization instrumentation"
depends on DEBUG_KERNEL
diff --git a/trunk/arch/arm64/configs/defconfig b/trunk/arch/arm64/configs/defconfig
index 09bef29f3a09..9212c7880da7 100644
--- a/trunk/arch/arm64/configs/defconfig
+++ b/trunk/arch/arm64/configs/defconfig
@@ -82,3 +82,4 @@ CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_INFO=y
# CONFIG_FTRACE is not set
CONFIG_ATOMIC64_SELFTEST=y
+CONFIG_DEBUG_ERRORS=y
diff --git a/trunk/arch/arm64/include/asm/ucontext.h b/trunk/arch/arm64/include/asm/ucontext.h
index 42e04c877428..bde960720892 100644
--- a/trunk/arch/arm64/include/asm/ucontext.h
+++ b/trunk/arch/arm64/include/asm/ucontext.h
@@ -22,7 +22,7 @@ struct ucontext {
stack_t uc_stack;
sigset_t uc_sigmask;
/* glibc uses a 1024-bit sigset_t */
- __u8 __unused[1024 / 8 - sizeof(sigset_t)];
+ __u8 __unused[(1024 - sizeof(sigset_t)) / 8];
/* last for future expansion */
struct sigcontext uc_mcontext;
};
diff --git a/trunk/arch/arm64/kernel/arm64ksyms.c b/trunk/arch/arm64/kernel/arm64ksyms.c
index aa3e948f7885..cef3925eaf60 100644
--- a/trunk/arch/arm64/kernel/arm64ksyms.c
+++ b/trunk/arch/arm64/kernel/arm64ksyms.c
@@ -40,9 +40,7 @@ EXPORT_SYMBOL(__copy_to_user);
EXPORT_SYMBOL(__clear_user);
/* bitops */
-#ifdef CONFIG_SMP
EXPORT_SYMBOL(__atomic_hash);
-#endif
/* physical memory */
EXPORT_SYMBOL(memstart_addr);
diff --git a/trunk/arch/arm64/kernel/signal32.c b/trunk/arch/arm64/kernel/signal32.c
index e393174fe859..7f4f3673f2bc 100644
--- a/trunk/arch/arm64/kernel/signal32.c
+++ b/trunk/arch/arm64/kernel/signal32.c
@@ -549,6 +549,7 @@ int compat_setup_rt_frame(int usig, struct k_sigaction *ka, siginfo_t *info,
sigset_t *set, struct pt_regs *regs)
{
struct compat_rt_sigframe __user *frame;
+ compat_stack_t stack;
int err = 0;
frame = compat_get_sigframe(ka, regs, sizeof(*frame));
diff --git a/trunk/arch/arm64/mm/mmu.c b/trunk/arch/arm64/mm/mmu.c
index 70b8cd4021c4..224b44ab534e 100644
--- a/trunk/arch/arm64/mm/mmu.c
+++ b/trunk/arch/arm64/mm/mmu.c
@@ -261,7 +261,7 @@ static void __init create_mapping(phys_addr_t phys, unsigned long virt,
void __iomem * __init early_io_map(phys_addr_t phys, unsigned long virt)
{
unsigned long size, mask;
- bool page64k = IS_ENABLED(CONFIG_ARM64_64K_PAGES);
+ bool page64k = IS_ENABLED(ARM64_64K_PAGES);
pgd_t *pgd;
pud_t *pud;
pmd_t *pmd;
diff --git a/trunk/arch/avr32/Kconfig b/trunk/arch/avr32/Kconfig
index c1a868d398bd..9b89257b2cfd 100644
--- a/trunk/arch/avr32/Kconfig
+++ b/trunk/arch/avr32/Kconfig
@@ -7,7 +7,7 @@ config AVR32
select HAVE_OPROFILE
select HAVE_KPROBES
select HAVE_GENERIC_HARDIRQS
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select GENERIC_IRQ_PROBE
select GENERIC_ATOMIC64
select HARDIRQS_SW_RESEND
diff --git a/trunk/arch/avr32/include/asm/io.h b/trunk/arch/avr32/include/asm/io.h
index fc6483f83ccc..cf60d0a9f176 100644
--- a/trunk/arch/avr32/include/asm/io.h
+++ b/trunk/arch/avr32/include/asm/io.h
@@ -165,10 +165,6 @@ BUILDIO_IOPORT(l, u32)
#define readw_be __raw_readw
#define readl_be __raw_readl
-#define writeb_relaxed writeb
-#define writew_relaxed writew
-#define writel_relaxed writel
-
#define writeb_be __raw_writeb
#define writew_be __raw_writew
#define writel_be __raw_writel
diff --git a/trunk/arch/blackfin/Kconfig b/trunk/arch/blackfin/Kconfig
index c3f2e0bc644a..600494c70e96 100644
--- a/trunk/arch/blackfin/Kconfig
+++ b/trunk/arch/blackfin/Kconfig
@@ -33,7 +33,7 @@ config BLACKFIN
select ARCH_HAVE_CUSTOM_GPIO_H
select ARCH_WANT_OPTIONAL_GPIOLIB
select HAVE_UID16
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select ARCH_WANT_IPC_PARSE_VERSION
select HAVE_GENERIC_HARDIRQS
select GENERIC_ATOMIC64
diff --git a/trunk/arch/c6x/include/asm/irqflags.h b/trunk/arch/c6x/include/asm/irqflags.h
index 2c71d5634ec2..cf78e09e18c3 100644
--- a/trunk/arch/c6x/include/asm/irqflags.h
+++ b/trunk/arch/c6x/include/asm/irqflags.h
@@ -27,7 +27,7 @@ static inline unsigned long arch_local_save_flags(void)
/* set interrupt enabled status */
static inline void arch_local_irq_restore(unsigned long flags)
{
- asm volatile (" mvc .s2 %0,CSR\n" : : "b"(flags) : "memory");
+ asm volatile (" mvc .s2 %0,CSR\n" : : "b"(flags));
}
/* unconditionally enable interrupts */
diff --git a/trunk/arch/cris/Kconfig b/trunk/arch/cris/Kconfig
index 06dd026533e3..bb0ac66cf533 100644
--- a/trunk/arch/cris/Kconfig
+++ b/trunk/arch/cris/Kconfig
@@ -43,7 +43,7 @@ config CRIS
select GENERIC_ATOMIC64
select HAVE_GENERIC_HARDIRQS
select HAVE_UID16
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select ARCH_WANT_IPC_PARSE_VERSION
select GENERIC_IRQ_SHOW
select GENERIC_IOMAP
diff --git a/trunk/arch/frv/Kconfig b/trunk/arch/frv/Kconfig
index 2ce731f9aa4d..12369b194c7b 100644
--- a/trunk/arch/frv/Kconfig
+++ b/trunk/arch/frv/Kconfig
@@ -6,7 +6,7 @@ config FRV
select HAVE_PERF_EVENTS
select HAVE_UID16
select HAVE_GENERIC_HARDIRQS
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select GENERIC_IRQ_SHOW
select HAVE_DEBUG_BUGVERBOSE
select ARCH_HAVE_NMI_SAFE_CMPXCHG
diff --git a/trunk/arch/h8300/Kconfig b/trunk/arch/h8300/Kconfig
index 79250de1b12a..ae8551eb3736 100644
--- a/trunk/arch/h8300/Kconfig
+++ b/trunk/arch/h8300/Kconfig
@@ -5,7 +5,7 @@ config H8300
select HAVE_GENERIC_HARDIRQS
select GENERIC_ATOMIC64
select HAVE_UID16
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select ARCH_WANT_IPC_PARSE_VERSION
select GENERIC_IRQ_SHOW
select GENERIC_CPU_DEVICES
diff --git a/trunk/arch/ia64/Kconfig b/trunk/arch/ia64/Kconfig
index 9a02f71c6b1f..33f3fdc0b214 100644
--- a/trunk/arch/ia64/Kconfig
+++ b/trunk/arch/ia64/Kconfig
@@ -26,7 +26,7 @@ config IA64
select HAVE_MEMBLOCK
select HAVE_MEMBLOCK_NODE_MAP
select HAVE_VIRT_CPU_ACCOUNTING
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select ARCH_DISCARD_MEMBLOCK
select GENERIC_IRQ_PROBE
select GENERIC_PENDING_IRQ if SMP
diff --git a/trunk/arch/ia64/kernel/palinfo.c b/trunk/arch/ia64/kernel/palinfo.c
index 79521d5499f9..77597e5ea60a 100644
--- a/trunk/arch/ia64/kernel/palinfo.c
+++ b/trunk/arch/ia64/kernel/palinfo.c
@@ -849,6 +849,17 @@ static palinfo_entry_t palinfo_entries[]={
#define NR_PALINFO_ENTRIES (int) ARRAY_SIZE(palinfo_entries)
+/*
+ * this array is used to keep track of the proc entries we create. This is
+ * required in the module mode when we need to remove all entries. The procfs code
+ * does not do recursion of deletion
+ *
+ * Notes:
+ * - +1 accounts for the cpuN directory entry in /proc/pal
+ */
+#define NR_PALINFO_PROC_ENTRIES (NR_CPUS*(NR_PALINFO_ENTRIES+1))
+
+static struct proc_dir_entry *palinfo_proc_entries[NR_PALINFO_PROC_ENTRIES];
static struct proc_dir_entry *palinfo_dir;
/*
@@ -960,32 +971,60 @@ palinfo_read_entry(char *page, char **start, off_t off, int count, int *eof, voi
static void __cpuinit
create_palinfo_proc_entries(unsigned int cpu)
{
+# define CPUSTR "cpu%d"
+
pal_func_cpu_u_t f;
+ struct proc_dir_entry **pdir;
struct proc_dir_entry *cpu_dir;
int j;
- char cpustr[3+4+1]; /* cpu numbers are up to 4095 on itanic */
- sprintf(cpustr, "cpu%d", cpu);
+ char cpustr[sizeof(CPUSTR)];
+
+
+ /*
+ * we keep track of created entries in a depth-first order for
+ * cleanup purposes. Each entry is stored into palinfo_proc_entries
+ */
+ sprintf(cpustr,CPUSTR, cpu);
cpu_dir = proc_mkdir(cpustr, palinfo_dir);
- if (!cpu_dir)
- return;
f.req_cpu = cpu;
+ /*
+ * Compute the location to store per cpu entries
+ * We dont store the top level entry in this list, but
+ * remove it finally after removing all cpu entries.
+ */
+ pdir = &palinfo_proc_entries[cpu*(NR_PALINFO_ENTRIES+1)];
+ *pdir++ = cpu_dir;
for (j=0; j < NR_PALINFO_ENTRIES; j++) {
f.func_id = j;
- create_proc_read_entry(
- palinfo_entries[j].name, 0, cpu_dir,
- palinfo_read_entry, (void *)f.value);
+ *pdir = create_proc_read_entry(
+ palinfo_entries[j].name, 0, cpu_dir,
+ palinfo_read_entry, (void *)f.value);
+ pdir++;
}
}
static void
remove_palinfo_proc_entries(unsigned int hcpu)
{
- char cpustr[3+4+1]; /* cpu numbers are up to 4095 on itanic */
- sprintf(cpustr, "cpu%d", hcpu);
- remove_proc_subtree(cpustr, palinfo_dir);
+ int j;
+ struct proc_dir_entry *cpu_dir, **pdir;
+
+ pdir = &palinfo_proc_entries[hcpu*(NR_PALINFO_ENTRIES+1)];
+ cpu_dir = *pdir;
+ *pdir++=NULL;
+ for (j=0; j < (NR_PALINFO_ENTRIES); j++) {
+ if ((*pdir)) {
+ remove_proc_entry ((*pdir)->name, cpu_dir);
+ *pdir ++= NULL;
+ }
+ }
+
+ if (cpu_dir) {
+ remove_proc_entry(cpu_dir->name, palinfo_dir);
+ }
}
static int __cpuinit palinfo_cpu_callback(struct notifier_block *nfb,
@@ -1019,8 +1058,6 @@ palinfo_init(void)
printk(KERN_INFO "PAL Information Facility v%s\n", PALINFO_VERSION);
palinfo_dir = proc_mkdir("pal", NULL);
- if (!palinfo_dir)
- return -ENOMEM;
/* Create palinfo dirs in /proc for all online cpus */
for_each_online_cpu(i) {
@@ -1036,8 +1073,22 @@ palinfo_init(void)
static void __exit
palinfo_exit(void)
{
+ int i = 0;
+
+ /* remove all nodes: depth first pass. Could optimize this */
+ for_each_online_cpu(i) {
+ remove_palinfo_proc_entries(i);
+ }
+
+ /*
+ * Remove the top level entry finally
+ */
+ remove_proc_entry(palinfo_dir->name, NULL);
+
+ /*
+ * Unregister from cpu notifier callbacks
+ */
unregister_hotcpu_notifier(&palinfo_cpu_notifier);
- remove_proc_subtree("pal", NULL);
}
module_init(palinfo_init);
diff --git a/trunk/arch/ia64/kernel/perfmon.c b/trunk/arch/ia64/kernel/perfmon.c
index 2eda28414abb..433f5e8a2cd1 100644
--- a/trunk/arch/ia64/kernel/perfmon.c
+++ b/trunk/arch/ia64/kernel/perfmon.c
@@ -619,7 +619,6 @@ static struct file_system_type pfm_fs_type = {
.mount = pfmfs_mount,
.kill_sb = kill_anon_super,
};
-MODULE_ALIAS_FS("pfmfs");
DEFINE_PER_CPU(unsigned long, pfm_syst_info);
DEFINE_PER_CPU(struct task_struct *, pmu_owner);
diff --git a/trunk/arch/ia64/kernel/process.c b/trunk/arch/ia64/kernel/process.c
index 6f7dc8b7b35c..e34f565f595a 100644
--- a/trunk/arch/ia64/kernel/process.c
+++ b/trunk/arch/ia64/kernel/process.c
@@ -291,6 +291,7 @@ cpu_idle (void)
}
if (!need_resched()) {
+ void (*idle)(void);
#ifdef CONFIG_SMP
min_xtp();
#endif
@@ -298,7 +299,9 @@ cpu_idle (void)
if (mark_idle)
(*mark_idle)(1);
- default_idle();
+ if (!idle)
+ idle = default_idle;
+ (*idle)();
if (mark_idle)
(*mark_idle)(0);
#ifdef CONFIG_SMP
diff --git a/trunk/arch/m32r/Kconfig b/trunk/arch/m32r/Kconfig
index bcd17b206571..92623818a1fe 100644
--- a/trunk/arch/m32r/Kconfig
+++ b/trunk/arch/m32r/Kconfig
@@ -10,7 +10,7 @@ config M32R
select ARCH_WANT_IPC_PARSE_VERSION
select HAVE_DEBUG_BUGVERBOSE
select HAVE_GENERIC_HARDIRQS
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
select GENERIC_ATOMIC64
diff --git a/trunk/arch/m32r/include/uapi/asm/stat.h b/trunk/arch/m32r/include/uapi/asm/stat.h
index 98470fe483b6..da4518f82d6d 100644
--- a/trunk/arch/m32r/include/uapi/asm/stat.h
+++ b/trunk/arch/m32r/include/uapi/asm/stat.h
@@ -63,10 +63,10 @@ struct stat64 {
long long st_size;
unsigned long st_blksize;
-#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN)
+#if defined(__BIG_ENDIAN)
unsigned long __pad4; /* future possible st_blocks high bits */
unsigned long st_blocks; /* Number 512-byte blocks allocated. */
-#elif defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN)
+#elif defined(__LITTLE_ENDIAN)
unsigned long st_blocks; /* Number 512-byte blocks allocated. */
unsigned long __pad4; /* future possible st_blocks high bits */
#else
diff --git a/trunk/arch/m68k/Kconfig b/trunk/arch/m68k/Kconfig
index 6de813370b8c..0e708c78e01c 100644
--- a/trunk/arch/m68k/Kconfig
+++ b/trunk/arch/m68k/Kconfig
@@ -8,7 +8,7 @@ config M68K
select GENERIC_IRQ_SHOW
select GENERIC_ATOMIC64
select HAVE_UID16
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
select GENERIC_CPU_DEVICES
select GENERIC_STRNCPY_FROM_USER if MMU
diff --git a/trunk/arch/m68k/Kconfig.machine b/trunk/arch/m68k/Kconfig.machine
index 7240584d3439..7cdf6b010381 100644
--- a/trunk/arch/m68k/Kconfig.machine
+++ b/trunk/arch/m68k/Kconfig.machine
@@ -310,6 +310,7 @@ config COBRA5282
config SOM5282EM
bool "EMAC.Inc SOM5282EM board support"
depends on M528x
+ select EMAC_INC
help
Support for the EMAC.Inc SOM5282EM module.
diff --git a/trunk/arch/m68k/include/asm/MC68328.h b/trunk/arch/m68k/include/asm/MC68328.h
index 4ebf098b8a1f..a337e56d09bf 100644
--- a/trunk/arch/m68k/include/asm/MC68328.h
+++ b/trunk/arch/m68k/include/asm/MC68328.h
@@ -293,7 +293,7 @@
/*
* Here go the bitmasks themselves
*/
-#define IMR_MSPIM (1 << SPIM_IRQ_NUM) /* Mask SPI Master interrupt */
+#define IMR_MSPIM (1 << SPIM _IRQ_NUM) /* Mask SPI Master interrupt */
#define IMR_MTMR2 (1 << TMR2_IRQ_NUM) /* Mask Timer 2 interrupt */
#define IMR_MUART (1 << UART_IRQ_NUM) /* Mask UART interrupt */
#define IMR_MWDT (1 << WDT_IRQ_NUM) /* Mask Watchdog Timer interrupt */
@@ -327,7 +327,7 @@
#define IWR_ADDR 0xfffff308
#define IWR LONG_REF(IWR_ADDR)
-#define IWR_SPIM (1 << SPIM_IRQ_NUM) /* SPI Master interrupt */
+#define IWR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */
#define IWR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */
#define IWR_UART (1 << UART_IRQ_NUM) /* UART interrupt */
#define IWR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */
@@ -357,7 +357,7 @@
#define ISR_ADDR 0xfffff30c
#define ISR LONG_REF(ISR_ADDR)
-#define ISR_SPIM (1 << SPIM_IRQ_NUM) /* SPI Master interrupt */
+#define ISR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */
#define ISR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */
#define ISR_UART (1 << UART_IRQ_NUM) /* UART interrupt */
#define ISR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */
@@ -391,7 +391,7 @@
#define IPR_ADDR 0xfffff310
#define IPR LONG_REF(IPR_ADDR)
-#define IPR_SPIM (1 << SPIM_IRQ_NUM) /* SPI Master interrupt */
+#define IPR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */
#define IPR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */
#define IPR_UART (1 << UART_IRQ_NUM) /* UART interrupt */
#define IPR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */
@@ -757,7 +757,7 @@
/* 'EZ328-compatible definitions */
#define TCN_ADDR TCN1_ADDR
-#define TCN TCN1
+#define TCN TCN
/*
* Timer Unit 1 and 2 Status Registers
diff --git a/trunk/arch/m68k/include/asm/gpio.h b/trunk/arch/m68k/include/asm/gpio.h
index 8cc83431805b..4395ffc51fdb 100644
--- a/trunk/arch/m68k/include/asm/gpio.h
+++ b/trunk/arch/m68k/include/asm/gpio.h
@@ -86,24 +86,4 @@ static inline int gpio_cansleep(unsigned gpio)
return gpio < MCFGPIO_PIN_MAX ? 0 : __gpio_cansleep(gpio);
}
-static inline int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
-{
- int err;
-
- err = gpio_request(gpio, label);
- if (err)
- return err;
-
- if (flags & GPIOF_DIR_IN)
- err = gpio_direction_input(gpio);
- else
- err = gpio_direction_output(gpio,
- (flags & GPIOF_INIT_HIGH) ? 1 : 0);
-
- if (err)
- gpio_free(gpio);
-
- return err;
-}
-
#endif
diff --git a/trunk/arch/m68k/kernel/setup_no.c b/trunk/arch/m68k/kernel/setup_no.c
index 911ba472e6c4..71fb29938dba 100644
--- a/trunk/arch/m68k/kernel/setup_no.c
+++ b/trunk/arch/m68k/kernel/setup_no.c
@@ -57,9 +57,6 @@ void (*mach_reset)(void);
void (*mach_halt)(void);
void (*mach_power_off)(void);
-#ifdef CONFIG_M68000
-#define CPU_NAME "MC68000"
-#endif
#ifdef CONFIG_M68328
#define CPU_NAME "MC68328"
#endif
diff --git a/trunk/arch/m68k/mm/init.c b/trunk/arch/m68k/mm/init.c
index 519aad8fa812..afd8106fd83b 100644
--- a/trunk/arch/m68k/mm/init.c
+++ b/trunk/arch/m68k/mm/init.c
@@ -188,7 +188,7 @@ void __init mem_init(void)
}
}
-#if defined(CONFIG_MMU) && !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
/* insert pointer tables allocated so far into the tablelist */
init_pointer_table((unsigned long)kernel_pg_dir);
for (i = 0; i < PTRS_PER_PGD; i++) {
diff --git a/trunk/arch/m68k/platform/coldfire/m528x.c b/trunk/arch/m68k/platform/coldfire/m528x.c
index b03a9d271837..83b7dad7a84e 100644
--- a/trunk/arch/m68k/platform/coldfire/m528x.c
+++ b/trunk/arch/m68k/platform/coldfire/m528x.c
@@ -69,7 +69,7 @@ static void __init m528x_uarts_init(void)
u8 port;
/* make sure PUAPAR is set for UART0 and UART1 */
- port = readb(MCFGPIO_PUAPAR);
+ port = readb(MCF5282_GPIO_PUAPAR);
port |= 0x03 | (0x03 << 2);
writeb(port, MCFGPIO_PUAPAR);
}
diff --git a/trunk/arch/metag/include/asm/elf.h b/trunk/arch/metag/include/asm/elf.h
index d2baf6961794..d63b9d0e57dd 100644
--- a/trunk/arch/metag/include/asm/elf.h
+++ b/trunk/arch/metag/include/asm/elf.h
@@ -100,6 +100,9 @@ typedef unsigned long elf_fpregset_t;
#define ELF_PLATFORM (NULL)
+#define SET_PERSONALITY(ex) \
+ set_personality(PER_LINUX | (current->personality & (~PER_MASK)))
+
#define STACK_RND_MASK (0)
#ifdef CONFIG_METAG_USER_TCM
diff --git a/trunk/arch/metag/mm/Kconfig b/trunk/arch/metag/mm/Kconfig
index ccf2576786ee..cd7f2f2ad416 100644
--- a/trunk/arch/metag/mm/Kconfig
+++ b/trunk/arch/metag/mm/Kconfig
@@ -40,7 +40,6 @@ endchoice
config NUMA
bool "Non Uniform Memory Access (NUMA) Support"
- select ARCH_WANT_NUMA_VARIABLE_LOCALITY
help
Some Meta systems have MMU-mappable on-chip memories with
lower latencies than main memory. This enables support for
@@ -93,6 +92,11 @@ config ARCH_SPARSEMEM_ENABLE
config ARCH_SPARSEMEM_DEFAULT
def_bool y
+config MAX_ACTIVE_REGIONS
+ int
+ default "2" if SPARSEMEM
+ default "1"
+
config ARCH_POPULATES_NODE_MAP
def_bool y
diff --git a/trunk/arch/microblaze/Kconfig b/trunk/arch/microblaze/Kconfig
index 1323fa2530eb..7843d11156e6 100644
--- a/trunk/arch/microblaze/Kconfig
+++ b/trunk/arch/microblaze/Kconfig
@@ -19,7 +19,7 @@ config MICROBLAZE
select HAVE_DEBUG_KMEMLEAK
select IRQ_DOMAIN
select HAVE_GENERIC_HARDIRQS
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
select GENERIC_PCI_IOMAP
diff --git a/trunk/arch/mips/Kconfig b/trunk/arch/mips/Kconfig
index 51244bf97271..ae9c716c46bb 100644
--- a/trunk/arch/mips/Kconfig
+++ b/trunk/arch/mips/Kconfig
@@ -18,7 +18,7 @@ config MIPS
select HAVE_KRETPROBES
select HAVE_DEBUG_KMEMLEAK
select ARCH_BINFMT_ELF_RANDOMIZE_PIE
- select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
+ select HAVE_ARCH_TRANSPARENT_HUGEPAGE
select RTC_LIB if !MACH_LOONGSON
select GENERIC_ATOMIC64 if !64BIT
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
@@ -38,7 +38,7 @@ config MIPS
select GENERIC_CLOCKEVENTS
select GENERIC_CMOS_UPDATE
select HAVE_MOD_ARCH_SPECIFIC
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select MODULES_USE_ELF_REL if MODULES
select MODULES_USE_ELF_RELA if MODULES && 64BIT
select CLONE_BACKWARDS
@@ -657,7 +657,7 @@ config SNI_RM
bool "SNI RM200/300/400"
select FW_ARC if CPU_LITTLE_ENDIAN
select FW_ARC32 if CPU_LITTLE_ENDIAN
- select FW_SNIPROM if CPU_BIG_ENDIAN
+ select SNIPROM if CPU_BIG_ENDIAN
select ARCH_MAY_HAVE_PC_FDC
select BOOT_ELF32
select CEVT_R4K
@@ -1144,7 +1144,7 @@ config DEFAULT_SGI_PARTITION
config FW_ARC32
bool
-config FW_SNIPROM
+config SNIPROM
bool
config BOOT_ELF32
@@ -1493,6 +1493,7 @@ config CPU_XLP
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
+ select CPU_HAS_LLSC
select WEAK_ORDERING
select WEAK_REORDERING_BEYOND_LLSC
select CPU_HAS_PREFETCH
diff --git a/trunk/arch/mips/bcm63xx/boards/board_bcm963xx.c b/trunk/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 9aa7d44898ed..ed1949c29508 100644
--- a/trunk/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/trunk/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -745,7 +745,10 @@ void __init board_prom_init(void)
strcpy(cfe_version, "unknown");
printk(KERN_INFO PFX "CFE version: %s\n", cfe_version);
- bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET);
+ if (bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET)) {
+ printk(KERN_ERR PFX "invalid nvram checksum\n");
+ return;
+ }
board_name = bcm63xx_nvram_get_name();
/* find board by name */
diff --git a/trunk/arch/mips/bcm63xx/nvram.c b/trunk/arch/mips/bcm63xx/nvram.c
index a4b8864f9307..620611680839 100644
--- a/trunk/arch/mips/bcm63xx/nvram.c
+++ b/trunk/arch/mips/bcm63xx/nvram.c
@@ -38,7 +38,7 @@ struct bcm963xx_nvram {
static struct bcm963xx_nvram nvram;
static int mac_addr_used;
-void __init bcm63xx_nvram_init(void *addr)
+int __init bcm63xx_nvram_init(void *addr)
{
unsigned int check_len;
u32 crc, expected_crc;
@@ -60,8 +60,9 @@ void __init bcm63xx_nvram_init(void *addr)
crc = crc32_le(~0, (u8 *)&nvram, check_len);
if (crc != expected_crc)
- pr_warn("nvram checksum failed, contents may be invalid (expected %08x, got %08x)\n",
- expected_crc, crc);
+ return -EINVAL;
+
+ return 0;
}
u8 *bcm63xx_nvram_get_name(void)
diff --git a/trunk/arch/mips/bcm63xx/setup.c b/trunk/arch/mips/bcm63xx/setup.c
index 35e18e98beb9..314231be788c 100644
--- a/trunk/arch/mips/bcm63xx/setup.c
+++ b/trunk/arch/mips/bcm63xx/setup.c
@@ -157,4 +157,4 @@ int __init bcm63xx_register_devices(void)
return board_register_devices();
}
-arch_initcall(bcm63xx_register_devices);
+device_initcall(bcm63xx_register_devices);
diff --git a/trunk/arch/mips/cavium-octeon/setup.c b/trunk/arch/mips/cavium-octeon/setup.c
index b0baa299f899..c594a3d4f743 100644
--- a/trunk/arch/mips/cavium-octeon/setup.c
+++ b/trunk/arch/mips/cavium-octeon/setup.c
@@ -174,10 +174,7 @@ static int octeon_kexec_prepare(struct kimage *image)
static void octeon_generic_shutdown(void)
{
- int i;
-#ifdef CONFIG_SMP
- int cpu;
-#endif
+ int cpu, i;
struct cvmx_bootmem_desc *bootmem_desc;
void *named_block_array_ptr;
diff --git a/trunk/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h b/trunk/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h
index 4e0b6bc1165e..62d6a3b4d3b7 100644
--- a/trunk/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h
+++ b/trunk/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h
@@ -9,8 +9,10 @@
*
* Initialized the local nvram copy from the target address and checks
* its checksum.
+ *
+ * Returns 0 on success.
*/
-void bcm63xx_nvram_init(void *nvram);
+int __init bcm63xx_nvram_init(void *nvram);
/**
* bcm63xx_nvram_get_name() - returns the board name according to nvram
diff --git a/trunk/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h
index 193c0912d38e..d9c828419037 100644
--- a/trunk/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h
+++ b/trunk/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h
@@ -28,7 +28,11 @@
/* #define cpu_has_prefetch ? */
#define cpu_has_mcheck 1
/* #define cpu_has_ejtag ? */
+#ifdef CONFIG_CPU_HAS_LLSC
#define cpu_has_llsc 1
+#else
+#define cpu_has_llsc 0
+#endif
/* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */
diff --git a/trunk/arch/mips/include/asm/mipsregs.h b/trunk/arch/mips/include/asm/mipsregs.h
index 0da44d422f5b..12b70c25906a 100644
--- a/trunk/arch/mips/include/asm/mipsregs.h
+++ b/trunk/arch/mips/include/asm/mipsregs.h
@@ -1166,10 +1166,7 @@ do { \
unsigned int __dspctl; \
\
__asm__ __volatile__( \
- " .set push \n" \
- " .set dsp \n" \
" rddsp %0, %x1 \n" \
- " .set pop \n" \
: "=r" (__dspctl) \
: "i" (mask)); \
__dspctl; \
@@ -1178,198 +1175,30 @@ do { \
#define wrdsp(val, mask) \
do { \
__asm__ __volatile__( \
- " .set push \n" \
- " .set dsp \n" \
" wrdsp %0, %x1 \n" \
- " .set pop \n" \
: \
: "r" (val), "i" (mask)); \
} while (0)
-#define mflo0() \
-({ \
- long mflo0; \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mflo %0, $ac0 \n" \
- " .set pop \n" \
- : "=r" (mflo0)); \
- mflo0; \
-})
-
-#define mflo1() \
-({ \
- long mflo1; \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mflo %0, $ac1 \n" \
- " .set pop \n" \
- : "=r" (mflo1)); \
- mflo1; \
-})
-
-#define mflo2() \
-({ \
- long mflo2; \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mflo %0, $ac2 \n" \
- " .set pop \n" \
- : "=r" (mflo2)); \
- mflo2; \
-})
-
-#define mflo3() \
-({ \
- long mflo3; \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mflo %0, $ac3 \n" \
- " .set pop \n" \
- : "=r" (mflo3)); \
- mflo3; \
-})
-
-#define mfhi0() \
-({ \
- long mfhi0; \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mfhi %0, $ac0 \n" \
- " .set pop \n" \
- : "=r" (mfhi0)); \
- mfhi0; \
-})
-
-#define mfhi1() \
-({ \
- long mfhi1; \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mfhi %0, $ac1 \n" \
- " .set pop \n" \
- : "=r" (mfhi1)); \
- mfhi1; \
-})
-
-#define mfhi2() \
-({ \
- long mfhi2; \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mfhi %0, $ac2 \n" \
- " .set pop \n" \
- : "=r" (mfhi2)); \
- mfhi2; \
-})
-
-#define mfhi3() \
-({ \
- long mfhi3; \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mfhi %0, $ac3 \n" \
- " .set pop \n" \
- : "=r" (mfhi3)); \
- mfhi3; \
-})
-
-
-#define mtlo0(x) \
-({ \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mtlo %0, $ac0 \n" \
- " .set pop \n" \
- : \
- : "r" (x)); \
-})
-
-#define mtlo1(x) \
-({ \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mtlo %0, $ac1 \n" \
- " .set pop \n" \
- : \
- : "r" (x)); \
-})
-
-#define mtlo2(x) \
-({ \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mtlo %0, $ac2 \n" \
- " .set pop \n" \
- : \
- : "r" (x)); \
-})
-
-#define mtlo3(x) \
-({ \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mtlo %0, $ac3 \n" \
- " .set pop \n" \
- : \
- : "r" (x)); \
-})
-
-#define mthi0(x) \
-({ \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mthi %0, $ac0 \n" \
- " .set pop \n" \
- : \
- : "r" (x)); \
-})
-
-#define mthi1(x) \
-({ \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mthi %0, $ac1 \n" \
- " .set pop \n" \
- : \
- : "r" (x)); \
-})
-
-#define mthi2(x) \
-({ \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mthi %0, $ac2 \n" \
- " .set pop \n" \
- : \
- : "r" (x)); \
-})
-
-#define mthi3(x) \
-({ \
- __asm__( \
- " .set push \n" \
- " .set dsp \n" \
- " mthi %0, $ac3 \n" \
- " .set pop \n" \
- : \
- : "r" (x)); \
-})
+#define mflo0() ({ long mflo0; __asm__("mflo %0, $ac0" : "=r" (mflo0)); mflo0;})
+#define mflo1() ({ long mflo1; __asm__("mflo %0, $ac1" : "=r" (mflo1)); mflo1;})
+#define mflo2() ({ long mflo2; __asm__("mflo %0, $ac2" : "=r" (mflo2)); mflo2;})
+#define mflo3() ({ long mflo3; __asm__("mflo %0, $ac3" : "=r" (mflo3)); mflo3;})
+
+#define mfhi0() ({ long mfhi0; __asm__("mfhi %0, $ac0" : "=r" (mfhi0)); mfhi0;})
+#define mfhi1() ({ long mfhi1; __asm__("mfhi %0, $ac1" : "=r" (mfhi1)); mfhi1;})
+#define mfhi2() ({ long mfhi2; __asm__("mfhi %0, $ac2" : "=r" (mfhi2)); mfhi2;})
+#define mfhi3() ({ long mfhi3; __asm__("mfhi %0, $ac3" : "=r" (mfhi3)); mfhi3;})
+
+#define mtlo0(x) __asm__("mtlo %0, $ac0" ::"r" (x))
+#define mtlo1(x) __asm__("mtlo %0, $ac1" ::"r" (x))
+#define mtlo2(x) __asm__("mtlo %0, $ac2" ::"r" (x))
+#define mtlo3(x) __asm__("mtlo %0, $ac3" ::"r" (x))
+
+#define mthi0(x) __asm__("mthi %0, $ac0" ::"r" (x))
+#define mthi1(x) __asm__("mthi %0, $ac1" ::"r" (x))
+#define mthi2(x) __asm__("mthi %0, $ac2" ::"r" (x))
+#define mthi3(x) __asm__("mthi %0, $ac3" ::"r" (x))
#else
diff --git a/trunk/arch/mips/include/asm/signal.h b/trunk/arch/mips/include/asm/signal.h
index 8efe5a9e2c3e..197f6367c201 100644
--- a/trunk/arch/mips/include/asm/signal.h
+++ b/trunk/arch/mips/include/asm/signal.h
@@ -21,6 +21,6 @@
#include
#include
-#define __ARCH_HAS_IRIX_SIGACTION
+#define __ARCH_HAS_ODD_SIGACTION
#endif /* _ASM_SIGNAL_H */
diff --git a/trunk/arch/mips/include/uapi/asm/signal.h b/trunk/arch/mips/include/uapi/asm/signal.h
index addb9f556b71..d6b18b4d0f3a 100644
--- a/trunk/arch/mips/include/uapi/asm/signal.h
+++ b/trunk/arch/mips/include/uapi/asm/signal.h
@@ -72,12 +72,6 @@ typedef unsigned long old_sigset_t; /* at least 32 bits */
*
* SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
* Unix names RESETHAND and NODEFER respectively.
- *
- * SA_RESTORER used to be defined as 0x04000000 but only the O32 ABI ever
- * supported its use and no libc was using it, so the entire sa-restorer
- * functionality was removed with lmo commit 39bffc12c3580ab for 2.5.48
- * retaining only the SA_RESTORER definition as a reminder to avoid
- * accidental reuse of the mask bit.
*/
#define SA_ONSTACK 0x08000000
#define SA_RESETHAND 0x80000000
@@ -90,6 +84,8 @@ typedef unsigned long old_sigset_t; /* at least 32 bits */
#define SA_NOMASK SA_NODEFER
#define SA_ONESHOT SA_RESETHAND
+#define SA_RESTORER 0x04000000 /* Only for o32 */
+
#define MINSIGSTKSZ 2048
#define SIGSTKSZ 8192
diff --git a/trunk/arch/mips/kernel/Makefile b/trunk/arch/mips/kernel/Makefile
index de75fb50562b..f81d98f6184c 100644
--- a/trunk/arch/mips/kernel/Makefile
+++ b/trunk/arch/mips/kernel/Makefile
@@ -100,16 +100,29 @@ obj-$(CONFIG_HW_PERF_EVENTS) += perf_event_mipsxx.o
obj-$(CONFIG_JUMP_LABEL) += jump_label.o
#
-# DSP ASE supported for MIPS32 or MIPS64 Release 2 cores only. It is not
-# safe to unconditionnaly use the assembler -mdsp / -mdspr2 switches
-# here because the compiler may use DSP ASE instructions (such as lwx) in
-# code paths where we cannot check that the CPU we are running on supports it.
-# Proper abstraction using HAVE_AS_DSP and macros is done in
-# arch/mips/include/asm/mipsregs.h.
+# DSP ASE supported for MIPS32 or MIPS64 Release 2 cores only. It is safe
+# to enable DSP assembler support here even if the MIPS Release 2 CPU we
+# are targetting does not support DSP because all code-paths making use of
+# it properly check that the running CPU *actually does* support these
+# instructions.
#
ifeq ($(CONFIG_CPU_MIPSR2), y)
CFLAGS_DSP = -DHAVE_AS_DSP
+#
+# Check if assembler supports DSP ASE
+#
+ifeq ($(call cc-option-yn,-mdsp), y)
+CFLAGS_DSP += -mdsp
+endif
+
+#
+# Check if assembler supports DSP ASE Rev2
+#
+ifeq ($(call cc-option-yn,-mdspr2), y)
+CFLAGS_DSP += -mdspr2
+endif
+
CFLAGS_signal.o = $(CFLAGS_DSP)
CFLAGS_signal32.o = $(CFLAGS_DSP)
CFLAGS_process.o = $(CFLAGS_DSP)
diff --git a/trunk/arch/mips/kernel/cpu-probe.c b/trunk/arch/mips/kernel/cpu-probe.c
index 5fe66a0c3224..6bfccc227a95 100644
--- a/trunk/arch/mips/kernel/cpu-probe.c
+++ b/trunk/arch/mips/kernel/cpu-probe.c
@@ -580,9 +580,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
c->tlbsize = 48;
break;
case PRID_IMP_VR41XX:
- set_isa(c, MIPS_CPU_ISA_III);
- c->options = R4K_OPTS;
- c->tlbsize = 32;
switch (c->processor_id & 0xf0) {
case PRID_REV_VR4111:
c->cputype = CPU_VR4111;
@@ -607,7 +604,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
__cpu_name[cpu] = "NEC VR4131";
} else {
c->cputype = CPU_VR4133;
- c->options |= MIPS_CPU_LLSC;
__cpu_name[cpu] = "NEC VR4133";
}
break;
@@ -617,6 +613,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
__cpu_name[cpu] = "NEC Vr41xx";
break;
}
+ set_isa(c, MIPS_CPU_ISA_III);
+ c->options = R4K_OPTS;
+ c->tlbsize = 32;
break;
case PRID_IMP_R4300:
c->cputype = CPU_R4300;
@@ -1227,8 +1226,10 @@ __cpuinit void cpu_probe(void)
if (c->options & MIPS_CPU_FPU) {
c->fpu_id = cpu_get_fpu_id();
- if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 |
- MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)) {
+ if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
+ c->isa_level == MIPS_CPU_ISA_M32R2 ||
+ c->isa_level == MIPS_CPU_ISA_M64R1 ||
+ c->isa_level == MIPS_CPU_ISA_M64R2) {
if (c->fpu_id & MIPS_FPIR_3D)
c->ases |= MIPS_ASE_MIPS3D;
}
diff --git a/trunk/arch/mips/kernel/linux32.c b/trunk/arch/mips/kernel/linux32.c
index db9655f08892..8eeee1c860c0 100644
--- a/trunk/arch/mips/kernel/linux32.c
+++ b/trunk/arch/mips/kernel/linux32.c
@@ -171,7 +171,7 @@ SYSCALL_DEFINE6(32_ipc, u32, call, long, first, long, second, long, third,
err = compat_sys_shmctl(first, second, compat_ptr(ptr));
break;
default:
- err = -ENOSYS;
+ err = -EINVAL;
break;
}
diff --git a/trunk/arch/mips/kernel/mcount.S b/trunk/arch/mips/kernel/mcount.S
index 33d067148e61..165867673357 100644
--- a/trunk/arch/mips/kernel/mcount.S
+++ b/trunk/arch/mips/kernel/mcount.S
@@ -46,9 +46,10 @@
PTR_L a5, PT_R9(sp)
PTR_L a6, PT_R10(sp)
PTR_L a7, PT_R11(sp)
-#endif
+#else
PTR_ADDIU sp, PT_SIZE
- .endm
+#endif
+.endm
.macro RETURN_BACK
jr ra
@@ -67,11 +68,7 @@ NESTED(ftrace_caller, PT_SIZE, ra)
.globl _mcount
_mcount:
b ftrace_stub
-#ifdef CONFIG_32BIT
- addiu sp,sp,8
-#else
- nop
-#endif
+ addiu sp,sp,8
/* When tracing is activated, it calls ftrace_caller+8 (aka here) */
lw t1, function_trace_stop
diff --git a/trunk/arch/mips/kernel/proc.c b/trunk/arch/mips/kernel/proc.c
index 7a54f74b7818..135c4aadccbe 100644
--- a/trunk/arch/mips/kernel/proc.c
+++ b/trunk/arch/mips/kernel/proc.c
@@ -67,7 +67,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
if (cpu_has_mips_r) {
seq_printf(m, "isa\t\t\t:");
if (cpu_has_mips_1)
- seq_printf(m, "%s", " mips1");
+ seq_printf(m, "%s", "mips1");
if (cpu_has_mips_2)
seq_printf(m, "%s", " mips2");
if (cpu_has_mips_3)
diff --git a/trunk/arch/mips/kernel/traps.c b/trunk/arch/mips/kernel/traps.c
index c3abb88170fc..a200b5bdbb87 100644
--- a/trunk/arch/mips/kernel/traps.c
+++ b/trunk/arch/mips/kernel/traps.c
@@ -1571,7 +1571,7 @@ void __cpuinit per_cpu_trap_init(bool is_boot_cpu)
#ifdef CONFIG_64BIT
status_set |= ST0_FR|ST0_KX|ST0_SX|ST0_UX;
#endif
- if (current_cpu_data.isa_level & MIPS_CPU_ISA_IV)
+ if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
status_set |= ST0_XX;
if (cpu_has_dsp)
status_set |= ST0_MX;
diff --git a/trunk/arch/mips/lib/bitops.c b/trunk/arch/mips/lib/bitops.c
index a64daee740ee..81f1dcfdcab8 100644
--- a/trunk/arch/mips/lib/bitops.c
+++ b/trunk/arch/mips/lib/bitops.c
@@ -90,12 +90,12 @@ int __mips_test_and_set_bit(unsigned long nr,
unsigned bit = nr & SZLONG_MASK;
unsigned long mask;
unsigned long flags;
- int res;
+ unsigned long res;
a += nr >> SZLONG_LOG;
mask = 1UL << bit;
raw_local_irq_save(flags);
- res = (mask & *a) != 0;
+ res = (mask & *a);
*a |= mask;
raw_local_irq_restore(flags);
return res;
@@ -116,12 +116,12 @@ int __mips_test_and_set_bit_lock(unsigned long nr,
unsigned bit = nr & SZLONG_MASK;
unsigned long mask;
unsigned long flags;
- int res;
+ unsigned long res;
a += nr >> SZLONG_LOG;
mask = 1UL << bit;
raw_local_irq_save(flags);
- res = (mask & *a) != 0;
+ res = (mask & *a);
*a |= mask;
raw_local_irq_restore(flags);
return res;
@@ -141,12 +141,12 @@ int __mips_test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
unsigned bit = nr & SZLONG_MASK;
unsigned long mask;
unsigned long flags;
- int res;
+ unsigned long res;
a += nr >> SZLONG_LOG;
mask = 1UL << bit;
raw_local_irq_save(flags);
- res = (mask & *a) != 0;
+ res = (mask & *a);
*a &= ~mask;
raw_local_irq_restore(flags);
return res;
@@ -166,12 +166,12 @@ int __mips_test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
unsigned bit = nr & SZLONG_MASK;
unsigned long mask;
unsigned long flags;
- int res;
+ unsigned long res;
a += nr >> SZLONG_LOG;
mask = 1UL << bit;
raw_local_irq_save(flags);
- res = (mask & *a) != 0;
+ res = (mask & *a);
*a ^= mask;
raw_local_irq_restore(flags);
return res;
diff --git a/trunk/arch/mips/lib/csum_partial.S b/trunk/arch/mips/lib/csum_partial.S
index a6adffbb4e5f..507147aebd41 100644
--- a/trunk/arch/mips/lib/csum_partial.S
+++ b/trunk/arch/mips/lib/csum_partial.S
@@ -270,7 +270,7 @@ LEAF(csum_partial)
#endif
/* odd buffer alignment? */
-#ifdef CONFIG_CPU_MIPSR2
+#ifdef CPU_MIPSR2
wsbh v1, sum
movn sum, v1, t7
#else
@@ -670,7 +670,7 @@ EXC( sb t0, NBYTES-2(dst), .Ls_exc)
addu sum, v1
#endif
-#ifdef CONFIG_CPU_MIPSR2
+#ifdef CPU_MIPSR2
wsbh v1, sum
movn sum, v1, odd
#else
diff --git a/trunk/arch/mips/mm/c-r4k.c b/trunk/arch/mips/mm/c-r4k.c
index 2078915eacb9..ecca559b8d7b 100644
--- a/trunk/arch/mips/mm/c-r4k.c
+++ b/trunk/arch/mips/mm/c-r4k.c
@@ -1247,8 +1247,10 @@ static void __cpuinit setup_scache(void)
return;
default:
- if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 |
- MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)) {
+ if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
+ c->isa_level == MIPS_CPU_ISA_M32R2 ||
+ c->isa_level == MIPS_CPU_ISA_M64R1 ||
+ c->isa_level == MIPS_CPU_ISA_M64R2) {
#ifdef CONFIG_MIPS_CPU_SCACHE
if (mips_sc_init ()) {
scache_size = c->scache.ways * c->scache.sets * c->scache.linesz;
diff --git a/trunk/arch/mips/mm/sc-mips.c b/trunk/arch/mips/mm/sc-mips.c
index df96da7e939b..93d937b4b1ba 100644
--- a/trunk/arch/mips/mm/sc-mips.c
+++ b/trunk/arch/mips/mm/sc-mips.c
@@ -98,8 +98,10 @@ static inline int __init mips_sc_probe(void)
c->scache.flags |= MIPS_CACHE_NOT_PRESENT;
/* Ignore anything but MIPSxx processors */
- if (!(c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 |
- MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)))
+ if (c->isa_level != MIPS_CPU_ISA_M32R1 &&
+ c->isa_level != MIPS_CPU_ISA_M32R2 &&
+ c->isa_level != MIPS_CPU_ISA_M64R1 &&
+ c->isa_level != MIPS_CPU_ISA_M64R2)
return 0;
/* Does this MIPS32/MIPS64 CPU have a config2 register? */
diff --git a/trunk/arch/mips/pci/pci-alchemy.c b/trunk/arch/mips/pci/pci-alchemy.c
index d1faece21b6a..38a80c83fd67 100644
--- a/trunk/arch/mips/pci/pci-alchemy.c
+++ b/trunk/arch/mips/pci/pci-alchemy.c
@@ -19,7 +19,7 @@
#include
#include
-#ifdef CONFIG_PCI_DEBUG
+#ifdef CONFIG_DEBUG_PCI
#define DBG(x...) printk(KERN_DEBUG x)
#else
#define DBG(x...) do {} while (0)
@@ -162,7 +162,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
if (status & (1 << 29)) {
*data = 0xffffffff;
error = -1;
- DBG("alchemy-pci: master abort on cfg access %d bus %d dev %d\n",
+ DBG("alchemy-pci: master abort on cfg access %d bus %d dev %d",
access_type, bus->number, device);
} else if ((status >> 28) & 0xf) {
DBG("alchemy-pci: PCI ERR detected: dev %d, status %lx\n",
diff --git a/trunk/arch/mn10300/Kconfig b/trunk/arch/mn10300/Kconfig
index 428da175d073..b06c7360b1c6 100644
--- a/trunk/arch/mn10300/Kconfig
+++ b/trunk/arch/mn10300/Kconfig
@@ -8,7 +8,7 @@ config MN10300
select HAVE_ARCH_KGDB
select GENERIC_ATOMIC64
select HAVE_NMI_WATCHDOG if MN10300_WD_TIMER
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select GENERIC_CLOCKEVENTS
select MODULES_USE_ELF_RELA
select OLD_SIGSUSPEND3
diff --git a/trunk/arch/openrisc/Kconfig b/trunk/arch/openrisc/Kconfig
index 9ab3bf2eca8d..014a6482ed4c 100644
--- a/trunk/arch/openrisc/Kconfig
+++ b/trunk/arch/openrisc/Kconfig
@@ -9,9 +9,10 @@ config OPENRISC
select OF_EARLY_FLATTREE
select IRQ_DOMAIN
select HAVE_MEMBLOCK
- select ARCH_REQUIRE_GPIOLIB
+ select ARCH_WANT_OPTIONAL_GPIOLIB
select HAVE_ARCH_TRACEHOOK
select HAVE_GENERIC_HARDIRQS
+ select HAVE_VIRT_TO_BUS
select GENERIC_IRQ_CHIP
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
diff --git a/trunk/arch/parisc/Kconfig b/trunk/arch/parisc/Kconfig
index 0339181bf3ac..a9ff712a2864 100644
--- a/trunk/arch/parisc/Kconfig
+++ b/trunk/arch/parisc/Kconfig
@@ -21,7 +21,7 @@ config PARISC
select GENERIC_STRNCPY_FROM_USER
select SYSCTL_ARCH_UNALIGN_ALLOW
select HAVE_MOD_ARCH_SPECIFIC
- select VIRT_TO_BUS
+ select HAVE_VIRT_TO_BUS
select MODULES_USE_ELF_RELA
select CLONE_BACKWARDS
select TTY # Needed for pdc_cons.c
diff --git a/trunk/arch/powerpc/Kconfig b/trunk/arch/powerpc/Kconfig
index a9ae67317374..b89d7eb730a2 100644
--- a/trunk/arch/powerpc/Kconfig
+++ b/trunk/arch/powerpc/Kconfig
@@ -90,7 +90,6 @@ config GENERIC_GPIO
config PPC
bool
default y
- select BINFMT_ELF
select OF
select OF_EARLY_FLATTREE
select HAVE_FTRACE_MCOUNT_RECORD
@@ -99,7 +98,7 @@ config PPC
select HAVE_FUNCTION_GRAPH_TRACER
select SYSCTL_EXCEPTION_TRACE
select ARCH_WANT_OPTIONAL_GPIOLIB
- select VIRT_TO_BUS if !PPC64
+ select HAVE_VIRT_TO_BUS if !PPC64
select HAVE_IDE
select HAVE_IOREMAP_PROT
select HAVE_EFFICIENT_UNALIGNED_ACCESS
@@ -428,6 +427,11 @@ config NODES_SHIFT
default "4"
depends on NEED_MULTIPLE_NODES
+config MAX_ACTIVE_REGIONS
+ int
+ default "256" if PPC64
+ default "32"
+
config ARCH_SELECT_MEMORY_MODEL
def_bool y
depends on PPC64
@@ -642,14 +646,14 @@ menu "Bus options"
config ISA
bool "Support for ISA-bus hardware"
- depends on PPC_CHRP
+ depends on PPC_PREP || PPC_CHRP
select PPC_I8259
help
Find out whether you have ISA slots on your motherboard. ISA is the
name of a bus system, i.e. the way the CPU talks to the other stuff
inside your box. If you have an Apple machine, say N here; if you
- have an IBM RS/6000 or pSeries machine, say Y. If you have an
- embedded board, consult your board documentation.
+ have an IBM RS/6000 or pSeries machine or a PReP machine, say Y. If
+ you have an embedded board, consult your board documentation.
config ZONE_DMA
bool
@@ -740,6 +744,7 @@ config PCI
bool "PCI support" if PPC_PCI_CHOICE
default y if !40x && !CPM2 && !8xx && !PPC_83xx \
&& !PPC_85xx && !PPC_86xx && !GAMECUBE_COMMON
+ default PCI_PERMEDIA if !4xx && !CPM2 && !8xx
default PCI_QSPAN if !4xx && !CPM2 && 8xx
select ARCH_SUPPORTS_MSI
select GENERIC_PCI_IOMAP
@@ -963,7 +968,7 @@ config TASK_SIZE_BOOL
config TASK_SIZE
hex "Size of user task space" if TASK_SIZE_BOOL
- default "0x80000000" if PPC_8xx
+ default "0x80000000" if PPC_PREP || PPC_8xx
default "0xc0000000"
config CONSISTENT_SIZE_BOOL
diff --git a/trunk/arch/powerpc/boot/dts/ac14xx.dts b/trunk/arch/powerpc/boot/dts/ac14xx.dts
deleted file mode 100644
index a27a4609bb42..000000000000
--- a/trunk/arch/powerpc/boot/dts/ac14xx.dts
+++ /dev/null
@@ -1,392 +0,0 @@
-/*
- * Device Tree Source for the MPC5121e based ac14xx board
- *
- * Copyright 2012 Anatolij Gustschin
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-
-/include/ "mpc5121.dtsi"
-
-/ {
- model = "ac14xx";
- compatible = "ifm,ac14xx", "fsl,mpc5121";
- #address-cells = <1>;
- #size-cells = <1>;
-
- aliases {
- serial0 = &serial0;
- serial1 = &serial7;
- spi4 = &spi4;
- spi5 = &spi5;
- };
-
- cpus {
- PowerPC,5121@0 {
- timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
- bus-frequency = <160000000>; /* 160 MHz csb bus */
- clock-frequency = <400000000>; /* 400 MHz ppc core */
- };
- };
-
- memory {
- reg = <0x00000000 0x10000000>; /* 256MB at 0 */
- };
-
- nfc@40000000 {
- status = "disabled";
- };
-
- localbus@80000020 {
- ranges = <0x0 0x0 0xfc000000 0x04000000 /* CS0: NOR flash */
- 0x1 0x0 0xe0000000 0x00010000 /* CS1: FRAM */
- 0x2 0x0 0xe0100000 0x00080000 /* CS2: asi1 */
- 0x3 0x0 0xe0300000 0x00020000 /* CS3: comm */
- 0x5 0x0 0xe0400000 0x00010000 /* CS5: safety */
- 0x6 0x0 0xe0200000 0x00080000>; /* CS6: asi2 */
-
- flash@0,0 {
- compatible = "cfi-flash";
- reg = <0 0x00000000 0x04000000>;
- #address-cells = <1>;
- #size-cells = <1>;
- bank-width = <2>;
- device-width = <2>;
-
- partition@0 {
- label = "dtb-kernel-production";
- reg = <0x00000000 0x00400000>;
- };
- partition@1 {
- label = "filesystem-production";
- reg = <0x00400000 0x03400000>;
- };
-
- partition@2 {
- label = "recovery";
- reg = <0x03800000 0x00700000>;
- };
-
- partition@3 {
- label = "uboot-code";
- reg = <0x03f00000 0x00040000>;
- };
- partition@4 {
- label = "uboot-env1";
- reg = <0x03f40000 0x00020000>;
- };
- partition@5 {
- label = "uboot-env2";
- reg = <0x03f60000 0x00020000>;
- };
- };
-
- fram@1,0 {
- compatible = "ifm,ac14xx-fram", "linux,uio-pdrv-genirq";
- reg = <1 0x00000000 0x00010000>;
- };
-
- asi@2,0 {
- /* masters mapping: CS, CS offset, size */
- reg = <2 0x00000000 0x00080000
- 6 0x00000000 0x00080000>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "ifm,ac14xx-asi-fpga";
- gpios = <
- &gpio_pic 26 0 /* prog */
- &gpio_pic 27 0 /* done */
- &gpio_pic 10 0 /* reset */
- >;
-
- master@1 {
- interrupts = <20 0x2>;
- interrupt-parent = <&gpio_pic>;
- chipselect = <2 0x00009000 0x00009100>;
- label = "AS-i master 1";
- };
-
- master@2 {
- interrupts = <21 0x2>;
- interrupt-parent = <&gpio_pic>;
- chipselect = <6 0x00009000 0x00009100>;
- label = "AS-i master 2";
- };
- };
-
- netx@3,0 {
- compatible = "ifm,netx";
- reg = <0x3 0x00000000 0x00020000>;
- chipselect = <3 0x00101140 0x00203100>;
- interrupts = <17 0x8>;
- gpios = <&gpio_pic 15 0>;
- };
-
- safety@5,0 {
- compatible = "ifm,safety";
- reg = <0x5 0x00000000 0x00010000>;
- chipselect = <5 0x00009000 0x00009100>;
- interrupts = <22 0x2>;
- interrupt-parent = <&gpio_pic>;
- gpios = <
- &gpio_pic 12 0 /* prog */
- &gpio_pic 11 0 /* done */
- >;
- };
- };
-
- soc@80000000 {
-
- clock@f00 {
- compatible = "fsl,mpc5121rev2-clock", "fsl,mpc5121-clock";
- };
-
- /*
- * GPIO PIC:
- * interrupts cell =
- * sense == 8: Level, low assertion
- * sense == 2: Edge, high-to-low change
- */
- gpio_pic: gpio@1100 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- sdhc@1500 {
- cd-gpios = <&gpio_pic 23 0>; /* card detect */
- wp-gpios = <&gpio_pic 24 0>; /* write protect */
- wp-inverted; /* WP active high */
- };
-
- i2c@1700 {
- /* use Fast-mode */
- clock-frequency = <400000>;
-
- at24@30 {
- compatible = "at24,24c01";
- reg = <0x30>;
- };
-
- at24@31 {
- compatible = "at24,24c01";
- reg = <0x31>;
- };
-
- temp@48 {
- compatible = "ad,ad7414";
- reg = <0x48>;
- };
-
- at24@50 {
- compatible = "at24,24c01";
- reg = <0x50>;
- };
-
- at24@51 {
- compatible = "at24,24c01";
- reg = <0x51>;
- };
-
- at24@52 {
- compatible = "at24,24c01";
- reg = <0x52>;
- };
-
- at24@53 {
- compatible = "at24,24c01";
- reg = <0x53>;
- };
-
- at24@54 {
- compatible = "at24,24c01";
- reg = <0x54>;
- };
-
- at24@55 {
- compatible = "at24,24c01";
- reg = <0x55>;
- };
-
- at24@56 {
- compatible = "at24,24c01";
- reg = <0x56>;
- };
-
- at24@57 {
- compatible = "at24,24c01";
- reg = <0x57>;
- };
-
- rtc@68 {
- compatible = "stm,m41t00";
- reg = <0x68>;
- };
- };
-
- axe_pic: axe-base@2000 {
- compatible = "fsl,mpc5121-axe-base";
- reg = <0x2000 0x100>;
- interrupts = <42 0x8>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- axe-app {
- compatible = "fsl,mpc5121-axe-app";
- interrupt-parent = <&axe_pic>;
- interrupts = <
- /* soft interrupts */
- 0 0x0 1 0x0 2 0x0 3 0x0
- 4 0x0 5 0x0 6 0x0 7 0x0
- /* fifo interrupts */
- 8 0x0 9 0x0 10 0x0 11 0x0
- >;
- };
-
- display@2100 {
- edid = [00 FF FF FF FF FF FF 00 14 94 00 00 00 00 00 00
- 0A 12 01 03 80 1C 23 78 CA 88 FF 94 52 54 8E 27
- 1E 4C 50 00 00 00 01 01 01 01 01 01 01 01 01 01
- 01 01 01 01 01 01 FB 00 B0 14 00 DC 05 00 08 04
- 21 00 1C 23 00 00 00 18 00 00 00 FD 00 38 3C 1F
- 3C 01 0A 20 20 20 20 20 20 20 00 00 00 FC 00 45
- 54 30 31 38 30 30 33 44 4D 55 0A 0A 00 00 00 10
- 00 41 30 30 30 30 30 30 30 30 30 30 30 31 00 D5];
- };
-
- can@2300 {
- status = "disabled";
- };
-
- can@2380 {
- status = "disabled";
- };
-
- viu@2400 {
- status = "disabled";
- };
-
- mdio@2800 {
- phy0: ethernet-phy@1f {
- compatible = "smsc,lan8700";
- reg = <0x1f>;
- };
- };
-
- enet: ethernet@2800 {
- phy-handle = <&phy0>;
- };
-
- usb@3000 {
- status = "disabled";
- };
-
- usb@4000 {
- status = "disabled";
- };
-
- /* PSC3 serial port A, aka ttyPSC0 */
- serial0: psc@11300 {
- compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
- fsl,rx-fifo-size = <512>;
- fsl,tx-fifo-size = <512>;
- };
-
- /* PSC4 in SPI mode */
- spi4: psc@11400 {
- compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
- fsl,rx-fifo-size = <768>;
- fsl,tx-fifo-size = <768>;
- #address-cells = <1>;
- #size-cells = <0>;
- num-cs = <1>;
- cs-gpios = <&gpio_pic 25 0>;
-
- flash: m25p128@0 {
- compatible = "st,m25p128";
- spi-max-frequency = <20000000>;
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "spi-flash0";
- reg = <0x00000000 0x01000000>;
- };
- };
- };
-
- /* PSC5 in SPI mode */
- spi5: psc@11500 {
- compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
- fsl,mode = "spi-master";
- fsl,rx-fifo-size = <128>;
- fsl,tx-fifo-size = <128>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- lcd@0 {
- compatible = "ilitek,ili922x";
- reg = <0>;
- spi-max-frequency = <100000>;
- spi-cpol;
- spi-cpha;
- };
- };
-
- /* PSC7 serial port C, aka ttyPSC2 */
- serial7: psc@11700 {
- compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
- fsl,rx-fifo-size = <512>;
- fsl,tx-fifo-size = <512>;
- };
-
- matrix_keypad@0 {
- compatible = "gpio-matrix-keypad";
- debounce-delay-ms = <5>;
- col-scan-delay-us = <1>;
- gpio-activelow;
- col-gpios-binary;
- col-switch-delay-ms = <200>;
-
- col-gpios = <&gpio_pic 1 0>; /* pin1 */
-
- row-gpios = <&gpio_pic 2 0 /* pin2 */
- &gpio_pic 3 0 /* pin3 */
- &gpio_pic 4 0>; /* pin4 */
-
- linux,keymap = <0x0000006e /* FN LEFT */
- 0x01000067 /* UP */
- 0x02000066 /* FN RIGHT */
- 0x00010069 /* LEFT */
- 0x0101006a /* DOWN */
- 0x0201006c>; /* RIGHT */
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- backlight {
- label = "backlight";
- gpios = <&gpio_pic 0 0>;
- default-state = "keep";
- };
- green {
- label = "green";
- gpios = <&gpio_pic 18 0>;
- default-state = "keep";
- };
- red {
- label = "red";
- gpios = <&gpio_pic 19 0>;
- default-state = "keep";
- };
- };
-};
diff --git a/trunk/arch/powerpc/boot/dts/fsl/e6500_power_isa.dtsi b/trunk/arch/powerpc/boot/dts/fsl/e6500_power_isa.dtsi
new file mode 100644
index 000000000000..a912dbeff359
--- /dev/null
+++ b/trunk/arch/powerpc/boot/dts/fsl/e6500_power_isa.dtsi
@@ -0,0 +1,65 @@
+/*
+ * e6500 Power ISA Device Tree Source (include)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/ {
+ cpus {
+ power-isa-version = "2.06";
+ power-isa-b; // Base
+ power-isa-e; // Embedded
+ power-isa-atb; // Alternate Time Base
+ power-isa-cs; // Cache Specification
+ power-isa-ds; // Decorated Storage
+ power-isa-e.ed; // Embedded.Enhanced Debug
+ power-isa-e.pd; // Embedded.External PID
+ power-isa-e.hv; // Embedded.Hypervisor
+ power-isa-e.le; // Embedded.Little-Endian
+ power-isa-e.pm; // Embedded.Performance Monitor
+ power-isa-e.pc; // Embedded.Processor Control
+ power-isa-ecl; // Embedded Cache Locking
+ power-isa-exp; // External Proxy
+ power-isa-fp; // Floating Point
+ power-isa-fp.r; // Floating Point.Record
+ power-isa-mmc; // Memory Coherence
+ power-isa-scpm; // Store Conditional Page Mobility
+ power-isa-wt; // Wait
+ power-isa-64; // 64-bit
+ power-isa-e.pt; // Embedded.Page Table
+ power-isa-e.hv.lrat; // Embedded.Hypervisor.LRAT
+ power-isa-e.em; // Embedded Multi-Threading
+ power-isa-v; // Vector (AltiVec)
+ fsl,eref-er; // Enhanced Reservations (Load and Reserve and Store Cond.)
+ fsl,eref-deo; // Data Cache Extended Operations
+ mmu-type = "power-embedded";
+ };
+};
diff --git a/trunk/arch/powerpc/boot/dts/mpc5121.dtsi b/trunk/arch/powerpc/boot/dts/mpc5121.dtsi
index 2e82d0e71dd3..723e292b6b4e 100644
--- a/trunk/arch/powerpc/boot/dts/mpc5121.dtsi
+++ b/trunk/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -384,7 +384,7 @@
interrupts = <40 0x8>;
};
- dma0: dma@14000 {
+ dma@14000 {
compatible = "fsl,mpc5121-dma";
reg = <0x14000 0x1800>;
interrupts = <65 0x8>;
diff --git a/trunk/arch/powerpc/boot/dts/mpc5121ads.dts b/trunk/arch/powerpc/boot/dts/mpc5121ads.dts
index 7d3cb79185cb..f269b1382ef7 100644
--- a/trunk/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/trunk/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -13,7 +13,7 @@
/ {
model = "mpc5121ads";
- compatible = "fsl,mpc5121ads", "fsl,mpc5121";
+ compatible = "fsl,mpc5121ads";
nfc@40000000 {
/*
diff --git a/trunk/arch/powerpc/boot/dts/mpc5125twr.dts b/trunk/arch/powerpc/boot/dts/mpc5125twr.dts
deleted file mode 100644
index 4177b62240c2..000000000000
--- a/trunk/arch/powerpc/boot/dts/mpc5125twr.dts
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- * STx/Freescale ADS5125 MPC5125 silicon
- *
- * Copyright (C) 2009 Freescale Semiconductor Inc. All rights reserved.
- *
- * Reworked by Matteo Facchinetti (engineering@sirius-es.it)
- * Copyright (C) 2013 Sirius Electronic Systems
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-/dts-v1/;
-
-/ {
- model = "mpc5125twr"; // In BSP "mpc5125ads"
- compatible = "fsl,mpc5125ads", "fsl,mpc5125";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&ipic>;
-
- aliases {
- gpio0 = &gpio0;
- gpio1 = &gpio1;
- ethernet0 = ð0;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- PowerPC,5125@0 {
- device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <0x20>; // 32 bytes
- i-cache-line-size = <0x20>; // 32 bytes
- d-cache-size = <0x8000>; // L1, 32K
- i-cache-size = <0x8000>; // L1, 32K
- timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
- bus-frequency = <198000000>; // 198 MHz csb bus
- clock-frequency = <396000000>; // 396 MHz ppc core
- };
- };
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>; // 256MB at 0
- };
-
- sram@30000000 {
- compatible = "fsl,mpc5121-sram";
- reg = <0x30000000 0x08000>; // 32K at 0x30000000
- };
-
- soc@80000000 {
- compatible = "fsl,mpc5121-immr";
- #address-cells = <1>;
- #size-cells = <1>;
- #interrupt-cells = <2>;
- ranges = <0x0 0x80000000 0x400000>;
- reg = <0x80000000 0x400000>;
- bus-frequency = <66000000>; // 66 MHz ips bus
-
- // IPIC
- // interrupts cell =
- // sense values match linux IORESOURCE_IRQ_* defines:
- // sense == 8: Level, low assertion
- // sense == 2: Edge, high-to-low change
- //
- ipic: interrupt-controller@c00 {
- compatible = "fsl,mpc5121-ipic", "fsl,ipic";
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <2>;
- reg = <0xc00 0x100>;
- };
-
- rtc@a00 { // Real time clock
- compatible = "fsl,mpc5121-rtc";
- reg = <0xa00 0x100>;
- interrupts = <79 0x8 80 0x8>;
- };
-
- reset@e00 { // Reset module
- compatible = "fsl,mpc5125-reset";
- reg = <0xe00 0x100>;
- };
-
- clock@f00 { // Clock control
- compatible = "fsl,mpc5121-clock";
- reg = <0xf00 0x100>;
- };
-
- pmc@1000{ // Power Management Controller
- compatible = "fsl,mpc5121-pmc";
- reg = <0x1000 0x100>;
- interrupts = <83 0x2>;
- };
-
- gpio0: gpio@1100 {
- compatible = "fsl,mpc5125-gpio";
- reg = <0x1100 0x080>;
- interrupts = <78 0x8>;
- };
-
- gpio1: gpio@1180 {
- compatible = "fsl,mpc5125-gpio";
- reg = <0x1180 0x080>;
- interrupts = <86 0x8>;
- };
-
- can@1300 { // CAN rev.2
- compatible = "fsl,mpc5121-mscan";
- interrupts = <12 0x8>;
- reg = <0x1300 0x80>;
- };
-
- can@1380 {
- compatible = "fsl,mpc5121-mscan";
- interrupts = <13 0x8>;
- reg = <0x1380 0x80>;
- };
-
- sdhc@1500 {
- compatible = "fsl,mpc5121-sdhc";
- interrupts = <8 0x8>;
- reg = <0x1500 0x100>;
- };
-
- i2c@1700 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,mpc5121-i2c", "fsl-i2c";
- reg = <0x1700 0x20>;
- interrupts = <0x9 0x8>;
- };
-
- i2c@1720 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,mpc5121-i2c", "fsl-i2c";
- reg = <0x1720 0x20>;
- interrupts = <0xa 0x8>;
- };
-
- i2c@1740 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,mpc5121-i2c", "fsl-i2c";
- reg = <0x1740 0x20>;
- interrupts = <0xb 0x8>;
- };
-
- i2ccontrol@1760 {
- compatible = "fsl,mpc5121-i2c-ctrl";
- reg = <0x1760 0x8>;
- };
-
- diu@2100 {
- compatible = "fsl,mpc5121-diu";
- reg = <0x2100 0x100>;
- interrupts = <64 0x8>;
- };
-
- mdio@2800 {
- compatible = "fsl,mpc5121-fec-mdio";
- reg = <0x2800 0x800>;
- #address-cells = <1>;
- #size-cells = <0>;
- phy0: ethernet-phy@0 {
- reg = <1>;
- };
- };
-
- eth0: ethernet@2800 {
- compatible = "fsl,mpc5125-fec";
- reg = <0x2800 0x800>;
- local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <4 0x8>;
- phy-handle = < &phy0 >;
- phy-connection-type = "rmii";
- };
-
- // IO control
- ioctl@a000 {
- compatible = "fsl,mpc5125-ioctl";
- reg = <0xA000 0x1000>;
- };
-
- usb@3000 {
- compatible = "fsl,mpc5121-usb2-dr";
- reg = <0x3000 0x400>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <43 0x8>;
- dr_mode = "host";
- phy_type = "ulpi";
- };
-
- // 5125 PSCs are not 52xx or 5121 PSC compatible
- // PSC1 uart0 aka ttyPSC0
- serial@11100 {
- compatible = "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
- reg = <0x11100 0x100>;
- interrupts = <40 0x8>;
- fsl,rx-fifo-size = <16>;
- fsl,tx-fifo-size = <16>;
- };
-
- // PSC9 uart1 aka ttyPSC1
- serial@11900 {
- compatible = "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
- reg = <0x11900 0x100>;
- interrupts = <40 0x8>;
- fsl,rx-fifo-size = <16>;
- fsl,tx-fifo-size = <16>;
- };
-
- pscfifo@11f00 {
- compatible = "fsl,mpc5121-psc-fifo";
- reg = <0x11f00 0x100>;
- interrupts = <40 0x8>;
- };
-
- dma@14000 {
- compatible = "fsl,mpc5121-dma"; // BSP name: "mpc512x-dma2"
- reg = <0x14000 0x1800>;
- interrupts = <65 0x8>;
- };
- };
-};
diff --git a/trunk/arch/powerpc/boot/dts/pdm360ng.dts b/trunk/arch/powerpc/boot/dts/pdm360ng.dts
index 74337403faee..0b069477838a 100644
--- a/trunk/arch/powerpc/boot/dts/pdm360ng.dts
+++ b/trunk/arch/powerpc/boot/dts/pdm360ng.dts
@@ -17,7 +17,7 @@
/ {
model = "pdm360ng";
- compatible = "ifm,pdm360ng", "fsl,mpc5121";
+ compatible = "ifm,pdm360ng";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&ipic>;
diff --git a/trunk/arch/powerpc/configs/mpc512x_defconfig b/trunk/arch/powerpc/configs/mpc512x_defconfig
index 0d0d981442fd..211fcc9ed700 100644
--- a/trunk/arch/powerpc/configs/mpc512x_defconfig
+++ b/trunk/arch/powerpc/configs/mpc512x_defconfig
@@ -13,7 +13,7 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_PPC_CHRP is not set
CONFIG_PPC_MPC512x=y
CONFIG_MPC5121_ADS=y
-CONFIG_MPC512x_GENERIC=y
+CONFIG_MPC5121_GENERIC=y
CONFIG_PDM360NG=y
# CONFIG_PPC_PMAC is not set
CONFIG_NO_HZ=y
diff --git a/trunk/arch/powerpc/configs/ps3_defconfig b/trunk/arch/powerpc/configs/ps3_defconfig
index f79196232917..7a5c15fcc7cf 100644
--- a/trunk/arch/powerpc/configs/ps3_defconfig
+++ b/trunk/arch/powerpc/configs/ps3_defconfig
@@ -3,11 +3,11 @@ CONFIG_TUNE_CELL=y
CONFIG_ALTIVEC=y
CONFIG_SMP=y
CONFIG_NR_CPUS=2
+CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BLK_DEV_INITRD=y
-CONFIG_RD_LZMA=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_EMBEDDED=y
# CONFIG_PERF_EVENTS is not set
diff --git a/trunk/arch/powerpc/include/asm/bitops.h b/trunk/arch/powerpc/include/asm/bitops.h
index 910194e9a1e2..08bd299c75b1 100644
--- a/trunk/arch/powerpc/include/asm/bitops.h
+++ b/trunk/arch/powerpc/include/asm/bitops.h
@@ -53,7 +53,7 @@
#define smp_mb__after_clear_bit() smp_mb()
/* Macro for generating the ***_bits() functions */
-#define DEFINE_BITOP(fn, op, prefix) \
+#define DEFINE_BITOP(fn, op, prefix, postfix) \
static __inline__ void fn(unsigned long mask, \
volatile unsigned long *_p) \
{ \
@@ -66,15 +66,16 @@ static __inline__ void fn(unsigned long mask, \
PPC405_ERR77(0,%3) \
PPC_STLCX "%0,0,%3\n" \
"bne- 1b\n" \
+ postfix \
: "=&r" (old), "+m" (*p) \
: "r" (mask), "r" (p) \
: "cc", "memory"); \
}
-DEFINE_BITOP(set_bits, or, "")
-DEFINE_BITOP(clear_bits, andc, "")
-DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER)
-DEFINE_BITOP(change_bits, xor, "")
+DEFINE_BITOP(set_bits, or, "", "")
+DEFINE_BITOP(clear_bits, andc, "", "")
+DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER, "")
+DEFINE_BITOP(change_bits, xor, "", "")
static __inline__ void set_bit(int nr, volatile unsigned long *addr)
{
diff --git a/trunk/arch/powerpc/include/asm/cputable.h b/trunk/arch/powerpc/include/asm/cputable.h
index ccadad6db4e4..fb3245e928ea 100644
--- a/trunk/arch/powerpc/include/asm/cputable.h
+++ b/trunk/arch/powerpc/include/asm/cputable.h
@@ -52,7 +52,6 @@ struct cpu_spec {
char *cpu_name;
unsigned long cpu_features; /* Kernel features */
unsigned int cpu_user_features; /* Userland features */
- unsigned int cpu_user_features2; /* Userland features v2 */
unsigned int mmu_features; /* MMU features */
/* cache line sizes */
diff --git a/trunk/arch/powerpc/include/asm/dma.h b/trunk/arch/powerpc/include/asm/dma.h
index a5c6d83b5f60..f6813e919bb2 100644
--- a/trunk/arch/powerpc/include/asm/dma.h
+++ b/trunk/arch/powerpc/include/asm/dma.h
@@ -16,6 +16,10 @@
*
* None of this really applies for Power Macintoshes. There is
* basically just enough here to get kernel/dma.c to compile.
+ *
+ * There may be some comments or restrictions made here which are
+ * not valid for the PReP platform. Take what you read
+ * with a grain of salt.
*/
#include
@@ -53,6 +57,7 @@
* - page registers for 5-7 don't use data bit 0, represent 128K pages
* - page registers for 0-3 use bit 0, represent 64K pages
*
+ * On PReP, DMA transfers are limited to the lower 16MB of _physical_ memory.
* On CHRP, the W83C553F (and VLSI Tollgate?) support full 32 bit addressing.
* Note that addresses loaded into registers must be _physical_ addresses,
* not logical addresses (which may differ if paging is active).
diff --git a/trunk/arch/powerpc/include/asm/elf.h b/trunk/arch/powerpc/include/asm/elf.h
index cc0655a702a7..ac9790fc3836 100644
--- a/trunk/arch/powerpc/include/asm/elf.h
+++ b/trunk/arch/powerpc/include/asm/elf.h
@@ -61,7 +61,6 @@ typedef elf_vrregset_t elf_fpxregset_t;
instruction set this cpu supports. This could be done in userspace,
but it's not easy, and we've already done it here. */
# define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
-# define ELF_HWCAP2 (cur_cpu_spec->cpu_user_features2)
/* This yields a string that ld.so will use to load implementation
specific libraries for optimization. This is more specific in
diff --git a/trunk/arch/powerpc/include/asm/exception-64s.h b/trunk/arch/powerpc/include/asm/exception-64s.h
index 8e5fae8beaf6..05e6d2ee1db9 100644
--- a/trunk/arch/powerpc/include/asm/exception-64s.h
+++ b/trunk/arch/powerpc/include/asm/exception-64s.h
@@ -414,6 +414,7 @@ label##_relon_hv: \
#define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec)
#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
+ HMT_MEDIUM_PPR_DISCARD; \
SET_SCRATCH0(r13); /* save r13 */ \
EXCEPTION_PROLOG_0(PACA_EXGEN); \
__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
@@ -426,7 +427,6 @@ label##_relon_hv: \
. = loc; \
.globl label##_pSeries; \
label##_pSeries: \
- HMT_MEDIUM_PPR_DISCARD; \
_MASKABLE_EXCEPTION_PSERIES(vec, label, \
EXC_STD, SOFTEN_TEST_PR)
diff --git a/trunk/arch/powerpc/include/asm/firmware.h b/trunk/arch/powerpc/include/asm/firmware.h
index 0df54646f968..097dee57a7a9 100644
--- a/trunk/arch/powerpc/include/asm/firmware.h
+++ b/trunk/arch/powerpc/include/asm/firmware.h
@@ -18,6 +18,7 @@
#include
/* firmware feature bitmask values */
+#define FIRMWARE_MAX_FEATURES 63
#define FW_FEATURE_PFT ASM_CONST(0x0000000000000001)
#define FW_FEATURE_TCE ASM_CONST(0x0000000000000002)
@@ -50,8 +51,6 @@
#define FW_FEATURE_OPALv2 ASM_CONST(0x0000000020000000)
#define FW_FEATURE_SET_MODE ASM_CONST(0x0000000040000000)
#define FW_FEATURE_BEST_ENERGY ASM_CONST(0x0000000080000000)
-#define FW_FEATURE_TYPE1_AFFINITY ASM_CONST(0x0000000100000000)
-#define FW_FEATURE_PRRN ASM_CONST(0x0000000200000000)
#ifndef __ASSEMBLY__
@@ -66,8 +65,7 @@ enum {
FW_FEATURE_BULK_REMOVE | FW_FEATURE_XDABR |
FW_FEATURE_MULTITCE | FW_FEATURE_SPLPAR | FW_FEATURE_LPAR |
FW_FEATURE_CMO | FW_FEATURE_VPHN | FW_FEATURE_XCMO |
- FW_FEATURE_SET_MODE | FW_FEATURE_BEST_ENERGY |
- FW_FEATURE_TYPE1_AFFINITY | FW_FEATURE_PRRN,
+ FW_FEATURE_SET_MODE | FW_FEATURE_BEST_ENERGY,
FW_FEATURE_PSERIES_ALWAYS = 0,
FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL | FW_FEATURE_OPALv2,
FW_FEATURE_POWERNV_ALWAYS = 0,
diff --git a/trunk/arch/powerpc/include/asm/hardirq.h b/trunk/arch/powerpc/include/asm/hardirq.h
index 3bdcfce2c42a..3147a2970125 100644
--- a/trunk/arch/powerpc/include/asm/hardirq.h
+++ b/trunk/arch/powerpc/include/asm/hardirq.h
@@ -10,9 +10,6 @@ typedef struct {
unsigned int pmu_irqs;
unsigned int mce_exceptions;
unsigned int spurious_irqs;
-#ifdef CONFIG_PPC_DOORBELL
- unsigned int doorbell_irqs;
-#endif
} ____cacheline_aligned irq_cpustat_t;
DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
diff --git a/trunk/arch/powerpc/include/asm/io.h b/trunk/arch/powerpc/include/asm/io.h
index dd15e5e37d6d..f94ef4213e9d 100644
--- a/trunk/arch/powerpc/include/asm/io.h
+++ b/trunk/arch/powerpc/include/asm/io.h
@@ -15,6 +15,10 @@
extern int check_legacy_ioport(unsigned long base_port);
#define I8042_DATA_REG 0x60
#define FDC_BASE 0x3f0
+/* only relevant for PReP */
+#define _PIDXR 0x279
+#define _PNPWRP 0xa79
+#define PNPBIOS_BASE 0xf000
#if defined(CONFIG_PPC64) && defined(CONFIG_PCI)
extern struct pci_dev *isa_bridge_pcidev;
diff --git a/trunk/arch/powerpc/include/asm/mmu-hash64.h b/trunk/arch/powerpc/include/asm/mmu-hash64.h
index b59e06f507ea..2fdb47a19efd 100644
--- a/trunk/arch/powerpc/include/asm/mmu-hash64.h
+++ b/trunk/arch/powerpc/include/asm/mmu-hash64.h
@@ -343,16 +343,17 @@ extern void slb_set_size(u16 size);
/*
* VSID allocation (256MB segment)
*
- * We first generate a 37-bit "proto-VSID". Proto-VSIDs are generated
- * from mmu context id and effective segment id of the address.
+ * We first generate a 38-bit "proto-VSID". For kernel addresses this
+ * is equal to the ESID | 1 << 37, for user addresses it is:
+ * (context << USER_ESID_BITS) | (esid & ((1U << USER_ESID_BITS) - 1)
*
- * For user processes max context id is limited to ((1ul << 19) - 5)
- * for kernel space, we use the top 4 context ids to map address as below
- * NOTE: each context only support 64TB now.
- * 0x7fffc - [ 0xc000000000000000 - 0xc0003fffffffffff ]
- * 0x7fffd - [ 0xd000000000000000 - 0xd0003fffffffffff ]
- * 0x7fffe - [ 0xe000000000000000 - 0xe0003fffffffffff ]
- * 0x7ffff - [ 0xf000000000000000 - 0xf0003fffffffffff ]
+ * This splits the proto-VSID into the below range
+ * 0 - (2^(CONTEXT_BITS + USER_ESID_BITS) - 1) : User proto-VSID range
+ * 2^(CONTEXT_BITS + USER_ESID_BITS) - 2^(VSID_BITS) : Kernel proto-VSID range
+ *
+ * We also have CONTEXT_BITS + USER_ESID_BITS = VSID_BITS - 1
+ * That is, we assign half of the space to user processes and half
+ * to the kernel.
*
* The proto-VSIDs are then scrambled into real VSIDs with the
* multiplicative hash:
@@ -362,49 +363,41 @@ extern void slb_set_size(u16 size);
* VSID_MULTIPLIER is prime, so in particular it is
* co-prime to VSID_MODULUS, making this a 1:1 scrambling function.
* Because the modulus is 2^n-1 we can compute it efficiently without
- * a divide or extra multiply (see below). The scramble function gives
- * robust scattering in the hash table (at least based on some initial
- * results).
+ * a divide or extra multiply (see below).
*
- * We also consider VSID 0 special. We use VSID 0 for slb entries mapping
- * bad address. This enables us to consolidate bad address handling in
- * hash_page.
+ * This scheme has several advantages over older methods:
*
- * We also need to avoid the last segment of the last context, because that
- * would give a protovsid of 0x1fffffffff. That will result in a VSID 0
- * because of the modulo operation in vsid scramble. But the vmemmap
- * (which is what uses region 0xf) will never be close to 64TB in size
- * (it's 56 bytes per page of system memory).
- */
-
-#define CONTEXT_BITS 19
-#define ESID_BITS 18
-#define ESID_BITS_1T 6
-
-/*
- * 256MB segment
- * The proto-VSID space has 2^(CONTEX_BITS + ESID_BITS) - 1 segments
- * available for user + kernel mapping. The top 4 contexts are used for
- * kernel mapping. Each segment contains 2^28 bytes. Each
- * context maps 2^46 bytes (64TB) so we can support 2^19-1 contexts
- * (19 == 37 + 28 - 46).
+ * - We have VSIDs allocated for every kernel address
+ * (i.e. everything above 0xC000000000000000), except the very top
+ * segment, which simplifies several things.
+ *
+ * - We allow for USER_ESID_BITS significant bits of ESID and
+ * CONTEXT_BITS bits of context for user addresses.
+ * i.e. 64T (46 bits) of address space for up to half a million contexts.
+ *
+ * - The scramble function gives robust scattering in the hash
+ * table (at least based on some initial results). The previous
+ * method was more susceptible to pathological cases giving excessive
+ * hash collisions.
*/
-#define MAX_USER_CONTEXT ((ASM_CONST(1) << CONTEXT_BITS) - 5)
/*
* This should be computed such that protovosid * vsid_mulitplier
* doesn't overflow 64 bits. It should also be co-prime to vsid_modulus
*/
#define VSID_MULTIPLIER_256M ASM_CONST(12538073) /* 24-bit prime */
-#define VSID_BITS_256M (CONTEXT_BITS + ESID_BITS)
+#define VSID_BITS_256M 38
#define VSID_MODULUS_256M ((1UL<= \
* 2^36-1, then r3+1 has the 2^36 bit set. So, if r3+1 has \
* the bit clear, r3 already has the answer we want, if it \
@@ -521,6 +513,34 @@ typedef struct {
})
#endif /* 1 */
+/*
+ * This is only valid for addresses >= PAGE_OFFSET
+ * The proto-VSID space is divided into two class
+ * User: 0 to 2^(CONTEXT_BITS + USER_ESID_BITS) -1
+ * kernel: 2^(CONTEXT_BITS + USER_ESID_BITS) to 2^(VSID_BITS) - 1
+ *
+ * With KERNEL_START at 0xc000000000000000, the proto vsid for
+ * the kernel ends up with 0xc00000000 (36 bits). With 64TB
+ * support we need to have kernel proto-VSID in the
+ * [2^37 to 2^38 - 1] range due to the increased USER_ESID_BITS.
+ */
+static inline unsigned long get_kernel_vsid(unsigned long ea, int ssize)
+{
+ unsigned long proto_vsid;
+ /*
+ * We need to make sure proto_vsid for the kernel is
+ * >= 2^(CONTEXT_BITS + USER_ESID_BITS[_1T])
+ */
+ if (ssize == MMU_SEGSIZE_256M) {
+ proto_vsid = ea >> SID_SHIFT;
+ proto_vsid |= (1UL << (CONTEXT_BITS + USER_ESID_BITS));
+ return vsid_scramble(proto_vsid, 256M);
+ }
+ proto_vsid = ea >> SID_SHIFT_1T;
+ proto_vsid |= (1UL << (CONTEXT_BITS + USER_ESID_BITS_1T));
+ return vsid_scramble(proto_vsid, 1T);
+}
+
/* Returns the segment size indicator for a user address */
static inline int user_segment_size(unsigned long addr)
{
@@ -530,41 +550,17 @@ static inline int user_segment_size(unsigned long addr)
return MMU_SEGSIZE_256M;
}
+/* This is only valid for user addresses (which are below 2^44) */
static inline unsigned long get_vsid(unsigned long context, unsigned long ea,
int ssize)
{
- /*
- * Bad address. We return VSID 0 for that
- */
- if ((ea & ~REGION_MASK) >= PGTABLE_RANGE)
- return 0;
-
if (ssize == MMU_SEGSIZE_256M)
- return vsid_scramble((context << ESID_BITS)
+ return vsid_scramble((context << USER_ESID_BITS)
| (ea >> SID_SHIFT), 256M);
- return vsid_scramble((context << ESID_BITS_1T)
+ return vsid_scramble((context << USER_ESID_BITS_1T)
| (ea >> SID_SHIFT_1T), 1T);
}
-/*
- * This is only valid for addresses >= PAGE_OFFSET
- *
- * For kernel space, we use the top 4 context ids to map address as below
- * 0x7fffc - [ 0xc000000000000000 - 0xc0003fffffffffff ]
- * 0x7fffd - [ 0xd000000000000000 - 0xd0003fffffffffff ]
- * 0x7fffe - [ 0xe000000000000000 - 0xe0003fffffffffff ]
- * 0x7ffff - [ 0xf000000000000000 - 0xf0003fffffffffff ]
- */
-static inline unsigned long get_kernel_vsid(unsigned long ea, int ssize)
-{
- unsigned long context;
-
- /*
- * kernel take the top 4 context from the available range
- */
- context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1;
- return get_vsid(context, ea, ssize);
-}
#endif /* __ASSEMBLY__ */
#endif /* _ASM_POWERPC_MMU_HASH64_H_ */
diff --git a/trunk/arch/powerpc/include/asm/opal.h b/trunk/arch/powerpc/include/asm/opal.h
index b6c8b58b1d76..a4b28f165b6c 100644
--- a/trunk/arch/powerpc/include/asm/opal.h
+++ b/trunk/arch/powerpc/include/asm/opal.h
@@ -117,7 +117,6 @@ extern int opal_enter_rtas(struct rtas_args *args,
#define OPAL_SET_SLOT_LED_STATUS 55
#define OPAL_GET_EPOW_STATUS 56
#define OPAL_SET_SYSTEM_ATTENTION_LED 57
-#define OPAL_PCI_MSI_EOI 63
#ifndef __ASSEMBLY__
@@ -507,7 +506,6 @@ int64_t opal_pci_get_xive_reissue(uint64_t phb_id, uint32_t xive_number,
uint8_t *p_bit, uint8_t *q_bit);
int64_t opal_pci_set_xive_reissue(uint64_t phb_id, uint32_t xive_number,
uint8_t p_bit, uint8_t q_bit);
-int64_t opal_pci_msi_eoi(uint64_t phb_id, uint32_t hw_irq);
int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number,
uint32_t xive_num);
int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num,
diff --git a/trunk/arch/powerpc/include/asm/page_64.h b/trunk/arch/powerpc/include/asm/page_64.h
index 88693cef4f3d..cd915d6b093d 100644
--- a/trunk/arch/powerpc/include/asm/page_64.h
+++ b/trunk/arch/powerpc/include/asm/page_64.h
@@ -99,7 +99,8 @@ extern unsigned long slice_get_unmapped_area(unsigned long addr,
unsigned long len,
unsigned long flags,
unsigned int psize,
- int topdown);
+ int topdown,
+ int use_cache);
extern unsigned int get_slice_psize(struct mm_struct *mm,
unsigned long addr);
diff --git a/trunk/arch/powerpc/include/asm/parport.h b/trunk/arch/powerpc/include/asm/parport.h
index a452968b29ea..6dc2577932b1 100644
--- a/trunk/arch/powerpc/include/asm/parport.h
+++ b/trunk/arch/powerpc/include/asm/parport.h
@@ -21,7 +21,9 @@ static int parport_pc_find_nonpci_ports (int autoirq, int autodma)
int count = 0;
int virq;
- for_each_compatible_node(np, "parallel", "pnpPNP,400") {
+ for (np = NULL; (np = of_find_compatible_node(np,
+ "parallel",
+ "pnpPNP,400")) != NULL;) {
prop = of_get_property(np, "reg", &propsize);
if (!prop || propsize > 6*sizeof(u32))
continue;
diff --git a/trunk/arch/powerpc/include/asm/perf_event_server.h b/trunk/arch/powerpc/include/asm/perf_event_server.h
index f265049dd7d6..d0aec72722e9 100644
--- a/trunk/arch/powerpc/include/asm/perf_event_server.h
+++ b/trunk/arch/powerpc/include/asm/perf_event_server.h
@@ -33,8 +33,6 @@ struct power_pmu {
unsigned long *valp);
int (*get_alternatives)(u64 event_id, unsigned int flags,
u64 alt[]);
- u64 (*bhrb_filter_map)(u64 branch_sample_type);
- void (*config_bhrb)(u64 pmu_bhrb_filter);
void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
int (*limited_pmc_event)(u64 event_id);
u32 flags;
@@ -44,9 +42,6 @@ struct power_pmu {
int (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
[PERF_COUNT_HW_CACHE_OP_MAX]
[PERF_COUNT_HW_CACHE_RESULT_MAX];
-
- /* BHRB entries in the PMU */
- int bhrb_nr;
};
/*
@@ -57,9 +52,6 @@ struct power_pmu {
#define PPMU_NO_SIPR 0x00000004 /* no SIPR/HV in MMCRA at all */
#define PPMU_NO_CONT_SAMPLING 0x00000008 /* no continuous sampling */
#define PPMU_SIAR_VALID 0x00000010 /* Processor has SIAR Valid bit */
-#define PPMU_HAS_SSLOT 0x00000020 /* Has sampled slot in MMCRA */
-#define PPMU_HAS_SIER 0x00000040 /* Has SIER */
-#define PPMU_BHRB 0x00000080 /* has BHRB feature enabled */
/*
* Values for flags to get_alternatives()
@@ -73,7 +65,6 @@ extern int register_power_pmu(struct power_pmu *);
struct pt_regs;
extern unsigned long perf_misc_flags(struct pt_regs *regs);
extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
-extern unsigned long int read_bhrb(int n);
/*
* Only override the default definitions in include/linux/perf_event.h
diff --git a/trunk/arch/powerpc/include/asm/ppc-opcode.h b/trunk/arch/powerpc/include/asm/ppc-opcode.h
index 0c34e4803499..8752bc8e34a3 100644
--- a/trunk/arch/powerpc/include/asm/ppc-opcode.h
+++ b/trunk/arch/powerpc/include/asm/ppc-opcode.h
@@ -82,8 +82,6 @@
#define __REGA0_R31 31
/* sorted alphabetically */
-#define PPC_INST_BHRBE 0x7c00025c
-#define PPC_INST_CLRBHRB 0x7c00035c
#define PPC_INST_DCBA 0x7c0005ec
#define PPC_INST_DCBA_MASK 0xfc0007fe
#define PPC_INST_DCBAL 0x7c2005ec
@@ -299,12 +297,6 @@
#define PPC_NAP stringify_in_c(.long PPC_INST_NAP)
#define PPC_SLEEP stringify_in_c(.long PPC_INST_SLEEP)
-/* BHRB instructions */
-#define PPC_CLRBHRB stringify_in_c(.long PPC_INST_CLRBHRB)
-#define PPC_MFBHRBE(r, n) stringify_in_c(.long PPC_INST_BHRBE | \
- __PPC_RT(r) | \
- (((n) & 0x3ff) << 11))
-
/* Transactional memory instructions */
#define TRECHKPT stringify_in_c(.long PPC_INST_TRECHKPT)
#define TRECLAIM(r) stringify_in_c(.long PPC_INST_TRECLAIM \
diff --git a/trunk/arch/powerpc/include/asm/processor.h b/trunk/arch/powerpc/include/asm/processor.h
index 0a4cc5d649e1..7ff9eaa3ea6c 100644
--- a/trunk/arch/powerpc/include/asm/processor.h
+++ b/trunk/arch/powerpc/include/asm/processor.h
@@ -40,7 +40,7 @@
* -- BenH.
*/
-/* PREP sub-platform types. Unused */
+/* PREP sub-platform types see residual.h for these */
#define _PREP_Motorola 0x01 /* motorola prep */
#define _PREP_Firm 0x02 /* firmworks prep */
#define _PREP_IBM 0x00 /* ibm prep */
@@ -56,6 +56,13 @@
extern int _chrp_type;
+#ifdef CONFIG_PPC_PREP
+
+/* what kind of prep workstation we are */
+extern int _prep_type;
+
+#endif /* CONFIG_PPC_PREP */
+
#endif /* defined(__KERNEL__) && defined(CONFIG_PPC32) */
/*
diff --git a/trunk/arch/powerpc/include/asm/prom.h b/trunk/arch/powerpc/include/asm/prom.h
index bc2da154f68b..99c92d5363e4 100644
--- a/trunk/arch/powerpc/include/asm/prom.h
+++ b/trunk/arch/powerpc/include/asm/prom.h
@@ -74,75 +74,6 @@ struct of_drconf_cell {
#define DRCONF_MEM_AI_INVALID 0x00000040
#define DRCONF_MEM_RESERVED 0x00000080
-/*
- * There are two methods for telling firmware what our capabilities are.
- * Newer machines have an "ibm,client-architecture-support" method on the
- * root node. For older machines, we have to call the "process-elf-header"
- * method in the /packages/elf-loader node, passing it a fake 32-bit
- * ELF header containing a couple of PT_NOTE sections that contain
- * structures that contain various information.
- */
-
-/* New method - extensible architecture description vector. */
-
-/* Option vector bits - generic bits in byte 1 */
-#define OV_IGNORE 0x80 /* ignore this vector */
-#define OV_CESSATION_POLICY 0x40 /* halt if unsupported option present*/
-
-/* Option vector 1: processor architectures supported */
-#define OV1_PPC_2_00 0x80 /* set if we support PowerPC 2.00 */
-#define OV1_PPC_2_01 0x40 /* set if we support PowerPC 2.01 */
-#define OV1_PPC_2_02 0x20 /* set if we support PowerPC 2.02 */
-#define OV1_PPC_2_03 0x10 /* set if we support PowerPC 2.03 */
-#define OV1_PPC_2_04 0x08 /* set if we support PowerPC 2.04 */
-#define OV1_PPC_2_05 0x04 /* set if we support PowerPC 2.05 */
-#define OV1_PPC_2_06 0x02 /* set if we support PowerPC 2.06 */
-#define OV1_PPC_2_07 0x01 /* set if we support PowerPC 2.07 */
-
-/* Option vector 2: Open Firmware options supported */
-#define OV2_REAL_MODE 0x20 /* set if we want OF in real mode */
-
-/* Option vector 3: processor options supported */
-#define OV3_FP 0x80 /* floating point */
-#define OV3_VMX 0x40 /* VMX/Altivec */
-#define OV3_DFP 0x20 /* decimal FP */
-
-/* Option vector 4: IBM PAPR implementation */
-#define OV4_MIN_ENT_CAP 0x01 /* minimum VP entitled capacity */
-
-/* Option vector 5: PAPR/OF options supported
- * These bits are also used in firmware_has_feature() to validate
- * the capabilities reported for vector 5 in the device tree so we
- * encode the vector index in the define and use the OV5_FEAT()
- * and OV5_INDX() macros to extract the desired information.
- */
-#define OV5_FEAT(x) ((x) & 0xff)
-#define OV5_INDX(x) ((x) >> 8)
-#define OV5_LPAR 0x0280 /* logical partitioning supported */
-#define OV5_SPLPAR 0x0240 /* shared-processor LPAR supported */
-/* ibm,dynamic-reconfiguration-memory property supported */
-#define OV5_DRCONF_MEMORY 0x0220
-#define OV5_LARGE_PAGES 0x0210 /* large pages supported */
-#define OV5_DONATE_DEDICATE_CPU 0x0202 /* donate dedicated CPU support */
-#define OV5_MSI 0x0201 /* PCIe/MSI support */
-#define OV5_CMO 0x0480 /* Cooperative Memory Overcommitment */
-#define OV5_XCMO 0x0440 /* Page Coalescing */
-#define OV5_TYPE1_AFFINITY 0x0580 /* Type 1 NUMA affinity */
-#define OV5_PRRN 0x0540 /* Platform Resource Reassignment */
-#define OV5_PFO_HW_RNG 0x0E80 /* PFO Random Number Generator */
-#define OV5_PFO_HW_842 0x0E40 /* PFO Compression Accelerator */
-#define OV5_PFO_HW_ENCR 0x0E20 /* PFO Encryption Accelerator */
-#define OV5_SUB_PROCESSORS 0x0F01 /* 1,2,or 4 Sub-Processors supported */
-
-/* Option Vector 6: IBM PAPR hints */
-#define OV6_LINUX 0x02 /* Linux is our OS */
-
-/*
- * The architecture vector has an array of PVR mask/value pairs,
- * followed by # option vectors - 1, followed by the option vectors.
- */
-extern unsigned char ibm_architecture_vec[];
-
/* These includes are put at the bottom because they may contain things
* that are overridden by this file. Ideally they shouldn't be included
* by this file, but there are a bunch of .c files that currently depend
diff --git a/trunk/arch/powerpc/include/asm/ptrace.h b/trunk/arch/powerpc/include/asm/ptrace.h
index becc08e6a65c..5f995681bc1d 100644
--- a/trunk/arch/powerpc/include/asm/ptrace.h
+++ b/trunk/arch/powerpc/include/asm/ptrace.h
@@ -92,8 +92,7 @@ static inline long regs_return_value(struct pt_regs *regs)
} while(0)
struct task_struct;
-extern int ptrace_get_reg(struct task_struct *task, int regno,
- unsigned long *data);
+extern unsigned long ptrace_get_reg(struct task_struct *task, int regno);
extern int ptrace_put_reg(struct task_struct *task, int regno,
unsigned long data);
diff --git a/trunk/arch/powerpc/include/asm/reg.h b/trunk/arch/powerpc/include/asm/reg.h
index 5c6fbe2c5ce6..c9c67fc888c9 100644
--- a/trunk/arch/powerpc/include/asm/reg.h
+++ b/trunk/arch/powerpc/include/asm/reg.h
@@ -268,13 +268,6 @@
#define SPRN_FSCR 0x099 /* Facility Status & Control Register */
#define FSCR_TAR (1 << (63-55)) /* Enable Target Address Register */
#define FSCR_DSCR (1 << (63-61)) /* Enable Data Stream Control Register */
-#define SPRN_HFSCR 0xbe /* HV=1 Facility Status & Control Register */
-#define HFSCR_TAR (1 << (63-55)) /* Enable Target Address Register */
-#define HFSCR_TM (1 << (63-58)) /* Enable Transactional Memory */
-#define HFSCR_PM (1 << (63-60)) /* Enable prob/priv access to PMU SPRs */
-#define HFSCR_DSCR (1 << (63-61)) /* Enable Data Stream Control Register */
-#define HFSCR_VECVSX (1 << (63-62)) /* Enable VMX/VSX */
-#define HFSCR_FP (1 << (63-63)) /* Enable Floating Point */
#define SPRN_TAR 0x32f /* Target Address Register */
#define SPRN_LPCR 0x13E /* LPAR Control Register */
#define LPCR_VPM0 (1ul << (63-0))
@@ -638,7 +631,6 @@
#define MMCR0_FCWAIT 0x00000002UL /* freeze counter in WAIT state */
#define MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */
#define SPRN_MMCR1 798
-#define SPRN_MMCR2 769
#define SPRN_MMCRA 0x312
#define MMCRA_SDSYNC 0x80000000UL /* SDAR synced with SIAR */
#define MMCRA_SDAR_DCACHE_MISS 0x40000000UL
@@ -657,10 +649,6 @@
#define POWER7P_MMCRA_SIAR_VALID 0x10000000 /* P7+ SIAR contents valid */
#define POWER7P_MMCRA_SDAR_VALID 0x08000000 /* P7+ SDAR contents valid */
-#define SPRN_MMCRH 316 /* Hypervisor monitor mode control register */
-#define SPRN_MMCRS 894 /* Supervisor monitor mode control register */
-#define SPRN_MMCRC 851 /* Core monitor mode control register */
-
#define SPRN_PMC1 787
#define SPRN_PMC2 788
#define SPRN_PMC3 789
@@ -671,11 +659,6 @@
#define SPRN_PMC8 794
#define SPRN_SIAR 780
#define SPRN_SDAR 781
-#define SPRN_SIER 784
-#define SIER_SIPR 0x2000000 /* Sampled MSR_PR */
-#define SIER_SIHV 0x1000000 /* Sampled MSR_HV */
-#define SIER_SIAR_VALID 0x0400000 /* SIAR contents valid */
-#define SIER_SDAR_VALID 0x0200000 /* SDAR contents valid */
#define SPRN_PA6T_MMCR0 795
#define PA6T_MMCR0_EN0 0x0000000000000001UL
diff --git a/trunk/arch/powerpc/include/asm/rtas.h b/trunk/arch/powerpc/include/asm/rtas.h
index a8bc2bb4adc9..aef00c675905 100644
--- a/trunk/arch/powerpc/include/asm/rtas.h
+++ b/trunk/arch/powerpc/include/asm/rtas.h
@@ -143,8 +143,6 @@ struct rtas_suspend_me_data {
#define RTAS_TYPE_PMGM_TIME_ALARM 0x6f
#define RTAS_TYPE_PMGM_CONFIG_CHANGE 0x70
#define RTAS_TYPE_PMGM_SERVICE_PROC 0x71
-/* Platform Resource Reassignment Notification */
-#define RTAS_TYPE_PRRN 0xA0
/* RTAS check-exception vector offset */
#define RTAS_VECTOR_EXTERNAL_INTERRUPT 0x500
@@ -279,10 +277,6 @@ extern int early_init_dt_scan_rtas(unsigned long node,
extern void pSeries_log_error(char *buf, unsigned int err_type, int fatal);
-#ifdef CONFIG_PPC_PSERIES
-extern int pseries_devicetree_update(s32 scope);
-#endif
-
#ifdef CONFIG_PPC_RTAS_DAEMON
extern void rtas_cancel_event_scan(void);
#else
diff --git a/trunk/arch/powerpc/include/asm/smp.h b/trunk/arch/powerpc/include/asm/smp.h
index ffbaabebcdca..195ce2ac5691 100644
--- a/trunk/arch/powerpc/include/asm/smp.h
+++ b/trunk/arch/powerpc/include/asm/smp.h
@@ -143,8 +143,6 @@ extern void __cpu_die(unsigned int cpu);
/* for UP */
#define hard_smp_processor_id() get_hard_smp_processor_id(0)
#define smp_setup_cpu_maps()
-static inline void inhibit_secondary_onlining(void) {}
-static inline void uninhibit_secondary_onlining(void) {}
#endif /* CONFIG_SMP */
diff --git a/trunk/arch/powerpc/include/asm/topology.h b/trunk/arch/powerpc/include/asm/topology.h
index 161ab662843b..852ed1b384f6 100644
--- a/trunk/arch/powerpc/include/asm/topology.h
+++ b/trunk/arch/powerpc/include/asm/topology.h
@@ -71,7 +71,6 @@ static inline void sysfs_remove_device_from_node(struct device *dev,
#if defined(CONFIG_NUMA) && defined(CONFIG_PPC_SPLPAR)
extern int start_topology_update(void);
extern int stop_topology_update(void);
-extern int prrn_is_enabled(void);
#else
static inline int start_topology_update(void)
{
@@ -81,10 +80,6 @@ static inline int stop_topology_update(void)
{
return 0;
}
-static inline int prrn_is_enabled(void)
-{
- return 0;
-}
#endif /* CONFIG_NUMA && CONFIG_PPC_SPLPAR */
#include
diff --git a/trunk/arch/powerpc/include/asm/xics.h b/trunk/arch/powerpc/include/asm/xics.h
index 282d43a0c855..4ae9a09c3b89 100644
--- a/trunk/arch/powerpc/include/asm/xics.h
+++ b/trunk/arch/powerpc/include/asm/xics.h
@@ -150,7 +150,6 @@ extern void xics_register_ics(struct ics *ics);
extern void xics_teardown_cpu(void);
extern void xics_kexec_teardown_cpu(int secondary);
extern void xics_migrate_irqs_away(void);
-extern void icp_native_eoi(struct irq_data *d);
#ifdef CONFIG_SMP
extern int xics_get_irq_server(unsigned int virq, const struct cpumask *cpumask,
unsigned int strict_check);
diff --git a/trunk/arch/powerpc/include/uapi/asm/ptrace.h b/trunk/arch/powerpc/include/uapi/asm/ptrace.h
index 77d2ed35b111..66b9ca4ee94a 100644
--- a/trunk/arch/powerpc/include/uapi/asm/ptrace.h
+++ b/trunk/arch/powerpc/include/uapi/asm/ptrace.h
@@ -211,7 +211,6 @@ struct ppc_debug_info {
#define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x0000000000000002
#define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x0000000000000004
#define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x0000000000000008
-#define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x0000000000000010
#ifndef __ASSEMBLY__
diff --git a/trunk/arch/powerpc/kernel/cpu_setup_power.S b/trunk/arch/powerpc/kernel/cpu_setup_power.S
index e0c419b8d65b..ea847abb0d0a 100644
--- a/trunk/arch/powerpc/kernel/cpu_setup_power.S
+++ b/trunk/arch/powerpc/kernel/cpu_setup_power.S
@@ -49,7 +49,6 @@ _GLOBAL(__restore_cpu_power7)
_GLOBAL(__setup_cpu_power8)
mflr r11
bl __init_FSCR
- bl __init_PMU
bl __init_hvmode_206
mtlr r11
beqlr
@@ -58,28 +57,22 @@ _GLOBAL(__setup_cpu_power8)
mfspr r3,SPRN_LPCR
oris r3, r3, LPCR_AIL_3@h
bl __init_LPCR
- bl __init_HFSCR
bl __init_TLB
- bl __init_PMU_HV
mtlr r11
blr
_GLOBAL(__restore_cpu_power8)
mflr r11
bl __init_FSCR
- bl __init_PMU
mfmsr r3
rldicl. r0,r3,4,63
- mtlr r11
beqlr
li r0,0
mtspr SPRN_LPID,r0
mfspr r3,SPRN_LPCR
oris r3, r3, LPCR_AIL_3@h
bl __init_LPCR
- bl __init_HFSCR
bl __init_TLB
- bl __init_PMU_HV
mtlr r11
blr
@@ -127,12 +120,6 @@ __init_FSCR:
mtspr SPRN_FSCR,r3
blr
-__init_HFSCR:
- mfspr r3,SPRN_HFSCR
- ori r3,r3,HFSCR_TAR|HFSCR_TM|HFSCR_DSCR|HFSCR_VECVSX|HFSCR_FP|HFSCR_PM
- mtspr SPRN_HFSCR,r3
- blr
-
__init_TLB:
/* Clear the TLB */
li r6,128
@@ -144,18 +131,3 @@ __init_TLB:
bdnz 2b
ptesync
1: blr
-
-__init_PMU_HV:
- li r5,0
- mtspr SPRN_MMCRC,r5
- mtspr SPRN_MMCRH,r5
- blr
-
-__init_PMU:
- li r5,0
- mtspr SPRN_MMCRS,r5
- mtspr SPRN_MMCRA,r5
- mtspr SPRN_MMCR0,r5
- mtspr SPRN_MMCR1,r5
- mtspr SPRN_MMCR2,r5
- blr
diff --git a/trunk/arch/powerpc/kernel/cputable.c b/trunk/arch/powerpc/kernel/cputable.c
index 19599ef352bc..75a3d71b895d 100644
--- a/trunk/arch/powerpc/kernel/cputable.c
+++ b/trunk/arch/powerpc/kernel/cputable.c
@@ -275,7 +275,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
.cpu_features = CPU_FTRS_PPC970,
.cpu_user_features = COMMON_USER_POWER4 |
PPC_FEATURE_HAS_ALTIVEC_COMP,
- .mmu_features = MMU_FTRS_PPC970,
+ .mmu_features = MMU_FTR_HPTE_TABLE,
.icache_bsize = 128,
.dcache_bsize = 128,
.num_pmcs = 8,
diff --git a/trunk/arch/powerpc/kernel/dbell.c b/trunk/arch/powerpc/kernel/dbell.c
index d55c76c571f3..9ebbc24bb23c 100644
--- a/trunk/arch/powerpc/kernel/dbell.c
+++ b/trunk/arch/powerpc/kernel/dbell.c
@@ -41,8 +41,6 @@ void doorbell_exception(struct pt_regs *regs)
may_hard_irq_enable();
- __get_cpu_var(irq_stat).doorbell_irqs++;
-
smp_ipi_demux();
irq_exit();
diff --git a/trunk/arch/powerpc/kernel/entry_64.S b/trunk/arch/powerpc/kernel/entry_64.S
index 04d69c4a5ac2..256c5bf0adb7 100644
--- a/trunk/arch/powerpc/kernel/entry_64.S
+++ b/trunk/arch/powerpc/kernel/entry_64.S
@@ -304,7 +304,7 @@ syscall_exit_work:
subi r12,r12,TI_FLAGS
4: /* Anything else left to do? */
- SET_DEFAULT_THREAD_PPR(r3, r10) /* Set thread.ppr = 3 */
+ SET_DEFAULT_THREAD_PPR(r3, r9) /* Set thread.ppr = 3 */
andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
beq .ret_from_except_lite
@@ -657,7 +657,7 @@ resume_kernel:
/* Clear _TIF_EMULATE_STACK_STORE flag */
lis r11,_TIF_EMULATE_STACK_STORE@h
addi r5,r9,TI_FLAGS
-0: ldarx r4,0,r5
+ ldarx r4,0,r5
andc r4,r4,r11
stdcx. r4,0,r5
bne- 0b
diff --git a/trunk/arch/powerpc/kernel/epapr_paravirt.c b/trunk/arch/powerpc/kernel/epapr_paravirt.c
index d44a571e45a7..f3eab8594d9f 100644
--- a/trunk/arch/powerpc/kernel/epapr_paravirt.c
+++ b/trunk/arch/powerpc/kernel/epapr_paravirt.c
@@ -23,10 +23,8 @@
#include
#include
-#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
extern void epapr_ev_idle(void);
extern u32 epapr_ev_idle_start[];
-#endif
bool epapr_paravirt_enabled;
@@ -49,15 +47,11 @@ static int __init epapr_paravirt_init(void)
for (i = 0; i < (len / 4); i++) {
patch_instruction(epapr_hypercall_start + i, insts[i]);
-#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
patch_instruction(epapr_ev_idle_start + i, insts[i]);
-#endif
}
-#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
if (of_get_property(hyper_node, "has-idle", NULL))
ppc_md.power_save = epapr_ev_idle;
-#endif
epapr_paravirt_enabled = true;
diff --git a/trunk/arch/powerpc/kernel/exceptions-64s.S b/trunk/arch/powerpc/kernel/exceptions-64s.S
index 80d56f094a0d..87ef8f5ee5bc 100644
--- a/trunk/arch/powerpc/kernel/exceptions-64s.S
+++ b/trunk/arch/powerpc/kernel/exceptions-64s.S
@@ -235,7 +235,6 @@ instruction_access_slb_pSeries:
.globl hardware_interrupt_hv;
hardware_interrupt_pSeries:
hardware_interrupt_hv:
- HMT_MEDIUM_PPR_DISCARD
BEGIN_FTR_SECTION
_MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
EXC_HV, SOFTEN_TEST_HV)
@@ -255,11 +254,7 @@ hardware_interrupt_hv:
STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
- . = 0x900
- .globl decrementer_pSeries
-decrementer_pSeries:
- _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
-
+ MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
@@ -802,7 +797,7 @@ hardware_interrupt_relon_hv:
_MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
FTR_SECTION_ELSE
_MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
- ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
+ ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_206)
STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
@@ -875,6 +870,10 @@ tm_unavailable_relon_pSeries_1:
. = 0x5500
b denorm_exception_hv
#endif
+#ifdef CONFIG_HVC_SCOM
+ STD_RELON_EXCEPTION_HV(0x5600, 0x1600, maintence_interrupt)
+ KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1600)
+#endif /* CONFIG_HVC_SCOM */
STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
/* Other future vectors */
@@ -1067,6 +1066,78 @@ unrecov_user_slb:
#endif /* __DISABLED__ */
+/*
+ * r13 points to the PACA, r9 contains the saved CR,
+ * r12 contain the saved SRR1, SRR0 is still ready for return
+ * r3 has the faulting address
+ * r9 - r13 are saved in paca->exslb.
+ * r3 is saved in paca->slb_r3
+ * We assume we aren't going to take any exceptions during this procedure.
+ */
+_GLOBAL(slb_miss_realmode)
+ mflr r10
+#ifdef CONFIG_RELOCATABLE
+ mtctr r11
+#endif
+
+ stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
+ std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
+
+ bl .slb_allocate_realmode
+
+ /* All done -- return from exception. */
+
+ ld r10,PACA_EXSLB+EX_LR(r13)
+ ld r3,PACA_EXSLB+EX_R3(r13)
+ lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
+
+ mtlr r10
+
+ andi. r10,r12,MSR_RI /* check for unrecoverable exception */
+ beq- 2f
+
+.machine push
+.machine "power4"
+ mtcrf 0x80,r9
+ mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
+.machine pop
+
+ RESTORE_PPR_PACA(PACA_EXSLB, r9)
+ ld r9,PACA_EXSLB+EX_R9(r13)
+ ld r10,PACA_EXSLB+EX_R10(r13)
+ ld r11,PACA_EXSLB+EX_R11(r13)
+ ld r12,PACA_EXSLB+EX_R12(r13)
+ ld r13,PACA_EXSLB+EX_R13(r13)
+ rfid
+ b . /* prevent speculative execution */
+
+2: mfspr r11,SPRN_SRR0
+ ld r10,PACAKBASE(r13)
+ LOAD_HANDLER(r10,unrecov_slb)
+ mtspr SPRN_SRR0,r10
+ ld r10,PACAKMSR(r13)
+ mtspr SPRN_SRR1,r10
+ rfid
+ b .
+
+unrecov_slb:
+ EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
+ DISABLE_INTS
+ bl .save_nvgprs
+1: addi r3,r1,STACK_FRAME_OVERHEAD
+ bl .unrecoverable_exception
+ b 1b
+
+
+#ifdef CONFIG_PPC_970_NAP
+power4_fixup_nap:
+ andc r9,r9,r10
+ std r9,TI_LOCAL_FLAGS(r11)
+ ld r10,_LINK(r1) /* make idle task do the */
+ std r10,_NIP(r1) /* equivalent of a blr */
+ blr
+#endif
+
.align 7
.globl alignment_common
alignment_common:
@@ -1264,78 +1335,6 @@ _GLOBAL(opal_mc_secondary_handler)
#endif /* CONFIG_PPC_POWERNV */
-/*
- * r13 points to the PACA, r9 contains the saved CR,
- * r12 contain the saved SRR1, SRR0 is still ready for return
- * r3 has the faulting address
- * r9 - r13 are saved in paca->exslb.
- * r3 is saved in paca->slb_r3
- * We assume we aren't going to take any exceptions during this procedure.
- */
-_GLOBAL(slb_miss_realmode)
- mflr r10
-#ifdef CONFIG_RELOCATABLE
- mtctr r11
-#endif
-
- stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
- std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
-
- bl .slb_allocate_realmode
-
- /* All done -- return from exception. */
-
- ld r10,PACA_EXSLB+EX_LR(r13)
- ld r3,PACA_EXSLB+EX_R3(r13)
- lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
-
- mtlr r10
-
- andi. r10,r12,MSR_RI /* check for unrecoverable exception */
- beq- 2f
-
-.machine push
-.machine "power4"
- mtcrf 0x80,r9
- mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
-.machine pop
-
- RESTORE_PPR_PACA(PACA_EXSLB, r9)
- ld r9,PACA_EXSLB+EX_R9(r13)
- ld r10,PACA_EXSLB+EX_R10(r13)
- ld r11,PACA_EXSLB+EX_R11(r13)
- ld r12,PACA_EXSLB+EX_R12(r13)
- ld r13,PACA_EXSLB+EX_R13(r13)
- rfid
- b . /* prevent speculative execution */
-
-2: mfspr r11,SPRN_SRR0
- ld r10,PACAKBASE(r13)
- LOAD_HANDLER(r10,unrecov_slb)
- mtspr SPRN_SRR0,r10
- ld r10,PACAKMSR(r13)
- mtspr SPRN_SRR1,r10
- rfid
- b .
-
-unrecov_slb:
- EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
- DISABLE_INTS
- bl .save_nvgprs
-1: addi r3,r1,STACK_FRAME_OVERHEAD
- bl .unrecoverable_exception
- b 1b
-
-
-#ifdef CONFIG_PPC_970_NAP
-power4_fixup_nap:
- andc r9,r9,r10
- std r9,TI_LOCAL_FLAGS(r11)
- ld r10,_LINK(r1) /* make idle task do the */
- std r10,_NIP(r1) /* equivalent of a blr */
- blr
-#endif
-
/*
* Hash table stuff
*/
@@ -1453,36 +1452,20 @@ do_ste_alloc:
_GLOBAL(do_stab_bolted)
stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
- mfspr r11,SPRN_DAR /* ea */
- /*
- * check for bad kernel/user address
- * (ea & ~REGION_MASK) >= PGTABLE_RANGE
- */
- rldicr. r9,r11,4,(63 - 46 - 4)
- li r9,0 /* VSID = 0 for bad address */
- bne- 0f
-
- /*
- * Calculate VSID:
- * This is the kernel vsid, we take the top for context from
- * the range. context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
- * Here we know that (ea >> 60) == 0xc
- */
- lis r9,(MAX_USER_CONTEXT + 1)@ha
- addi r9,r9,(MAX_USER_CONTEXT + 1)@l
-
- srdi r10,r11,SID_SHIFT
- rldimi r10,r9,ESID_BITS,0 /* proto vsid */
- ASM_VSID_SCRAMBLE(r10, r9, 256M)
- rldic r9,r10,12,16 /* r9 = vsid << 12 */
-
-0:
/* Hash to the primary group */
ld r10,PACASTABVIRT(r13)
- srdi r11,r11,SID_SHIFT
+ mfspr r11,SPRN_DAR
+ srdi r11,r11,28
rldimi r10,r11,7,52 /* r10 = first ste of the group */
+ /* Calculate VSID */
+ /* This is a kernel address, so protovsid = ESID | 1 << 37 */
+ li r9,0x1
+ rldimi r11,r9,(CONTEXT_BITS + USER_ESID_BITS),0
+ ASM_VSID_SCRAMBLE(r11, r9, 256M)
+ rldic r9,r11,12,16 /* r9 = vsid << 12 */
+
/* Search the primary group for a free entry */
1: ld r11,0(r10) /* Test valid bit of the current ste */
andi. r11,r11,0x80
diff --git a/trunk/arch/powerpc/kernel/head_64.S b/trunk/arch/powerpc/kernel/head_64.S
index b61363d557b5..0886ae6dd5be 100644
--- a/trunk/arch/powerpc/kernel/head_64.S
+++ b/trunk/arch/powerpc/kernel/head_64.S
@@ -509,7 +509,6 @@ _GLOBAL(copy_and_flush)
sync
addi r5,r5,8
addi r6,r6,8
- isync
blr
.align 8
diff --git a/trunk/arch/powerpc/kernel/iommu.c b/trunk/arch/powerpc/kernel/iommu.c
index c0d0dbddfba1..31c4fdc6859c 100644
--- a/trunk/arch/powerpc/kernel/iommu.c
+++ b/trunk/arch/powerpc/kernel/iommu.c
@@ -102,7 +102,7 @@ static int __init fail_iommu_debugfs(void)
struct dentry *dir = fault_create_debugfs_attr("fail_iommu",
NULL, &fail_iommu);
- return PTR_RET(dir);
+ return IS_ERR(dir) ? PTR_ERR(dir) : 0;
}
late_initcall(fail_iommu_debugfs);
diff --git a/trunk/arch/powerpc/kernel/irq.c b/trunk/arch/powerpc/kernel/irq.c
index 5cbcf4d5a808..4f97fe345526 100644
--- a/trunk/arch/powerpc/kernel/irq.c
+++ b/trunk/arch/powerpc/kernel/irq.c
@@ -374,15 +374,6 @@ int arch_show_interrupts(struct seq_file *p, int prec)
seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions);
seq_printf(p, " Machine check exceptions\n");
-#ifdef CONFIG_PPC_DOORBELL
- if (cpu_has_feature(CPU_FTR_DBELL)) {
- seq_printf(p, "%*s: ", prec, "DBL");
- for_each_online_cpu(j)
- seq_printf(p, "%10u ", per_cpu(irq_stat, j).doorbell_irqs);
- seq_printf(p, " Doorbell interrupts\n");
- }
-#endif
-
return 0;
}
@@ -396,9 +387,6 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
sum += per_cpu(irq_stat, cpu).pmu_irqs;
sum += per_cpu(irq_stat, cpu).mce_exceptions;
sum += per_cpu(irq_stat, cpu).spurious_irqs;
-#ifdef CONFIG_PPC_DOORBELL
- sum += per_cpu(irq_stat, cpu).doorbell_irqs;
-#endif
return sum;
}
diff --git a/trunk/arch/powerpc/kernel/kgdb.c b/trunk/arch/powerpc/kernel/kgdb.c
index c1eef241017a..5ca82cd4a374 100644
--- a/trunk/arch/powerpc/kernel/kgdb.c
+++ b/trunk/arch/powerpc/kernel/kgdb.c
@@ -159,7 +159,7 @@ static int kgdb_singlestep(struct pt_regs *regs)
if (user_mode(regs))
return 0;
- backup_current_thread_info = kmalloc(sizeof(struct thread_info), GFP_KERNEL);
+ backup_current_thread_info = (struct thread_info *)kmalloc(sizeof(struct thread_info), GFP_KERNEL);
/*
* On Book E and perhaps other processors, singlestep is handled on
* the critical exception stack. This causes current_thread_info()
diff --git a/trunk/arch/powerpc/kernel/lparcfg.c b/trunk/arch/powerpc/kernel/lparcfg.c
index ab297f492c67..f5725bce9ed2 100644
--- a/trunk/arch/powerpc/kernel/lparcfg.c
+++ b/trunk/arch/powerpc/kernel/lparcfg.c
@@ -301,7 +301,6 @@ static void parse_system_parameter_string(struct seq_file *m)
__pa(rtas_data_buf),
RTAS_DATA_BUF_SIZE);
memcpy(local_buffer, rtas_data_buf, SPLPAR_MAXLENGTH);
- local_buffer[SPLPAR_MAXLENGTH - 1] = '\0';
spin_unlock(&rtas_data_buf_lock);
if (call_status != 0) {
diff --git a/trunk/arch/powerpc/kernel/nvram_64.c b/trunk/arch/powerpc/kernel/nvram_64.c
index 48fbc2b97e95..bec1e930ed73 100644
--- a/trunk/arch/powerpc/kernel/nvram_64.c
+++ b/trunk/arch/powerpc/kernel/nvram_64.c
@@ -511,7 +511,8 @@ int __init nvram_scan_partitions(void)
"detected: 0-length partition\n");
goto out;
}
- tmp_part = kmalloc(sizeof(struct nvram_partition), GFP_KERNEL);
+ tmp_part = (struct nvram_partition *)
+ kmalloc(sizeof(struct nvram_partition), GFP_KERNEL);
err = -ENOMEM;
if (!tmp_part) {
printk(KERN_ERR "nvram_scan_partitions: kmalloc failed\n");
diff --git a/trunk/arch/powerpc/kernel/pci-common.c b/trunk/arch/powerpc/kernel/pci-common.c
index f325dc923409..fa12ae42d98c 100644
--- a/trunk/arch/powerpc/kernel/pci-common.c
+++ b/trunk/arch/powerpc/kernel/pci-common.c
@@ -30,7 +30,6 @@
#include
#include
#include
-#include
#include
#include
@@ -1024,27 +1023,6 @@ void pcibios_setup_bus_self(struct pci_bus *bus)
ppc_md.pci_dma_bus_setup(bus);
}
-void pcibios_setup_device(struct pci_dev *dev)
-{
- /* Fixup NUMA node as it may not be setup yet by the generic
- * code and is needed by the DMA init
- */
- set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
-
- /* Hook up default DMA ops */
- set_dma_ops(&dev->dev, pci_dma_ops);
- set_dma_offset(&dev->dev, PCI_DRAM_OFFSET);
-
- /* Additional platform DMA/iommu setup */
- if (ppc_md.pci_dma_dev_setup)
- ppc_md.pci_dma_dev_setup(dev);
-
- /* Read default IRQs and fixup if necessary */
- pci_read_irq_line(dev);
- if (ppc_md.pci_irq_fixup)
- ppc_md.pci_irq_fixup(dev);
-}
-
void pcibios_setup_bus_devices(struct pci_bus *bus)
{
struct pci_dev *dev;
@@ -1059,7 +1037,23 @@ void pcibios_setup_bus_devices(struct pci_bus *bus)
if (dev->is_added)
continue;
- pcibios_setup_device(dev);
+ /* Fixup NUMA node as it may not be setup yet by the generic
+ * code and is needed by the DMA init
+ */
+ set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
+
+ /* Hook up default DMA ops */
+ set_dma_ops(&dev->dev, pci_dma_ops);
+ set_dma_offset(&dev->dev, PCI_DRAM_OFFSET);
+
+ /* Additional platform DMA/iommu setup */
+ if (ppc_md.pci_dma_dev_setup)
+ ppc_md.pci_dma_dev_setup(dev);
+
+ /* Read default IRQs and fixup if necessary */
+ pci_read_irq_line(dev);
+ if (ppc_md.pci_irq_fixup)
+ ppc_md.pci_irq_fixup(dev);
}
}
@@ -1500,10 +1494,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
if (ppc_md.pcibios_enable_device_hook(dev))
return -EINVAL;
- /* avoid pcie irq fix up impact on cardbus */
- if (dev->hdr_type != PCI_HEADER_TYPE_CARDBUS)
- pcibios_setup_device(dev);
-
return pci_enable_resources(dev, mask);
}
@@ -1735,15 +1725,3 @@ static void fixup_hide_host_resource_fsl(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl);
-
-static void fixup_vga(struct pci_dev *pdev)
-{
- u16 cmd;
-
- pci_read_config_word(pdev, PCI_COMMAND, &cmd);
- if ((cmd & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) || !vga_default_device())
- vga_set_default_device(pdev);
-
-}
-DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
- PCI_CLASS_DISPLAY_VGA, 8, fixup_vga);
diff --git a/trunk/arch/powerpc/kernel/process.c b/trunk/arch/powerpc/kernel/process.c
index c0dea6f23567..59dd545fdde1 100644
--- a/trunk/arch/powerpc/kernel/process.c
+++ b/trunk/arch/powerpc/kernel/process.c
@@ -555,12 +555,10 @@ static inline void tm_recheckpoint_new_task(struct task_struct *new)
new->thread.regs->msr |=
(MSR_FP | new->thread.fpexc_mode);
}
-#ifdef CONFIG_ALTIVEC
if (msr & MSR_VEC) {
do_load_up_transact_altivec(&new->thread);
new->thread.regs->msr |= MSR_VEC;
}
-#endif
/* We may as well turn on VSX too since all the state is restored now */
if (msr & MSR_VSX)
new->thread.regs->msr |= MSR_VSX;
@@ -912,6 +910,10 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
flush_altivec_to_thread(src);
flush_vsx_to_thread(src);
flush_spe_to_thread(src);
+#ifdef CONFIG_HAVE_HW_BREAKPOINT
+ flush_ptrace_hw_breakpoint(src);
+#endif /* CONFIG_HAVE_HW_BREAKPOINT */
+
*dst = *src;
return 0;
}
@@ -982,10 +984,6 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
_ALIGN_UP(sizeof(struct thread_info), 16);
-#ifdef CONFIG_HAVE_HW_BREAKPOINT
- p->thread.ptrace_bps[0] = NULL;
-#endif
-
#ifdef CONFIG_PPC_STD_MMU_64
if (mmu_has_feature(MMU_FTR_SLB)) {
unsigned long sp_vsid;
diff --git a/trunk/arch/powerpc/kernel/prom_init.c b/trunk/arch/powerpc/kernel/prom_init.c
index 5eccda9fd33f..7f7fb7fd991b 100644
--- a/trunk/arch/powerpc/kernel/prom_init.c
+++ b/trunk/arch/powerpc/kernel/prom_init.c
@@ -627,11 +627,16 @@ static void __init early_cmdline_parse(void)
#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
/*
- * The architecture vector has an array of PVR mask/value pairs,
- * followed by # option vectors - 1, followed by the option vectors.
- *
- * See prom.h for the definition of the bits specified in the
- * architecture vector.
+ * There are two methods for telling firmware what our capabilities are.
+ * Newer machines have an "ibm,client-architecture-support" method on the
+ * root node. For older machines, we have to call the "process-elf-header"
+ * method in the /packages/elf-loader node, passing it a fake 32-bit
+ * ELF header containing a couple of PT_NOTE sections that contain
+ * structures that contain various information.
+ */
+
+/*
+ * New method - extensible architecture description vector.
*
* Because the description vector contains a mix of byte and word
* values, we declare it as an unsigned char array, and use this
@@ -640,7 +645,65 @@ static void __init early_cmdline_parse(void)
#define W(x) ((x) >> 24) & 0xff, ((x) >> 16) & 0xff, \
((x) >> 8) & 0xff, (x) & 0xff
-unsigned char ibm_architecture_vec[] = {
+/* Option vector bits - generic bits in byte 1 */
+#define OV_IGNORE 0x80 /* ignore this vector */
+#define OV_CESSATION_POLICY 0x40 /* halt if unsupported option present*/
+
+/* Option vector 1: processor architectures supported */
+#define OV1_PPC_2_00 0x80 /* set if we support PowerPC 2.00 */
+#define OV1_PPC_2_01 0x40 /* set if we support PowerPC 2.01 */
+#define OV1_PPC_2_02 0x20 /* set if we support PowerPC 2.02 */
+#define OV1_PPC_2_03 0x10 /* set if we support PowerPC 2.03 */
+#define OV1_PPC_2_04 0x08 /* set if we support PowerPC 2.04 */
+#define OV1_PPC_2_05 0x04 /* set if we support PowerPC 2.05 */
+#define OV1_PPC_2_06 0x02 /* set if we support PowerPC 2.06 */
+#define OV1_PPC_2_07 0x01 /* set if we support PowerPC 2.07 */
+
+/* Option vector 2: Open Firmware options supported */
+#define OV2_REAL_MODE 0x20 /* set if we want OF in real mode */
+
+/* Option vector 3: processor options supported */
+#define OV3_FP 0x80 /* floating point */
+#define OV3_VMX 0x40 /* VMX/Altivec */
+#define OV3_DFP 0x20 /* decimal FP */
+
+/* Option vector 4: IBM PAPR implementation */
+#define OV4_MIN_ENT_CAP 0x01 /* minimum VP entitled capacity */
+
+/* Option vector 5: PAPR/OF options supported */
+#define OV5_LPAR 0x80 /* logical partitioning supported */
+#define OV5_SPLPAR 0x40 /* shared-processor LPAR supported */
+/* ibm,dynamic-reconfiguration-memory property supported */
+#define OV5_DRCONF_MEMORY 0x20
+#define OV5_LARGE_PAGES 0x10 /* large pages supported */
+#define OV5_DONATE_DEDICATE_CPU 0x02 /* donate dedicated CPU support */
+/* PCIe/MSI support. Without MSI full PCIe is not supported */
+#ifdef CONFIG_PCI_MSI
+#define OV5_MSI 0x01 /* PCIe/MSI support */
+#else
+#define OV5_MSI 0x00
+#endif /* CONFIG_PCI_MSI */
+#ifdef CONFIG_PPC_SMLPAR
+#define OV5_CMO 0x80 /* Cooperative Memory Overcommitment */
+#define OV5_XCMO 0x40 /* Page Coalescing */
+#else
+#define OV5_CMO 0x00
+#define OV5_XCMO 0x00
+#endif
+#define OV5_TYPE1_AFFINITY 0x80 /* Type 1 NUMA affinity */
+#define OV5_PFO_HW_RNG 0x80 /* PFO Random Number Generator */
+#define OV5_PFO_HW_842 0x40 /* PFO Compression Accelerator */
+#define OV5_PFO_HW_ENCR 0x20 /* PFO Encryption Accelerator */
+#define OV5_SUB_PROCESSORS 0x01 /* 1,2,or 4 Sub-Processors supported */
+
+/* Option Vector 6: IBM PAPR hints */
+#define OV6_LINUX 0x02 /* Linux is our OS */
+
+/*
+ * The architecture vector has an array of PVR mask/value pairs,
+ * followed by # option vectors - 1, followed by the option vectors.
+ */
+static unsigned char ibm_architecture_vec[] = {
W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */
W(0xffff0000), W(0x003e0000), /* POWER6 */
W(0xffff0000), W(0x003f0000), /* POWER7 */
@@ -684,21 +747,11 @@ unsigned char ibm_architecture_vec[] = {
/* option vector 5: PAPR/OF options */
19 - 2, /* length */
0, /* don't ignore, don't halt */
- OV5_FEAT(OV5_LPAR) | OV5_FEAT(OV5_SPLPAR) | OV5_FEAT(OV5_LARGE_PAGES) |
- OV5_FEAT(OV5_DRCONF_MEMORY) | OV5_FEAT(OV5_DONATE_DEDICATE_CPU) |
-#ifdef CONFIG_PCI_MSI
- /* PCIe/MSI support. Without MSI full PCIe is not supported */
- OV5_FEAT(OV5_MSI),
-#else
+ OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY |
+ OV5_DONATE_DEDICATE_CPU | OV5_MSI,
0,
-#endif
- 0,
-#ifdef CONFIG_PPC_SMLPAR
- OV5_FEAT(OV5_CMO) | OV5_FEAT(OV5_XCMO),
-#else
- 0,
-#endif
- OV5_FEAT(OV5_TYPE1_AFFINITY) | OV5_FEAT(OV5_PRRN),
+ OV5_CMO | OV5_XCMO,
+ OV5_TYPE1_AFFINITY,
0,
0,
0,
@@ -712,9 +765,8 @@ unsigned char ibm_architecture_vec[] = {
0,
0,
0,
- OV5_FEAT(OV5_PFO_HW_RNG) | OV5_FEAT(OV5_PFO_HW_ENCR) |
- OV5_FEAT(OV5_PFO_HW_842),
- OV5_FEAT(OV5_SUB_PROCESSORS),
+ OV5_PFO_HW_RNG | OV5_PFO_HW_ENCR | OV5_PFO_HW_842,
+ OV5_SUB_PROCESSORS,
/* option vector 6: IBM PAPR hints */
4 - 2, /* length */
0,
@@ -2780,13 +2832,11 @@ static void unreloc_toc(void)
{
}
#else
-static void __reloc_toc(unsigned long offset, unsigned long nr_entries)
+static void __reloc_toc(void *tocstart, unsigned long offset,
+ unsigned long nr_entries)
{
unsigned long i;
- unsigned long *toc_entry;
-
- /* Get the start of the TOC by using r2 directly. */
- asm volatile("addi %0,2,-0x8000" : "=b" (toc_entry));
+ unsigned long *toc_entry = (unsigned long *)tocstart;
for (i = 0; i < nr_entries; i++) {
*toc_entry = *toc_entry + offset;
@@ -2800,7 +2850,8 @@ static void reloc_toc(void)
unsigned long nr_entries =
(__prom_init_toc_end - __prom_init_toc_start) / sizeof(long);
- __reloc_toc(offset, nr_entries);
+ /* Need to add offset to get at __prom_init_toc_start */
+ __reloc_toc(__prom_init_toc_start + offset, offset, nr_entries);
mb();
}
@@ -2813,7 +2864,8 @@ static void unreloc_toc(void)
mb();
- __reloc_toc(-offset, nr_entries);
+ /* __prom_init_toc_start has been relocated, no need to add offset */
+ __reloc_toc(__prom_init_toc_start, -offset, nr_entries);
}
#endif
#endif
diff --git a/trunk/arch/powerpc/kernel/ptrace.c b/trunk/arch/powerpc/kernel/ptrace.c
index 3b14d320e69f..245c1b6a0858 100644
--- a/trunk/arch/powerpc/kernel/ptrace.c
+++ b/trunk/arch/powerpc/kernel/ptrace.c
@@ -180,10 +180,9 @@ static int set_user_msr(struct task_struct *task, unsigned long msr)
}
#ifdef CONFIG_PPC64
-static int get_user_dscr(struct task_struct *task, unsigned long *data)
+static unsigned long get_user_dscr(struct task_struct *task)
{
- *data = task->thread.dscr;
- return 0;
+ return task->thread.dscr;
}
static int set_user_dscr(struct task_struct *task, unsigned long dscr)
@@ -193,7 +192,7 @@ static int set_user_dscr(struct task_struct *task, unsigned long dscr)
return 0;
}
#else
-static int get_user_dscr(struct task_struct *task, unsigned long *data)
+static unsigned long get_user_dscr(struct task_struct *task)
{
return -EIO;
}
@@ -217,23 +216,19 @@ static int set_user_trap(struct task_struct *task, unsigned long trap)
/*
* Get contents of register REGNO in task TASK.
*/
-int ptrace_get_reg(struct task_struct *task, int regno, unsigned long *data)
+unsigned long ptrace_get_reg(struct task_struct *task, int regno)
{
- if ((task->thread.regs == NULL) || !data)
+ if (task->thread.regs == NULL)
return -EIO;
- if (regno == PT_MSR) {
- *data = get_user_msr(task);
- return 0;
- }
+ if (regno == PT_MSR)
+ return get_user_msr(task);
if (regno == PT_DSCR)
- return get_user_dscr(task, data);
+ return get_user_dscr(task);
- if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) {
- *data = ((unsigned long *)task->thread.regs)[regno];
- return 0;
- }
+ if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
+ return ((unsigned long *)task->thread.regs)[regno];
return -EIO;
}
@@ -1433,7 +1428,6 @@ static long ppc_set_hwdebug(struct task_struct *child,
brk.address = bp_info->addr & ~7UL;
brk.type = HW_BRK_TYPE_TRANSLATE;
- brk.len = 8;
if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
brk.type |= HW_BRK_TYPE_READ;
if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
@@ -1565,9 +1559,7 @@ long arch_ptrace(struct task_struct *child, long request,
CHECK_FULL_REGS(child->thread.regs);
if (index < PT_FPR0) {
- ret = ptrace_get_reg(child, (int) index, &tmp);
- if (ret)
- break;
+ tmp = ptrace_get_reg(child, (int) index);
} else {
unsigned int fpidx = index - PT_FPR0;
@@ -1644,8 +1636,6 @@ long arch_ptrace(struct task_struct *child, long request,
dbginfo.sizeof_condition = 0;
#ifdef CONFIG_HAVE_HW_BREAKPOINT
dbginfo.features = PPC_DEBUG_FEATURE_DATA_BP_RANGE;
- if (cpu_has_feature(CPU_FTR_DAWR))
- dbginfo.features |= PPC_DEBUG_FEATURE_DATA_BP_DAWR;
#else
dbginfo.features = 0;
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
diff --git a/trunk/arch/powerpc/kernel/ptrace32.c b/trunk/arch/powerpc/kernel/ptrace32.c
index f51599e941c7..c0244e766834 100644
--- a/trunk/arch/powerpc/kernel/ptrace32.c
+++ b/trunk/arch/powerpc/kernel/ptrace32.c
@@ -95,9 +95,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
CHECK_FULL_REGS(child->thread.regs);
if (index < PT_FPR0) {
- ret = ptrace_get_reg(child, index, &tmp);
- if (ret)
- break;
+ tmp = ptrace_get_reg(child, index);
} else {
flush_fp_to_thread(child);
/*
@@ -150,11 +148,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
tmp = ((u64 *)child->thread.fpr)
[FPRINDEX_3264(numReg)];
} else { /* register within PT_REGS struct */
- unsigned long tmp2;
- ret = ptrace_get_reg(child, numReg, &tmp2);
- if (ret)
- break;
- tmp = tmp2;
+ tmp = ptrace_get_reg(child, numReg);
}
reg32bits = ((u32*)&tmp)[part];
ret = put_user(reg32bits, (u32 __user *)data);
@@ -238,10 +232,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
break;
CHECK_FULL_REGS(child->thread.regs);
if (numReg < PT_FPR0) {
- unsigned long freg;
- ret = ptrace_get_reg(child, numReg, &freg);
- if (ret)
- break;
+ unsigned long freg = ptrace_get_reg(child, numReg);
if (index % 2)
freg = (freg & ~0xfffffffful) | (data & 0xfffffffful);
else
diff --git a/trunk/arch/powerpc/kernel/rtas_flash.c b/trunk/arch/powerpc/kernel/rtas_flash.c
index a3e4034b6843..c642f0132988 100644
--- a/trunk/arch/powerpc/kernel/rtas_flash.c
+++ b/trunk/arch/powerpc/kernel/rtas_flash.c
@@ -57,31 +57,13 @@
#define VALIDATE_READY -1001 /* Firmware image ready for validation */
#define VALIDATE_PARAM_ERR -3 /* RTAS Parameter Error */
#define VALIDATE_HW_ERR -1 /* RTAS Hardware Error */
-
-/* ibm,validate-flash-image update result tokens */
-#define VALIDATE_TMP_UPDATE 0 /* T side will be updated */
-#define VALIDATE_FLASH_AUTH 1 /* Partition does not have authority */
-#define VALIDATE_INVALID_IMG 2 /* Candidate image is not valid */
-#define VALIDATE_CUR_UNKNOWN 3 /* Current fixpack level is unknown */
-/*
- * Current T side will be committed to P side before being replace with new
- * image, and the new image is downlevel from current image
- */
-#define VALIDATE_TMP_COMMIT_DL 4
-/*
- * Current T side will be committed to P side before being replaced with new
- * image
- */
-#define VALIDATE_TMP_COMMIT 5
-/*
- * T side will be updated with a downlevel image
- */
-#define VALIDATE_TMP_UPDATE_DL 6
-/*
- * The candidate image's release date is later than the system's firmware
- * service entitlement date - service warranty period has expired
- */
-#define VALIDATE_OUT_OF_WRNTY 7
+#define VALIDATE_TMP_UPDATE 0 /* Validate Return Status */
+#define VALIDATE_FLASH_AUTH 1 /* Validate Return Status */
+#define VALIDATE_INVALID_IMG 2 /* Validate Return Status */
+#define VALIDATE_CUR_UNKNOWN 3 /* Validate Return Status */
+#define VALIDATE_TMP_COMMIT_DL 4 /* Validate Return Status */
+#define VALIDATE_TMP_COMMIT 5 /* Validate Return Status */
+#define VALIDATE_TMP_UPDATE_DL 6 /* Validate Return Status */
/* ibm,manage-flash-image operation tokens */
#define RTAS_REJECT_TMP_IMG 0
@@ -808,11 +790,6 @@ static void __exit rtas_flash_cleanup(void)
{
rtas_flash_term_hook = NULL;
- if (rtas_firmware_flash_list) {
- free_flash_list(rtas_firmware_flash_list);
- rtas_firmware_flash_list = NULL;
- }
-
if (flash_block_cache)
kmem_cache_destroy(flash_block_cache);
diff --git a/trunk/arch/powerpc/kernel/rtas_pci.c b/trunk/arch/powerpc/kernel/rtas_pci.c
index 6e7b7cdeec65..71cb20d6ec61 100644
--- a/trunk/arch/powerpc/kernel/rtas_pci.c
+++ b/trunk/arch/powerpc/kernel/rtas_pci.c
@@ -201,7 +201,7 @@ static void python_countermeasures(struct device_node *dev)
iounmap(chip_regs);
}
-void __init init_pci_config_tokens(void)
+void __init init_pci_config_tokens (void)
{
read_pci_config = rtas_token("read-pci-config");
write_pci_config = rtas_token("write-pci-config");
@@ -209,7 +209,7 @@ void __init init_pci_config_tokens(void)
ibm_write_pci_config = rtas_token("ibm,write-pci-config");
}
-unsigned long get_phb_buid(struct device_node *phb)
+unsigned long get_phb_buid (struct device_node *phb)
{
struct resource r;
diff --git a/trunk/arch/powerpc/kernel/rtasd.c b/trunk/arch/powerpc/kernel/rtasd.c
index 1130c53ad652..1045ff49cc6d 100644
--- a/trunk/arch/powerpc/kernel/rtasd.c
+++ b/trunk/arch/powerpc/kernel/rtasd.c
@@ -29,7 +29,6 @@
#include
#include
#include
-#include
static DEFINE_SPINLOCK(rtasd_log_lock);
@@ -88,8 +87,6 @@ static char *rtas_event_type(int type)
return "Resource Deallocation Event";
case RTAS_TYPE_DUMP:
return "Dump Notification Event";
- case RTAS_TYPE_PRRN:
- return "Platform Resource Reassignment Event";
}
return rtas_type[0];
@@ -268,51 +265,9 @@ void pSeries_log_error(char *buf, unsigned int err_type, int fatal)
spin_unlock_irqrestore(&rtasd_log_lock, s);
return;
}
-}
-
-#ifdef CONFIG_PPC_PSERIES
-static s32 prrn_update_scope;
-static void prrn_work_fn(struct work_struct *work)
-{
- /*
- * For PRRN, we must pass the negative of the scope value in
- * the RTAS event.
- */
- pseries_devicetree_update(-prrn_update_scope);
}
-static DECLARE_WORK(prrn_work, prrn_work_fn);
-
-void prrn_schedule_update(u32 scope)
-{
- flush_work(&prrn_work);
- prrn_update_scope = scope;
- schedule_work(&prrn_work);
-}
-
-static void handle_rtas_event(const struct rtas_error_log *log)
-{
- if (log->type == RTAS_TYPE_PRRN) {
- /* For PRRN Events the extended log length is used to denote
- * the scope for calling rtas update-nodes.
- */
- if (prrn_is_enabled())
- prrn_schedule_update(log->extended_log_length);
- }
-
- return;
-}
-
-#else
-
-static void handle_rtas_event(const struct rtas_error_log *log)
-{
- return;
-}
-
-#endif
-
static int rtas_log_open(struct inode * inode, struct file * file)
{
return 0;
@@ -433,10 +388,8 @@ static void do_event_scan(void)
break;
}
- if (error == 0) {
+ if (error == 0)
pSeries_log_error(logdata, ERR_TYPE_RTAS_LOG, 0);
- handle_rtas_event((struct rtas_error_log *)logdata);
- }
} while(error == 0);
}
diff --git a/trunk/arch/powerpc/kernel/setup-common.c b/trunk/arch/powerpc/kernel/setup-common.c
index 63d051f5b7a5..bdc499c17872 100644
--- a/trunk/arch/powerpc/kernel/setup-common.c
+++ b/trunk/arch/powerpc/kernel/setup-common.c
@@ -621,6 +621,12 @@ int check_legacy_ioport(unsigned long base_port)
case FDC_BASE: /* FDC1 */
np = of_find_node_by_type(NULL, "fdc");
break;
+#ifdef CONFIG_PPC_PREP
+ case _PIDXR:
+ case _PNPWRP:
+ case PNPBIOS_BASE:
+ /* implement me */
+#endif
default:
/* ipmi is supposed to fail here */
break;
diff --git a/trunk/arch/powerpc/kernel/signal_32.c b/trunk/arch/powerpc/kernel/signal_32.c
index 95068bf569ad..3acb28e245b4 100644
--- a/trunk/arch/powerpc/kernel/signal_32.c
+++ b/trunk/arch/powerpc/kernel/signal_32.c
@@ -866,12 +866,10 @@ static long restore_tm_user_regs(struct pt_regs *regs,
do_load_up_transact_fpu(¤t->thread);
regs->msr |= (MSR_FP | current->thread.fpexc_mode);
}
-#ifdef CONFIG_ALTIVEC
if (msr & MSR_VEC) {
do_load_up_transact_altivec(¤t->thread);
regs->msr |= MSR_VEC;
}
-#endif
return 0;
}
diff --git a/trunk/arch/powerpc/kernel/signal_64.c b/trunk/arch/powerpc/kernel/signal_64.c
index c1794286098c..995f8543cb57 100644
--- a/trunk/arch/powerpc/kernel/signal_64.c
+++ b/trunk/arch/powerpc/kernel/signal_64.c
@@ -522,12 +522,10 @@ static long restore_tm_sigcontexts(struct pt_regs *regs,
do_load_up_transact_fpu(¤t->thread);
regs->msr |= (MSR_FP | current->thread.fpexc_mode);
}
-#ifdef CONFIG_ALTIVEC
if (msr & MSR_VEC) {
do_load_up_transact_altivec(¤t->thread);
regs->msr |= MSR_VEC;
}
-#endif
return err;
}
diff --git a/trunk/arch/powerpc/kernel/time.c b/trunk/arch/powerpc/kernel/time.c
index 5fc29ad7e26f..f77fa22754bc 100644
--- a/trunk/arch/powerpc/kernel/time.c
+++ b/trunk/arch/powerpc/kernel/time.c
@@ -1049,8 +1049,10 @@ static int __init rtc_init(void)
return -ENODEV;
pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0);
+ if (IS_ERR(pdev))
+ return PTR_ERR(pdev);
- return PTR_RET(pdev);
+ return 0;
}
module_init(rtc_init);
diff --git a/trunk/arch/powerpc/kernel/tm.S b/trunk/arch/powerpc/kernel/tm.S
index 2da67e7a16d5..84dbace657ce 100644
--- a/trunk/arch/powerpc/kernel/tm.S
+++ b/trunk/arch/powerpc/kernel/tm.S
@@ -309,7 +309,6 @@ _GLOBAL(tm_recheckpoint)
or r5, r6, r5 /* Set MSR.FP+.VSX/.VEC */
mtmsr r5
-#ifdef CONFIG_ALTIVEC
/* FP and VEC registers: These are recheckpointed from thread.fpr[]
* and thread.vr[] respectively. The thread.transact_fpr[] version
* is more modern, and will be loaded subsequently by any FPUnavailable
@@ -324,7 +323,6 @@ _GLOBAL(tm_recheckpoint)
REST_32VRS(0, r5, r3) /* r5 scratch, r3 THREAD ptr */
ld r5, THREAD_VRSAVE(r3)
mtspr SPRN_VRSAVE, r5
-#endif
dont_restore_vec:
andi. r0, r4, MSR_FP
diff --git a/trunk/arch/powerpc/kernel/vdso.c b/trunk/arch/powerpc/kernel/vdso.c
index d4f463ac65b1..1b2076f049ce 100644
--- a/trunk/arch/powerpc/kernel/vdso.c
+++ b/trunk/arch/powerpc/kernel/vdso.c
@@ -113,10 +113,6 @@ static struct vdso_patch_def vdso_patches[] = {
CPU_FTR_USE_TB, 0,
"__kernel_get_tbfreq", NULL
},
- {
- CPU_FTR_USE_TB, 0,
- "__kernel_time", NULL
- },
};
/*
diff --git a/trunk/arch/powerpc/kernel/vdso32/gettimeofday.S b/trunk/arch/powerpc/kernel/vdso32/gettimeofday.S
index 27e2f623210b..4ee09ee2e836 100644
--- a/trunk/arch/powerpc/kernel/vdso32/gettimeofday.S
+++ b/trunk/arch/powerpc/kernel/vdso32/gettimeofday.S
@@ -180,32 +180,6 @@ V_FUNCTION_BEGIN(__kernel_clock_getres)
V_FUNCTION_END(__kernel_clock_getres)
-/*
- * Exact prototype of time()
- *
- * time_t time(time *t);
- *
- */
-V_FUNCTION_BEGIN(__kernel_time)
- .cfi_startproc
- mflr r12
- .cfi_register lr,r12
-
- mr r11,r3 /* r11 holds t */
- bl __get_datapage@local
- mr r9, r3 /* datapage ptr in r9 */
-
- lwz r3,STAMP_XTIME+TSPEC_TV_SEC(r9)
-
- cmplwi r11,0 /* check if t is NULL */
- beq 2f
- stw r3,0(r11) /* store result at *t */
-2: mtlr r12
- crclr cr0*4+so
- blr
- .cfi_endproc
-V_FUNCTION_END(__kernel_time)
-
/*
* This is the core of clock_gettime() and gettimeofday(),
* it returns the current time in r3 (seconds) and r4.
diff --git a/trunk/arch/powerpc/kernel/vdso32/vdso32.lds.S b/trunk/arch/powerpc/kernel/vdso32/vdso32.lds.S
index f223409629b9..43200ba2e570 100644
--- a/trunk/arch/powerpc/kernel/vdso32/vdso32.lds.S
+++ b/trunk/arch/powerpc/kernel/vdso32/vdso32.lds.S
@@ -150,7 +150,6 @@ VERSION
#ifdef CONFIG_PPC64
__kernel_getcpu;
#endif
- __kernel_time;
local: *;
};
diff --git a/trunk/arch/powerpc/kernel/vdso64/gettimeofday.S b/trunk/arch/powerpc/kernel/vdso64/gettimeofday.S
index a76b4af37ef2..e97a9a0dc4ac 100644
--- a/trunk/arch/powerpc/kernel/vdso64/gettimeofday.S
+++ b/trunk/arch/powerpc/kernel/vdso64/gettimeofday.S
@@ -164,32 +164,6 @@ V_FUNCTION_BEGIN(__kernel_clock_getres)
.cfi_endproc
V_FUNCTION_END(__kernel_clock_getres)
-/*
- * Exact prototype of time()
- *
- * time_t time(time *t);
- *
- */
-V_FUNCTION_BEGIN(__kernel_time)
- .cfi_startproc
- mflr r12
- .cfi_register lr,r12
-
- mr r11,r3 /* r11 holds t */
- bl V_LOCAL_FUNC(__get_datapage)
-
- ld r4,STAMP_XTIME+TSPC64_TV_SEC(r3)
-
- cmpldi r11,0 /* check if t is NULL */
- beq 2f
- std r4,0(r11) /* store result at *t */
-2: mtlr r12
- crclr cr0*4+so
- mr r3,r4
- blr
- .cfi_endproc
-V_FUNCTION_END(__kernel_time)
-
/*
* This is the core of clock_gettime() and gettimeofday(),
diff --git a/trunk/arch/powerpc/kernel/vdso64/vdso64.lds.S b/trunk/arch/powerpc/kernel/vdso64/vdso64.lds.S
index e4863819663b..e6c1758f3588 100644
--- a/trunk/arch/powerpc/kernel/vdso64/vdso64.lds.S
+++ b/trunk/arch/powerpc/kernel/vdso64/vdso64.lds.S
@@ -147,7 +147,6 @@ VERSION
__kernel_sync_dicache_p5;
__kernel_sigtramp_rt64;
__kernel_getcpu;
- __kernel_time;
local: *;
};
diff --git a/trunk/arch/powerpc/kvm/book3s_64_mmu_host.c b/trunk/arch/powerpc/kvm/book3s_64_mmu_host.c
index 5d7d29a313eb..ead58e317294 100644
--- a/trunk/arch/powerpc/kvm/book3s_64_mmu_host.c
+++ b/trunk/arch/powerpc/kvm/book3s_64_mmu_host.c
@@ -326,8 +326,8 @@ int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
vcpu3s->context_id[0] = err;
vcpu3s->proto_vsid_max = ((vcpu3s->context_id[0] + 1)
- << ESID_BITS) - 1;
- vcpu3s->proto_vsid_first = vcpu3s->context_id[0] << ESID_BITS;
+ << USER_ESID_BITS) - 1;
+ vcpu3s->proto_vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS;
vcpu3s->proto_vsid_next = vcpu3s->proto_vsid_first;
kvmppc_mmu_hpte_init(vcpu);
diff --git a/trunk/arch/powerpc/kvm/book3s_hv_interrupts.S b/trunk/arch/powerpc/kvm/book3s_hv_interrupts.S
index 37f1cc417ca0..84035a528c80 100644
--- a/trunk/arch/powerpc/kvm/book3s_hv_interrupts.S
+++ b/trunk/arch/powerpc/kvm/book3s_hv_interrupts.S
@@ -122,16 +122,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
add r8,r8,r7
std r8,HSTATE_DECEXP(r13)
-#ifdef CONFIG_SMP
/*
* On PPC970, if the guest vcpu has an external interrupt pending,
* send ourselves an IPI so as to interrupt the guest once it
* enables interrupts. (It must have interrupts disabled,
* otherwise we would already have delivered the interrupt.)
- *
- * XXX If this is a UP build, smp_send_reschedule is not available,
- * so the interrupt will be delayed until the next time the vcpu
- * enters the guest with interrupts enabled.
*/
BEGIN_FTR_SECTION
ld r0, VCPU_PENDING_EXC(r4)
@@ -146,7 +141,6 @@ BEGIN_FTR_SECTION
mr r4, r31
32:
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
-#endif /* CONFIG_SMP */
/* Jump to partition switch code */
bl .kvmppc_hv_entry_trampoline
diff --git a/trunk/arch/powerpc/kvm/book3s_pr.c b/trunk/arch/powerpc/kvm/book3s_pr.c
index dbdc15aa8127..5e93438afb06 100644
--- a/trunk/arch/powerpc/kvm/book3s_pr.c
+++ b/trunk/arch/powerpc/kvm/book3s_pr.c
@@ -1039,7 +1039,7 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
if (!vcpu_book3s)
goto out;
- vcpu_book3s->shadow_vcpu =
+ vcpu_book3s->shadow_vcpu = (struct kvmppc_book3s_shadow_vcpu *)
kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL);
if (!vcpu_book3s->shadow_vcpu)
goto free_vcpu;
diff --git a/trunk/arch/powerpc/kvm/e500.h b/trunk/arch/powerpc/kvm/e500.h
index 33db48a8ce24..41cefd43655f 100644
--- a/trunk/arch/powerpc/kvm/e500.h
+++ b/trunk/arch/powerpc/kvm/e500.h
@@ -26,20 +26,17 @@
#define E500_PID_NUM 3
#define E500_TLB_NUM 2
-/* entry is mapped somewhere in host TLB */
-#define E500_TLB_VALID (1 << 0)
-/* TLB1 entry is mapped by host TLB1, tracked by bitmaps */
-#define E500_TLB_BITMAP (1 << 1)
-/* TLB1 entry is mapped by host TLB0 */
+#define E500_TLB_VALID 1
+#define E500_TLB_BITMAP 2
#define E500_TLB_TLB0 (1 << 2)
struct tlbe_ref {
- pfn_t pfn; /* valid only for TLB0, except briefly */
- unsigned int flags; /* E500_TLB_* */
+ pfn_t pfn;
+ unsigned int flags; /* E500_TLB_* */
};
struct tlbe_priv {
- struct tlbe_ref ref;
+ struct tlbe_ref ref; /* TLB0 only -- TLB1 uses tlb_refs */
};
#ifdef CONFIG_KVM_E500V2
@@ -66,6 +63,17 @@ struct kvmppc_vcpu_e500 {
unsigned int gtlb_nv[E500_TLB_NUM];
+ /*
+ * information associated with each host TLB entry --
+ * TLB1 only for now. If/when guest TLB1 entries can be
+ * mapped with host TLB0, this will be used for that too.
+ *
+ * We don't want to use this for guest TLB0 because then we'd
+ * have the overhead of doing the translation again even if
+ * the entry is still in the guest TLB (e.g. we swapped out
+ * and back, and our host TLB entries got evicted).
+ */
+ struct tlbe_ref *tlb_refs[E500_TLB_NUM];
unsigned int host_tlb1_nv;
u32 svr;
diff --git a/trunk/arch/powerpc/kvm/e500_mmu_host.c b/trunk/arch/powerpc/kvm/e500_mmu_host.c
index 1c6a9d729df4..a222edfb9a9b 100644
--- a/trunk/arch/powerpc/kvm/e500_mmu_host.c
+++ b/trunk/arch/powerpc/kvm/e500_mmu_host.c
@@ -193,11 +193,8 @@ void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel,
struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[tlbsel][esel].ref;
/* Don't bother with unmapped entries */
- if (!(ref->flags & E500_TLB_VALID)) {
- WARN(ref->flags & (E500_TLB_BITMAP | E500_TLB_TLB0),
- "%s: flags %x\n", __func__, ref->flags);
- WARN_ON(tlbsel == 1 && vcpu_e500->g2h_tlb1_map[esel]);
- }
+ if (!(ref->flags & E500_TLB_VALID))
+ return;
if (tlbsel == 1 && ref->flags & E500_TLB_BITMAP) {
u64 tmp = vcpu_e500->g2h_tlb1_map[esel];
@@ -251,7 +248,7 @@ static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
pfn_t pfn)
{
ref->pfn = pfn;
- ref->flags |= E500_TLB_VALID;
+ ref->flags = E500_TLB_VALID;
if (tlbe_is_writable(gtlbe))
kvm_set_pfn_dirty(pfn);
@@ -260,7 +257,6 @@ static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
{
if (ref->flags & E500_TLB_VALID) {
- /* FIXME: don't log bogus pfn for TLB1 */
trace_kvm_booke206_ref_release(ref->pfn, ref->flags);
ref->flags = 0;
}
@@ -278,23 +274,36 @@ static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500)
static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
{
- int tlbsel;
+ int tlbsel = 0;
int i;
- for (tlbsel = 0; tlbsel <= 1; tlbsel++) {
- for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
- struct tlbe_ref *ref =
- &vcpu_e500->gtlb_priv[tlbsel][i].ref;
- kvmppc_e500_ref_release(ref);
- }
+ for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
+ struct tlbe_ref *ref =
+ &vcpu_e500->gtlb_priv[tlbsel][i].ref;
+ kvmppc_e500_ref_release(ref);
}
}
-void kvmppc_core_flush_tlb(struct kvm_vcpu *vcpu)
+static void clear_tlb_refs(struct kvmppc_vcpu_e500 *vcpu_e500)
{
- struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+ int stlbsel = 1;
+ int i;
+
kvmppc_e500_tlbil_all(vcpu_e500);
+
+ for (i = 0; i < host_tlb_params[stlbsel].entries; i++) {
+ struct tlbe_ref *ref =
+ &vcpu_e500->tlb_refs[stlbsel][i];
+ kvmppc_e500_ref_release(ref);
+ }
+
clear_tlb_privs(vcpu_e500);
+}
+
+void kvmppc_core_flush_tlb(struct kvm_vcpu *vcpu)
+{
+ struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+ clear_tlb_refs(vcpu_e500);
clear_tlb1_bitmap(vcpu_e500);
}
@@ -449,6 +458,8 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
}
+ /* Drop old ref and setup new one. */
+ kvmppc_e500_ref_release(ref);
kvmppc_e500_ref_setup(ref, gtlbe, pfn);
kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
@@ -496,15 +507,14 @@ static int kvmppc_e500_tlb1_map_tlb1(struct kvmppc_vcpu_e500 *vcpu_e500,
if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size()))
vcpu_e500->host_tlb1_nv = 0;
+ vcpu_e500->tlb_refs[1][sesel] = *ref;
+ vcpu_e500->g2h_tlb1_map[esel] |= (u64)1 << sesel;
+ vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_BITMAP;
if (vcpu_e500->h2g_tlb1_rmap[sesel]) {
- unsigned int idx = vcpu_e500->h2g_tlb1_rmap[sesel] - 1;
+ unsigned int idx = vcpu_e500->h2g_tlb1_rmap[sesel];
vcpu_e500->g2h_tlb1_map[idx] &= ~(1ULL << sesel);
}
-
- vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_BITMAP;
- vcpu_e500->g2h_tlb1_map[esel] |= (u64)1 << sesel;
- vcpu_e500->h2g_tlb1_rmap[sesel] = esel + 1;
- WARN_ON(!(ref->flags & E500_TLB_VALID));
+ vcpu_e500->h2g_tlb1_rmap[sesel] = esel;
return sesel;
}
@@ -516,12 +526,13 @@ static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
struct kvm_book3e_206_tlb_entry *stlbe, int esel)
{
- struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[1][esel].ref;
+ struct tlbe_ref ref;
int sesel;
int r;
+ ref.flags = 0;
r = kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe,
- ref);
+ &ref);
if (r)
return r;
@@ -533,7 +544,7 @@ static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
}
/* Otherwise map into TLB1 */
- sesel = kvmppc_e500_tlb1_map_tlb1(vcpu_e500, ref, esel);
+ sesel = kvmppc_e500_tlb1_map_tlb1(vcpu_e500, &ref, esel);
write_stlbe(vcpu_e500, gtlbe, stlbe, 1, sesel);
return 0;
@@ -554,7 +565,7 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
case 0:
priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
- /* Triggers after clear_tlb_privs or on initial mapping */
+ /* Triggers after clear_tlb_refs or on initial mapping */
if (!(priv->ref.flags & E500_TLB_VALID)) {
kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
} else {
@@ -654,16 +665,35 @@ int e500_mmu_host_init(struct kvmppc_vcpu_e500 *vcpu_e500)
host_tlb_params[0].entries / host_tlb_params[0].ways;
host_tlb_params[1].sets = 1;
+ vcpu_e500->tlb_refs[0] =
+ kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[0].entries,
+ GFP_KERNEL);
+ if (!vcpu_e500->tlb_refs[0])
+ goto err;
+
+ vcpu_e500->tlb_refs[1] =
+ kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[1].entries,
+ GFP_KERNEL);
+ if (!vcpu_e500->tlb_refs[1])
+ goto err;
+
vcpu_e500->h2g_tlb1_rmap = kzalloc(sizeof(unsigned int) *
host_tlb_params[1].entries,
GFP_KERNEL);
if (!vcpu_e500->h2g_tlb1_rmap)
- return -EINVAL;
+ goto err;
return 0;
+
+err:
+ kfree(vcpu_e500->tlb_refs[0]);
+ kfree(vcpu_e500->tlb_refs[1]);
+ return -EINVAL;
}
void e500_mmu_host_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
{
kfree(vcpu_e500->h2g_tlb1_rmap);
+ kfree(vcpu_e500->tlb_refs[0]);
+ kfree(vcpu_e500->tlb_refs[1]);
}
diff --git a/trunk/arch/powerpc/kvm/e500mc.c b/trunk/arch/powerpc/kvm/e500mc.c
index 2f4baa074b2e..1f89d26e65fb 100644
--- a/trunk/arch/powerpc/kvm/e500mc.c
+++ b/trunk/arch/powerpc/kvm/e500mc.c
@@ -108,8 +108,6 @@ void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)
{
}
-static DEFINE_PER_CPU(struct kvm_vcpu *, last_vcpu_on_cpu);
-
void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
{
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
@@ -138,11 +136,8 @@ void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
mtspr(SPRN_GDEAR, vcpu->arch.shared->dar);
mtspr(SPRN_GESR, vcpu->arch.shared->esr);
- if (vcpu->arch.oldpir != mfspr(SPRN_PIR) ||
- __get_cpu_var(last_vcpu_on_cpu) != vcpu) {
+ if (vcpu->arch.oldpir != mfspr(SPRN_PIR))
kvmppc_e500_tlbil_all(vcpu_e500);
- __get_cpu_var(last_vcpu_on_cpu) = vcpu;
- }
kvmppc_load_guest_fp(vcpu);
}
diff --git a/trunk/arch/powerpc/mm/hash_utils_64.c b/trunk/arch/powerpc/mm/hash_utils_64.c
index 1ed4419c533b..1b6e1271719f 100644
--- a/trunk/arch/powerpc/mm/hash_utils_64.c
+++ b/trunk/arch/powerpc/mm/hash_utils_64.c
@@ -195,11 +195,6 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
unsigned long vpn = hpt_vpn(vaddr, vsid, ssize);
unsigned long tprot = prot;
- /*
- * If we hit a bad address return error.
- */
- if (!vsid)
- return -1;
/* Make kernel text executable */
if (overlaps_kernel_text(vaddr, vaddr + step))
tprot &= ~HPTE_R_N;
@@ -764,8 +759,6 @@ void __init early_init_mmu(void)
/* Initialize stab / SLB management */
if (mmu_has_feature(MMU_FTR_SLB))
slb_initialize();
- else
- stab_initialize(get_paca()->stab_real);
}
#ifdef CONFIG_SMP
@@ -929,6 +922,11 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
DBG_LOW("hash_page(ea=%016lx, access=%lx, trap=%lx\n",
ea, access, trap);
+ if ((ea & ~REGION_MASK) >= PGTABLE_RANGE) {
+ DBG_LOW(" out of pgtable range !\n");
+ return 1;
+ }
+
/* Get region & vsid */
switch (REGION_ID(ea)) {
case USER_REGION_ID:
@@ -959,11 +957,6 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
}
DBG_LOW(" mm=%p, mm->pgdir=%p, vsid=%016lx\n", mm, mm->pgd, vsid);
- /* Bad address. */
- if (!vsid) {
- DBG_LOW("Bad address!\n");
- return 1;
- }
/* Get pgdir */
pgdir = mm->pgd;
if (pgdir == NULL)
@@ -1133,8 +1126,6 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
/* Get VSID */
ssize = user_segment_size(ea);
vsid = get_vsid(mm->context.id, ea, ssize);
- if (!vsid)
- return;
/* Hash doesn't like irqs */
local_irq_save(flags);
@@ -1230,60 +1221,21 @@ void low_hash_fault(struct pt_regs *regs, unsigned long address, int rc)
bad_page_fault(regs, address, SIGBUS);
}
-long hpte_insert_repeating(unsigned long hash, unsigned long vpn,
- unsigned long pa, unsigned long rflags,
- unsigned long vflags, int psize, int ssize)
-{
- unsigned long hpte_group;
- long slot;
-
-repeat:
- hpte_group = ((hash & htab_hash_mask) *
- HPTES_PER_GROUP) & ~0x7UL;
-
- /* Insert into the hash table, primary slot */
- slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, vflags,
- psize, ssize);
-
- /* Primary is full, try the secondary */
- if (unlikely(slot == -1)) {
- hpte_group = ((~hash & htab_hash_mask) *
- HPTES_PER_GROUP) & ~0x7UL;
- slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags,
- vflags | HPTE_V_SECONDARY,
- psize, ssize);
- if (slot == -1) {
- if (mftb() & 0x1)
- hpte_group = ((hash & htab_hash_mask) *
- HPTES_PER_GROUP)&~0x7UL;
-
- ppc_md.hpte_remove(hpte_group);
- goto repeat;
- }
- }
-
- return slot;
-}
-
#ifdef CONFIG_DEBUG_PAGEALLOC
static void kernel_map_linear_page(unsigned long vaddr, unsigned long lmi)
{
- unsigned long hash;
+ unsigned long hash, hpteg;
unsigned long vsid = get_kernel_vsid(vaddr, mmu_kernel_ssize);
unsigned long vpn = hpt_vpn(vaddr, vsid, mmu_kernel_ssize);
unsigned long mode = htab_convert_pte_flags(PAGE_KERNEL);
- long ret;
+ int ret;
hash = hpt_hash(vpn, PAGE_SHIFT, mmu_kernel_ssize);
+ hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
- /* Don't create HPTE entries for bad address */
- if (!vsid)
- return;
-
- ret = hpte_insert_repeating(hash, vpn, __pa(vaddr), mode,
- HPTE_V_BOLTED,
- mmu_linear_psize, mmu_kernel_ssize);
-
+ ret = ppc_md.hpte_insert(hpteg, vpn, __pa(vaddr),
+ mode, HPTE_V_BOLTED,
+ mmu_linear_psize, mmu_kernel_ssize);
BUG_ON (ret < 0);
spin_lock(&linear_map_hash_lock);
BUG_ON(linear_map_hash_slots[lmi] & 0x80);
diff --git a/trunk/arch/powerpc/mm/hugetlbpage-hash64.c b/trunk/arch/powerpc/mm/hugetlbpage-hash64.c
index b913f416d97a..cecad348f604 100644
--- a/trunk/arch/powerpc/mm/hugetlbpage-hash64.c
+++ b/trunk/arch/powerpc/mm/hugetlbpage-hash64.c
@@ -14,10 +14,6 @@
#include
#include
-extern long hpte_insert_repeating(unsigned long hash, unsigned long vpn,
- unsigned long pa, unsigned long rlags,
- unsigned long vflags, int psize, int ssize);
-
int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
pte_t *ptep, unsigned long trap, int local, int ssize,
unsigned int shift, unsigned int mmu_psize)
@@ -87,9 +83,14 @@ int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
if (likely(!(old_pte & _PAGE_HASHPTE))) {
unsigned long hash = hpt_hash(vpn, shift, ssize);
+ unsigned long hpte_group;
pa = pte_pfn(__pte(old_pte)) << PAGE_SHIFT;
+repeat:
+ hpte_group = ((hash & htab_hash_mask) *
+ HPTES_PER_GROUP) & ~0x7UL;
+
/* clear HPTE slot informations in new PTE */
#ifdef CONFIG_PPC_64K_PAGES
new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HPTE_SUB0;
@@ -100,8 +101,26 @@ int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
rflags |= (new_pte & (_PAGE_WRITETHRU | _PAGE_NO_CACHE |
_PAGE_COHERENT | _PAGE_GUARDED));
- slot = hpte_insert_repeating(hash, vpn, pa, rflags, 0,
- mmu_psize, ssize);
+ /* Insert into the hash table, primary slot */
+ slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, 0,
+ mmu_psize, ssize);
+
+ /* Primary is full, try the secondary */
+ if (unlikely(slot == -1)) {
+ hpte_group = ((~hash & htab_hash_mask) *
+ HPTES_PER_GROUP) & ~0x7UL;
+ slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags,
+ HPTE_V_SECONDARY,
+ mmu_psize, ssize);
+ if (slot == -1) {
+ if (mftb() & 0x1)
+ hpte_group = ((hash & htab_hash_mask) *
+ HPTES_PER_GROUP)&~0x7UL;
+
+ ppc_md.hpte_remove(hpte_group);
+ goto repeat;
+ }
+ }
/*
* Hypervisor failure. Restore old pte and return -1
diff --git a/trunk/arch/powerpc/mm/hugetlbpage.c b/trunk/arch/powerpc/mm/hugetlbpage.c
index 5dc52d803ed8..1a6de0a7d8eb 100644
--- a/trunk/arch/powerpc/mm/hugetlbpage.c
+++ b/trunk/arch/powerpc/mm/hugetlbpage.c
@@ -742,7 +742,7 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
struct hstate *hstate = hstate_file(file);
int mmu_psize = shift_to_mmu_psize(huge_page_shift(hstate));
- return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1);
+ return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1, 0);
}
#endif
diff --git a/trunk/arch/powerpc/mm/icswx.c b/trunk/arch/powerpc/mm/icswx.c
index 915412e4d5ba..8cdbd8634a58 100644
--- a/trunk/arch/powerpc/mm/icswx.c
+++ b/trunk/arch/powerpc/mm/icswx.c
@@ -67,7 +67,7 @@
void switch_cop(struct mm_struct *next)
{
-#ifdef CONFIG_PPC_ICSWX_PID
+#ifdef CONFIG_ICSWX_PID
mtspr(SPRN_PID, next->context.cop_pid);
#endif
mtspr(SPRN_ACOP, next->context.acop);
diff --git a/trunk/arch/powerpc/mm/mem.c b/trunk/arch/powerpc/mm/mem.c
index 056732e8ca38..f1f7409a4183 100644
--- a/trunk/arch/powerpc/mm/mem.c
+++ b/trunk/arch/powerpc/mm/mem.c
@@ -66,9 +66,10 @@ unsigned long long memory_limit;
#ifdef CONFIG_HIGHMEM
pte_t *kmap_pte;
-EXPORT_SYMBOL(kmap_pte);
pgprot_t kmap_prot;
+
EXPORT_SYMBOL(kmap_prot);
+EXPORT_SYMBOL(kmap_pte);
static inline pte_t *virt_to_kpte(unsigned long vaddr)
{
diff --git a/trunk/arch/powerpc/mm/mmu_context_hash64.c b/trunk/arch/powerpc/mm/mmu_context_hash64.c
index d1d1b92c5b99..40bc5b0ace54 100644
--- a/trunk/arch/powerpc/mm/mmu_context_hash64.c
+++ b/trunk/arch/powerpc/mm/mmu_context_hash64.c
@@ -29,6 +29,15 @@
static DEFINE_SPINLOCK(mmu_context_lock);
static DEFINE_IDA(mmu_context_ida);
+/*
+ * 256MB segment
+ * The proto-VSID space has 2^(CONTEX_BITS + USER_ESID_BITS) - 1 segments
+ * available for user mappings. Each segment contains 2^28 bytes. Each
+ * context maps 2^46 bytes (64TB) so we can support 2^19-1 contexts
+ * (19 == 37 + 28 - 46).
+ */
+#define MAX_CONTEXT ((1UL << CONTEXT_BITS) - 1)
+
int __init_new_context(void)
{
int index;
@@ -47,7 +56,7 @@ int __init_new_context(void)
else if (err)
return err;
- if (index > MAX_USER_CONTEXT) {
+ if (index > MAX_CONTEXT) {
spin_lock(&mmu_context_lock);
ida_remove(&mmu_context_ida, index);
spin_unlock(&mmu_context_lock);
diff --git a/trunk/arch/powerpc/mm/numa.c b/trunk/arch/powerpc/mm/numa.c
index 2d13f90476bd..bba87ca2b4d7 100644
--- a/trunk/arch/powerpc/mm/numa.c
+++ b/trunk/arch/powerpc/mm/numa.c
@@ -22,10 +22,6 @@
#include
#include
#include
-#include
-#include
-#include
-#include
#include
#include
#include
@@ -33,7 +29,6 @@
#include
#include
#include
-#include
static int numa_enabled = 1;
@@ -84,7 +79,7 @@ static void __init setup_node_to_cpumask_map(void)
dbg("Node to cpumask map for %d nodes\n", nr_node_ids);
}
-static int __init fake_numa_create_new_node(unsigned long end_pfn,
+static int __cpuinit fake_numa_create_new_node(unsigned long end_pfn,
unsigned int *nid)
{
unsigned long long mem;
@@ -206,7 +201,7 @@ int __node_distance(int a, int b)
int distance = LOCAL_DISTANCE;
if (!form1_affinity)
- return ((a == b) ? LOCAL_DISTANCE : REMOTE_DISTANCE);
+ return distance;
for (i = 0; i < distance_ref_points_depth; i++) {
if (distance_lookup_table[a][i] == distance_lookup_table[b][i])
@@ -296,7 +291,9 @@ EXPORT_SYMBOL_GPL(of_node_to_nid);
static int __init find_min_common_depth(void)
{
int depth;
+ struct device_node *chosen;
struct device_node *root;
+ const char *vec5;
if (firmware_has_feature(FW_FEATURE_OPAL))
root = of_find_node_by_path("/ibm,opal");
@@ -328,10 +325,24 @@ static int __init find_min_common_depth(void)
distance_ref_points_depth /= sizeof(int);
- if (firmware_has_feature(FW_FEATURE_OPAL) ||
- firmware_has_feature(FW_FEATURE_TYPE1_AFFINITY)) {
- dbg("Using form 1 affinity\n");
+#define VEC5_AFFINITY_BYTE 5
+#define VEC5_AFFINITY 0x80
+
+ if (firmware_has_feature(FW_FEATURE_OPAL))
form1_affinity = 1;
+ else {
+ chosen = of_find_node_by_path("/chosen");
+ if (chosen) {
+ vec5 = of_get_property(chosen,
+ "ibm,architecture-vec-5", NULL);
+ if (vec5 && (vec5[VEC5_AFFINITY_BYTE] &
+ VEC5_AFFINITY)) {
+ dbg("Using form 1 affinity\n");
+ form1_affinity = 1;
+ }
+
+ of_node_put(chosen);
+ }
}
if (form1_affinity) {
@@ -1259,18 +1270,10 @@ u64 memory_hotplug_max(void)
/* Virtual Processor Home Node (VPHN) support */
#ifdef CONFIG_PPC_SPLPAR
-struct topology_update_data {
- struct topology_update_data *next;
- unsigned int cpu;
- int old_nid;
- int new_nid;
-};
-
static u8 vphn_cpu_change_counts[NR_CPUS][MAX_DISTANCE_REF_POINTS];
static cpumask_t cpu_associativity_changes_mask;
static int vphn_enabled;
-static int prrn_enabled;
-static void reset_topology_timer(void);
+static void set_topology_timer(void);
/*
* Store the current values of the associativity change counters in the
@@ -1306,9 +1309,11 @@ static void setup_cpu_associativity_change_counters(void)
*/
static int update_cpu_associativity_changes_mask(void)
{
- int cpu;
+ int cpu, nr_cpus = 0;
cpumask_t *changes = &cpu_associativity_changes_mask;
+ cpumask_clear(changes);
+
for_each_possible_cpu(cpu) {
int i, changed = 0;
u8 *counts = vphn_cpu_change_counts[cpu];
@@ -1322,10 +1327,11 @@ static int update_cpu_associativity_changes_mask(void)
}
if (changed) {
cpumask_set_cpu(cpu, changes);
+ nr_cpus++;
}
}
- return cpumask_weight(changes);
+ return nr_cpus;
}
/*
@@ -1416,85 +1422,41 @@ static long vphn_get_associativity(unsigned long cpu,
return rc;
}
-/*
- * Update the CPU maps and sysfs entries for a single CPU when its NUMA
- * characteristics change. This function doesn't perform any locking and is
- * only safe to call from stop_machine().
- */
-static int update_cpu_topology(void *data)
-{
- struct topology_update_data *update;
- unsigned long cpu;
-
- if (!data)
- return -EINVAL;
-
- cpu = get_cpu();
-
- for (update = data; update; update = update->next) {
- if (cpu != update->cpu)
- continue;
-
- unregister_cpu_under_node(update->cpu, update->old_nid);
- unmap_cpu_from_node(update->cpu);
- map_cpu_to_node(update->cpu, update->new_nid);
- vdso_getcpu_init();
- register_cpu_under_node(update->cpu, update->new_nid);
- }
-
- return 0;
-}
-
/*
* Update the node maps and sysfs entries for each cpu whose home node
* has changed. Returns 1 when the topology has changed, and 0 otherwise.
*/
int arch_update_cpu_topology(void)
{
- unsigned int cpu, changed = 0;
- struct topology_update_data *updates, *ud;
+ int cpu, nid, old_nid, changed = 0;
unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
- cpumask_t updated_cpus;
struct device *dev;
- int weight, i = 0;
-
- weight = cpumask_weight(&cpu_associativity_changes_mask);
- if (!weight)
- return 0;
-
- updates = kzalloc(weight * (sizeof(*updates)), GFP_KERNEL);
- if (!updates)
- return 0;
- cpumask_clear(&updated_cpus);
-
- for_each_cpu(cpu, &cpu_associativity_changes_mask) {
- ud = &updates[i++];
- ud->cpu = cpu;
+ for_each_cpu(cpu,&cpu_associativity_changes_mask) {
vphn_get_associativity(cpu, associativity);
- ud->new_nid = associativity_to_nid(associativity);
-
- if (ud->new_nid < 0 || !node_online(ud->new_nid))
- ud->new_nid = first_online_node;
+ nid = associativity_to_nid(associativity);
- ud->old_nid = numa_cpu_lookup_table[cpu];
- cpumask_set_cpu(cpu, &updated_cpus);
+ if (nid < 0 || !node_online(nid))
+ nid = first_online_node;
- if (i < weight)
- ud->next = &updates[i];
- }
+ old_nid = numa_cpu_lookup_table[cpu];
- stop_machine(update_cpu_topology, &updates[0], &updated_cpus);
-
- for (ud = &updates[0]; ud; ud = ud->next) {
- dev = get_cpu_device(ud->cpu);
+ /* Disable hotplug while we update the cpu
+ * masks and sysfs.
+ */
+ get_online_cpus();
+ unregister_cpu_under_node(cpu, old_nid);
+ unmap_cpu_from_node(cpu);
+ map_cpu_to_node(cpu, nid);
+ register_cpu_under_node(cpu, nid);
+ put_online_cpus();
+
+ dev = get_cpu_device(cpu);
if (dev)
kobject_uevent(&dev->kobj, KOBJ_CHANGE);
- cpumask_clear_cpu(ud->cpu, &cpu_associativity_changes_mask);
changed = 1;
}
- kfree(updates);
return changed;
}
@@ -1511,157 +1473,49 @@ void topology_schedule_update(void)
static void topology_timer_fn(unsigned long ignored)
{
- if (prrn_enabled && cpumask_weight(&cpu_associativity_changes_mask))
+ if (!vphn_enabled)
+ return;
+ if (update_cpu_associativity_changes_mask() > 0)
topology_schedule_update();
- else if (vphn_enabled) {
- if (update_cpu_associativity_changes_mask() > 0)
- topology_schedule_update();
- reset_topology_timer();
- }
+ set_topology_timer();
}
static struct timer_list topology_timer =
TIMER_INITIALIZER(topology_timer_fn, 0, 0);
-static void reset_topology_timer(void)
+static void set_topology_timer(void)
{
topology_timer.data = 0;
topology_timer.expires = jiffies + 60 * HZ;
- mod_timer(&topology_timer, topology_timer.expires);
-}
-
-static void stage_topology_update(int core_id)
-{
- cpumask_or(&cpu_associativity_changes_mask,
- &cpu_associativity_changes_mask, cpu_sibling_mask(core_id));
- reset_topology_timer();
-}
-
-static int dt_update_callback(struct notifier_block *nb,
- unsigned long action, void *data)
-{
- struct of_prop_reconfig *update;
- int rc = NOTIFY_DONE;
-
- switch (action) {
- case OF_RECONFIG_UPDATE_PROPERTY:
- update = (struct of_prop_reconfig *)data;
- if (!of_prop_cmp(update->dn->type, "cpu") &&
- !of_prop_cmp(update->prop->name, "ibm,associativity")) {
- u32 core_id;
- of_property_read_u32(update->dn, "reg", &core_id);
- stage_topology_update(core_id);
- rc = NOTIFY_OK;
- }
- break;
- }
-
- return rc;
+ add_timer(&topology_timer);
}
-static struct notifier_block dt_update_nb = {
- .notifier_call = dt_update_callback,
-};
-
/*
- * Start polling for associativity changes.
+ * Start polling for VPHN associativity changes.
*/
int start_topology_update(void)
{
int rc = 0;
- if (firmware_has_feature(FW_FEATURE_PRRN)) {
- if (!prrn_enabled) {
- prrn_enabled = 1;
- vphn_enabled = 0;
- rc = of_reconfig_notifier_register(&dt_update_nb);
- }
- } else if (firmware_has_feature(FW_FEATURE_VPHN) &&
- get_lppaca()->shared_proc) {
- if (!vphn_enabled) {
- prrn_enabled = 0;
- vphn_enabled = 1;
- setup_cpu_associativity_change_counters();
- init_timer_deferrable(&topology_timer);
- reset_topology_timer();
- }
+ /* Disabled until races with load balancing are fixed */
+ if (0 && firmware_has_feature(FW_FEATURE_VPHN) &&
+ get_lppaca()->shared_proc) {
+ vphn_enabled = 1;
+ setup_cpu_associativity_change_counters();
+ init_timer_deferrable(&topology_timer);
+ set_topology_timer();
+ rc = 1;
}
return rc;
}
+__initcall(start_topology_update);
/*
* Disable polling for VPHN associativity changes.
*/
int stop_topology_update(void)
{
- int rc = 0;
-
- if (prrn_enabled) {
- prrn_enabled = 0;
- rc = of_reconfig_notifier_unregister(&dt_update_nb);
- } else if (vphn_enabled) {
- vphn_enabled = 0;
- rc = del_timer_sync(&topology_timer);
- }
-
- return rc;
-}
-
-int prrn_is_enabled(void)
-{
- return prrn_enabled;
-}
-
-static int topology_read(struct seq_file *file, void *v)
-{
- if (vphn_enabled || prrn_enabled)
- seq_puts(file, "on\n");
- else
- seq_puts(file, "off\n");
-
- return 0;
-}
-
-static int topology_open(struct inode *inode, struct file *file)
-{
- return single_open(file, topology_read, NULL);
-}
-
-static ssize_t topology_write(struct file *file, const char __user *buf,
- size_t count, loff_t *off)
-{
- char kbuf[4]; /* "on" or "off" plus null. */
- int read_len;
-
- read_len = count < 3 ? count : 3;
- if (copy_from_user(kbuf, buf, read_len))
- return -EINVAL;
-
- kbuf[read_len] = '\0';
-
- if (!strncmp(kbuf, "on", 2))
- start_topology_update();
- else if (!strncmp(kbuf, "off", 3))
- stop_topology_update();
- else
- return -EINVAL;
-
- return count;
-}
-
-static const struct file_operations topology_ops = {
- .read = seq_read,
- .write = topology_write,
- .open = topology_open,
- .release = single_release
-};
-
-static int topology_update_init(void)
-{
- start_topology_update();
- proc_create("powerpc/topology_updates", 644, NULL, &topology_ops);
-
- return 0;
+ vphn_enabled = 0;
+ return del_timer_sync(&topology_timer);
}
-device_initcall(topology_update_init);
#endif /* CONFIG_PPC_SPLPAR */
diff --git a/trunk/arch/powerpc/mm/pgtable_64.c b/trunk/arch/powerpc/mm/pgtable_64.c
index 654258f165ae..e212a271c7a4 100644
--- a/trunk/arch/powerpc/mm/pgtable_64.c
+++ b/trunk/arch/powerpc/mm/pgtable_64.c
@@ -61,7 +61,7 @@
#endif
#ifdef CONFIG_PPC_STD_MMU_64
-#if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT))
+#if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT))
#error TASK_SIZE_USER64 exceeds user VSID range
#endif
#endif
diff --git a/trunk/arch/powerpc/mm/slb_low.S b/trunk/arch/powerpc/mm/slb_low.S
index 17aa6dfceb34..1a16ca227757 100644
--- a/trunk/arch/powerpc/mm/slb_low.S
+++ b/trunk/arch/powerpc/mm/slb_low.S
@@ -31,15 +31,10 @@
* No other registers are examined or changed.
*/
_GLOBAL(slb_allocate_realmode)
- /*
- * check for bad kernel/user address
- * (ea & ~REGION_MASK) >= PGTABLE_RANGE
- */
- rldicr. r9,r3,4,(63 - 46 - 4)
- bne- 8f
+ /* r3 = faulting address */
srdi r9,r3,60 /* get region */
- srdi r10,r3,SID_SHIFT /* get esid */
+ srdi r10,r3,28 /* get esid */
cmpldi cr7,r9,0xc /* cmp PAGE_OFFSET for later use */
/* r3 = address, r10 = esid, cr7 = <> PAGE_OFFSET */
@@ -61,14 +56,12 @@ _GLOBAL(slb_allocate_realmode)
*/
_GLOBAL(slb_miss_kernel_load_linear)
li r11,0
+ li r9,0x1
/*
- * context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
- * r9 = region id.
+ * for 1T we shift 12 bits more. slb_finish_load_1T will do
+ * the necessary adjustment
*/
- addis r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@ha
- addi r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@l
-
-
+ rldimi r10,r9,(CONTEXT_BITS + USER_ESID_BITS),0
BEGIN_FTR_SECTION
b slb_finish_load
END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
@@ -98,19 +91,24 @@ _GLOBAL(slb_miss_kernel_load_vmemmap)
_GLOBAL(slb_miss_kernel_load_io)
li r11,0
6:
+ li r9,0x1
/*
- * context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
- * r9 = region id.
+ * for 1T we shift 12 bits more. slb_finish_load_1T will do
+ * the necessary adjustment
*/
- addis r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@ha
- addi r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@l
-
+ rldimi r10,r9,(CONTEXT_BITS + USER_ESID_BITS),0
BEGIN_FTR_SECTION
b slb_finish_load
END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
b slb_finish_load_1T
-0:
+0: /* user address: proto-VSID = context << 15 | ESID. First check
+ * if the address is within the boundaries of the user region
+ */
+ srdi. r9,r10,USER_ESID_BITS
+ bne- 8f /* invalid ea bits set */
+
+
/* when using slices, we extract the psize off the slice bitmaps
* and then we need to get the sllp encoding off the mmu_psize_defs
* array.
@@ -166,13 +164,15 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
ld r9,PACACONTEXTID(r13)
BEGIN_FTR_SECTION
cmpldi r10,0x1000
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
+ rldimi r10,r9,USER_ESID_BITS,0
+BEGIN_FTR_SECTION
bge slb_finish_load_1T
END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
b slb_finish_load
8: /* invalid EA */
li r10,0 /* BAD_VSID */
- li r9,0 /* BAD_VSID */
li r11,SLB_VSID_USER /* flags don't much matter */
b slb_finish_load
@@ -221,6 +221,8 @@ _GLOBAL(slb_allocate_user)
/* get context to calculate proto-VSID */
ld r9,PACACONTEXTID(r13)
+ rldimi r10,r9,USER_ESID_BITS,0
+
/* fall through slb_finish_load */
#endif /* __DISABLED__ */
@@ -229,10 +231,9 @@ _GLOBAL(slb_allocate_user)
/*
* Finish loading of an SLB entry and return
*
- * r3 = EA, r9 = context, r10 = ESID, r11 = flags, clobbers r9, cr7 = <> PAGE_OFFSET
+ * r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9, cr7 = <> PAGE_OFFSET
*/
slb_finish_load:
- rldimi r10,r9,ESID_BITS,0
ASM_VSID_SCRAMBLE(r10,r9,256M)
/*
* bits above VSID_BITS_256M need to be ignored from r10
@@ -297,11 +298,10 @@ _GLOBAL(slb_compare_rr_to_size)
/*
* Finish loading of a 1T SLB entry (for the kernel linear mapping) and return.
*
- * r3 = EA, r9 = context, r10 = ESID(256MB), r11 = flags, clobbers r9
+ * r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9
*/
slb_finish_load_1T:
- srdi r10,r10,(SID_SHIFT_1T - SID_SHIFT) /* get 1T ESID */
- rldimi r10,r9,ESID_BITS_1T,0
+ srdi r10,r10,40-28 /* get 1T ESID */
ASM_VSID_SCRAMBLE(r10,r9,1T)
/*
* bits above VSID_BITS_1T need to be ignored from r10
diff --git a/trunk/arch/powerpc/mm/slice.c b/trunk/arch/powerpc/mm/slice.c
index 3e99c149271a..cf9dada734b6 100644
--- a/trunk/arch/powerpc/mm/slice.c
+++ b/trunk/arch/powerpc/mm/slice.c
@@ -237,112 +237,134 @@ static void slice_convert(struct mm_struct *mm, struct slice_mask mask, int psiz
#endif
}
-/*
- * Compute which slice addr is part of;
- * set *boundary_addr to the start or end boundary of that slice
- * (depending on 'end' parameter);
- * return boolean indicating if the slice is marked as available in the
- * 'available' slice_mark.
- */
-static bool slice_scan_available(unsigned long addr,
- struct slice_mask available,
- int end,
- unsigned long *boundary_addr)
-{
- unsigned long slice;
- if (addr < SLICE_LOW_TOP) {
- slice = GET_LOW_SLICE_INDEX(addr);
- *boundary_addr = (slice + end) << SLICE_LOW_SHIFT;
- return !!(available.low_slices & (1u << slice));
- } else {
- slice = GET_HIGH_SLICE_INDEX(addr);
- *boundary_addr = (slice + end) ?
- ((slice + end) << SLICE_HIGH_SHIFT) : SLICE_LOW_TOP;
- return !!(available.high_slices & (1u << slice));
- }
-}
-
static unsigned long slice_find_area_bottomup(struct mm_struct *mm,
unsigned long len,
struct slice_mask available,
- int psize)
+ int psize, int use_cache)
{
+ struct vm_area_struct *vma;
+ unsigned long start_addr, addr;
+ struct slice_mask mask;
int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT);
- unsigned long addr, found, next_end;
- struct vm_unmapped_area_info info;
-
- info.flags = 0;
- info.length = len;
- info.align_mask = PAGE_MASK & ((1ul << pshift) - 1);
- info.align_offset = 0;
-
- addr = TASK_UNMAPPED_BASE;
- while (addr < TASK_SIZE) {
- info.low_limit = addr;
- if (!slice_scan_available(addr, available, 1, &addr))
- continue;
- next_slice:
- /*
- * At this point [info.low_limit; addr) covers
- * available slices only and ends at a slice boundary.
- * Check if we need to reduce the range, or if we can
- * extend it to cover the next available slice.
- */
- if (addr >= TASK_SIZE)
- addr = TASK_SIZE;
- else if (slice_scan_available(addr, available, 1, &next_end)) {
- addr = next_end;
- goto next_slice;
- }
- info.high_limit = addr;
+ if (use_cache) {
+ if (len <= mm->cached_hole_size) {
+ start_addr = addr = TASK_UNMAPPED_BASE;
+ mm->cached_hole_size = 0;
+ } else
+ start_addr = addr = mm->free_area_cache;
+ } else
+ start_addr = addr = TASK_UNMAPPED_BASE;
+
+full_search:
+ for (;;) {
+ addr = _ALIGN_UP(addr, 1ul << pshift);
+ if ((TASK_SIZE - len) < addr)
+ break;
+ vma = find_vma(mm, addr);
+ BUG_ON(vma && (addr >= vma->vm_end));
- found = vm_unmapped_area(&info);
- if (!(found & ~PAGE_MASK))
- return found;
+ mask = slice_range_to_mask(addr, len);
+ if (!slice_check_fit(mask, available)) {
+ if (addr < SLICE_LOW_TOP)
+ addr = _ALIGN_UP(addr + 1, 1ul << SLICE_LOW_SHIFT);
+ else
+ addr = _ALIGN_UP(addr + 1, 1ul << SLICE_HIGH_SHIFT);
+ continue;
+ }
+ if (!vma || addr + len <= vma->vm_start) {
+ /*
+ * Remember the place where we stopped the search:
+ */
+ if (use_cache)
+ mm->free_area_cache = addr + len;
+ return addr;
+ }
+ if (use_cache && (addr + mm->cached_hole_size) < vma->vm_start)
+ mm->cached_hole_size = vma->vm_start - addr;
+ addr = vma->vm_end;
}
+ /* Make sure we didn't miss any holes */
+ if (use_cache && start_addr != TASK_UNMAPPED_BASE) {
+ start_addr = addr = TASK_UNMAPPED_BASE;
+ mm->cached_hole_size = 0;
+ goto full_search;
+ }
return -ENOMEM;
}
static unsigned long slice_find_area_topdown(struct mm_struct *mm,
unsigned long len,
struct slice_mask available,
- int psize)
+ int psize, int use_cache)
{
+ struct vm_area_struct *vma;
+ unsigned long addr;
+ struct slice_mask mask;
int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT);
- unsigned long addr, found, prev;
- struct vm_unmapped_area_info info;
- info.flags = VM_UNMAPPED_AREA_TOPDOWN;
- info.length = len;
- info.align_mask = PAGE_MASK & ((1ul << pshift) - 1);
- info.align_offset = 0;
+ /* check if free_area_cache is useful for us */
+ if (use_cache) {
+ if (len <= mm->cached_hole_size) {
+ mm->cached_hole_size = 0;
+ mm->free_area_cache = mm->mmap_base;
+ }
+
+ /* either no address requested or can't fit in requested
+ * address hole
+ */
+ addr = mm->free_area_cache;
+
+ /* make sure it can fit in the remaining address space */
+ if (addr > len) {
+ addr = _ALIGN_DOWN(addr - len, 1ul << pshift);
+ mask = slice_range_to_mask(addr, len);
+ if (slice_check_fit(mask, available) &&
+ slice_area_is_free(mm, addr, len))
+ /* remember the address as a hint for
+ * next time
+ */
+ return (mm->free_area_cache = addr);
+ }
+ }
addr = mm->mmap_base;
- while (addr > PAGE_SIZE) {
- info.high_limit = addr;
- if (!slice_scan_available(addr - 1, available, 0, &addr))
+ while (addr > len) {
+ /* Go down by chunk size */
+ addr = _ALIGN_DOWN(addr - len, 1ul << pshift);
+
+ /* Check for hit with different page size */
+ mask = slice_range_to_mask(addr, len);
+ if (!slice_check_fit(mask, available)) {
+ if (addr < SLICE_LOW_TOP)
+ addr = _ALIGN_DOWN(addr, 1ul << SLICE_LOW_SHIFT);
+ else if (addr < (1ul << SLICE_HIGH_SHIFT))
+ addr = SLICE_LOW_TOP;
+ else
+ addr = _ALIGN_DOWN(addr, 1ul << SLICE_HIGH_SHIFT);
continue;
+ }
- prev_slice:
/*
- * At this point [addr; info.high_limit) covers
- * available slices only and starts at a slice boundary.
- * Check if we need to reduce the range, or if we can
- * extend it to cover the previous available slice.
+ * Lookup failure means no vma is above this address,
+ * else if new region fits below vma->vm_start,
+ * return with success:
*/
- if (addr < PAGE_SIZE)
- addr = PAGE_SIZE;
- else if (slice_scan_available(addr - 1, available, 0, &prev)) {
- addr = prev;
- goto prev_slice;
+ vma = find_vma(mm, addr);
+ if (!vma || (addr + len) <= vma->vm_start) {
+ /* remember the address as a hint for next time */
+ if (use_cache)
+ mm->free_area_cache = addr;
+ return addr;
}
- info.low_limit = addr;
- found = vm_unmapped_area(&info);
- if (!(found & ~PAGE_MASK))
- return found;
+ /* remember the largest hole we saw so far */
+ if (use_cache && (addr + mm->cached_hole_size) < vma->vm_start)
+ mm->cached_hole_size = vma->vm_start - addr;
+
+ /* try just below the current vma->vm_start */
+ addr = vma->vm_start;
}
/*
@@ -351,18 +373,28 @@ static unsigned long slice_find_area_topdown(struct mm_struct *mm,
* can happen with large stack limits and large mmap()
* allocations.
*/
- return slice_find_area_bottomup(mm, len, available, psize);
+ addr = slice_find_area_bottomup(mm, len, available, psize, 0);
+
+ /*
+ * Restore the topdown base:
+ */
+ if (use_cache) {
+ mm->free_area_cache = mm->mmap_base;
+ mm->cached_hole_size = ~0UL;
+ }
+
+ return addr;
}
static unsigned long slice_find_area(struct mm_struct *mm, unsigned long len,
struct slice_mask mask, int psize,
- int topdown)
+ int topdown, int use_cache)
{
if (topdown)
- return slice_find_area_topdown(mm, len, mask, psize);
+ return slice_find_area_topdown(mm, len, mask, psize, use_cache);
else
- return slice_find_area_bottomup(mm, len, mask, psize);
+ return slice_find_area_bottomup(mm, len, mask, psize, use_cache);
}
#define or_mask(dst, src) do { \
@@ -383,7 +415,7 @@ static unsigned long slice_find_area(struct mm_struct *mm, unsigned long len,
unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
unsigned long flags, unsigned int psize,
- int topdown)
+ int topdown, int use_cache)
{
struct slice_mask mask = {0, 0};
struct slice_mask good_mask;
@@ -398,8 +430,8 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
BUG_ON(mm->task_size == 0);
slice_dbg("slice_get_unmapped_area(mm=%p, psize=%d...\n", mm, psize);
- slice_dbg(" addr=%lx, len=%lx, flags=%lx, topdown=%d\n",
- addr, len, flags, topdown);
+ slice_dbg(" addr=%lx, len=%lx, flags=%lx, topdown=%d, use_cache=%d\n",
+ addr, len, flags, topdown, use_cache);
if (len > mm->task_size)
return -ENOMEM;
@@ -471,7 +503,8 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
/* Now let's see if we can find something in the existing
* slices for that size
*/
- newaddr = slice_find_area(mm, len, good_mask, psize, topdown);
+ newaddr = slice_find_area(mm, len, good_mask, psize, topdown,
+ use_cache);
if (newaddr != -ENOMEM) {
/* Found within the good mask, we don't have to setup,
* we thus return directly
@@ -503,7 +536,8 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
* anywhere in the good area.
*/
if (addr) {
- addr = slice_find_area(mm, len, good_mask, psize, topdown);
+ addr = slice_find_area(mm, len, good_mask, psize, topdown,
+ use_cache);
if (addr != -ENOMEM) {
slice_dbg(" found area at 0x%lx\n", addr);
return addr;
@@ -513,14 +547,15 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
/* Now let's see if we can find something in the existing slices
* for that size plus free slices
*/
- addr = slice_find_area(mm, len, potential_mask, psize, topdown);
+ addr = slice_find_area(mm, len, potential_mask, psize, topdown,
+ use_cache);
#ifdef CONFIG_PPC_64K_PAGES
if (addr == -ENOMEM && psize == MMU_PAGE_64K) {
/* retry the search with 4k-page slices included */
or_mask(potential_mask, compat_mask);
addr = slice_find_area(mm, len, potential_mask, psize,
- topdown);
+ topdown, use_cache);
}
#endif
@@ -551,7 +586,8 @@ unsigned long arch_get_unmapped_area(struct file *filp,
unsigned long flags)
{
return slice_get_unmapped_area(addr, len, flags,
- current->mm->context.user_psize, 0);
+ current->mm->context.user_psize,
+ 0, 1);
}
unsigned long arch_get_unmapped_area_topdown(struct file *filp,
@@ -561,7 +597,8 @@ unsigned long arch_get_unmapped_area_topdown(struct file *filp,
const unsigned long flags)
{
return slice_get_unmapped_area(addr0, len, flags,
- current->mm->context.user_psize, 1);
+ current->mm->context.user_psize,
+ 1, 1);
}
unsigned int get_slice_psize(struct mm_struct *mm, unsigned long addr)
diff --git a/trunk/arch/powerpc/mm/tlb_hash64.c b/trunk/arch/powerpc/mm/tlb_hash64.c
index 023ec8a13f38..0d82ef50dc3f 100644
--- a/trunk/arch/powerpc/mm/tlb_hash64.c
+++ b/trunk/arch/powerpc/mm/tlb_hash64.c
@@ -82,11 +82,11 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
if (!is_kernel_addr(addr)) {
ssize = user_segment_size(addr);
vsid = get_vsid(mm->context.id, addr, ssize);
+ WARN_ON(vsid == 0);
} else {
vsid = get_kernel_vsid(addr, mmu_kernel_ssize);
ssize = mmu_kernel_ssize;
}
- WARN_ON(vsid == 0);
vpn = hpt_vpn(addr, vsid, ssize);
rpte = __real_pte(__pte(pte), ptep);
diff --git a/trunk/arch/powerpc/perf/Makefile b/trunk/arch/powerpc/perf/Makefile
index 510fae10513d..af3fac23768c 100644
--- a/trunk/arch/powerpc/perf/Makefile
+++ b/trunk/arch/powerpc/perf/Makefile
@@ -2,10 +2,9 @@ subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
obj-$(CONFIG_PERF_EVENTS) += callchain.o
-obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o bhrb.o
+obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o
obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \
- power5+-pmu.o power6-pmu.o power7-pmu.o \
- power8-pmu.o
+ power5+-pmu.o power6-pmu.o power7-pmu.o
obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
diff --git a/trunk/arch/powerpc/perf/bhrb.S b/trunk/arch/powerpc/perf/bhrb.S
deleted file mode 100644
index d85f9a58ddbc..000000000000
--- a/trunk/arch/powerpc/perf/bhrb.S
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Basic assembly code to read BHRB entries
- *
- * Copyright 2013 Anshuman Khandual, IBM Corporation.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include
-#include
-
- .text
-
-.balign 8
-
-/* r3 = n (where n = [0-31])
- * The maximum number of BHRB entries supported with PPC_MFBHRBE instruction
- * is 1024. We have limited number of table entries here as POWER8 implements
- * 32 BHRB entries.
- */
-
-/* .global read_bhrb */
-_GLOBAL(read_bhrb)
- cmpldi r3,31
- bgt 1f
- ld r4,bhrb_table@got(r2)
- sldi r3,r3,3
- add r3,r4,r3
- mtctr r3
- bctr
-1: li r3,0
- blr
-
-#define MFBHRB_TABLE1(n) PPC_MFBHRBE(R3,n); blr
-#define MFBHRB_TABLE2(n) MFBHRB_TABLE1(n); MFBHRB_TABLE1(n+1)
-#define MFBHRB_TABLE4(n) MFBHRB_TABLE2(n); MFBHRB_TABLE2(n+2)
-#define MFBHRB_TABLE8(n) MFBHRB_TABLE4(n); MFBHRB_TABLE4(n+4)
-#define MFBHRB_TABLE16(n) MFBHRB_TABLE8(n); MFBHRB_TABLE8(n+8)
-#define MFBHRB_TABLE32(n) MFBHRB_TABLE16(n); MFBHRB_TABLE16(n+16)
-
-bhrb_table:
- MFBHRB_TABLE32(0)
diff --git a/trunk/arch/powerpc/perf/core-book3s.c b/trunk/arch/powerpc/perf/core-book3s.c
index c627843c5b2e..65362e98eb26 100644
--- a/trunk/arch/powerpc/perf/core-book3s.c
+++ b/trunk/arch/powerpc/perf/core-book3s.c
@@ -19,11 +19,6 @@
#include
#include
-#define BHRB_MAX_ENTRIES 32
-#define BHRB_TARGET 0x0000000000000002
-#define BHRB_PREDICTION 0x0000000000000001
-#define BHRB_EA 0xFFFFFFFFFFFFFFFC
-
struct cpu_hw_events {
int n_events;
int n_percpu;
@@ -43,15 +38,7 @@ struct cpu_hw_events {
unsigned int group_flag;
int n_txn_start;
-
- /* BHRB bits */
- u64 bhrb_filter; /* BHRB HW branch filter */
- int bhrb_users;
- void *bhrb_context;
- struct perf_branch_stack bhrb_stack;
- struct perf_branch_entry bhrb_entries[BHRB_MAX_ENTRIES];
};
-
DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
struct power_pmu *ppmu;
@@ -102,11 +89,6 @@ static inline int siar_valid(struct pt_regs *regs)
#endif /* CONFIG_PPC32 */
-static bool regs_use_siar(struct pt_regs *regs)
-{
- return !!(regs->result & 1);
-}
-
/*
* Things that are specific to 64-bit implementations.
*/
@@ -116,12 +98,11 @@ static inline unsigned long perf_ip_adjust(struct pt_regs *regs)
{
unsigned long mmcra = regs->dsisr;
- if ((ppmu->flags & PPMU_HAS_SSLOT) && (mmcra & MMCRA_SAMPLE_ENABLE)) {
+ if ((mmcra & MMCRA_SAMPLE_ENABLE) && !(ppmu->flags & PPMU_ALT_SIPR)) {
unsigned long slot = (mmcra & MMCRA_SLOT) >> MMCRA_SLOT_SHIFT;
if (slot > 1)
return 4 * (slot - 1);
}
-
return 0;
}
@@ -149,35 +130,24 @@ static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp)
*addrp = mfspr(SPRN_SDAR);
}
-static bool regs_sihv(struct pt_regs *regs)
+static bool mmcra_sihv(unsigned long mmcra)
{
unsigned long sihv = MMCRA_SIHV;
- if (ppmu->flags & PPMU_HAS_SIER)
- return !!(regs->dar & SIER_SIHV);
-
if (ppmu->flags & PPMU_ALT_SIPR)
sihv = POWER6_MMCRA_SIHV;
- return !!(regs->dsisr & sihv);
+ return !!(mmcra & sihv);
}
-static bool regs_sipr(struct pt_regs *regs)
+static bool mmcra_sipr(unsigned long mmcra)
{
unsigned long sipr = MMCRA_SIPR;
- if (ppmu->flags & PPMU_HAS_SIER)
- return !!(regs->dar & SIER_SIPR);
-
if (ppmu->flags & PPMU_ALT_SIPR)
sipr = POWER6_MMCRA_SIPR;
- return !!(regs->dsisr & sipr);
-}
-
-static bool regs_no_sipr(struct pt_regs *regs)
-{
- return !!(regs->result & 2);
+ return !!(mmcra & sipr);
}
static inline u32 perf_flags_from_msr(struct pt_regs *regs)
@@ -191,7 +161,8 @@ static inline u32 perf_flags_from_msr(struct pt_regs *regs)
static inline u32 perf_get_misc_flags(struct pt_regs *regs)
{
- bool use_siar = regs_use_siar(regs);
+ unsigned long mmcra = regs->dsisr;
+ unsigned long use_siar = regs->result;
if (!use_siar)
return perf_flags_from_msr(regs);
@@ -202,7 +173,7 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs)
* SIAR which should give slightly more reliable
* results
*/
- if (regs_no_sipr(regs)) {
+ if (ppmu->flags & PPMU_NO_SIPR) {
unsigned long siar = mfspr(SPRN_SIAR);
if (siar >= PAGE_OFFSET)
return PERF_RECORD_MISC_KERNEL;
@@ -210,19 +181,16 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs)
}
/* PR has priority over HV, so order below is important */
- if (regs_sipr(regs))
+ if (mmcra_sipr(mmcra))
return PERF_RECORD_MISC_USER;
-
- if (regs_sihv(regs) && (freeze_events_kernel != MMCR0_FCHV))
+ if (mmcra_sihv(mmcra) && (freeze_events_kernel != MMCR0_FCHV))
return PERF_RECORD_MISC_HYPERVISOR;
-
return PERF_RECORD_MISC_KERNEL;
}
/*
* Overload regs->dsisr to store MMCRA so we only need to read it once
* on each interrupt.
- * Overload regs->dar to store SIER if we have it.
* Overload regs->result to specify whether we should use the MSR (result
* is zero) or the SIAR (result is non zero).
*/
@@ -232,24 +200,6 @@ static inline void perf_read_regs(struct pt_regs *regs)
int marked = mmcra & MMCRA_SAMPLE_ENABLE;
int use_siar;
- regs->dsisr = mmcra;
- regs->result = 0;
-
- if (ppmu->flags & PPMU_NO_SIPR)
- regs->result |= 2;
-
- /*
- * On power8 if we're in random sampling mode, the SIER is updated.
- * If we're in continuous sampling mode, we don't have SIPR.
- */
- if (ppmu->flags & PPMU_HAS_SIER) {
- if (marked)
- regs->dar = mfspr(SPRN_SIER);
- else
- regs->result |= 2;
- }
-
-
/*
* If this isn't a PMU exception (eg a software event) the SIAR is
* not valid. Use pt_regs.
@@ -273,12 +223,13 @@ static inline void perf_read_regs(struct pt_regs *regs)
use_siar = 1;
else if ((ppmu->flags & PPMU_NO_CONT_SAMPLING))
use_siar = 0;
- else if (!regs_no_sipr(regs) && regs_sipr(regs))
+ else if (!(ppmu->flags & PPMU_NO_SIPR) && mmcra_sipr(mmcra))
use_siar = 0;
else
use_siar = 1;
- regs->result |= use_siar;
+ regs->dsisr = mmcra;
+ regs->result = use_siar;
}
/*
@@ -871,9 +822,6 @@ static void power_pmu_enable(struct pmu *pmu)
}
out:
- if (cpuhw->bhrb_users)
- ppmu->config_bhrb(cpuhw->bhrb_filter);
-
local_irq_restore(flags);
}
@@ -904,47 +852,6 @@ static int collect_events(struct perf_event *group, int max_count,
return n;
}
-/* Reset all possible BHRB entries */
-static void power_pmu_bhrb_reset(void)
-{
- asm volatile(PPC_CLRBHRB);
-}
-
-void power_pmu_bhrb_enable(struct perf_event *event)
-{
- struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
-
- if (!ppmu->bhrb_nr)
- return;
-
- /* Clear BHRB if we changed task context to avoid data leaks */
- if (event->ctx->task && cpuhw->bhrb_context != event->ctx) {
- power_pmu_bhrb_reset();
- cpuhw->bhrb_context = event->ctx;
- }
- cpuhw->bhrb_users++;
-}
-
-void power_pmu_bhrb_disable(struct perf_event *event)
-{
- struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
-
- if (!ppmu->bhrb_nr)
- return;
-
- cpuhw->bhrb_users--;
- WARN_ON_ONCE(cpuhw->bhrb_users < 0);
-
- if (!cpuhw->disabled && !cpuhw->bhrb_users) {
- /* BHRB cannot be turned off when other
- * events are active on the PMU.
- */
-
- /* avoid stale pointer */
- cpuhw->bhrb_context = NULL;
- }
-}
-
/*
* Add a event to the PMU.
* If all events are not already frozen, then we disable and
@@ -1004,9 +911,6 @@ static int power_pmu_add(struct perf_event *event, int ef_flags)
ret = 0;
out:
- if (has_branch_stack(event))
- power_pmu_bhrb_enable(event);
-
perf_pmu_enable(event->pmu);
local_irq_restore(flags);
return ret;
@@ -1059,9 +963,6 @@ static void power_pmu_del(struct perf_event *event, int ef_flags)
cpuhw->mmcr[0] &= ~(MMCR0_PMXE | MMCR0_FCECE);
}
- if (has_branch_stack(event))
- power_pmu_bhrb_disable(event);
-
perf_pmu_enable(event->pmu);
local_irq_restore(flags);
}
@@ -1180,15 +1081,6 @@ int power_pmu_commit_txn(struct pmu *pmu)
return 0;
}
-/* Called from ctxsw to prevent one process's branch entries to
- * mingle with the other process's entries during context switch.
- */
-void power_pmu_flush_branch_stack(void)
-{
- if (ppmu->bhrb_nr)
- power_pmu_bhrb_reset();
-}
-
/*
* Return 1 if we might be able to put event on a limited PMC,
* or 0 if not.
@@ -1303,11 +1195,9 @@ static int power_pmu_event_init(struct perf_event *event)
if (!ppmu)
return -ENOENT;
- if (has_branch_stack(event)) {
- /* PMU has BHRB enabled */
- if (!(ppmu->flags & PPMU_BHRB))
- return -EOPNOTSUPP;
- }
+ /* does not support taken branch sampling */
+ if (has_branch_stack(event))
+ return -EOPNOTSUPP;
switch (event->attr.type) {
case PERF_TYPE_HARDWARE:
@@ -1388,15 +1278,6 @@ static int power_pmu_event_init(struct perf_event *event)
cpuhw = &get_cpu_var(cpu_hw_events);
err = power_check_constraints(cpuhw, events, cflags, n + 1);
-
- if (has_branch_stack(event)) {
- cpuhw->bhrb_filter = ppmu->bhrb_filter_map(
- event->attr.branch_sample_type);
-
- if(cpuhw->bhrb_filter == -1)
- return -EOPNOTSUPP;
- }
-
put_cpu_var(cpu_hw_events);
if (err)
return -EINVAL;
@@ -1455,79 +1336,8 @@ struct pmu power_pmu = {
.cancel_txn = power_pmu_cancel_txn,
.commit_txn = power_pmu_commit_txn,
.event_idx = power_pmu_event_idx,
- .flush_branch_stack = power_pmu_flush_branch_stack,
};
-/* Processing BHRB entries */
-void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
-{
- u64 val;
- u64 addr;
- int r_index, u_index, target, pred;
-
- r_index = 0;
- u_index = 0;
- while (r_index < ppmu->bhrb_nr) {
- /* Assembly read function */
- val = read_bhrb(r_index);
-
- /* Terminal marker: End of valid BHRB entries */
- if (val == 0) {
- break;
- } else {
- /* BHRB field break up */
- addr = val & BHRB_EA;
- pred = val & BHRB_PREDICTION;
- target = val & BHRB_TARGET;
-
- /* Probable Missed entry: Not applicable for POWER8 */
- if ((addr == 0) && (target == 0) && (pred == 1)) {
- r_index++;
- continue;
- }
-
- /* Real Missed entry: Power8 based missed entry */
- if ((addr == 0) && (target == 1) && (pred == 1)) {
- r_index++;
- continue;
- }
-
- /* Reserved condition: Not a valid entry */
- if ((addr == 0) && (target == 1) && (pred == 0)) {
- r_index++;
- continue;
- }
-
- /* Is a target address */
- if (val & BHRB_TARGET) {
- /* First address cannot be a target address */
- if (r_index == 0) {
- r_index++;
- continue;
- }
-
- /* Update target address for the previous entry */
- cpuhw->bhrb_entries[u_index - 1].to = addr;
- cpuhw->bhrb_entries[u_index - 1].mispred = pred;
- cpuhw->bhrb_entries[u_index - 1].predicted = ~pred;
-
- /* Dont increment u_index */
- r_index++;
- } else {
- /* Update address, flags for current entry */
- cpuhw->bhrb_entries[u_index].from = addr;
- cpuhw->bhrb_entries[u_index].mispred = pred;
- cpuhw->bhrb_entries[u_index].predicted = ~pred;
-
- /* Successfully popullated one entry */
- u_index++;
- r_index++;
- }
- }
- }
- cpuhw->bhrb_stack.nr = u_index;
- return;
-}
/*
* A counter has overflowed; update its count and record
@@ -1587,13 +1397,6 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
if (event->attr.sample_type & PERF_SAMPLE_ADDR)
perf_get_data_addr(regs, &data.addr);
- if (event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK) {
- struct cpu_hw_events *cpuhw;
- cpuhw = &__get_cpu_var(cpu_hw_events);
- power_pmu_bhrb_read(cpuhw);
- data.br_stack = &cpuhw->bhrb_stack;
- }
-
if (perf_event_overflow(event, &data, regs))
power_pmu_stop(event, 0);
}
@@ -1619,7 +1422,7 @@ unsigned long perf_misc_flags(struct pt_regs *regs)
*/
unsigned long perf_instruction_pointer(struct pt_regs *regs)
{
- bool use_siar = regs_use_siar(regs);
+ unsigned long use_siar = regs->result;
if (use_siar && siar_valid(regs))
return mfspr(SPRN_SIAR) + perf_ip_adjust(regs);
diff --git a/trunk/arch/powerpc/perf/power5+-pmu.c b/trunk/arch/powerpc/perf/power5+-pmu.c
index b03b6dc0172d..a8757baa28f3 100644
--- a/trunk/arch/powerpc/perf/power5+-pmu.c
+++ b/trunk/arch/powerpc/perf/power5+-pmu.c
@@ -671,7 +671,7 @@ static struct power_pmu power5p_pmu = {
.get_alternatives = power5p_get_alternatives,
.disable_pmc = power5p_disable_pmc,
.limited_pmc_event = power5p_limited_pmc_event,
- .flags = PPMU_LIMITED_PMC5_6 | PPMU_HAS_SSLOT,
+ .flags = PPMU_LIMITED_PMC5_6,
.n_generic = ARRAY_SIZE(power5p_generic_events),
.generic_events = power5p_generic_events,
.cache_events = &power5p_cache_events,
diff --git a/trunk/arch/powerpc/perf/power5-pmu.c b/trunk/arch/powerpc/perf/power5-pmu.c
index 1e8ce423c3af..e7f06eb7a861 100644
--- a/trunk/arch/powerpc/perf/power5-pmu.c
+++ b/trunk/arch/powerpc/perf/power5-pmu.c
@@ -615,7 +615,6 @@ static struct power_pmu power5_pmu = {
.n_generic = ARRAY_SIZE(power5_generic_events),
.generic_events = power5_generic_events,
.cache_events = &power5_cache_events,
- .flags = PPMU_HAS_SSLOT,
};
static int __init init_power5_pmu(void)
diff --git a/trunk/arch/powerpc/perf/power7-pmu.c b/trunk/arch/powerpc/perf/power7-pmu.c
index 3c475d6267c7..b554879bd31e 100644
--- a/trunk/arch/powerpc/perf/power7-pmu.c
+++ b/trunk/arch/powerpc/perf/power7-pmu.c
@@ -420,20 +420,7 @@ static struct attribute_group power7_pmu_events_group = {
.attrs = power7_events_attr,
};
-PMU_FORMAT_ATTR(event, "config:0-19");
-
-static struct attribute *power7_pmu_format_attr[] = {
- &format_attr_event.attr,
- NULL,
-};
-
-struct attribute_group power7_pmu_format_group = {
- .name = "format",
- .attrs = power7_pmu_format_attr,
-};
-
static const struct attribute_group *power7_pmu_attr_groups[] = {
- &power7_pmu_format_group,
&power7_pmu_events_group,
NULL,
};
diff --git a/trunk/arch/powerpc/perf/power8-pmu.c b/trunk/arch/powerpc/perf/power8-pmu.c
deleted file mode 100644
index f7d1c4fff303..000000000000
--- a/trunk/arch/powerpc/perf/power8-pmu.c
+++ /dev/null
@@ -1,592 +0,0 @@
-/*
- * Performance counter support for POWER8 processors.
- *
- * Copyright 2009 Paul Mackerras, IBM Corporation.
- * Copyright 2013 Michael Ellerman, IBM Corporation.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include
-#include
-#include
-
-
-/*
- * Some power8 event codes.
- */
-#define PM_CYC 0x0001e
-#define PM_GCT_NOSLOT_CYC 0x100f8
-#define PM_CMPLU_STALL 0x4000a
-#define PM_INST_CMPL 0x00002
-#define PM_BRU_FIN 0x10068
-#define PM_BR_MPRED_CMPL 0x400f6
-
-
-/*
- * Raw event encoding for POWER8:
- *
- * 60 56 52 48 44 40 36 32
- * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - |
- * [ thresh_cmp ] [ thresh_ctl ]
- * |
- * thresh start/stop OR FAB match -*
- *
- * 28 24 20 16 12 8 4 0
- * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - |
- * [ ] [ sample ] [cache] [ pmc ] [unit ] c m [ pmcxsel ]
- * | | | | |
- * | | | | *- mark
- * | | *- L1/L2/L3 cache_sel |
- * | | |
- * | *- sampling mode for marked events *- combine
- * |
- * *- thresh_sel
- *
- * Below uses IBM bit numbering.
- *
- * MMCR1[x:y] = unit (PMCxUNIT)
- * MMCR1[x] = combine (PMCxCOMB)
- *
- * if pmc == 3 and unit == 0 and pmcxsel[0:6] == 0b0101011
- * # PM_MRK_FAB_RSP_MATCH
- * MMCR1[20:27] = thresh_ctl (FAB_CRESP_MATCH / FAB_TYPE_MATCH)
- * else if pmc == 4 and unit == 0xf and pmcxsel[0:6] == 0b0101001
- * # PM_MRK_FAB_RSP_MATCH_CYC
- * MMCR1[20:27] = thresh_ctl (FAB_CRESP_MATCH / FAB_TYPE_MATCH)
- * else
- * MMCRA[48:55] = thresh_ctl (THRESH START/END)
- *
- * if thresh_sel:
- * MMCRA[45:47] = thresh_sel
- *
- * if thresh_cmp:
- * MMCRA[22:24] = thresh_cmp[0:2]
- * MMCRA[25:31] = thresh_cmp[3:9]
- *
- * if unit == 6 or unit == 7
- * MMCRC[53:55] = cache_sel[1:3] (L2EVENT_SEL)
- * else if unit == 8 or unit == 9:
- * if cache_sel[0] == 0: # L3 bank
- * MMCRC[47:49] = cache_sel[1:3] (L3EVENT_SEL0)
- * else if cache_sel[0] == 1:
- * MMCRC[50:51] = cache_sel[2:3] (L3EVENT_SEL1)
- * else if cache_sel[1]: # L1 event
- * MMCR1[16] = cache_sel[2]
- * MMCR1[17] = cache_sel[3]
- *
- * if mark:
- * MMCRA[63] = 1 (SAMPLE_ENABLE)
- * MMCRA[57:59] = sample[0:2] (RAND_SAMP_ELIG)
- * MMCRA[61:62] = sample[3:4] (RAND_SAMP_MODE)
- *
- */
-
-#define EVENT_THR_CMP_SHIFT 40 /* Threshold CMP value */
-#define EVENT_THR_CMP_MASK 0x3ff
-#define EVENT_THR_CTL_SHIFT 32 /* Threshold control value (start/stop) */
-#define EVENT_THR_CTL_MASK 0xffull
-#define EVENT_THR_SEL_SHIFT 29 /* Threshold select value */
-#define EVENT_THR_SEL_MASK 0x7
-#define EVENT_THRESH_SHIFT 29 /* All threshold bits */
-#define EVENT_THRESH_MASK 0x1fffffull
-#define EVENT_SAMPLE_SHIFT 24 /* Sampling mode & eligibility */
-#define EVENT_SAMPLE_MASK 0x1f
-#define EVENT_CACHE_SEL_SHIFT 20 /* L2/L3 cache select */
-#define EVENT_CACHE_SEL_MASK 0xf
-#define EVENT_IS_L1 (4 << EVENT_CACHE_SEL_SHIFT)
-#define EVENT_PMC_SHIFT 16 /* PMC number (1-based) */
-#define EVENT_PMC_MASK 0xf
-#define EVENT_UNIT_SHIFT 12 /* Unit */
-#define EVENT_UNIT_MASK 0xf
-#define EVENT_COMBINE_SHIFT 11 /* Combine bit */
-#define EVENT_COMBINE_MASK 0x1
-#define EVENT_MARKED_SHIFT 8 /* Marked bit */
-#define EVENT_MARKED_MASK 0x1
-#define EVENT_IS_MARKED (EVENT_MARKED_MASK << EVENT_MARKED_SHIFT)
-#define EVENT_PSEL_MASK 0xff /* PMCxSEL value */
-
-/* MMCRA IFM bits - POWER8 */
-#define POWER8_MMCRA_IFM1 0x0000000040000000UL
-#define POWER8_MMCRA_IFM2 0x0000000080000000UL
-#define POWER8_MMCRA_IFM3 0x00000000C0000000UL
-
-#define ONLY_PLM \
- (PERF_SAMPLE_BRANCH_USER |\
- PERF_SAMPLE_BRANCH_KERNEL |\
- PERF_SAMPLE_BRANCH_HV)
-
-/*
- * Layout of constraint bits:
- *
- * 60 56 52 48 44 40 36 32
- * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - |
- * [ fab_match ] [ thresh_cmp ] [ thresh_ctl ] [ ]
- * |
- * thresh_sel -*
- *
- * 28 24 20 16 12 8 4 0
- * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - |
- * [ ] [ sample ] [ ] [6] [5] [4] [3] [2] [1]
- * | |
- * L1 I/D qualifier -* | Count of events for each PMC.
- * | p1, p2, p3, p4, p5, p6.
- * nc - number of counters -*
- *
- * The PMC fields P1..P6, and NC, are adder fields. As we accumulate constraints
- * we want the low bit of each field to be added to any existing value.
- *
- * Everything else is a value field.
- */
-
-#define CNST_FAB_MATCH_VAL(v) (((v) & EVENT_THR_CTL_MASK) << 56)
-#define CNST_FAB_MATCH_MASK CNST_FAB_MATCH_VAL(EVENT_THR_CTL_MASK)
-
-/* We just throw all the threshold bits into the constraint */
-#define CNST_THRESH_VAL(v) (((v) & EVENT_THRESH_MASK) << 32)
-#define CNST_THRESH_MASK CNST_THRESH_VAL(EVENT_THRESH_MASK)
-
-#define CNST_L1_QUAL_VAL(v) (((v) & 3) << 22)
-#define CNST_L1_QUAL_MASK CNST_L1_QUAL_VAL(3)
-
-#define CNST_SAMPLE_VAL(v) (((v) & EVENT_SAMPLE_MASK) << 16)
-#define CNST_SAMPLE_MASK CNST_SAMPLE_VAL(EVENT_SAMPLE_MASK)
-
-/*
- * For NC we are counting up to 4 events. This requires three bits, and we need
- * the fifth event to overflow and set the 4th bit. To achieve that we bias the
- * fields by 3 in test_adder.
- */
-#define CNST_NC_SHIFT 12
-#define CNST_NC_VAL (1 << CNST_NC_SHIFT)
-#define CNST_NC_MASK (8 << CNST_NC_SHIFT)
-#define POWER8_TEST_ADDER (3 << CNST_NC_SHIFT)
-
-/*
- * For the per-PMC fields we have two bits. The low bit is added, so if two
- * events ask for the same PMC the sum will overflow, setting the high bit,
- * indicating an error. So our mask sets the high bit.
- */
-#define CNST_PMC_SHIFT(pmc) ((pmc - 1) * 2)
-#define CNST_PMC_VAL(pmc) (1 << CNST_PMC_SHIFT(pmc))
-#define CNST_PMC_MASK(pmc) (2 << CNST_PMC_SHIFT(pmc))
-
-/* Our add_fields is defined as: */
-#define POWER8_ADD_FIELDS \
- CNST_PMC_VAL(1) | CNST_PMC_VAL(2) | CNST_PMC_VAL(3) | \
- CNST_PMC_VAL(4) | CNST_PMC_VAL(5) | CNST_PMC_VAL(6) | CNST_NC_VAL
-
-
-/* Bits in MMCR1 for POWER8 */
-#define MMCR1_UNIT_SHIFT(pmc) (60 - (4 * ((pmc) - 1)))
-#define MMCR1_COMBINE_SHIFT(pmc) (35 - ((pmc) - 1))
-#define MMCR1_PMCSEL_SHIFT(pmc) (24 - (((pmc) - 1)) * 8)
-#define MMCR1_DC_QUAL_SHIFT 47
-#define MMCR1_IC_QUAL_SHIFT 46
-
-/* Bits in MMCRA for POWER8 */
-#define MMCRA_SAMP_MODE_SHIFT 1
-#define MMCRA_SAMP_ELIG_SHIFT 4
-#define MMCRA_THR_CTL_SHIFT 8
-#define MMCRA_THR_SEL_SHIFT 16
-#define MMCRA_THR_CMP_SHIFT 32
-#define MMCRA_SDAR_MODE_TLB (1ull << 42)
-
-
-static inline bool event_is_fab_match(u64 event)
-{
- /* Only check pmc, unit and pmcxsel, ignore the edge bit (0) */
- event &= 0xff0fe;
-
- /* PM_MRK_FAB_RSP_MATCH & PM_MRK_FAB_RSP_MATCH_CYC */
- return (event == 0x30056 || event == 0x4f052);
-}
-
-static int power8_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp)
-{
- unsigned int unit, pmc, cache;
- unsigned long mask, value;
-
- mask = value = 0;
-
- pmc = (event >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK;
- unit = (event >> EVENT_UNIT_SHIFT) & EVENT_UNIT_MASK;
- cache = (event >> EVENT_CACHE_SEL_SHIFT) & EVENT_CACHE_SEL_MASK;
-
- if (pmc) {
- if (pmc > 6)
- return -1;
-
- mask |= CNST_PMC_MASK(pmc);
- value |= CNST_PMC_VAL(pmc);
-
- if (pmc >= 5 && event != 0x500fa && event != 0x600f4)
- return -1;
- }
-
- if (pmc <= 4) {
- /*
- * Add to number of counters in use. Note this includes events with
- * a PMC of 0 - they still need a PMC, it's just assigned later.
- * Don't count events on PMC 5 & 6, there is only one valid event
- * on each of those counters, and they are handled above.
- */
- mask |= CNST_NC_MASK;
- value |= CNST_NC_VAL;
- }
-
- if (unit >= 6 && unit <= 9) {
- /*
- * L2/L3 events contain a cache selector field, which is
- * supposed to be programmed into MMCRC. However MMCRC is only
- * HV writable, and there is no API for guest kernels to modify
- * it. The solution is for the hypervisor to initialise the
- * field to zeroes, and for us to only ever allow events that
- * have a cache selector of zero.
- */
- if (cache)
- return -1;
-
- } else if (event & EVENT_IS_L1) {
- mask |= CNST_L1_QUAL_MASK;
- value |= CNST_L1_QUAL_VAL(cache);
- }
-
- if (event & EVENT_IS_MARKED) {
- mask |= CNST_SAMPLE_MASK;
- value |= CNST_SAMPLE_VAL(event >> EVENT_SAMPLE_SHIFT);
- }
-
- /*
- * Special case for PM_MRK_FAB_RSP_MATCH and PM_MRK_FAB_RSP_MATCH_CYC,
- * the threshold control bits are used for the match value.
- */
- if (event_is_fab_match(event)) {
- mask |= CNST_FAB_MATCH_MASK;
- value |= CNST_FAB_MATCH_VAL(event >> EVENT_THR_CTL_SHIFT);
- } else {
- /*
- * Check the mantissa upper two bits are not zero, unless the
- * exponent is also zero. See the THRESH_CMP_MANTISSA doc.
- */
- unsigned int cmp, exp;
-
- cmp = (event >> EVENT_THR_CMP_SHIFT) & EVENT_THR_CMP_MASK;
- exp = cmp >> 7;
-
- if (exp && (cmp & 0x60) == 0)
- return -1;
-
- mask |= CNST_THRESH_MASK;
- value |= CNST_THRESH_VAL(event >> EVENT_THRESH_SHIFT);
- }
-
- *maskp = mask;
- *valp = value;
-
- return 0;
-}
-
-static int power8_compute_mmcr(u64 event[], int n_ev,
- unsigned int hwc[], unsigned long mmcr[])
-{
- unsigned long mmcra, mmcr1, unit, combine, psel, cache, val;
- unsigned int pmc, pmc_inuse;
- int i;
-
- pmc_inuse = 0;
-
- /* First pass to count resource use */
- for (i = 0; i < n_ev; ++i) {
- pmc = (event[i] >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK;
- if (pmc)
- pmc_inuse |= 1 << pmc;
- }
-
- /* In continous sampling mode, update SDAR on TLB miss */
- mmcra = MMCRA_SDAR_MODE_TLB;
- mmcr1 = 0;
-
- /* Second pass: assign PMCs, set all MMCR1 fields */
- for (i = 0; i < n_ev; ++i) {
- pmc = (event[i] >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK;
- unit = (event[i] >> EVENT_UNIT_SHIFT) & EVENT_UNIT_MASK;
- combine = (event[i] >> EVENT_COMBINE_SHIFT) & EVENT_COMBINE_MASK;
- psel = event[i] & EVENT_PSEL_MASK;
-
- if (!pmc) {
- for (pmc = 1; pmc <= 4; ++pmc) {
- if (!(pmc_inuse & (1 << pmc)))
- break;
- }
-
- pmc_inuse |= 1 << pmc;
- }
-
- if (pmc <= 4) {
- mmcr1 |= unit << MMCR1_UNIT_SHIFT(pmc);
- mmcr1 |= combine << MMCR1_COMBINE_SHIFT(pmc);
- mmcr1 |= psel << MMCR1_PMCSEL_SHIFT(pmc);
- }
-
- if (event[i] & EVENT_IS_L1) {
- cache = event[i] >> EVENT_CACHE_SEL_SHIFT;
- mmcr1 |= (cache & 1) << MMCR1_IC_QUAL_SHIFT;
- cache >>= 1;
- mmcr1 |= (cache & 1) << MMCR1_DC_QUAL_SHIFT;
- }
-
- if (event[i] & EVENT_IS_MARKED) {
- mmcra |= MMCRA_SAMPLE_ENABLE;
-
- val = (event[i] >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK;
- if (val) {
- mmcra |= (val & 3) << MMCRA_SAMP_MODE_SHIFT;
- mmcra |= (val >> 2) << MMCRA_SAMP_ELIG_SHIFT;
- }
- }
-
- /*
- * PM_MRK_FAB_RSP_MATCH and PM_MRK_FAB_RSP_MATCH_CYC,
- * the threshold bits are used for the match value.
- */
- if (event_is_fab_match(event[i])) {
- mmcr1 |= (event[i] >> EVENT_THR_CTL_SHIFT) &
- EVENT_THR_CTL_MASK;
- } else {
- val = (event[i] >> EVENT_THR_CTL_SHIFT) & EVENT_THR_CTL_MASK;
- mmcra |= val << MMCRA_THR_CTL_SHIFT;
- val = (event[i] >> EVENT_THR_SEL_SHIFT) & EVENT_THR_SEL_MASK;
- mmcra |= val << MMCRA_THR_SEL_SHIFT;
- val = (event[i] >> EVENT_THR_CMP_SHIFT) & EVENT_THR_CMP_MASK;
- mmcra |= val << MMCRA_THR_CMP_SHIFT;
- }
-
- hwc[i] = pmc - 1;
- }
-
- /* Return MMCRx values */
- mmcr[0] = 0;
-
- /* pmc_inuse is 1-based */
- if (pmc_inuse & 2)
- mmcr[0] = MMCR0_PMC1CE;
-
- if (pmc_inuse & 0x7c)
- mmcr[0] |= MMCR0_PMCjCE;
-
- mmcr[1] = mmcr1;
- mmcr[2] = mmcra;
-
- return 0;
-}
-
-#define MAX_ALT 2
-
-/* Table of alternatives, sorted by column 0 */
-static const unsigned int event_alternatives[][MAX_ALT] = {
- { 0x10134, 0x301e2 }, /* PM_MRK_ST_CMPL */
- { 0x10138, 0x40138 }, /* PM_BR_MRK_2PATH */
- { 0x18082, 0x3e05e }, /* PM_L3_CO_MEPF */
- { 0x1d14e, 0x401e8 }, /* PM_MRK_DATA_FROM_L2MISS */
- { 0x1e054, 0x4000a }, /* PM_CMPLU_STALL */
- { 0x20036, 0x40036 }, /* PM_BR_2PATH */
- { 0x200f2, 0x300f2 }, /* PM_INST_DISP */
- { 0x200f4, 0x600f4 }, /* PM_RUN_CYC */
- { 0x2013c, 0x3012e }, /* PM_MRK_FILT_MATCH */
- { 0x3e054, 0x400f0 }, /* PM_LD_MISS_L1 */
- { 0x400fa, 0x500fa }, /* PM_RUN_INST_CMPL */
-};
-
-/*
- * Scan the alternatives table for a match and return the
- * index into the alternatives table if found, else -1.
- */
-static int find_alternative(u64 event)
-{
- int i, j;
-
- for (i = 0; i < ARRAY_SIZE(event_alternatives); ++i) {
- if (event < event_alternatives[i][0])
- break;
-
- for (j = 0; j < MAX_ALT && event_alternatives[i][j]; ++j)
- if (event == event_alternatives[i][j])
- return i;
- }
-
- return -1;
-}
-
-static int power8_get_alternatives(u64 event, unsigned int flags, u64 alt[])
-{
- int i, j, num_alt = 0;
- u64 alt_event;
-
- alt[num_alt++] = event;
-
- i = find_alternative(event);
- if (i >= 0) {
- /* Filter out the original event, it's already in alt[0] */
- for (j = 0; j < MAX_ALT; ++j) {
- alt_event = event_alternatives[i][j];
- if (alt_event && alt_event != event)
- alt[num_alt++] = alt_event;
- }
- }
-
- if (flags & PPMU_ONLY_COUNT_RUN) {
- /*
- * We're only counting in RUN state, so PM_CYC is equivalent to
- * PM_RUN_CYC and PM_INST_CMPL === PM_RUN_INST_CMPL.
- */
- j = num_alt;
- for (i = 0; i < num_alt; ++i) {
- switch (alt[i]) {
- case 0x1e: /* PM_CYC */
- alt[j++] = 0x600f4; /* PM_RUN_CYC */
- break;
- case 0x600f4: /* PM_RUN_CYC */
- alt[j++] = 0x1e;
- break;
- case 0x2: /* PM_PPC_CMPL */
- alt[j++] = 0x500fa; /* PM_RUN_INST_CMPL */
- break;
- case 0x500fa: /* PM_RUN_INST_CMPL */
- alt[j++] = 0x2; /* PM_PPC_CMPL */
- break;
- }
- }
- num_alt = j;
- }
-
- return num_alt;
-}
-
-static void power8_disable_pmc(unsigned int pmc, unsigned long mmcr[])
-{
- if (pmc <= 3)
- mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SHIFT(pmc + 1));
-}
-
-PMU_FORMAT_ATTR(event, "config:0-49");
-PMU_FORMAT_ATTR(pmcxsel, "config:0-7");
-PMU_FORMAT_ATTR(mark, "config:8");
-PMU_FORMAT_ATTR(combine, "config:11");
-PMU_FORMAT_ATTR(unit, "config:12-15");
-PMU_FORMAT_ATTR(pmc, "config:16-19");
-PMU_FORMAT_ATTR(cache_sel, "config:20-23");
-PMU_FORMAT_ATTR(sample_mode, "config:24-28");
-PMU_FORMAT_ATTR(thresh_sel, "config:29-31");
-PMU_FORMAT_ATTR(thresh_stop, "config:32-35");
-PMU_FORMAT_ATTR(thresh_start, "config:36-39");
-PMU_FORMAT_ATTR(thresh_cmp, "config:40-49");
-
-static struct attribute *power8_pmu_format_attr[] = {
- &format_attr_event.attr,
- &format_attr_pmcxsel.attr,
- &format_attr_mark.attr,
- &format_attr_combine.attr,
- &format_attr_unit.attr,
- &format_attr_pmc.attr,
- &format_attr_cache_sel.attr,
- &format_attr_sample_mode.attr,
- &format_attr_thresh_sel.attr,
- &format_attr_thresh_stop.attr,
- &format_attr_thresh_start.attr,
- &format_attr_thresh_cmp.attr,
- NULL,
-};
-
-struct attribute_group power8_pmu_format_group = {
- .name = "format",
- .attrs = power8_pmu_format_attr,
-};
-
-static const struct attribute_group *power8_pmu_attr_groups[] = {
- &power8_pmu_format_group,
- NULL,
-};
-
-static int power8_generic_events[] = {
- [PERF_COUNT_HW_CPU_CYCLES] = PM_CYC,
- [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = PM_GCT_NOSLOT_CYC,
- [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = PM_CMPLU_STALL,
- [PERF_COUNT_HW_INSTRUCTIONS] = PM_INST_CMPL,
- [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = PM_BRU_FIN,
- [PERF_COUNT_HW_BRANCH_MISSES] = PM_BR_MPRED_CMPL,
-};
-
-static u64 power8_bhrb_filter_map(u64 branch_sample_type)
-{
- u64 pmu_bhrb_filter = 0;
- u64 br_privilege = branch_sample_type & ONLY_PLM;
-
- /* BHRB and regular PMU events share the same prvillege state
- * filter configuration. BHRB is always recorded along with a
- * regular PMU event. So privilege state filter criteria for BHRB
- * and the companion PMU events has to be the same. As a default
- * "perf record" tool sets all privillege bits ON when no filter
- * criteria is provided in the command line. So as along as all
- * privillege bits are ON or they are OFF, we are good to go.
- */
- if ((br_privilege != 7) && (br_privilege != 0))
- return -1;
-
- /* No branch filter requested */
- if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY)
- return pmu_bhrb_filter;
-
- /* Invalid branch filter options - HW does not support */
- if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY_RETURN)
- return -1;
-
- if (branch_sample_type & PERF_SAMPLE_BRANCH_IND_CALL)
- return -1;
-
- if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY_CALL) {
- pmu_bhrb_filter |= POWER8_MMCRA_IFM1;
- return pmu_bhrb_filter;
- }
-
- /* Every thing else is unsupported */
- return -1;
-}
-
-static void power8_config_bhrb(u64 pmu_bhrb_filter)
-{
- /* Enable BHRB filter in PMU */
- mtspr(SPRN_MMCRA, (mfspr(SPRN_MMCRA) | pmu_bhrb_filter));
-}
-
-static struct power_pmu power8_pmu = {
- .name = "POWER8",
- .n_counter = 6,
- .max_alternatives = MAX_ALT + 1,
- .add_fields = POWER8_ADD_FIELDS,
- .test_adder = POWER8_TEST_ADDER,
- .compute_mmcr = power8_compute_mmcr,
- .config_bhrb = power8_config_bhrb,
- .bhrb_filter_map = power8_bhrb_filter_map,
- .get_constraint = power8_get_constraint,
- .get_alternatives = power8_get_alternatives,
- .disable_pmc = power8_disable_pmc,
- .flags = PPMU_HAS_SSLOT | PPMU_HAS_SIER | PPMU_BHRB,
- .n_generic = ARRAY_SIZE(power8_generic_events),
- .generic_events = power8_generic_events,
- .attr_groups = power8_pmu_attr_groups,
- .bhrb_nr = 32,
-};
-
-static int __init init_power8_pmu(void)
-{
- if (!cur_cpu_spec->oprofile_cpu_type ||
- strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power8"))
- return -ENODEV;
-
- return register_power_pmu(&power8_pmu);
-}
-early_initcall(init_power8_pmu);
diff --git a/trunk/arch/powerpc/platforms/40x/Kconfig b/trunk/arch/powerpc/platforms/40x/Kconfig
index bd40bbb15e14..a392d12dd21f 100644
--- a/trunk/arch/powerpc/platforms/40x/Kconfig
+++ b/trunk/arch/powerpc/platforms/40x/Kconfig
@@ -20,6 +20,7 @@ config HOTFOOT
bool "Hotfoot"
depends on 40x
default n
+ select 405EP
select PPC40x_SIMPLE
select PCI
help
@@ -104,6 +105,9 @@ config 405GP
select IBM405_ERR51
select IBM_EMAC_ZMII
+config 405EP
+ bool
+
config 405EX
bool
select IBM_EMAC_EMAC4
@@ -115,6 +119,9 @@ config 405EZ
select IBM_EMAC_MAL_CLR_ICINTSTAT
select IBM_EMAC_MAL_COMMON_ERR
+config 405GPR
+ bool
+
config XILINX_VIRTEX
bool
select DEFAULT_UIMAGE
diff --git a/trunk/arch/powerpc/platforms/512x/Kconfig b/trunk/arch/powerpc/platforms/512x/Kconfig
index eb4620355e7b..c16999802ecf 100644
--- a/trunk/arch/powerpc/platforms/512x/Kconfig
+++ b/trunk/arch/powerpc/platforms/512x/Kconfig
@@ -15,16 +15,16 @@ config MPC5121_ADS
help
This option enables support for the MPC5121E ADS board.
-config MPC512x_GENERIC
- bool "Generic support for simple MPC512x based boards"
+config MPC5121_GENERIC
+ bool "Generic support for simple MPC5121 based boards"
depends on PPC_MPC512x
select DEFAULT_UIMAGE
help
- This option enables support for simple MPC512x based boards
+ This option enables support for simple MPC5121 based boards
which do not need custom platform specific setup.
Compatible boards include: Protonic LVT base boards (ZANMCU
- and VICVT2), Freescale MPC5125 Tower system.
+ and VICVT2).
config PDM360NG
bool "ifm PDM360NG board"
diff --git a/trunk/arch/powerpc/platforms/512x/Makefile b/trunk/arch/powerpc/platforms/512x/Makefile
index 72fb9340e09f..4efc1c4b6fb5 100644
--- a/trunk/arch/powerpc/platforms/512x/Makefile
+++ b/trunk/arch/powerpc/platforms/512x/Makefile
@@ -3,5 +3,5 @@
#
obj-y += clock.o mpc512x_shared.o
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
-obj-$(CONFIG_MPC512x_GENERIC) += mpc512x_generic.o
+obj-$(CONFIG_MPC5121_GENERIC) += mpc5121_generic.o
obj-$(CONFIG_PDM360NG) += pdm360ng.o
diff --git a/trunk/arch/powerpc/platforms/512x/clock.c b/trunk/arch/powerpc/platforms/512x/clock.c
index e504166e089a..52d57d281724 100644
--- a/trunk/arch/powerpc/platforms/512x/clock.c
+++ b/trunk/arch/powerpc/platforms/512x/clock.c
@@ -29,8 +29,6 @@
#include
#include
-#include "mpc512x.h"
-
#undef CLK_DEBUG
static int clocks_initialized;
@@ -685,13 +683,8 @@ static void psc_clks_init(void)
struct device_node *np;
struct platform_device *ofdev;
u32 reg;
- const char *psc_compat;
-
- psc_compat = mpc512x_select_psc_compat();
- if (!psc_compat)
- return;
- for_each_compatible_node(np, NULL, psc_compat) {
+ for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
if (!of_property_read_u32(np, "reg", ®)) {
int pscnum = (reg & 0xf00) >> 8;
struct clk *clk = psc_dev_clk(pscnum);
diff --git a/trunk/arch/powerpc/platforms/512x/mpc512x_generic.c b/trunk/arch/powerpc/platforms/512x/mpc5121_generic.c
similarity index 83%
rename from trunk/arch/powerpc/platforms/512x/mpc512x_generic.c
rename to trunk/arch/powerpc/platforms/512x/mpc5121_generic.c
index 5fb919b30924..ca1ca6669990 100644
--- a/trunk/arch/powerpc/platforms/512x/mpc512x_generic.c
+++ b/trunk/arch/powerpc/platforms/512x/mpc5121_generic.c
@@ -4,7 +4,7 @@
* Author: John Rigby,
*
* Description:
- * MPC512x SoC setup
+ * MPC5121 SoC setup
*
* This is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by
@@ -28,22 +28,20 @@
*/
static const char * const board[] __initconst = {
"prt,prtlvt",
- "fsl,mpc5125ads",
- "ifm,ac14xx",
NULL
};
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
-static int __init mpc512x_generic_probe(void)
+static int __init mpc5121_generic_probe(void)
{
return of_flat_dt_match(of_get_flat_dt_root(), board);
}
-define_machine(mpc512x_generic) {
- .name = "MPC512x generic",
- .probe = mpc512x_generic_probe,
+define_machine(mpc5121_generic) {
+ .name = "MPC5121 generic",
+ .probe = mpc5121_generic_probe,
.init = mpc512x_init,
.init_early = mpc512x_init_diu,
.setup_arch = mpc512x_setup_diu,
diff --git a/trunk/arch/powerpc/platforms/512x/mpc512x.h b/trunk/arch/powerpc/platforms/512x/mpc512x.h
index 0a8e60023944..c32b399eb952 100644
--- a/trunk/arch/powerpc/platforms/512x/mpc512x.h
+++ b/trunk/arch/powerpc/platforms/512x/mpc512x.h
@@ -15,7 +15,6 @@ extern void __init mpc512x_init_IRQ(void);
extern void __init mpc512x_init(void);
extern int __init mpc5121_clk_init(void);
void __init mpc512x_declare_of_platform_devices(void);
-extern const char *mpc512x_select_psc_compat(void);
extern void mpc512x_restart(char *cmd);
#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
diff --git a/trunk/arch/powerpc/platforms/512x/mpc512x_shared.c b/trunk/arch/powerpc/platforms/512x/mpc512x_shared.c
index 7642cd7aad73..d30235b7e3f7 100644
--- a/trunk/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/trunk/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -330,34 +330,26 @@ void __init mpc512x_init_IRQ(void)
static struct of_device_id __initdata of_bus_ids[] = {
{ .compatible = "fsl,mpc5121-immr", },
{ .compatible = "fsl,mpc5121-localbus", },
- { .compatible = "fsl,mpc5121-mbx", },
- { .compatible = "fsl,mpc5121-nfc", },
- { .compatible = "fsl,mpc5121-sram", },
- { .compatible = "fsl,mpc5121-pci", },
- { .compatible = "gpio-leds", },
{},
};
void __init mpc512x_declare_of_platform_devices(void)
{
+ struct device_node *np;
+
if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
printk(KERN_ERR __FILE__ ": "
"Error while probing of_platform bus\n");
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-nfc");
+ if (np) {
+ of_platform_device_create(np, NULL, NULL);
+ of_node_put(np);
+ }
}
#define DEFAULT_FIFO_SIZE 16
-const char *mpc512x_select_psc_compat(void)
-{
- if (of_machine_is_compatible("fsl,mpc5121"))
- return "fsl,mpc5121-psc";
-
- if (of_machine_is_compatible("fsl,mpc5125"))
- return "fsl,mpc5125-psc";
-
- return NULL;
-}
-
static unsigned int __init get_fifo_size(struct device_node *np,
char *prop_name)
{
@@ -383,16 +375,9 @@ void __init mpc512x_psc_fifo_init(void)
void __iomem *psc;
unsigned int tx_fifo_size;
unsigned int rx_fifo_size;
- const char *psc_compat;
int fifobase = 0; /* current fifo address in 32 bit words */
- psc_compat = mpc512x_select_psc_compat();
- if (!psc_compat) {
- pr_err("%s: no compatible devices found\n", __func__);
- return;
- }
-
- for_each_compatible_node(np, NULL, psc_compat) {
+ for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
tx_fifo_size = get_fifo_size(np, "fsl,tx-fifo-size");
rx_fifo_size = get_fifo_size(np, "fsl,rx-fifo-size");
diff --git a/trunk/arch/powerpc/platforms/85xx/sgy_cts1000.c b/trunk/arch/powerpc/platforms/85xx/sgy_cts1000.c
index 7179726ba5c5..611e92f291c4 100644
--- a/trunk/arch/powerpc/platforms/85xx/sgy_cts1000.c
+++ b/trunk/arch/powerpc/platforms/85xx/sgy_cts1000.c
@@ -69,7 +69,7 @@ static irqreturn_t gpio_halt_irq(int irq, void *__data)
return IRQ_HANDLED;
};
-static int gpio_halt_probe(struct platform_device *pdev)
+static int __devinit gpio_halt_probe(struct platform_device *pdev)
{
enum of_gpio_flags flags;
struct device_node *node = pdev->dev.of_node;
@@ -128,7 +128,7 @@ static int gpio_halt_probe(struct platform_device *pdev)
return 0;
}
-static int gpio_halt_remove(struct platform_device *pdev)
+static int __devexit gpio_halt_remove(struct platform_device *pdev)
{
if (halt_node) {
int gpio = of_get_gpio(halt_node, 0);
@@ -165,7 +165,7 @@ static struct platform_driver gpio_halt_driver = {
.of_match_table = gpio_halt_match,
},
.probe = gpio_halt_probe,
- .remove = gpio_halt_remove,
+ .remove = __devexit_p(gpio_halt_remove),
};
module_platform_driver(gpio_halt_driver);
diff --git a/trunk/arch/powerpc/platforms/Kconfig b/trunk/arch/powerpc/platforms/Kconfig
index 9089ae71334a..52de8bccfb30 100644
--- a/trunk/arch/powerpc/platforms/Kconfig
+++ b/trunk/arch/powerpc/platforms/Kconfig
@@ -6,6 +6,7 @@ source "arch/powerpc/platforms/chrp/Kconfig"
source "arch/powerpc/platforms/512x/Kconfig"
source "arch/powerpc/platforms/52xx/Kconfig"
source "arch/powerpc/platforms/powermac/Kconfig"
+source "arch/powerpc/platforms/prep/Kconfig"
source "arch/powerpc/platforms/maple/Kconfig"
source "arch/powerpc/platforms/pasemi/Kconfig"
source "arch/powerpc/platforms/ps3/Kconfig"
@@ -232,7 +233,7 @@ endmenu
config PPC601_SYNC_FIX
bool "Workarounds for PPC601 bugs"
- depends on 6xx && PPC_PMAC
+ depends on 6xx && (PPC_PREP || PPC_PMAC)
help
Some versions of the PPC601 (the first PowerPC chip) have bugs which
mean that extra synchronization instructions are required near
diff --git a/trunk/arch/powerpc/platforms/Kconfig.cputype b/trunk/arch/powerpc/platforms/Kconfig.cputype
index 18e3b76c78d7..cea2f09c4241 100644
--- a/trunk/arch/powerpc/platforms/Kconfig.cputype
+++ b/trunk/arch/powerpc/platforms/Kconfig.cputype
@@ -124,8 +124,9 @@ config 6xx
select PPC_HAVE_PMU_SUPPORT
config POWER3
+ bool
depends on PPC64 && PPC_BOOK3S
- def_bool y
+ default y if !POWER4_ONLY
config POWER4
depends on PPC64 && PPC_BOOK3S
@@ -144,7 +145,8 @@ config TUNE_CELL
but somewhat slower on other machines. This option only changes
the scheduling of instructions, not the selection of instructions
itself, so the resulting kernel will keep running on all other
- machines.
+ machines. When building a kernel that is supposed to run only
+ on Cell, you should also select the POWER4_ONLY option.
# this is temp to handle compat with arch=ppc
config 8xx
diff --git a/trunk/arch/powerpc/platforms/cell/pmu.c b/trunk/arch/powerpc/platforms/cell/pmu.c
index 348a27b12512..59c1a1694104 100644
--- a/trunk/arch/powerpc/platforms/cell/pmu.c
+++ b/trunk/arch/powerpc/platforms/cell/pmu.c
@@ -382,7 +382,7 @@ static int __init cbe_init_pm_irq(void)
unsigned int irq;
int rc, node;
- for_each_online_node(node) {
+ for_each_node(node) {
irq = irq_create_mapping(NULL, IIC_IRQ_IOEX_PMI |
(node << IIC_IRQ_NODE_SHIFT));
if (irq == NO_IRQ) {
diff --git a/trunk/arch/powerpc/platforms/cell/spufs/file.c b/trunk/arch/powerpc/platforms/cell/spufs/file.c
index 0026a37e21fd..68c57d38745a 100644
--- a/trunk/arch/powerpc/platforms/cell/spufs/file.c
+++ b/trunk/arch/powerpc/platforms/cell/spufs/file.c
@@ -352,7 +352,7 @@ static unsigned long spufs_get_unmapped_area(struct file *file,
/* Else, try to obtain a 64K pages slice */
return slice_get_unmapped_area(addr, len, flags,
- MMU_PAGE_64K, 1);
+ MMU_PAGE_64K, 1, 0);
}
#endif /* CONFIG_SPU_FS_64K_LS */
diff --git a/trunk/arch/powerpc/platforms/cell/spufs/inode.c b/trunk/arch/powerpc/platforms/cell/spufs/inode.c
index 35f77a42bedf..863184b182f4 100644
--- a/trunk/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/trunk/arch/powerpc/platforms/cell/spufs/inode.c
@@ -99,7 +99,6 @@ spufs_new_inode(struct super_block *sb, umode_t mode)
if (!inode)
goto out;
- inode->i_ino = get_next_ino();
inode->i_mode = mode;
inode->i_uid = current_fsuid();
inode->i_gid = current_fsgid();
@@ -750,7 +749,6 @@ static struct file_system_type spufs_type = {
.mount = spufs_mount,
.kill_sb = kill_litter_super,
};
-MODULE_ALIAS_FS("spufs");
static int __init spufs_init(void)
{
diff --git a/trunk/arch/powerpc/platforms/embedded6xx/Kconfig b/trunk/arch/powerpc/platforms/embedded6xx/Kconfig
index 302ba43d73a1..5a8f50a9afa7 100644
--- a/trunk/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/trunk/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -9,6 +9,7 @@ config LINKSTATION
select FSL_SOC
select PPC_UDBG_16550 if SERIAL_8250
select DEFAULT_UIMAGE
+ select MPC10X_OPENPIC
select MPC10X_BRIDGE
help
Select LINKSTATION if configuring for one of PPC- (MPC8241)
@@ -23,6 +24,7 @@ config STORCENTER
select MPIC
select FSL_SOC
select PPC_UDBG_16550 if SERIAL_8250
+ select MPC10X_OPENPIC
select MPC10X_BRIDGE
help
Select STORCENTER if configuring for the iomega StorCenter
@@ -82,6 +84,9 @@ config MV64X60
select PPC_INDIRECT_PCI
select CHECK_CACHE_COHERENCY
+config MPC10X_OPENPIC
+ bool
+
config GAMECUBE_COMMON
bool
diff --git a/trunk/arch/powerpc/platforms/powernv/Kconfig b/trunk/arch/powerpc/platforms/powernv/Kconfig
index d3e840d643af..74fea5c21839 100644
--- a/trunk/arch/powerpc/platforms/powernv/Kconfig
+++ b/trunk/arch/powerpc/platforms/powernv/Kconfig
@@ -8,11 +8,6 @@ config PPC_POWERNV
select PPC_PCI_CHOICE if EMBEDDED
default y
-config POWERNV_MSI
- bool "Support PCI MSI on PowerNV platform"
- depends on PCI_MSI
- default y
-
config PPC_POWERNV_RTAS
depends on PPC_POWERNV
bool "Support for RTAS based PowerNV platforms such as BML"
diff --git a/trunk/arch/powerpc/platforms/powernv/opal-wrappers.S b/trunk/arch/powerpc/platforms/powernv/opal-wrappers.S
index 6fabe92eafb6..3bb07e5e43cd 100644
--- a/trunk/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/trunk/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -107,4 +107,3 @@ OPAL_CALL(opal_pci_mask_pe_error, OPAL_PCI_MASK_PE_ERROR);
OPAL_CALL(opal_set_slot_led_status, OPAL_SET_SLOT_LED_STATUS);
OPAL_CALL(opal_get_epow_status, OPAL_GET_EPOW_STATUS);
OPAL_CALL(opal_set_system_attention_led, OPAL_SET_SYSTEM_ATTENTION_LED);
-OPAL_CALL(opal_pci_msi_eoi, OPAL_PCI_MSI_EOI);
diff --git a/trunk/arch/powerpc/platforms/powernv/pci-ioda.c b/trunk/arch/powerpc/platforms/powernv/pci-ioda.c
index 8c6c9cf91c13..8e90e8906df3 100644
--- a/trunk/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/trunk/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -26,12 +26,10 @@
#include
#include
#include
-#include
#include
#include
#include
#include
-#include
#include "powernv.h"
#include "pci.h"
@@ -89,7 +87,6 @@ static int pnv_ioda_alloc_pe(struct pnv_phb *phb)
return IODA_INVALID_PE;
} while(test_and_set_bit(pe, phb->ioda.pe_alloc));
- phb->ioda.pe_array[pe].phb = phb;
phb->ioda.pe_array[pe].pe_number = pe;
return pe;
}
@@ -434,102 +431,22 @@ static void pnv_pci_ioda_setup_PEs(void)
}
}
-static void pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb, struct pci_dev *pdev)
+static void pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb, struct pci_dev *dev)
{
- struct pci_dn *pdn = pnv_ioda_get_pdn(pdev);
- struct pnv_ioda_pe *pe;
-
- /*
- * The function can be called while the PE#
- * hasn't been assigned. Do nothing for the
- * case.
- */
- if (!pdn || pdn->pe_number == IODA_INVALID_PE)
- return;
-
- pe = &phb->ioda.pe_array[pdn->pe_number];
- set_iommu_table_base(&pdev->dev, &pe->tce32_table);
+ /* We delay DMA setup after we have assigned all PE# */
}
-static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,
- u64 *startp, u64 *endp)
+static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, struct pci_bus *bus)
{
- u64 __iomem *invalidate = (u64 __iomem *)tbl->it_index;
- unsigned long start, end, inc;
-
- start = __pa(startp);
- end = __pa(endp);
-
- /* BML uses this case for p6/p7/galaxy2: Shift addr and put in node */
- if (tbl->it_busno) {
- start <<= 12;
- end <<= 12;
- inc = 128 << 12;
- start |= tbl->it_busno;
- end |= tbl->it_busno;
- } else if (tbl->it_type & TCE_PCI_SWINV_PAIR) {
- /* p7ioc-style invalidation, 2 TCEs per write */
- start |= (1ull << 63);
- end |= (1ull << 63);
- inc = 16;
- } else {
- /* Default (older HW) */
- inc = 128;
- }
-
- end |= inc - 1; /* round up end to be different than start */
-
- mb(); /* Ensure above stores are visible */
- while (start <= end) {
- __raw_writeq(start, invalidate);
- start += inc;
- }
-
- /*
- * The iommu layer will do another mb() for us on build()
- * and we don't care on free()
- */
-}
+ struct pci_dev *dev;
-static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe *pe,
- struct iommu_table *tbl,
- u64 *startp, u64 *endp)
-{
- unsigned long start, end, inc;
- u64 __iomem *invalidate = (u64 __iomem *)tbl->it_index;
-
- /* We'll invalidate DMA address in PE scope */
- start = 0x2ul << 60;
- start |= (pe->pe_number & 0xFF);
- end = start;
-
- /* Figure out the start, end and step */
- inc = tbl->it_offset + (((u64)startp - tbl->it_base) / sizeof(u64));
- start |= (inc << 12);
- inc = tbl->it_offset + (((u64)endp - tbl->it_base) / sizeof(u64));
- end |= (inc << 12);
- inc = (0x1ul << 12);
- mb();
-
- while (start <= end) {
- __raw_writeq(start, invalidate);
- start += inc;
+ list_for_each_entry(dev, &bus->devices, bus_list) {
+ set_iommu_table_base(&dev->dev, &pe->tce32_table);
+ if (dev->subordinate)
+ pnv_ioda_setup_bus_dma(pe, dev->subordinate);
}
}
-void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,
- u64 *startp, u64 *endp)
-{
- struct pnv_ioda_pe *pe = container_of(tbl, struct pnv_ioda_pe,
- tce32_table);
- struct pnv_phb *phb = pe->phb;
-
- if (phb->type == PNV_PHB_IODA1)
- pnv_pci_ioda1_tce_invalidate(tbl, startp, endp);
- else
- pnv_pci_ioda2_tce_invalidate(pe, tbl, startp, endp);
-}
-
static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
struct pnv_ioda_pe *pe, unsigned int base,
unsigned int segs)
@@ -601,11 +518,16 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
*/
tbl->it_busno = 0;
tbl->it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
- tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE |
- TCE_PCI_SWINV_PAIR;
+ tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE
+ | TCE_PCI_SWINV_PAIR;
}
iommu_init_table(tbl, phb->hose->node);
+ if (pe->pdev)
+ set_iommu_table_base(&pe->pdev->dev, tbl);
+ else
+ pnv_ioda_setup_bus_dma(pe, pe->pbus);
+
return;
fail:
/* XXX Failure: Try to fallback to 64-bit only ? */
@@ -615,76 +537,6 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
__free_pages(tce_mem, get_order(TCE32_TABLE_SIZE * segs));
}
-static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
- struct pnv_ioda_pe *pe)
-{
- struct page *tce_mem = NULL;
- void *addr;
- const __be64 *swinvp;
- struct iommu_table *tbl;
- unsigned int tce_table_size, end;
- int64_t rc;
-
- /* We shouldn't already have a 32-bit DMA associated */
- if (WARN_ON(pe->tce32_seg >= 0))
- return;
-
- /* The PE will reserve all possible 32-bits space */
- pe->tce32_seg = 0;
- end = (1 << ilog2(phb->ioda.m32_pci_base));
- tce_table_size = (end / 0x1000) * 8;
- pe_info(pe, "Setting up 32-bit TCE table at 0..%08x\n",
- end);
-
- /* Allocate TCE table */
- tce_mem = alloc_pages_node(phb->hose->node, GFP_KERNEL,
- get_order(tce_table_size));
- if (!tce_mem) {
- pe_err(pe, "Failed to allocate a 32-bit TCE memory\n");
- goto fail;
- }
- addr = page_address(tce_mem);
- memset(addr, 0, tce_table_size);
-
- /*
- * Map TCE table through TVT. The TVE index is the PE number
- * shifted by 1 bit for 32-bits DMA space.
- */
- rc = opal_pci_map_pe_dma_window(phb->opal_id, pe->pe_number,
- pe->pe_number << 1, 1, __pa(addr),
- tce_table_size, 0x1000);
- if (rc) {
- pe_err(pe, "Failed to configure 32-bit TCE table,"
- " err %ld\n", rc);
- goto fail;
- }
-
- /* Setup linux iommu table */
- tbl = &pe->tce32_table;
- pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0);
-
- /* OPAL variant of PHB3 invalidated TCEs */
- swinvp = of_get_property(phb->hose->dn, "ibm,opal-tce-kill", NULL);
- if (swinvp) {
- /* We need a couple more fields -- an address and a data
- * to or. Since the bus is only printed out on table free
- * errors, and on the first pass the data will be a relative
- * bus number, print that out instead.
- */
- tbl->it_busno = 0;
- tbl->it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
- tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
- }
- iommu_init_table(tbl, phb->hose->node);
-
- return;
-fail:
- if (pe->tce32_seg >= 0)
- pe->tce32_seg = -1;
- if (tce_mem)
- __free_pages(tce_mem, get_order(tce_table_size));
-}
-
static void pnv_ioda_setup_dma(struct pnv_phb *phb)
{
struct pci_controller *hose = phb->hose;
@@ -727,49 +579,20 @@ static void pnv_ioda_setup_dma(struct pnv_phb *phb)
if (segs > remaining)
segs = remaining;
}
-
- /*
- * For IODA2 compliant PHB3, we needn't care about the weight.
- * The all available 32-bits DMA space will be assigned to
- * the specific PE.
- */
- if (phb->type == PNV_PHB_IODA1) {
- pe_info(pe, "DMA weight %d, assigned %d DMA32 segments\n",
- pe->dma_weight, segs);
- pnv_pci_ioda_setup_dma_pe(phb, pe, base, segs);
- } else {
- pe_info(pe, "Assign DMA32 space\n");
- segs = 0;
- pnv_pci_ioda2_setup_dma_pe(phb, pe);
- }
-
+ pe_info(pe, "DMA weight %d, assigned %d DMA32 segments\n",
+ pe->dma_weight, segs);
+ pnv_pci_ioda_setup_dma_pe(phb, pe, base, segs);
remaining -= segs;
base += segs;
}
}
#ifdef CONFIG_PCI_MSI
-static void pnv_ioda2_msi_eoi(struct irq_data *d)
-{
- unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
- struct irq_chip *chip = irq_data_get_irq_chip(d);
- struct pnv_phb *phb = container_of(chip, struct pnv_phb,
- ioda.irq_chip);
- int64_t rc;
-
- rc = opal_pci_msi_eoi(phb->opal_id, hw_irq);
- WARN_ON_ONCE(rc);
-
- icp_native_eoi(d);
-}
-
static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
- unsigned int hwirq, unsigned int virq,
- unsigned int is_64, struct msi_msg *msg)
+ unsigned int hwirq, unsigned int is_64,
+ struct msi_msg *msg)
{
struct pnv_ioda_pe *pe = pnv_ioda_get_pe(dev);
- struct irq_data *idata;
- struct irq_chip *ichip;
unsigned int xive_num = hwirq - phb->msi_base;
uint64_t addr64;
uint32_t addr32, data;
@@ -814,23 +637,6 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
}
msg->data = data;
- /*
- * Change the IRQ chip for the MSI interrupts on PHB3.
- * The corresponding IRQ chip should be populated for
- * the first time.
- */
- if (phb->type == PNV_PHB_IODA2) {
- if (!phb->ioda.irq_chip_init) {
- idata = irq_get_irq_data(virq);
- ichip = irq_data_get_irq_chip(idata);
- phb->ioda.irq_chip_init = 1;
- phb->ioda.irq_chip = *ichip;
- phb->ioda.irq_chip.irq_eoi = pnv_ioda2_msi_eoi;
- }
-
- irq_set_chip(virq, &phb->ioda.irq_chip);
- }
-
pr_devel("%s: %s-bit MSI on hwirq %x (xive #%d),"
" address=%x_%08x data=%x PE# %d\n",
pci_name(dev), is_64 ? "64" : "32", hwirq, xive_num,
@@ -841,7 +647,7 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
{
- unsigned int count;
+ unsigned int bmap_size;
const __be32 *prop = of_get_property(phb->hose->dn,
"ibm,opal-msi-ranges", NULL);
if (!prop) {
@@ -852,17 +658,18 @@ static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
return;
phb->msi_base = be32_to_cpup(prop);
- count = be32_to_cpup(prop + 1);
- if (msi_bitmap_alloc(&phb->msi_bmp, count, phb->hose->dn)) {
+ phb->msi_count = be32_to_cpup(prop + 1);
+ bmap_size = BITS_TO_LONGS(phb->msi_count) * sizeof(unsigned long);
+ phb->msi_map = zalloc_maybe_bootmem(bmap_size, GFP_KERNEL);
+ if (!phb->msi_map) {
pr_err("PCI %d: Failed to allocate MSI bitmap !\n",
phb->hose->global_number);
return;
}
-
phb->msi_setup = pnv_pci_ioda_msi_setup;
phb->msi32_support = 1;
pr_info(" Allocated bitmap for %d MSIs (base IRQ 0x%x)\n",
- count, phb->msi_base);
+ phb->msi_count, phb->msi_base);
}
#else
static void pnv_pci_init_ioda_msis(struct pnv_phb *phb) { }
@@ -1045,19 +852,18 @@ static u32 pnv_ioda_bdfn_to_pe(struct pnv_phb *phb, struct pci_bus *bus,
return phb->ioda.pe_rmap[(bus->number << 8) | devfn];
}
-void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
+void __init pnv_pci_init_ioda1_phb(struct device_node *np)
{
struct pci_controller *hose;
static int primary = 1;
struct pnv_phb *phb;
unsigned long size, m32map_off, iomap_off, pemap_off;
const u64 *prop64;
- const u32 *prop32;
u64 phb_id;
void *aux;
long rc;
- pr_info(" Initializing IODA%d OPAL PHB %s\n", ioda_type, np->full_name);
+ pr_info(" Initializing IODA OPAL PHB %s\n", np->full_name);
prop64 = of_get_property(np, "ibm,opal-phbid", NULL);
if (!prop64) {
@@ -1084,34 +890,37 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
hose->last_busno = 0xff;
hose->private_data = phb;
phb->opal_id = phb_id;
- phb->type = ioda_type;
+ phb->type = PNV_PHB_IODA1;
/* Detect specific models for error handling */
if (of_device_is_compatible(np, "ibm,p7ioc-pciex"))
phb->model = PNV_PHB_MODEL_P7IOC;
- else if (of_device_is_compatible(np, "ibm,p8-pciex"))
- phb->model = PNV_PHB_MODEL_PHB3;
else
phb->model = PNV_PHB_MODEL_UNKNOWN;
- /* Parse 32-bit and IO ranges (if any) */
+ /* We parse "ranges" now since we need to deduce the register base
+ * from the IO base
+ */
pci_process_bridge_OF_ranges(phb->hose, np, primary);
primary = 0;
- /* Get registers */
+ /* Magic formula from Milton */
phb->regs = of_iomap(np, 0);
if (phb->regs == NULL)
pr_err(" Failed to map registers !\n");
+
+ /* XXX This is hack-a-thon. This needs to be changed so that:
+ * - we obtain stuff like PE# etc... from device-tree
+ * - we properly re-allocate M32 ourselves
+ * (the OFW one isn't very good)
+ */
+
/* Initialize more IODA stuff */
- prop32 = of_get_property(np, "ibm,opal-num-pes", NULL);
- if (!prop32)
- phb->ioda.total_pe = 1;
- else
- phb->ioda.total_pe = *prop32;
+ phb->ioda.total_pe = 128;
phb->ioda.m32_size = resource_size(&hose->mem_resources[0]);
- /* FW Has already off top 64k of M32 space (MSI space) */
+ /* OFW Has already off top 64k of M32 space (MSI space) */
phb->ioda.m32_size += 0x10000;
phb->ioda.m32_segsize = phb->ioda.m32_size / phb->ioda.total_pe;
@@ -1121,10 +930,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
phb->ioda.io_segsize = phb->ioda.io_size / phb->ioda.total_pe;
phb->ioda.io_pci_base = 0; /* XXX calculate this ? */
- /* Allocate aux data & arrays
- *
- * XXX TODO: Don't allocate io segmap on PHB3
- */
+ /* Allocate aux data & arrays */
size = _ALIGN_UP(phb->ioda.total_pe / 8, sizeof(unsigned long));
m32map_off = size;
size += phb->ioda.total_pe * sizeof(phb->ioda.m32_segmap[0]);
@@ -1154,7 +960,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
hose->mem_resources[2].start = 0;
hose->mem_resources[2].end = 0;
-#if 0 /* We should really do that ... */
+#if 0
rc = opal_pci_set_phb_mem_window(opal->phb_id,
window_type,
window_num,
@@ -1168,6 +974,16 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
phb->ioda.m32_size, phb->ioda.m32_segsize,
phb->ioda.io_size, phb->ioda.io_segsize);
+ if (phb->regs) {
+ pr_devel(" BUID = 0x%016llx\n", in_be64(phb->regs + 0x100));
+ pr_devel(" PHB2_CR = 0x%016llx\n", in_be64(phb->regs + 0x160));
+ pr_devel(" IO_BAR = 0x%016llx\n", in_be64(phb->regs + 0x170));
+ pr_devel(" IO_BAMR = 0x%016llx\n", in_be64(phb->regs + 0x178));
+ pr_devel(" IO_SAR = 0x%016llx\n", in_be64(phb->regs + 0x180));
+ pr_devel(" M32_BAR = 0x%016llx\n", in_be64(phb->regs + 0x190));
+ pr_devel(" M32_BAMR = 0x%016llx\n", in_be64(phb->regs + 0x198));
+ pr_devel(" M32_SAR = 0x%016llx\n", in_be64(phb->regs + 0x1a0));
+ }
phb->hose->ops = &pnv_pci_ops;
/* Setup RID -> PE mapping function */
@@ -1195,18 +1011,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
rc = opal_pci_reset(phb_id, OPAL_PCI_IODA_TABLE_RESET, OPAL_ASSERT_RESET);
if (rc)
pr_warning(" OPAL Error %ld performing IODA table reset !\n", rc);
-
- /*
- * On IODA1 map everything to PE#0, on IODA2 we assume the IODA reset
- * has cleared the RTT which has the same effect
- */
- if (ioda_type == PNV_PHB_IODA1)
- opal_pci_set_pe(phb_id, 0, 0, 7, 1, 1 , OPAL_MAP_PE);
-}
-
-void pnv_pci_init_ioda2_phb(struct device_node *np)
-{
- pnv_pci_init_ioda_phb(np, PNV_PHB_IODA2);
+ opal_pci_set_pe(phb_id, 0, 0, 7, 1, 1 , OPAL_MAP_PE);
}
void __init pnv_pci_init_ioda_hub(struct device_node *np)
@@ -1229,6 +1034,6 @@ void __init pnv_pci_init_ioda_hub(struct device_node *np)
for_each_child_of_node(np, phbn) {
/* Look for IODA1 PHBs */
if (of_device_is_compatible(phbn, "ibm,ioda-phb"))
- pnv_pci_init_ioda_phb(phbn, PNV_PHB_IODA1);
+ pnv_pci_init_ioda1_phb(phbn);
}
}
diff --git a/trunk/arch/powerpc/platforms/powernv/pci-p5ioc2.c b/trunk/arch/powerpc/platforms/powernv/pci-p5ioc2.c
index 92b37a0186c9..7db8771a40f5 100644
--- a/trunk/arch/powerpc/platforms/powernv/pci-p5ioc2.c
+++ b/trunk/arch/powerpc/platforms/powernv/pci-p5ioc2.c
@@ -26,7 +26,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -42,8 +41,8 @@
#ifdef CONFIG_PCI_MSI
static int pnv_pci_p5ioc2_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
- unsigned int hwirq, unsigned int virq,
- unsigned int is_64, struct msi_msg *msg)
+ unsigned int hwirq, unsigned int is_64,
+ struct msi_msg *msg)
{
if (WARN_ON(!is_64))
return -ENXIO;
@@ -56,7 +55,7 @@ static int pnv_pci_p5ioc2_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
static void pnv_pci_init_p5ioc2_msis(struct pnv_phb *phb)
{
- unsigned int count;
+ unsigned int bmap_size;
const __be32 *prop = of_get_property(phb->hose->dn,
"ibm,opal-msi-ranges", NULL);
if (!prop)
@@ -68,8 +67,10 @@ static void pnv_pci_init_p5ioc2_msis(struct pnv_phb *phb)
if (of_device_is_compatible(phb->hose->dn, "ibm,p5ioc2-pcix"))
return;
phb->msi_base = be32_to_cpup(prop);
- count = be32_to_cpup(prop + 1);
- if (msi_bitmap_alloc(&phb->msi_bmp, count, phb->hose->dn)) {
+ phb->msi_count = be32_to_cpup(prop + 1);
+ bmap_size = BITS_TO_LONGS(phb->msi_count) * sizeof(unsigned long);
+ phb->msi_map = zalloc_maybe_bootmem(bmap_size, GFP_KERNEL);
+ if (!phb->msi_map) {
pr_err("PCI %d: Failed to allocate MSI bitmap !\n",
phb->hose->global_number);
return;
@@ -77,7 +78,7 @@ static void pnv_pci_init_p5ioc2_msis(struct pnv_phb *phb)
phb->msi_setup = pnv_pci_p5ioc2_msi_setup;
phb->msi32_support = 0;
pr_info(" Allocated bitmap for %d MSIs (base IRQ 0x%x)\n",
- count, phb->msi_base);
+ phb->msi_count, phb->msi_base);
}
#else
static void pnv_pci_init_p5ioc2_msis(struct pnv_phb *phb) { }
diff --git a/trunk/arch/powerpc/platforms/powernv/pci.c b/trunk/arch/powerpc/platforms/powernv/pci.c
index 55dfca844ddf..b8b8e0bd9897 100644
--- a/trunk/arch/powerpc/platforms/powernv/pci.c
+++ b/trunk/arch/powerpc/platforms/powernv/pci.c
@@ -26,7 +26,6 @@
#include
#include
#include
-#include