From 8ad84da2953442c01f03f0c298141ac7b0bf9bab Mon Sep 17 00:00:00 2001
From: Michael Chan <mchan@broadcom.com>
Date: Tue, 27 Apr 2010 11:28:09 +0000
Subject: [PATCH] --- yaml --- r: 190358 b: refs/heads/master c:
 c441b8d2cb2194b05550a558d6d95d8944e56a84 h: refs/heads/master v: v3

---
 [refs]                   | 2 +-
 trunk/drivers/net/bnx2.c | 6 +++++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index 63e9912e746d..6a00f3084d0a 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: e95ef5d3f6bc60433883e1ef65dac747acd0bf1a
+refs/heads/master: c441b8d2cb2194b05550a558d6d95d8944e56a84
diff --git a/trunk/drivers/net/bnx2.c b/trunk/drivers/net/bnx2.c
index a257babd1bb4..4c1e51ee8ede 100644
--- a/trunk/drivers/net/bnx2.c
+++ b/trunk/drivers/net/bnx2.c
@@ -4759,8 +4759,12 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
 		rc = bnx2_alloc_bad_rbuf(bp);
 	}
 
-	if (bp->flags & BNX2_FLAG_USING_MSIX)
+	if (bp->flags & BNX2_FLAG_USING_MSIX) {
 		bnx2_setup_msix_tbl(bp);
+		/* Prevent MSIX table reads and write from timing out */
+		REG_WR(bp, BNX2_MISC_ECO_HW_CTL,
+			BNX2_MISC_ECO_HW_CTL_LARGE_GRC_TMOUT_EN);
+	}
 
 	return rc;
 }