From 8bd1b11895d5703caa470cdc53aaafb587548ea9 Mon Sep 17 00:00:00 2001 From: David Daney Date: Thu, 8 Dec 2011 12:26:28 +0000 Subject: [PATCH] --- yaml --- r: 284767 b: refs/heads/master c: 53efc98ec63d3868dc85d9b134e93e2a76b79893 h: refs/heads/master i: 284765: a6e201ba016493c0d0e1cfa56cf230c63bbe054c 284763: dd317ead0a90170782ac5837546fed2cdfd988d2 284759: 18027ef5818a9be89493fb95b1a344d450a360c0 284751: bfe2265d3d5d4d684be59bf0896f79f825bc83d0 284735: 1476b7182a28e715739226e12f147b8d6caddc5b v: v3 --- [refs] | 2 +- trunk/arch/mips/pci/pci-octeon.c | 16 ++++++---------- 2 files changed, 7 insertions(+), 11 deletions(-) diff --git a/[refs] b/[refs] index b0e4e277d96a..d0bb65f9e8ba 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 714c1f5c1aab1cc185018f02bcc854c41ff8e6c8 +refs/heads/master: 53efc98ec63d3868dc85d9b134e93e2a76b79893 diff --git a/trunk/arch/mips/pci/pci-octeon.c b/trunk/arch/mips/pci/pci-octeon.c index ed1c54284b8f..52a1ba70b3b6 100644 --- a/trunk/arch/mips/pci/pci-octeon.c +++ b/trunk/arch/mips/pci/pci-octeon.c @@ -99,7 +99,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev) */ pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 64 / 4); /* Set latency timers for all devices */ - pci_write_config_byte(dev, PCI_LATENCY_TIMER, 48); + pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); /* Enable reporting System errors and parity errors on all devices */ /* Enable parity checking and error reporting */ @@ -109,7 +109,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev) if (dev->subordinate) { /* Set latency timers on sub bridges */ - pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, 48); + pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, 64); /* More bridge error detection */ pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &config); config |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR; @@ -121,14 +121,10 @@ int pcibios_plat_dev_init(struct pci_dev *dev) if (pos) { /* Update Device Control */ pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &config); - /* Correctable Error Reporting */ - config |= PCI_EXP_DEVCTL_CERE; - /* Non-Fatal Error Reporting */ - config |= PCI_EXP_DEVCTL_NFERE; - /* Fatal Error Reporting */ - config |= PCI_EXP_DEVCTL_FERE; - /* Unsupported Request */ - config |= PCI_EXP_DEVCTL_URRE; + config |= PCI_EXP_DEVCTL_CERE; /* Correctable Error Reporting */ + config |= PCI_EXP_DEVCTL_NFERE; /* Non-Fatal Error Reporting */ + config |= PCI_EXP_DEVCTL_FERE; /* Fatal Error Reporting */ + config |= PCI_EXP_DEVCTL_URRE; /* Unsupported Request */ pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, config); }