From 8bf0d5788c977bc133423c6457f7f25eb78fed78 Mon Sep 17 00:00:00 2001 From: Michael Brunner Date: Tue, 4 Dec 2007 21:39:20 +0100 Subject: [PATCH] --- yaml --- r: 74892 b: refs/heads/master c: 03d14a5536cf5611d27a106137a814c8f1135ddd h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/include/asm-arm/arch-pxa/pxa-regs.h | 1 + trunk/sound/arm/pxa2xx-ac97.c | 4 ++-- trunk/sound/soc/pxa/pxa2xx-ac97.c | 4 ++-- 4 files changed, 6 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index 5ca3982c2bac..64d5d5d91e9d 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a0113a99cc3cd1a63153d11b7fcf9c1a2000df57 +refs/heads/master: 03d14a5536cf5611d27a106137a814c8f1135ddd diff --git a/trunk/include/asm-arm/arch-pxa/pxa-regs.h b/trunk/include/asm-arm/arch-pxa/pxa-regs.h index 6b33df6f1995..1bd398da07da 100644 --- a/trunk/include/asm-arm/arch-pxa/pxa-regs.h +++ b/trunk/include/asm-arm/arch-pxa/pxa-regs.h @@ -1784,6 +1784,7 @@ #define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */ #define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */ +#define CKEN_AC97CONF (31) /* AC97 Controller Configuration */ #define CKEN_CAMERA (24) /* Camera Interface Clock Enable */ #define CKEN_SSP1 (23) /* SSP1 Unit Clock Enable */ #define CKEN_MEMC (22) /* Memory Controller Clock Enable */ diff --git a/trunk/sound/arm/pxa2xx-ac97.c b/trunk/sound/arm/pxa2xx-ac97.c index 7bc2767e1584..55c6c822bec1 100644 --- a/trunk/sound/arm/pxa2xx-ac97.c +++ b/trunk/sound/arm/pxa2xx-ac97.c @@ -113,9 +113,9 @@ static void pxa2xx_ac97_reset(struct snd_ac97 *ac97) gsr_bits = 0; #ifdef CONFIG_PXA27x /* PXA27x Developers Manual section 13.5.2.2.1 */ - pxa_set_cken(1 << 31, 1); + pxa_set_cken(CKEN_AC97CONF, 1); udelay(5); - pxa_set_cken(1 << 31, 0); + pxa_set_cken(CKEN_AC97CONF, 0); GCR = GCR_COLD_RST; udelay(50); #else diff --git a/trunk/sound/soc/pxa/pxa2xx-ac97.c b/trunk/sound/soc/pxa/pxa2xx-ac97.c index dd14abcdf1bd..60e6f4677f93 100644 --- a/trunk/sound/soc/pxa/pxa2xx-ac97.c +++ b/trunk/sound/soc/pxa/pxa2xx-ac97.c @@ -160,9 +160,9 @@ static void pxa2xx_ac97_cold_reset(struct snd_ac97 *ac97) gsr_bits = 0; #ifdef CONFIG_PXA27x /* PXA27x Developers Manual section 13.5.2.2.1 */ - pxa_set_cken(31, 1); + pxa_set_cken(CKEN_AC97CONF, 1); udelay(5); - pxa_set_cken(31, 0); + pxa_set_cken(CKEN_AC97CONF, 0); GCR = GCR_COLD_RST; udelay(50); #else