From 8d26d6559ef1b2e8f6a56b6cd05b36838fe242f7 Mon Sep 17 00:00:00 2001 From: Dale Farnsworth Date: Tue, 8 Apr 2008 08:08:06 +1000 Subject: [PATCH] --- yaml --- r: 91520 b: refs/heads/master c: fb9d93de6049922c4d46cc2dc9d2eeec07369e7f h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/powerpc/boot/dts/prpmc2800.dts | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index c5517dc835bc..ce6b4ba30711 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d528be50c616ff2b1f2259589730608a1d348d63 +refs/heads/master: fb9d93de6049922c4d46cc2dc9d2eeec07369e7f diff --git a/trunk/arch/powerpc/boot/dts/prpmc2800.dts b/trunk/arch/powerpc/boot/dts/prpmc2800.dts index b96b400dc3bd..822aac7e5bbd 100644 --- a/trunk/arch/powerpc/boot/dts/prpmc2800.dts +++ b/trunk/arch/powerpc/boot/dts/prpmc2800.dts @@ -27,7 +27,7 @@ PowerPC,7447 { device_type = "cpu"; reg = <0>; - clock-frequency = <733000000>; /* Default */ + clock-frequency = <733333333>; /* Default */ bus-frequency = <133333333>; timebase-frequency = <33333333>; i-cache-line-size = <32>; @@ -137,7 +137,7 @@ compatible = "marvell,mv64x60-brg"; reg = <0xb200 0x8>; clock-src = <8>; - clock-frequency = <133000000>; + clock-frequency = <133333333>; current-speed = <9600>; bcr = <0>; }; @@ -146,7 +146,7 @@ compatible = "marvell,mv64x60-brg"; reg = <0xb208 0x8>; clock-src = <8>; - clock-frequency = <133000000>; + clock-frequency = <133333333>; current-speed = <9600>; bcr = <0>; };