From 8d685da0ffd44a0afb79e889f8546673a09e2112 Mon Sep 17 00:00:00 2001 From: Vineet Gupta Date: Sun, 19 May 2013 14:06:44 +0530 Subject: [PATCH] --- yaml --- r: 376292 b: refs/heads/master c: 006dfb3c9c44192f06093d65b3a876fa5ad1319a h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arc/include/asm/cacheflush.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 8c409fa8247e..27bafe3a3d64 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 3e87974dec5ec25a8a4852d9292db6be659164e6 +refs/heads/master: 006dfb3c9c44192f06093d65b3a876fa5ad1319a diff --git a/trunk/arch/arc/include/asm/cacheflush.h b/trunk/arch/arc/include/asm/cacheflush.h index 7d819749478c..ef62682e8d95 100644 --- a/trunk/arch/arc/include/asm/cacheflush.h +++ b/trunk/arch/arc/include/asm/cacheflush.h @@ -93,7 +93,7 @@ static inline int cache_is_vipt_aliasing(void) #endif } -#define CACHE_COLOR(addr) (((unsigned long)(addr) >> (PAGE_SHIFT)) & 3) +#define CACHE_COLOR(addr) (((unsigned long)(addr) >> (PAGE_SHIFT)) & 1) /* * checks if two addresses (after page aligning) index into same cache set