From 8ea15dc3eeea40df2cc9fbc69c755f476144263c Mon Sep 17 00:00:00 2001 From: Rohit Jain Date: Thu, 12 Jan 2012 12:19:44 +0530 Subject: [PATCH] --- yaml --- r: 286837 b: refs/heads/master c: 96c0a2f52c45d8ec0a2b70810f4693530feaba5d h: refs/heads/master i: 286835: 5e5d78d1ac4a20862631776aa867905542ad8fa7 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_bios.h | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index a2bbab9d52ed..451db7416de3 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7885d2052bd94395e337709cfba093a41f273ff1 +refs/heads/master: 96c0a2f52c45d8ec0a2b70810f4693530feaba5d diff --git a/trunk/drivers/gpu/drm/i915/intel_bios.h b/trunk/drivers/gpu/drm/i915/intel_bios.h index 8af3735e27c6..dbda6e3bdf07 100644 --- a/trunk/drivers/gpu/drm/i915/intel_bios.h +++ b/trunk/drivers/gpu/drm/i915/intel_bios.h @@ -467,8 +467,12 @@ struct edp_link_params { struct bdb_edp { struct edp_power_seq power_seqs[16]; u32 color_depth; - u32 sdrrs_msa_timing_delay; struct edp_link_params link_params[16]; + u32 sdrrs_msa_timing_delay; + + /* ith bit indicates enabled/disabled for (i+1)th panel */ + u16 edp_s3d_feature; + u16 edp_t3_optimization; } __attribute__ ((packed)); void intel_setup_bios(struct drm_device *dev);