From 8ebf1fdd2dc3d5052fb6af7c1f02d71f8ee47242 Mon Sep 17 00:00:00 2001
From: Catalin Marinas <catalin.marinas@arm.com>
Date: Sat, 30 May 2009 14:00:15 +0100
Subject: [PATCH] --- yaml --- r: 149309 b: refs/heads/master c:
 d71e1352e240dea32d481ad8d662e8de4406ac7e h: refs/heads/master i:   149307:
 0d85cdeb2e9cad20c7d97bd96e9632f4f02cc471 v: v3

---
 [refs]                              | 2 +-
 trunk/arch/arm/include/asm/ptrace.h | 7 +++++++
 trunk/arch/arm/kernel/signal.c      | 8 ++++++--
 3 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/[refs] b/[refs]
index 01c1dfb36742..e9ba6c36f5bb 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: ba3c02636a0743a62cb50b920d36e1c046ab88cf
+refs/heads/master: d71e1352e240dea32d481ad8d662e8de4406ac7e
diff --git a/trunk/arch/arm/include/asm/ptrace.h b/trunk/arch/arm/include/asm/ptrace.h
index 236a06b9b7ce..4a4290f7b4a2 100644
--- a/trunk/arch/arm/include/asm/ptrace.h
+++ b/trunk/arch/arm/include/asm/ptrace.h
@@ -65,6 +65,13 @@
 #define PSR_x		0x0000ff00	/* Extension		*/
 #define PSR_c		0x000000ff	/* Control		*/
 
+/*
+ * ARMv7 groups of APSR bits
+ */
+#define PSR_ISET_MASK	0x01000010	/* ISA state (J, T) mask */
+#define PSR_IT_MASK	0x0600fc00	/* If-Then execution state mask */
+#define PSR_ENDIAN_MASK	0x00000200	/* Endianness state mask */
+
 #ifndef __ASSEMBLY__
 
 /*
diff --git a/trunk/arch/arm/kernel/signal.c b/trunk/arch/arm/kernel/signal.c
index 80b8b5c7e07a..442b87476f97 100644
--- a/trunk/arch/arm/kernel/signal.c
+++ b/trunk/arch/arm/kernel/signal.c
@@ -426,9 +426,13 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
 		 */
 		thumb = handler & 1;
 
-		if (thumb)
+		if (thumb) {
 			cpsr |= PSR_T_BIT;
-		else
+#if __LINUX_ARM_ARCH__ >= 7
+			/* clear the If-Then Thumb-2 execution state */
+			cpsr &= ~PSR_IT_MASK;
+#endif
+		} else
 			cpsr &= ~PSR_T_BIT;
 	}
 #endif