From 8ec804dd8a4a2c8815848d44231ec378883418d4 Mon Sep 17 00:00:00 2001
From: Rob Herring <rob.herring@calxeda.com>
Date: Sun, 30 Dec 2012 10:15:03 -0600
Subject: [PATCH] --- yaml --- r: 348450 b: refs/heads/master c:
 3943deeddac65ab1d19fcc839ab58ef13a653532 h: refs/heads/master v: v3

---
 [refs]                               |  2 +-
 trunk/arch/arm/boot/dts/highbank.dts | 16 ++++++++--------
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/[refs] b/[refs]
index aff09e09e938..03e750602861 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 36ff67bc948292065b0f20928d7e96f261b6ddc1
+refs/heads/master: 3943deeddac65ab1d19fcc839ab58ef13a653532
diff --git a/trunk/arch/arm/boot/dts/highbank.dts b/trunk/arch/arm/boot/dts/highbank.dts
index 81e0bfa6c175..5927a8df5625 100644
--- a/trunk/arch/arm/boot/dts/highbank.dts
+++ b/trunk/arch/arm/boot/dts/highbank.dts
@@ -30,37 +30,37 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu@900 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
-			reg = <0>;
+			reg = <0x900>;
 			next-level-cache = <&L2>;
 			clocks = <&a9pll>;
 			clock-names = "cpu";
 		};
 
-		cpu@1 {
+		cpu@901 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
-			reg = <1>;
+			reg = <0x901>;
 			next-level-cache = <&L2>;
 			clocks = <&a9pll>;
 			clock-names = "cpu";
 		};
 
-		cpu@2 {
+		cpu@902 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
-			reg = <2>;
+			reg = <0x902>;
 			next-level-cache = <&L2>;
 			clocks = <&a9pll>;
 			clock-names = "cpu";
 		};
 
-		cpu@3 {
+		cpu@903 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
-			reg = <3>;
+			reg = <0x903>;
 			next-level-cache = <&L2>;
 			clocks = <&a9pll>;
 			clock-names = "cpu";