From 8f7dfd4eda09da6db95ac736ae686ea6b2b5fd08 Mon Sep 17 00:00:00 2001 From: Bryan Wu Date: Mon, 11 Jun 2007 17:34:17 +0800 Subject: [PATCH] --- yaml --- r: 57819 b: refs/heads/master c: d6fe89b0630080e2bd6ece20ff7b1b5c2647ed62 h: refs/heads/master i: 57817: 0f51b5461990460af2e9dbb1fc2011db09ae6e3b 57815: 24ad39bd94be54e7b62fabb550c3bb27687c9889 v: v3 --- [refs] | 2 +- trunk/drivers/spi/spi_bfin5xx.c | 15 ++++++++++----- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/[refs] b/[refs] index 520e44b8ae81..b917b90c4842 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 27bb9e79bcfedc1888d23c3c212c189fa8534fe7 +refs/heads/master: d6fe89b0630080e2bd6ece20ff7b1b5c2647ed62 diff --git a/trunk/drivers/spi/spi_bfin5xx.c b/trunk/drivers/spi/spi_bfin5xx.c index a2d4884752ef..48587c27050d 100644 --- a/trunk/drivers/spi/spi_bfin5xx.c +++ b/trunk/drivers/spi/spi_bfin5xx.c @@ -582,14 +582,19 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id) dev_dbg(&drv_data->pdev->dev, "in dma_irq_handler\n"); clear_dma_irqstat(CH_SPI); + /* Wait for DMA to complete */ + while (get_dma_curr_irqstat(CH_SPI) & DMA_RUN) + continue; + /* - * wait for the last transaction shifted out. yes, these two - * while loops are supposed to be the same (see the HRM). + * wait for the last transaction shifted out. HRM states: + * at this point there may still be data in the SPI DMA FIFO waiting + * to be transmitted ... software needs to poll TXS in the SPI_STAT + * register until it goes low for 2 successive reads */ if (drv_data->tx != NULL) { - while (bfin_read_SPI_STAT() & TXS) - continue; - while (bfin_read_SPI_STAT() & TXS) + while ((bfin_read_SPI_STAT() & TXS) || + (bfin_read_SPI_STAT() & TXS)) continue; }