From 8f89ebba3146a4f9362d0377c590ffc6b6e93dc2 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Fri, 18 Apr 2008 14:26:08 +1000 Subject: [PATCH] --- yaml --- r: 91621 b: refs/heads/master c: 9f264be6101c42cb9e471c58322fb83a5cde1461 h: refs/heads/master i: 91619: 9c429860fbe7e20da70941aa000a00e541f45e18 v: v3 --- [refs] | 2 +- trunk/include/asm-powerpc/bitops.h | 17 +++++++++++++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 41897b3da96a..78365dacf586 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 945feb174b14e7098cc7ecf0cf4768d35bc52f9c +refs/heads/master: 9f264be6101c42cb9e471c58322fb83a5cde1461 diff --git a/trunk/include/asm-powerpc/bitops.h b/trunk/include/asm-powerpc/bitops.h index 36c8f3a43792..a99a74929475 100644 --- a/trunk/include/asm-powerpc/bitops.h +++ b/trunk/include/asm-powerpc/bitops.h @@ -312,7 +312,24 @@ static __inline__ int fls(unsigned int x) asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x)); return 32 - lz; } + +/* + * 64-bit can do this using one cntlzd (count leading zeroes doubleword) + * instruction; for 32-bit we use the generic version, which does two + * 32-bit fls calls. + */ +#ifdef __powerpc64__ +static __inline__ int fls64(__u64 x) +{ + int lz; + + asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x)); + return 64 - lz; +} +#else #include +#endif /* __powerpc64__ */ + #include #include