From 90cc230d66e7aebe0684080922bd746ff3ffaefa Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 16 Dec 2008 12:17:47 +0100 Subject: [PATCH] --- yaml --- r: 123762 b: refs/heads/master c: 33ebc19d5448aadb2ce4a865d7118f1c2f23fafe h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/Documentation/arm/mem_alignment | 2 +- trunk/MAINTAINERS | 15 +- trunk/arch/arm/common/sa1111.c | 2 +- trunk/arch/arm/kernel/armksyms.c | 4 +- trunk/arch/arm/kernel/traps.c | 1 - trunk/arch/arm/mach-imx/include/mach/imxfb.h | 50 +- trunk/arch/arm/mach-omap1/board-h2-mmc.c | 89 +- trunk/arch/arm/mach-omap1/board-h2.c | 25 +- trunk/arch/arm/mach-omap1/board-h3-mmc.c | 100 +- trunk/arch/arm/mach-omap1/board-h3.c | 10 + trunk/arch/arm/mach-omap1/board-innovator.c | 50 +- trunk/arch/arm/mach-omap1/board-nokia770.c | 74 +- trunk/arch/arm/mach-omap1/board-palmte.c | 1 + trunk/arch/arm/mach-omap1/board-palmz71.c | 11 + trunk/arch/arm/mach-omap1/board-sx1-mmc.c | 80 +- trunk/arch/arm/mach-omap1/board-sx1.c | 10 + trunk/arch/arm/mach-omap1/board-voiceblue.c | 10 +- trunk/arch/arm/mach-omap1/clock.h | 3 +- trunk/arch/arm/mach-omap1/devices.c | 90 -- trunk/arch/arm/mach-omap2/Makefile | 15 +- trunk/arch/arm/mach-omap2/board-2430sdp.c | 48 - trunk/arch/arm/mach-omap2/board-apollon.c | 11 + trunk/arch/arm/mach-omap2/board-generic.c | 11 + trunk/arch/arm/mach-omap2/board-h4.c | 11 + trunk/arch/arm/mach-omap2/board-ldp.c | 40 +- trunk/arch/arm/mach-omap2/board-omap3beagle.c | 90 -- .../arch/arm/mach-omap2/board-omap3pandora.c | 32 - trunk/arch/arm/mach-omap2/board-overo.c | 43 - trunk/arch/arm/mach-omap2/clock24xx.h | 9 +- trunk/arch/arm/mach-omap2/clock34xx.h | 10 +- trunk/arch/arm/mach-omap2/devices.c | 169 --- trunk/arch/arm/mach-omap2/mmc-twl4030.c | 408 ------- trunk/arch/arm/mach-omap2/mmc-twl4030.h | 29 - trunk/arch/arm/mach-pxa/include/mach/reset.h | 5 +- trunk/arch/arm/mm/fault.c | 1 - trunk/arch/arm/plat-mxc/dma-mx1-mx2.c | 7 +- .../arm/plat-mxc/include/mach/dma-mx1-mx2.h | 10 +- trunk/arch/arm/plat-omap/devices.c | 225 +++- .../arm/plat-omap/include/mach/board-h2.h | 6 +- trunk/arch/arm/plat-omap/include/mach/board.h | 22 + .../arch/arm/plat-omap/include/mach/control.h | 17 - trunk/arch/arm/plat-omap/include/mach/mmc.h | 74 +- trunk/arch/ia64/hp/sim/Kconfig | 1 - trunk/arch/mips/Kconfig.debug | 2 +- trunk/arch/mips/configs/ip32_defconfig | 1060 +++++++---------- trunk/arch/mips/include/asm/asmmacro.h | 10 - trunk/arch/mips/mm/dma-default.c | 3 - trunk/arch/powerpc/boot/Makefile | 1 - trunk/arch/powerpc/kernel/misc_32.S | 3 - trunk/arch/x86/include/asm/vmi.h | 8 +- trunk/arch/x86/kernel/setup.c | 12 +- trunk/arch/x86/kernel/smpboot.c | 2 + trunk/arch/x86/kernel/vmi_32.c | 16 +- trunk/drivers/acpi/toshiba_acpi.c | 54 +- trunk/drivers/cdrom/cdrom.c | 16 +- trunk/drivers/char/cp437.uni | 12 +- trunk/drivers/char/vt.c | 2 +- trunk/drivers/i2c/busses/i2c-highlander.c | 4 +- trunk/drivers/i2c/busses/i2c-pmcmsp.c | 2 +- trunk/drivers/mmc/host/omap.c | 7 +- trunk/drivers/net/e1000e/ich8lan.c | 9 +- trunk/drivers/net/sungem.c | 144 +-- trunk/drivers/pcmcia/bfin_cf_pcmcia.c | 2 +- .../scsi/device_handler/scsi_dh_hp_sw.c | 12 +- trunk/drivers/video/aty/radeon_accel.c | 295 +++-- trunk/drivers/video/aty/radeon_backlight.c | 2 +- trunk/drivers/video/aty/radeon_base.c | 46 +- trunk/drivers/video/aty/radeon_pm.c | 6 +- trunk/drivers/video/aty/radeonfb.h | 40 +- trunk/drivers/video/imxfb.c | 468 ++++---- trunk/drivers/video/imxfb.h | 73 ++ trunk/include/linux/netdevice.h | 7 - trunk/include/linux/smp.h | 2 - trunk/include/video/radeon.h | 18 +- trunk/kernel/cgroup.c | 2 +- trunk/kernel/sched_clock.c | 6 +- trunk/mm/slob.c | 2 +- trunk/net/core/netpoll.c | 2 - trunk/net/ipv4/netfilter/nf_nat_rule.c | 2 +- trunk/net/ipv4/tcp_vegas.c | 80 +- trunk/net/ipv6/ndisc.c | 7 +- trunk/net/netlabel/netlabel_unlabeled.c | 38 +- trunk/net/phonet/pep-gprs.c | 27 +- trunk/net/sched/sch_netem.c | 3 + 85 files changed, 1784 insertions(+), 2646 deletions(-) delete mode 100644 trunk/arch/arm/mach-omap2/mmc-twl4030.c delete mode 100644 trunk/arch/arm/mach-omap2/mmc-twl4030.h create mode 100644 trunk/drivers/video/imxfb.h diff --git a/[refs] b/[refs] index db8980dafa62..da06b817f676 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c613bbba6f39c8804f1f26e96fb68a117cc9e282 +refs/heads/master: 33ebc19d5448aadb2ce4a865d7118f1c2f23fafe diff --git a/trunk/Documentation/arm/mem_alignment b/trunk/Documentation/arm/mem_alignment index c7c7a114c78c..d145ccca169a 100644 --- a/trunk/Documentation/arm/mem_alignment +++ b/trunk/Documentation/arm/mem_alignment @@ -24,7 +24,7 @@ real bad - it changes the behaviour of all unaligned instructions in user space, and might cause programs to fail unexpectedly. To change the alignment trap behavior, simply echo a number into -/proc/cpu/alignment. The number is made up from various bits: +/proc/sys/debug/alignment. The number is made up from various bits: bit behavior when set --- ----------------- diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 351cf7906c37..24741de12a39 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -1527,10 +1527,10 @@ W: http://ebtables.sourceforge.net/ S: Maintained ECRYPT FILE SYSTEM -P: Tyler Hicks, Dustin Kirkland -M: tyhicks@linux.vnet.ibm.com, kirkland@canonical.com -L: ecryptfs-devel@lists.launchpad.net -W: https://launchpad.net/ecryptfs +P: Mike Halcrow, Phillip Hellewell +M: mhalcrow@us.ibm.com, phillip@hellewell.homeip.net +L: ecryptfs-devel@lists.sourceforge.net +W: http://ecryptfs.sourceforge.net/ S: Supported EDAC-CORE @@ -1760,13 +1760,6 @@ L: linuxppc-dev@ozlabs.org L: linux-i2c@vger.kernel.org S: Maintained -FREESCALE IMX / MXC FRAMEBUFFER DRIVER -P: Sascha Hauer -M: kernel@pengutronix.de -L: linux-fbdev-devel@lists.sourceforge.net (moderated for non-subscribers) -L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) -S: Maintained - FREESCALE SOC FS_ENET DRIVER P: Pantelis Antoniou M: pantelis.antoniou@gmail.com diff --git a/trunk/arch/arm/common/sa1111.c b/trunk/arch/arm/common/sa1111.c index ef12794c3c68..47ccec95f3e8 100644 --- a/trunk/arch/arm/common/sa1111.c +++ b/trunk/arch/arm/common/sa1111.c @@ -630,7 +630,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) return -ENOMEM; sachip->clk = clk_get(me, "SA1111_CLK"); - if (IS_ERR(sachip->clk)) { + if (!sachip->clk) { ret = PTR_ERR(sachip->clk); goto err_free; } diff --git a/trunk/arch/arm/kernel/armksyms.c b/trunk/arch/arm/kernel/armksyms.c index 531e1860e546..53d0037a1e9d 100644 --- a/trunk/arch/arm/kernel/armksyms.c +++ b/trunk/arch/arm/kernel/armksyms.c @@ -116,8 +116,6 @@ EXPORT_SYMBOL(__strnlen_user); EXPORT_SYMBOL(__strncpy_from_user); #ifdef CONFIG_MMU -EXPORT_SYMBOL(copy_page); - EXPORT_SYMBOL(__copy_from_user); EXPORT_SYMBOL(__copy_to_user); EXPORT_SYMBOL(__clear_user); @@ -184,6 +182,8 @@ EXPORT_SYMBOL(_find_first_bit_be); EXPORT_SYMBOL(_find_next_bit_be); #endif +EXPORT_SYMBOL(copy_page); + #ifdef CONFIG_FUNCTION_TRACER EXPORT_SYMBOL(mcount); #endif diff --git a/trunk/arch/arm/kernel/traps.c b/trunk/arch/arm/kernel/traps.c index 79abc4ddc0cf..57e6874d0b80 100644 --- a/trunk/arch/arm/kernel/traps.c +++ b/trunk/arch/arm/kernel/traps.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-imx/include/mach/imxfb.h b/trunk/arch/arm/mach-imx/include/mach/imxfb.h index 870d0d939616..3ed9ec8b9f00 100644 --- a/trunk/arch/arm/mach-imx/include/mach/imxfb.h +++ b/trunk/arch/arm/mach-imx/include/mach/imxfb.h @@ -1,52 +1,7 @@ /* * This structure describes the machine which we are running on. */ - -#define PCR_TFT (1 << 31) -#define PCR_COLOR (1 << 30) -#define PCR_PBSIZ_1 (0 << 28) -#define PCR_PBSIZ_2 (1 << 28) -#define PCR_PBSIZ_4 (2 << 28) -#define PCR_PBSIZ_8 (3 << 28) -#define PCR_BPIX_1 (0 << 25) -#define PCR_BPIX_2 (1 << 25) -#define PCR_BPIX_4 (2 << 25) -#define PCR_BPIX_8 (3 << 25) -#define PCR_BPIX_12 (4 << 25) -#define PCR_BPIX_16 (4 << 25) -#define PCR_PIXPOL (1 << 24) -#define PCR_FLMPOL (1 << 23) -#define PCR_LPPOL (1 << 22) -#define PCR_CLKPOL (1 << 21) -#define PCR_OEPOL (1 << 20) -#define PCR_SCLKIDLE (1 << 19) -#define PCR_END_SEL (1 << 18) -#define PCR_END_BYTE_SWAP (1 << 17) -#define PCR_REV_VS (1 << 16) -#define PCR_ACD_SEL (1 << 15) -#define PCR_ACD(x) (((x) & 0x7f) << 8) -#define PCR_SCLK_SEL (1 << 7) -#define PCR_SHARP (1 << 6) -#define PCR_PCD(x) ((x) & 0x3f) - -#define PWMR_CLS(x) (((x) & 0x1ff) << 16) -#define PWMR_LDMSK (1 << 15) -#define PWMR_SCR1 (1 << 10) -#define PWMR_SCR0 (1 << 9) -#define PWMR_CC_EN (1 << 8) -#define PWMR_PW(x) ((x) & 0xff) - -#define LSCR1_PS_RISE_DELAY(x) (((x) & 0x7f) << 26) -#define LSCR1_CLS_RISE_DELAY(x) (((x) & 0x3f) << 16) -#define LSCR1_REV_TOGGLE_DELAY(x) (((x) & 0xf) << 8) -#define LSCR1_GRAY2(x) (((x) & 0xf) << 4) -#define LSCR1_GRAY1(x) (((x) & 0xf)) - -#define DMACR_BURST (1 << 31) -#define DMACR_HM(x) (((x) & 0xf) << 16) -#define DMACR_TM(x) ((x) & 0xf) - -struct imx_fb_platform_data { +struct imxfb_mach_info { u_long pixclock; u_short xres; @@ -79,5 +34,4 @@ struct imx_fb_platform_data { void (*lcd_power)(int); void (*backlight_power)(int); }; - -void set_imx_fb_info(struct imx_fb_platform_data *); +void set_imx_fb_info(struct imxfb_mach_info *hard_imx_fb_info); diff --git a/trunk/arch/arm/mach-omap1/board-h2-mmc.c b/trunk/arch/arm/mach-omap1/board-h2-mmc.c index 409fa56d0a87..ab9ee5820c48 100644 --- a/trunk/arch/arm/mach-omap1/board-h2-mmc.c +++ b/trunk/arch/arm/mach-omap1/board-h2-mmc.c @@ -12,68 +12,90 @@ * published by the Free Software Foundation. */ -#include - -#include - #include #include -#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) +#ifdef CONFIG_MMC_OMAP +static int slot_cover_open; +static struct device *mmc_device; -static int mmc_set_power(struct device *dev, int slot, int power_on, +static int h2_mmc_set_power(struct device *dev, int slot, int power_on, int vdd) { - if (power_on) - gpio_direction_output(H2_TPS_GPIO_MMC_PWR_EN, 1); - else - gpio_direction_output(H2_TPS_GPIO_MMC_PWR_EN, 0); +#ifdef CONFIG_MMC_DEBUG + dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1, + power_on ? "on" : "off", vdd); +#endif + if (slot != 0) { + dev_err(dev, "No such slot %d\n", slot + 1); + return -ENODEV; + } return 0; } -static int mmc_late_init(struct device *dev) +static int h2_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode) { - int ret; +#ifdef CONFIG_MMC_DEBUG + dev_dbg(dev, "Set slot %d bus_mode %s\n", slot + 1, + bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull"); +#endif + if (slot != 0) { + dev_err(dev, "No such slot %d\n", slot + 1); + return -ENODEV; + } - ret = gpio_request(H2_TPS_GPIO_MMC_PWR_EN, "MMC power"); - if (ret < 0) - return ret; + return 0; +} - gpio_direction_output(H2_TPS_GPIO_MMC_PWR_EN, 0); +static int h2_mmc_get_cover_state(struct device *dev, int slot) +{ + BUG_ON(slot != 0); + + return slot_cover_open; +} + +void h2_mmc_slot_cover_handler(void *arg, int state) +{ + if (mmc_device == NULL) + return; + + slot_cover_open = state; + omap_mmc_notify_cover_event(mmc_device, 0, state); +} + +static int h2_mmc_late_init(struct device *dev) +{ + int ret = 0; + + mmc_device = dev; return ret; } -static void mmc_shutdown(struct device *dev) +static void h2_mmc_cleanup(struct device *dev) { - gpio_free(H2_TPS_GPIO_MMC_PWR_EN); } -/* - * H2 could use the following functions tested: - * - mmc_get_cover_state that uses OMAP_MPUIO(1) - * - mmc_get_wp that uses OMAP_MPUIO(3) - */ -static struct omap_mmc_platform_data mmc1_data = { +static struct omap_mmc_platform_data h2_mmc_data = { .nr_slots = 1, - .init = mmc_late_init, - .shutdown = mmc_shutdown, - .dma_mask = 0xffffffff, + .switch_slot = NULL, + .init = h2_mmc_late_init, + .cleanup = h2_mmc_cleanup, .slots[0] = { - .set_power = mmc_set_power, + .set_power = h2_mmc_set_power, + .set_bus_mode = h2_mmc_set_bus_mode, + .get_ro = NULL, + .get_cover_state = h2_mmc_get_cover_state, .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 | MMC_VDD_32_33 | MMC_VDD_33_34, .name = "mmcblk", }, }; -static struct omap_mmc_platform_data *mmc_data[OMAP16XX_NR_MMC]; - void __init h2_mmc_init(void) { - mmc_data[0] = &mmc1_data; - omap1_init_mmc(mmc_data, OMAP16XX_NR_MMC); + omap_set_mmc_info(1, &h2_mmc_data); } #else @@ -82,4 +104,7 @@ void __init h2_mmc_init(void) { } +void h2_mmc_slot_cover_handler(void *arg, int state) +{ +} #endif diff --git a/trunk/arch/arm/mach-omap1/board-h2.c b/trunk/arch/arm/mach-omap1/board-h2.c index b240c5f861da..c5b4a3b718cf 100644 --- a/trunk/arch/arm/mach-omap1/board-h2.c +++ b/trunk/arch/arm/mach-omap1/board-h2.c @@ -345,25 +345,10 @@ static void __init h2_init_smc91x(void) } } -static int tps_setup(struct i2c_client *client, void *context) -{ - tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V | - TPS_LDO1_ENABLE | TPS_VLDO1_3_0V); - - return 0; -} - -static struct tps65010_board tps_board = { - .base = H2_TPS_GPIO_BASE, - .outmask = 0x0f, - .setup = tps_setup, -}; - static struct i2c_board_info __initdata h2_i2c_board_info[] = { { I2C_BOARD_INFO("tps65010", 0x48), .irq = OMAP_GPIO_IRQ(58), - .platform_data = &tps_board, }, { I2C_BOARD_INFO("isp1301_omap", 0x2d), .irq = OMAP_GPIO_IRQ(2), @@ -393,6 +378,15 @@ static struct omap_usb_config h2_usb_config __initdata = { .pins[1] = 3, }; +static struct omap_mmc_config h2_mmc_config __initdata = { + .mmc[0] = { + .enabled = 1, + .wire4 = 1, + }, +}; + +extern struct omap_mmc_platform_data h2_mmc_data; + static struct omap_uart_config h2_uart_config __initdata = { .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), }; @@ -403,6 +397,7 @@ static struct omap_lcd_config h2_lcd_config __initdata = { static struct omap_board_config_kernel h2_config[] __initdata = { { OMAP_TAG_USB, &h2_usb_config }, + { OMAP_TAG_MMC, &h2_mmc_config }, { OMAP_TAG_UART, &h2_uart_config }, { OMAP_TAG_LCD, &h2_lcd_config }, }; diff --git a/trunk/arch/arm/mach-omap1/board-h3-mmc.c b/trunk/arch/arm/mach-omap1/board-h3-mmc.c index fdfe793d56f2..36085819098c 100644 --- a/trunk/arch/arm/mach-omap1/board-h3-mmc.c +++ b/trunk/arch/arm/mach-omap1/board-h3-mmc.c @@ -12,55 +12,94 @@ * published by the Free Software Foundation. */ -#include - -#include - #include #include -#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) +#ifdef CONFIG_MMC_OMAP +static int slot_cover_open; +static struct device *mmc_device; -static int mmc_set_power(struct device *dev, int slot, int power_on, +static int h3_mmc_set_power(struct device *dev, int slot, int power_on, int vdd) { - if (power_on) - gpio_direction_output(H3_TPS_GPIO_MMC_PWR_EN, 1); - else - gpio_direction_output(H3_TPS_GPIO_MMC_PWR_EN, 0); +#ifdef CONFIG_MMC_DEBUG + dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1, + power_on ? "on" : "off", vdd); +#endif + if (slot != 0) { + dev_err(dev, "No such slot %d\n", slot + 1); + return -ENODEV; + } return 0; } -/* - * H3 could use the following functions tested: - * - mmc_get_cover_state that uses OMAP_MPUIO(1) - * - mmc_get_wp that maybe uses OMAP_MPUIO(3) - */ -static struct omap_mmc_platform_data mmc1_data = { +static int h3_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode) +{ + int ret = 0; + +#ifdef CONFIG_MMC_DEBUG + dev_dbg(dev, "Set slot %d bus_mode %s\n", slot + 1, + bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull"); +#endif + if (slot != 0) { + dev_err(dev, "No such slot %d\n", slot + 1); + return -ENODEV; + } + + /* Treated on upper level */ + + return bus_mode; +} + +static int h3_mmc_get_cover_state(struct device *dev, int slot) +{ + BUG_ON(slot != 0); + + return slot_cover_open; +} + +void h3_mmc_slot_cover_handler(void *arg, int state) +{ + if (mmc_device == NULL) + return; + + slot_cover_open = state; + omap_mmc_notify_cover_event(mmc_device, 0, state); +} + +static int h3_mmc_late_init(struct device *dev) +{ + int ret = 0; + + mmc_device = dev; + + return ret; +} + +static void h3_mmc_cleanup(struct device *dev) +{ +} + +static struct omap_mmc_platform_data h3_mmc_data = { .nr_slots = 1, - .dma_mask = 0xffffffff, + .switch_slot = NULL, + .init = h3_mmc_late_init, + .cleanup = h3_mmc_cleanup, .slots[0] = { - .set_power = mmc_set_power, + .set_power = h3_mmc_set_power, + .set_bus_mode = h3_mmc_set_bus_mode, + .get_ro = NULL, + .get_cover_state = h3_mmc_get_cover_state, .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 | MMC_VDD_32_33 | MMC_VDD_33_34, .name = "mmcblk", }, }; -static struct omap_mmc_platform_data *mmc_data[OMAP16XX_NR_MMC]; - void __init h3_mmc_init(void) { - int ret; - - ret = gpio_request(H3_TPS_GPIO_MMC_PWR_EN, "MMC power"); - if (ret < 0) - return; - gpio_direction_output(H3_TPS_GPIO_MMC_PWR_EN, 0); - - mmc_data[0] = &mmc1_data; - omap1_init_mmc(mmc_data, OMAP16XX_NR_MMC); + omap_set_mmc_info(1, &h3_mmc_data); } #else @@ -69,4 +108,7 @@ void __init h3_mmc_init(void) { } +void h3_mmc_slot_cover_handler(void *arg, int state) +{ +} #endif diff --git a/trunk/arch/arm/mach-omap1/board-h3.c b/trunk/arch/arm/mach-omap1/board-h3.c index 5157eea9be35..0332203bd53d 100644 --- a/trunk/arch/arm/mach-omap1/board-h3.c +++ b/trunk/arch/arm/mach-omap1/board-h3.c @@ -447,6 +447,15 @@ static struct omap_usb_config h3_usb_config __initdata = { .pins[1] = 3, }; +static struct omap_mmc_config h3_mmc_config __initdata = { + .mmc[0] = { + .enabled = 1, + .wire4 = 1, + }, +}; + +extern struct omap_mmc_platform_data h3_mmc_data; + static struct omap_uart_config h3_uart_config __initdata = { .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), }; @@ -457,6 +466,7 @@ static struct omap_lcd_config h3_lcd_config __initdata = { static struct omap_board_config_kernel h3_config[] __initdata = { { OMAP_TAG_USB, &h3_usb_config }, + { OMAP_TAG_MMC, &h3_mmc_config }, { OMAP_TAG_UART, &h3_uart_config }, { OMAP_TAG_LCD, &h3_lcd_config }, }; diff --git a/trunk/arch/arm/mach-omap1/board-innovator.c b/trunk/arch/arm/mach-omap1/board-innovator.c index af2fb9070083..a21e365a7a87 100644 --- a/trunk/arch/arm/mach-omap1/board-innovator.c +++ b/trunk/arch/arm/mach-omap1/board-innovator.c @@ -39,7 +39,6 @@ #include #include #include -#include static int innovator_keymap[] = { KEY(0, 0, KEY_F1), @@ -361,49 +360,16 @@ static struct omap_lcd_config innovator1610_lcd_config __initdata = { }; #endif -#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) - -static int mmc_set_power(struct device *dev, int slot, int power_on, - int vdd) -{ - if (power_on) - fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3), - OMAP1510_FPGA_POWER); - else - fpga_write(fpga_read(OMAP1510_FPGA_POWER) & ~(1 << 3), - OMAP1510_FPGA_POWER); - - return 0; -} - -/* - * Innovator could use the following functions tested: - * - mmc_get_wp that uses OMAP_MPUIO(3) - * - mmc_get_cover_state that uses FPGA F4 UIO43 - */ -static struct omap_mmc_platform_data mmc1_data = { - .nr_slots = 1, - .slots[0] = { - .set_power = mmc_set_power, - .wires = 4, - .name = "mmcblk", +static struct omap_mmc_config innovator_mmc_config __initdata = { + .mmc [0] = { + .enabled = 1, + .wire4 = 1, + .wp_pin = OMAP_MPUIO(3), + .power_pin = -1, /* FPGA F3 UIO42 */ + .switch_pin = -1, /* FPGA F4 UIO43 */ }, }; -static struct omap_mmc_platform_data *mmc_data[OMAP16XX_NR_MMC]; - -void __init innovator_mmc_init(void) -{ - mmc_data[0] = &mmc1_data; - omap1_init_mmc(mmc_data, OMAP15XX_NR_MMC); -} - -#else -static inline void innovator_mmc_init(void) -{ -} -#endif - static struct omap_uart_config innovator_uart_config __initdata = { .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), }; @@ -411,6 +377,7 @@ static struct omap_uart_config innovator_uart_config __initdata = { static struct omap_board_config_kernel innovator_config[] = { { OMAP_TAG_USB, NULL }, { OMAP_TAG_LCD, NULL }, + { OMAP_TAG_MMC, &innovator_mmc_config }, { OMAP_TAG_UART, &innovator_uart_config }, }; @@ -445,7 +412,6 @@ static void __init innovator_init(void) omap_board_config_size = ARRAY_SIZE(innovator_config); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); - innovator_mmc_init(); } static void __init innovator_map_io(void) diff --git a/trunk/arch/arm/mach-omap1/board-nokia770.c b/trunk/arch/arm/mach-omap1/board-nokia770.c index 4970c402a594..b26782471e59 100644 --- a/trunk/arch/arm/mach-omap1/board-nokia770.c +++ b/trunk/arch/arm/mach-omap1/board-nokia770.c @@ -35,7 +35,6 @@ #include #include #include -#include #define ADS7846_PENDOWN_GPIO 15 @@ -174,68 +173,26 @@ static struct omap_usb_config nokia770_usb_config __initdata = { .pins[0] = 6, }; -#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) - -#define NOKIA770_GPIO_MMC_POWER 41 -#define NOKIA770_GPIO_MMC_SWITCH 23 - -static int nokia770_mmc_set_power(struct device *dev, int slot, int power_on, - int vdd) -{ - if (power_on) - gpio_set_value(NOKIA770_GPIO_MMC_POWER, 1); - else - gpio_set_value(NOKIA770_GPIO_MMC_POWER, 0); - - return 0; -} - -static int nokia770_mmc_get_cover_state(struct device *dev, int slot) -{ - return gpio_get_value(NOKIA770_GPIO_MMC_SWITCH); -} - -static struct omap_mmc_platform_data nokia770_mmc2_data = { - .nr_slots = 1, - .dma_mask = 0xffffffff, - .slots[0] = { - .set_power = nokia770_mmc_set_power, - .get_cover_state = nokia770_mmc_get_cover_state, - .name = "mmcblk", +static struct omap_mmc_config nokia770_mmc_config __initdata = { + .mmc[0] = { + .enabled = 0, + .wire4 = 0, + .wp_pin = -1, + .power_pin = -1, + .switch_pin = -1, + }, + .mmc[1] = { + .enabled = 0, + .wire4 = 0, + .wp_pin = -1, + .power_pin = -1, + .switch_pin = -1, }, }; -static struct omap_mmc_platform_data *nokia770_mmc_data[OMAP16XX_NR_MMC]; - -static void __init nokia770_mmc_init(void) -{ - int ret; - - ret = gpio_request(NOKIA770_GPIO_MMC_POWER, "MMC power"); - if (ret < 0) - return; - gpio_direction_output(NOKIA770_GPIO_MMC_POWER, 0); - - ret = gpio_request(NOKIA770_GPIO_MMC_SWITCH, "MMC cover"); - if (ret < 0) { - gpio_free(NOKIA770_GPIO_MMC_POWER); - return; - } - gpio_direction_input(NOKIA770_GPIO_MMC_SWITCH); - - /* Only the second MMC controller is used */ - nokia770_mmc_data[1] = &nokia770_mmc2_data; - omap1_init_mmc(nokia770_mmc_data, OMAP16XX_NR_MMC); -} - -#else -static inline void nokia770_mmc_init(void) -{ -} -#endif - static struct omap_board_config_kernel nokia770_config[] __initdata = { { OMAP_TAG_USB, NULL }, + { OMAP_TAG_MMC, &nokia770_mmc_config }, }; #if defined(CONFIG_OMAP_DSP) @@ -378,7 +335,6 @@ static void __init omap_nokia770_init(void) omap_dsp_init(); ads7846_dev_init(); mipid_dev_init(); - nokia770_mmc_init(); } static void __init omap_nokia770_map_io(void) diff --git a/trunk/arch/arm/mach-omap1/board-palmte.c b/trunk/arch/arm/mach-omap1/board-palmte.c index 75e32d35afd9..4141e3917d7c 100644 --- a/trunk/arch/arm/mach-omap1/board-palmte.c +++ b/trunk/arch/arm/mach-omap1/board-palmte.c @@ -316,6 +316,7 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery) static struct omap_board_config_kernel palmte_config[] __initdata = { { OMAP_TAG_USB, &palmte_usb_config }, + { OMAP_TAG_MMC, &palmte_mmc_config }, { OMAP_TAG_LCD, &palmte_lcd_config }, { OMAP_TAG_UART, &palmte_uart_config }, }; diff --git a/trunk/arch/arm/mach-omap1/board-palmz71.c b/trunk/arch/arm/mach-omap1/board-palmz71.c index cc05257eb1cd..801fb5f62ed7 100644 --- a/trunk/arch/arm/mach-omap1/board-palmz71.c +++ b/trunk/arch/arm/mach-omap1/board-palmz71.c @@ -267,6 +267,16 @@ static struct omap_usb_config palmz71_usb_config __initdata = { .pins[0] = 2, }; +static struct omap_mmc_config palmz71_mmc_config __initdata = { + .mmc[0] = { + .enabled = 1, + .wire4 = 0, + .wp_pin = PALMZ71_MMC_WP_GPIO, + .power_pin = -1, + .switch_pin = PALMZ71_MMC_IN_GPIO, + }, +}; + static struct omap_lcd_config palmz71_lcd_config __initdata = { .ctrl_name = "internal", }; @@ -277,6 +287,7 @@ static struct omap_uart_config palmz71_uart_config __initdata = { static struct omap_board_config_kernel palmz71_config[] __initdata = { {OMAP_TAG_USB, &palmz71_usb_config}, + {OMAP_TAG_MMC, &palmz71_mmc_config}, {OMAP_TAG_LCD, &palmz71_lcd_config}, {OMAP_TAG_UART, &palmz71_uart_config}, }; diff --git a/trunk/arch/arm/mach-omap1/board-sx1-mmc.c b/trunk/arch/arm/mach-omap1/board-sx1-mmc.c index 66a4d7d5255d..0be4ebaa2842 100644 --- a/trunk/arch/arm/mach-omap1/board-sx1-mmc.c +++ b/trunk/arch/arm/mach-omap1/board-sx1-mmc.c @@ -12,20 +12,30 @@ * published by the Free Software Foundation. */ -#include - #include #include #include -#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) +#ifdef CONFIG_MMC_OMAP +static int slot_cover_open; +static struct device *mmc_device; -static int mmc_set_power(struct device *dev, int slot, int power_on, +static int sx1_mmc_set_power(struct device *dev, int slot, int power_on, int vdd) { int err; u8 dat = 0; +#ifdef CONFIG_MMC_DEBUG + dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1, + power_on ? "on" : "off", vdd); +#endif + + if (slot != 0) { + dev_err(dev, "No such slot %d\n", slot + 1); + return -ENODEV; + } + err = sx1_i2c_read_byte(SOFIA_I2C_ADDR, SOFIA_POWER1_REG, &dat); if (err < 0) return err; @@ -38,23 +48,68 @@ static int mmc_set_power(struct device *dev, int slot, int power_on, return sx1_i2c_write_byte(SOFIA_I2C_ADDR, SOFIA_POWER1_REG, dat); } -/* Cover switch is at OMAP_MPUIO(3) */ -static struct omap_mmc_platform_data mmc1_data = { +static int sx1_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode) +{ +#ifdef CONFIG_MMC_DEBUG + dev_dbg(dev, "Set slot %d bus_mode %s\n", slot + 1, + bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull"); +#endif + if (slot != 0) { + dev_err(dev, "No such slot %d\n", slot + 1); + return -ENODEV; + } + + return 0; +} + +static int sx1_mmc_get_cover_state(struct device *dev, int slot) +{ + BUG_ON(slot != 0); + + return slot_cover_open; +} + +void sx1_mmc_slot_cover_handler(void *arg, int state) +{ + if (mmc_device == NULL) + return; + + slot_cover_open = state; + omap_mmc_notify_cover_event(mmc_device, 0, state); +} + +static int sx1_mmc_late_init(struct device *dev) +{ + int ret = 0; + + mmc_device = dev; + + return ret; +} + +static void sx1_mmc_cleanup(struct device *dev) +{ +} + +static struct omap_mmc_platform_data sx1_mmc_data = { .nr_slots = 1, + .switch_slot = NULL, + .init = sx1_mmc_late_init, + .cleanup = sx1_mmc_cleanup, .slots[0] = { - .set_power = mmc_set_power, + .set_power = sx1_mmc_set_power, + .set_bus_mode = sx1_mmc_set_bus_mode, + .get_ro = NULL, + .get_cover_state = sx1_mmc_get_cover_state, .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 | MMC_VDD_32_33 | MMC_VDD_33_34, .name = "mmcblk", }, }; -static struct omap_mmc_platform_data *mmc_data[OMAP15XX_NR_MMC]; - void __init sx1_mmc_init(void) { - mmc_data[0] = &mmc1_data; - omap1_init_mmc(mmc_data, OMAP15XX_NR_MMC); + omap_set_mmc_info(1, &sx1_mmc_data); } #else @@ -63,4 +118,7 @@ void __init sx1_mmc_init(void) { } +void sx1_mmc_slot_cover_handler(void *arg, int state) +{ +} #endif diff --git a/trunk/arch/arm/mach-omap1/board-sx1.c b/trunk/arch/arm/mach-omap1/board-sx1.c index 8171fe0ca082..93bd395b9972 100644 --- a/trunk/arch/arm/mach-omap1/board-sx1.c +++ b/trunk/arch/arm/mach-omap1/board-sx1.c @@ -378,6 +378,15 @@ static struct omap_usb_config sx1_usb_config __initdata = { .pins[2] = 0, }; +/*----------- MMC -------------------------*/ + +static struct omap_mmc_config sx1_mmc_config __initdata = { + .mmc [0] = { + .enabled = 1, + .wire4 = 0, + }, +}; + /*----------- LCD -------------------------*/ static struct platform_device sx1_lcd_device = { @@ -405,6 +414,7 @@ static struct omap_uart_config sx1_uart_config __initdata = { static struct omap_board_config_kernel sx1_config[] __initdata = { { OMAP_TAG_USB, &sx1_usb_config }, + { OMAP_TAG_MMC, &sx1_mmc_config }, { OMAP_TAG_LCD, &sx1_lcd_config }, { OMAP_TAG_UART, &sx1_uart_config }, }; diff --git a/trunk/arch/arm/mach-omap1/board-voiceblue.c b/trunk/arch/arm/mach-omap1/board-voiceblue.c index c224f3c64235..92c9de1090a9 100644 --- a/trunk/arch/arm/mach-omap1/board-voiceblue.c +++ b/trunk/arch/arm/mach-omap1/board-voiceblue.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include @@ -141,12 +140,21 @@ static struct omap_usb_config voiceblue_usb_config __initdata = { .pins[2] = 6, }; +static struct omap_mmc_config voiceblue_mmc_config __initdata = { + .mmc[0] = { + .enabled = 1, + .power_pin = 2, + .switch_pin = -1, + }, +}; + static struct omap_uart_config voiceblue_uart_config __initdata = { .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), }; static struct omap_board_config_kernel voiceblue_config[] = { { OMAP_TAG_USB, &voiceblue_usb_config }, + { OMAP_TAG_MMC, &voiceblue_mmc_config }, { OMAP_TAG_UART, &voiceblue_uart_config }, }; diff --git a/trunk/arch/arm/mach-omap1/clock.h b/trunk/arch/arm/mach-omap1/clock.h index c1dcdf18d8dd..5635b511ab6f 100644 --- a/trunk/arch/arm/mach-omap1/clock.h +++ b/trunk/arch/arm/mach-omap1/clock.h @@ -705,6 +705,7 @@ static struct clk bclk_16xx = { static struct clk mmc1_ck = { .name = "mmc_ck", + .id = 1, /* Functional clock is direct from ULPD, interface clock is ARMPER */ .parent = &armper_ck.clk, .rate = 48000000, @@ -719,7 +720,7 @@ static struct clk mmc1_ck = { static struct clk mmc2_ck = { .name = "mmc_ck", - .id = 1, + .id = 2, /* Functional clock is direct from ULPD, interface clock is ARMPER */ .parent = &armper_ck.clk, .rate = 48000000, diff --git a/trunk/arch/arm/mach-omap1/devices.c b/trunk/arch/arm/mach-omap1/devices.c index 77382d8b6b2f..e382b438c64e 100644 --- a/trunk/arch/arm/mach-omap1/devices.c +++ b/trunk/arch/arm/mach-omap1/devices.c @@ -22,7 +22,6 @@ #include #include #include -#include /*-------------------------------------------------------------------------*/ @@ -100,95 +99,6 @@ static inline void omap_init_mbox(void) static inline void omap_init_mbox(void) { } #endif -/*-------------------------------------------------------------------------*/ - -#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) - -static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller, - int controller_nr) -{ - if (controller_nr == 0) { - omap_cfg_reg(MMC_CMD); - omap_cfg_reg(MMC_CLK); - omap_cfg_reg(MMC_DAT0); - if (cpu_is_omap1710()) { - omap_cfg_reg(M15_1710_MMC_CLKI); - omap_cfg_reg(P19_1710_MMC_CMDDIR); - omap_cfg_reg(P20_1710_MMC_DATDIR0); - } - if (mmc_controller->slots[0].wires == 4) { - omap_cfg_reg(MMC_DAT1); - /* NOTE: DAT2 can be on W10 (here) or M15 */ - if (!mmc_controller->slots[0].nomux) - omap_cfg_reg(MMC_DAT2); - omap_cfg_reg(MMC_DAT3); - } - } - - /* Block 2 is on newer chips, and has many pinout options */ - if (cpu_is_omap16xx() && controller_nr == 1) { - if (!mmc_controller->slots[1].nomux) { - omap_cfg_reg(Y8_1610_MMC2_CMD); - omap_cfg_reg(Y10_1610_MMC2_CLK); - omap_cfg_reg(R18_1610_MMC2_CLKIN); - omap_cfg_reg(W8_1610_MMC2_DAT0); - if (mmc_controller->slots[1].wires == 4) { - omap_cfg_reg(V8_1610_MMC2_DAT1); - omap_cfg_reg(W15_1610_MMC2_DAT2); - omap_cfg_reg(R10_1610_MMC2_DAT3); - } - - /* These are needed for the level shifter */ - omap_cfg_reg(V9_1610_MMC2_CMDDIR); - omap_cfg_reg(V5_1610_MMC2_DATDIR0); - omap_cfg_reg(W19_1610_MMC2_DATDIR1); - } - - /* Feedback clock must be set on OMAP-1710 MMC2 */ - if (cpu_is_omap1710()) - omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24), - MOD_CONF_CTRL_1); - } -} - -void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, - int nr_controllers) -{ - int i; - - for (i = 0; i < nr_controllers; i++) { - unsigned long base, size; - unsigned int irq = 0; - - if (!mmc_data[i]) - continue; - - omap1_mmc_mux(mmc_data[i], i); - - switch (i) { - case 0: - base = OMAP1_MMC1_BASE; - irq = INT_MMC; - break; - case 1: - if (!cpu_is_omap16xx()) - return; - base = OMAP1_MMC2_BASE; - irq = INT_1610_MMC2; - break; - default: - continue; - } - size = OMAP1_MMC_SIZE; - - omap_mmc_add(i, base, size, irq, mmc_data[i]); - }; -} - -#endif - -/*-------------------------------------------------------------------------*/ - #if defined(CONFIG_OMAP_STI) #define OMAP1_STI_BASE 0xfffea000 diff --git a/trunk/arch/arm/mach-omap2/Makefile b/trunk/arch/arm/mach-omap2/Makefile index bbd12bc10fdc..f12c43e4932f 100644 --- a/trunk/arch/arm/mach-omap2/Makefile +++ b/trunk/arch/arm/mach-omap2/Makefile @@ -27,15 +27,10 @@ obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o # Specific board support obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o -obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o \ - mmc-twl4030.o +obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o -obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o \ - mmc-twl4030.o -obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o \ - mmc-twl4030.o -obj-$(CONFIG_MACH_OVERO) += board-overo.o \ - mmc-twl4030.o -obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \ - mmc-twl4030.o +obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o +obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o +obj-$(CONFIG_MACH_OVERO) += board-overo.o +obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o diff --git a/trunk/arch/arm/mach-omap2/board-2430sdp.c b/trunk/arch/arm/mach-omap2/board-2430sdp.c index 83fa37211d77..6748de6e19a8 100644 --- a/trunk/arch/arm/mach-omap2/board-2430sdp.c +++ b/trunk/arch/arm/mach-omap2/board-2430sdp.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include @@ -36,7 +35,6 @@ #include #include -#include "mmc-twl4030.h" #define SDP2430_FLASH_CS 0 #define SDP2430_SMC91X_CS 5 @@ -199,58 +197,12 @@ static struct omap_board_config_kernel sdp2430_config[] = { {OMAP_TAG_UART, &sdp2430_uart_config}, }; - -static struct twl4030_gpio_platform_data sdp2430_gpio_data = { - .gpio_base = OMAP_MAX_GPIO_LINES, - .irq_base = TWL4030_GPIO_IRQ_BASE, - .irq_end = TWL4030_GPIO_IRQ_END, -}; - -static struct twl4030_platform_data sdp2430_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - - /* platform_data for children goes here */ - .gpio = &sdp2430_gpio_data, -}; - -static struct i2c_board_info __initdata sdp2430_i2c_boardinfo[] = { - { - I2C_BOARD_INFO("twl4030", 0x48), - .flags = I2C_CLIENT_WAKE, - .irq = INT_24XX_SYS_NIRQ, - .platform_data = &sdp2430_twldata, - }, -}; - -static int __init omap2430_i2c_init(void) -{ - omap_register_i2c_bus(1, 400, NULL, 0); - omap_register_i2c_bus(2, 2600, sdp2430_i2c_boardinfo, - ARRAY_SIZE(sdp2430_i2c_boardinfo)); - return 0; -} - -static struct twl4030_hsmmc_info mmc[] __initdata = { - { - .mmc = 1, - .wires = 4, - .gpio_cd = -EINVAL, - .gpio_wp = -EINVAL, - .ext_clock = 1, - }, - {} /* Terminator */ -}; - static void __init omap_2430sdp_init(void) { - omap2430_i2c_init(); - platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); omap_board_config = sdp2430_config; omap_board_config_size = ARRAY_SIZE(sdp2430_config); omap_serial_init(); - twl4030_mmc_init(mmc); } static void __init omap_2430sdp_map_io(void) diff --git a/trunk/arch/arm/mach-omap2/board-apollon.c b/trunk/arch/arm/mach-omap2/board-apollon.c index bf1e5d32c2a3..d83035b436d5 100644 --- a/trunk/arch/arm/mach-omap2/board-apollon.c +++ b/trunk/arch/arm/mach-omap2/board-apollon.c @@ -261,6 +261,16 @@ static struct omap_uart_config apollon_uart_config __initdata = { .enabled_uarts = (1 << 0) | (0 << 1) | (0 << 2), }; +static struct omap_mmc_config apollon_mmc_config __initdata = { + .mmc [0] = { + .enabled = 1, + .wire4 = 1, + .wp_pin = -1, + .power_pin = -1, + .switch_pin = -1, + }, +}; + static struct omap_usb_config apollon_usb_config __initdata = { .register_dev = 1, .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */ @@ -274,6 +284,7 @@ static struct omap_lcd_config apollon_lcd_config __initdata = { static struct omap_board_config_kernel apollon_config[] = { { OMAP_TAG_UART, &apollon_uart_config }, + { OMAP_TAG_MMC, &apollon_mmc_config }, { OMAP_TAG_USB, &apollon_usb_config }, { OMAP_TAG_LCD, &apollon_lcd_config }, }; diff --git a/trunk/arch/arm/mach-omap2/board-generic.c b/trunk/arch/arm/mach-omap2/board-generic.c index 3b34c20d1df4..9ba097868e72 100644 --- a/trunk/arch/arm/mach-omap2/board-generic.c +++ b/trunk/arch/arm/mach-omap2/board-generic.c @@ -41,8 +41,19 @@ static struct omap_uart_config generic_uart_config __initdata = { .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), }; +static struct omap_mmc_config generic_mmc_config __initdata = { + .mmc [0] = { + .enabled = 0, + .wire4 = 0, + .wp_pin = -1, + .power_pin = -1, + .switch_pin = -1, + }, +}; + static struct omap_board_config_kernel generic_config[] = { { OMAP_TAG_UART, &generic_uart_config }, + { OMAP_TAG_MMC, &generic_mmc_config }, }; static void __init omap_generic_init(void) diff --git a/trunk/arch/arm/mach-omap2/board-h4.c b/trunk/arch/arm/mach-omap2/board-h4.c index 5e9b14675b1e..7de0506e1e29 100644 --- a/trunk/arch/arm/mach-omap2/board-h4.c +++ b/trunk/arch/arm/mach-omap2/board-h4.c @@ -373,12 +373,23 @@ static struct omap_uart_config h4_uart_config __initdata = { .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), }; +static struct omap_mmc_config h4_mmc_config __initdata = { + .mmc [0] = { + .enabled = 1, + .wire4 = 1, + .wp_pin = -1, + .power_pin = -1, + .switch_pin = -1, + }, +}; + static struct omap_lcd_config h4_lcd_config __initdata = { .ctrl_name = "internal", }; static struct omap_board_config_kernel h4_config[] = { { OMAP_TAG_UART, &h4_uart_config }, + { OMAP_TAG_MMC, &h4_mmc_config }, { OMAP_TAG_LCD, &h4_lcd_config }, }; diff --git a/trunk/arch/arm/mach-omap2/board-ldp.c b/trunk/arch/arm/mach-omap2/board-ldp.c index aa6972781e4a..43c7ac4b7f8f 100644 --- a/trunk/arch/arm/mach-omap2/board-ldp.c +++ b/trunk/arch/arm/mach-omap2/board-ldp.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include @@ -39,8 +38,6 @@ #include #include -#include "mmc-twl4030.h" - #define SDP3430_SMC91X_CS 3 static struct resource ldp_smc911x_resources[] = { @@ -112,48 +109,14 @@ static struct omap_board_config_kernel ldp_config[] __initdata = { { OMAP_TAG_UART, &ldp_uart_config }, }; -static struct twl4030_gpio_platform_data ldp_gpio_data = { - .gpio_base = OMAP_MAX_GPIO_LINES, - .irq_base = TWL4030_GPIO_IRQ_BASE, - .irq_end = TWL4030_GPIO_IRQ_END, -}; - -static struct twl4030_platform_data ldp_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - - /* platform_data for children goes here */ - .gpio = &ldp_gpio_data, -}; - -static struct i2c_board_info __initdata ldp_i2c_boardinfo[] = { - { - I2C_BOARD_INFO("twl4030", 0x48), - .flags = I2C_CLIENT_WAKE, - .irq = INT_34XX_SYS_NIRQ, - .platform_data = &ldp_twldata, - }, -}; - static int __init omap_i2c_init(void) { - omap_register_i2c_bus(1, 2600, ldp_i2c_boardinfo, - ARRAY_SIZE(ldp_i2c_boardinfo)); + omap_register_i2c_bus(1, 2600, NULL, 0); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, NULL, 0); return 0; } -static struct twl4030_hsmmc_info mmc[] __initdata = { - { - .mmc = 1, - .wires = 4, - .gpio_cd = -EINVAL, - .gpio_wp = -EINVAL, - }, - {} /* Terminator */ -}; - static void __init omap_ldp_init(void) { omap_i2c_init(); @@ -161,7 +124,6 @@ static void __init omap_ldp_init(void) omap_board_config = ldp_config; omap_board_config_size = ARRAY_SIZE(ldp_config); omap_serial_init(); - twl4030_mmc_init(mmc); } static void __init omap_ldp_map_io(void) diff --git a/trunk/arch/arm/mach-omap2/board-omap3beagle.c b/trunk/arch/arm/mach-omap2/board-omap3beagle.c index 9e5ada01b5fa..baa79674e9d5 100644 --- a/trunk/arch/arm/mach-omap2/board-omap3beagle.c +++ b/trunk/arch/arm/mach-omap2/board-omap3beagle.c @@ -38,9 +38,7 @@ #include #include #include -#include -#include "mmc-twl4030.h" #define GPMC_CS0_BASE 0x60 #define GPMC_CS_SIZE 0x30 @@ -105,78 +103,6 @@ static struct omap_uart_config omap3_beagle_uart_config __initdata = { .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), }; -static struct twl4030_hsmmc_info mmc[] = { - { - .mmc = 1, - .wires = 8, - .gpio_wp = 29, - }, - {} /* Terminator */ -}; - -static struct gpio_led gpio_leds[]; - -static int beagle_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) -{ - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ - - /* REVISIT: need ehci-omap hooks for external VBUS - * power switch and overcurrent detect - */ - - gpio_request(gpio + 1, "EHCI_nOC"); - gpio_direction_input(gpio + 1); - - /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ - gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); - gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1); - - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; - - return 0; -} - -static struct twl4030_gpio_platform_data beagle_gpio_data = { - .gpio_base = OMAP_MAX_GPIO_LINES, - .irq_base = TWL4030_GPIO_IRQ_BASE, - .irq_end = TWL4030_GPIO_IRQ_END, - .use_leds = true, - .pullups = BIT(1), - .pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13) - | BIT(15) | BIT(16) | BIT(17), - .setup = beagle_twl_gpio_setup, -}; - -static struct twl4030_platform_data beagle_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - - /* platform_data for children goes here */ - .gpio = &beagle_gpio_data, -}; - -static struct i2c_board_info __initdata beagle_i2c_boardinfo[] = { - { - I2C_BOARD_INFO("twl4030", 0x48), - .flags = I2C_CLIENT_WAKE, - .irq = INT_34XX_SYS_NIRQ, - .platform_data = &beagle_twldata, - }, -}; - -static int __init omap3_beagle_i2c_init(void) -{ - omap_register_i2c_bus(1, 2600, beagle_i2c_boardinfo, - ARRAY_SIZE(beagle_i2c_boardinfo)); -#ifdef CONFIG_I2C2_OMAP_BEAGLE - omap_register_i2c_bus(2, 400, NULL, 0); -#endif - omap_register_i2c_bus(3, 400, NULL, 0); - return 0; -} - static void __init omap3_beagle_init_irq(void) { omap2_init_common_hw(); @@ -204,11 +130,6 @@ static struct gpio_led gpio_leds[] = { .default_trigger = "mmc0", .gpio = 149, }, - { - .name = "beagleboard::pmu_stat", - .gpio = -EINVAL, /* gets replaced */ - .active_low = true, - }, }; static struct gpio_led_platform_data gpio_led_info = { @@ -297,22 +218,11 @@ static void __init omap3beagle_flash_init(void) static void __init omap3_beagle_init(void) { - omap3_beagle_i2c_init(); platform_add_devices(omap3_beagle_devices, ARRAY_SIZE(omap3_beagle_devices)); omap_board_config = omap3_beagle_config; omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); omap_serial_init(); - - omap_cfg_reg(AH8_34XX_GPIO29); - mmc[0].gpio_cd = gpio + 0; - twl4030_mmc_init(mmc); - - omap_cfg_reg(J25_34XX_GPIO170); - gpio_request(170, "DVI_nPD"); - /* REVISIT leave DVI powered down until it's needed ... */ - gpio_direction_output(170, true); - omap3beagle_flash_init(); } diff --git a/trunk/arch/arm/mach-omap2/board-omap3pandora.c b/trunk/arch/arm/mach-omap2/board-omap3pandora.c index b3196107afdb..7236c7be05b3 100644 --- a/trunk/arch/arm/mach-omap2/board-omap3pandora.c +++ b/trunk/arch/arm/mach-omap2/board-omap3pandora.c @@ -35,48 +35,16 @@ #include #include -#include "mmc-twl4030.h" - #define OMAP3_PANDORA_TS_GPIO 94 -static struct twl4030_hsmmc_info omap3pandora_mmc[] = { - { - .mmc = 1, - .wires = 4, - .gpio_cd = -EINVAL, - .gpio_wp = 126, - .ext_clock = 0, - }, - { - .mmc = 2, - .wires = 4, - .gpio_cd = -EINVAL, - .gpio_wp = 127, - .ext_clock = 1, - }, - {} /* Terminator */ -}; - static struct omap_uart_config omap3pandora_uart_config __initdata = { .enabled_uarts = (1 << 2), /* UART3 */ }; -static int omap3pandora_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) -{ - /* gpio + {0,1} is "mmc{0,1}_cd" (input/IRQ) */ - omap3pandora_mmc[0].gpio_cd = gpio + 0; - omap3pandora_mmc[1].gpio_cd = gpio + 1; - twl4030_mmc_init(omap3pandora_mmc); - - return 0; -} - static struct twl4030_gpio_platform_data omap3pandora_gpio_data = { .gpio_base = OMAP_MAX_GPIO_LINES, .irq_base = TWL4030_GPIO_IRQ_BASE, .irq_end = TWL4030_GPIO_IRQ_END, - .setup = omap3pandora_twl_gpio_setup, }; static struct twl4030_usb_data omap3pandora_usb_data = { diff --git a/trunk/arch/arm/mach-omap2/board-overo.c b/trunk/arch/arm/mach-omap2/board-overo.c index 82b3dc557c96..e09aa59a399c 100644 --- a/trunk/arch/arm/mach-omap2/board-overo.c +++ b/trunk/arch/arm/mach-omap2/board-overo.c @@ -26,7 +26,6 @@ #include #include #include -#include #include #include @@ -45,8 +44,6 @@ #include #include -#include "mmc-twl4030.h" - #define NAND_BLOCK_SIZE SZ_128K #define GPMC_CS0_BASE 0x60 #define GPMC_CS_SIZE 0x30 @@ -142,31 +139,8 @@ static struct omap_uart_config overo_uart_config __initdata = { .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), }; -static struct twl4030_gpio_platform_data overo_gpio_data = { - .gpio_base = OMAP_MAX_GPIO_LINES, - .irq_base = TWL4030_GPIO_IRQ_BASE, - .irq_end = TWL4030_GPIO_IRQ_END, -}; - -static struct twl4030_platform_data overo_twldata = { - .irq_base = TWL4030_IRQ_BASE, - .irq_end = TWL4030_IRQ_END, - .gpio = &overo_gpio_data, -}; - -static struct i2c_board_info __initdata overo_i2c_boardinfo[] = { - { - I2C_BOARD_INFO("twl4030", 0x48), - .flags = I2C_CLIENT_WAKE, - .irq = INT_34XX_SYS_NIRQ, - .platform_data = &overo_twldata, - }, -}; - static int __init overo_i2c_init(void) { - omap_register_i2c_bus(1, 2600, overo_i2c_boardinfo, - ARRAY_SIZE(overo_i2c_boardinfo)); /* i2c2 pins are used for gpio */ omap_register_i2c_bus(3, 400, NULL, 0); return 0; @@ -197,22 +171,6 @@ static struct platform_device *overo_devices[] __initdata = { &overo_lcd_device, }; -static struct twl4030_hsmmc_info mmc[] __initdata = { - { - .mmc = 1, - .wires = 4, - .gpio_cd = -EINVAL, - .gpio_wp = -EINVAL, - }, - { - .mmc = 2, - .wires = 4, - .gpio_cd = -EINVAL, - .gpio_wp = -EINVAL, - }, - {} /* Terminator */ -}; - static void __init overo_init(void) { overo_i2c_init(); @@ -220,7 +178,6 @@ static void __init overo_init(void) omap_board_config = overo_config; omap_board_config_size = ARRAY_SIZE(overo_config); omap_serial_init(); - twl4030_mmc_init(mmc); overo_flash_init(); if ((gpio_request(OVERO_GPIO_W2W_NRESET, diff --git a/trunk/arch/arm/mach-omap2/clock24xx.h b/trunk/arch/arm/mach-omap2/clock24xx.h index ff6cd14d254d..242a19d86ccd 100644 --- a/trunk/arch/arm/mach-omap2/clock24xx.h +++ b/trunk/arch/arm/mach-omap2/clock24xx.h @@ -2522,6 +2522,7 @@ static struct clk usbhs_ick = { static struct clk mmchs1_ick = { .name = "mmchs_ick", + .id = 1, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", @@ -2532,6 +2533,7 @@ static struct clk mmchs1_ick = { static struct clk mmchs1_fck = { .name = "mmchs_fck", + .id = 1, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l3_clkdm", @@ -2542,7 +2544,7 @@ static struct clk mmchs1_fck = { static struct clk mmchs2_ick = { .name = "mmchs_ick", - .id = 1, + .id = 2, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", @@ -2553,7 +2555,7 @@ static struct clk mmchs2_ick = { static struct clk mmchs2_fck = { .name = "mmchs_fck", - .id = 1, + .id = 2, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), @@ -2593,6 +2595,7 @@ static struct clk mdm_intc_ick = { static struct clk mmchsdb1_fck = { .name = "mmchsdb_fck", + .id = 1, .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", @@ -2603,7 +2606,7 @@ static struct clk mmchsdb1_fck = { static struct clk mmchsdb2_fck = { .name = "mmchsdb_fck", - .id = 1, + .id = 2, .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", diff --git a/trunk/arch/arm/mach-omap2/clock34xx.h b/trunk/arch/arm/mach-omap2/clock34xx.h index a826094d89b5..7217a0824ec4 100644 --- a/trunk/arch/arm/mach-omap2/clock34xx.h +++ b/trunk/arch/arm/mach-omap2/clock34xx.h @@ -1374,7 +1374,7 @@ static struct clk core_96m_fck = { static struct clk mmchs3_fck = { .name = "mmchs_fck", - .id = 2, + .id = 3, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT, @@ -1385,7 +1385,7 @@ static struct clk mmchs3_fck = { static struct clk mmchs2_fck = { .name = "mmchs_fck", - .id = 1, + .id = 2, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MMC2_SHIFT, @@ -1406,6 +1406,7 @@ static struct clk mspro_fck = { static struct clk mmchs1_fck = { .name = "mmchs_fck", + .id = 1, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MMC1_SHIFT, @@ -1721,7 +1722,7 @@ static struct clk usbtll_ick = { static struct clk mmchs3_ick = { .name = "mmchs_ick", - .id = 2, + .id = 3, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT, @@ -1773,7 +1774,7 @@ static struct clk des2_ick = { static struct clk mmchs2_ick = { .name = "mmchs_ick", - .id = 1, + .id = 2, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MMC2_SHIFT, @@ -1784,6 +1785,7 @@ static struct clk mmchs2_ick = { static struct clk mmchs1_ick = { .name = "mmchs_ick", + .id = 1, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MMC1_SHIFT, diff --git a/trunk/arch/arm/mach-omap2/devices.c b/trunk/arch/arm/mach-omap2/devices.c index 9d7216ff6c9f..90af2ac469aa 100644 --- a/trunk/arch/arm/mach-omap2/devices.c +++ b/trunk/arch/arm/mach-omap2/devices.c @@ -14,19 +14,16 @@ #include #include #include -#include #include #include #include -#include #include #include #include #include #include -#include #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) #define OMAP2_MBOX_BASE IO_ADDRESS(OMAP24XX_MAILBOX_BASE) @@ -298,171 +295,6 @@ static void omap_init_sha1_md5(void) static inline void omap_init_sha1_md5(void) { } #endif -/*-------------------------------------------------------------------------*/ - -#ifdef CONFIG_ARCH_OMAP3 - -#define MMCHS_SYSCONFIG 0x0010 -#define MMCHS_SYSCONFIG_SWRESET (1 << 1) -#define MMCHS_SYSSTATUS 0x0014 -#define MMCHS_SYSSTATUS_RESETDONE (1 << 0) - -static struct platform_device dummy_pdev = { - .dev = { - .bus = &platform_bus_type, - }, -}; - -/** - * omap_hsmmc_reset() - Full reset of each HS-MMC controller - * - * Ensure that each MMC controller is fully reset. Controllers - * left in an unknown state (by bootloader) may prevent retention - * or OFF-mode. This is especially important in cases where the - * MMC driver is not enabled, _or_ built as a module. - * - * In order for reset to work, interface, functional and debounce - * clocks must be enabled. The debounce clock comes from func_32k_clk - * and is not under SW control, so we only enable i- and f-clocks. - **/ -static void __init omap_hsmmc_reset(void) -{ - u32 i, nr_controllers = cpu_is_omap34xx() ? OMAP34XX_NR_MMC : - OMAP24XX_NR_MMC; - - for (i = 0; i < nr_controllers; i++) { - u32 v, base = 0; - struct clk *iclk, *fclk; - struct device *dev = &dummy_pdev.dev; - - switch (i) { - case 0: - base = OMAP2_MMC1_BASE; - break; - case 1: - base = OMAP2_MMC2_BASE; - break; - case 2: - base = OMAP3_MMC3_BASE; - break; - } - - dummy_pdev.id = i; - iclk = clk_get(dev, "mmchs_ick"); - if (iclk && clk_enable(iclk)) - iclk = NULL; - - fclk = clk_get(dev, "mmchs_fck"); - if (fclk && clk_enable(fclk)) - fclk = NULL; - - if (!iclk || !fclk) { - printk(KERN_WARNING - "%s: Unable to enable clocks for MMC%d, " - "cannot reset.\n", __func__, i); - break; - } - - omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG); - v = omap_readl(base + MMCHS_SYSSTATUS); - while (!(omap_readl(base + MMCHS_SYSSTATUS) & - MMCHS_SYSSTATUS_RESETDONE)) - cpu_relax(); - - if (fclk) { - clk_disable(fclk); - clk_put(fclk); - } - if (iclk) { - clk_disable(iclk); - clk_put(iclk); - } - } -} -#else -static inline void omap_hsmmc_reset(void) {} -#endif - -#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ - defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) - -static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, - int controller_nr) -{ - if (cpu_is_omap2420() && controller_nr == 0) { - omap_cfg_reg(H18_24XX_MMC_CMD); - omap_cfg_reg(H15_24XX_MMC_CLKI); - omap_cfg_reg(G19_24XX_MMC_CLKO); - omap_cfg_reg(F20_24XX_MMC_DAT0); - omap_cfg_reg(F19_24XX_MMC_DAT_DIR0); - omap_cfg_reg(G18_24XX_MMC_CMD_DIR); - if (mmc_controller->slots[0].wires == 4) { - omap_cfg_reg(H14_24XX_MMC_DAT1); - omap_cfg_reg(E19_24XX_MMC_DAT2); - omap_cfg_reg(D19_24XX_MMC_DAT3); - omap_cfg_reg(E20_24XX_MMC_DAT_DIR1); - omap_cfg_reg(F18_24XX_MMC_DAT_DIR2); - omap_cfg_reg(E18_24XX_MMC_DAT_DIR3); - } - - /* - * Use internal loop-back in MMC/SDIO Module Input Clock - * selection - */ - if (mmc_controller->slots[0].internal_clock) { - u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); - v |= (1 << 24); - omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); - } - } -} - -void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, - int nr_controllers) -{ - int i; - - for (i = 0; i < nr_controllers; i++) { - unsigned long base, size; - unsigned int irq = 0; - - if (!mmc_data[i]) - continue; - - omap2_mmc_mux(mmc_data[i], i); - - switch (i) { - case 0: - base = OMAP2_MMC1_BASE; - irq = INT_24XX_MMC_IRQ; - break; - case 1: - base = OMAP2_MMC2_BASE; - irq = INT_24XX_MMC2_IRQ; - break; - case 2: - if (!cpu_is_omap34xx()) - return; - base = OMAP3_MMC3_BASE; - irq = INT_34XX_MMC3_IRQ; - break; - default: - continue; - } - - if (cpu_is_omap2420()) - size = OMAP2420_MMC_SIZE; - else - size = HSMMC_SIZE; - - omap_mmc_add(i, base, size, irq, mmc_data[i]); - }; -} - -#endif - -/*-------------------------------------------------------------------------*/ - #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE) #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430) #define OMAP_HDQ_BASE 0x480B2000 @@ -502,7 +334,6 @@ static int __init omap2_init_devices(void) /* please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ - omap_hsmmc_reset(); omap_init_mbox(); omap_init_mcspi(); omap_hdq_init(); diff --git a/trunk/arch/arm/mach-omap2/mmc-twl4030.c b/trunk/arch/arm/mach-omap2/mmc-twl4030.c deleted file mode 100644 index 437f52073f6e..000000000000 --- a/trunk/arch/arm/mach-omap2/mmc-twl4030.c +++ /dev/null @@ -1,408 +0,0 @@ -/* - * linux/arch/arm/mach-omap2/mmc-twl4030.c - * - * Copyright (C) 2007-2008 Texas Instruments - * Copyright (C) 2008 Nokia Corporation - * Author: Texas Instruments - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "mmc-twl4030.h" - -#if defined(CONFIG_TWL4030_CORE) && \ - (defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)) - -#define LDO_CLR 0x00 -#define VSEL_S2_CLR 0x40 - -#define VMMC1_DEV_GRP 0x27 -#define VMMC1_CLR 0x00 -#define VMMC1_315V 0x03 -#define VMMC1_300V 0x02 -#define VMMC1_285V 0x01 -#define VMMC1_185V 0x00 -#define VMMC1_DEDICATED 0x2A - -#define VMMC2_DEV_GRP 0x2B -#define VMMC2_CLR 0x40 -#define VMMC2_315V 0x0c -#define VMMC2_300V 0x0b -#define VMMC2_285V 0x0a -#define VMMC2_260V 0x08 -#define VMMC2_185V 0x06 -#define VMMC2_DEDICATED 0x2E - -#define VMMC_DEV_GRP_P1 0x20 - -static u16 control_pbias_offset; -static u16 control_devconf1_offset; - -#define HSMMC_NAME_LEN 9 - -static struct twl_mmc_controller { - struct omap_mmc_platform_data *mmc; - u8 twl_vmmc_dev_grp; - u8 twl_mmc_dedicated; - char name[HSMMC_NAME_LEN]; -} hsmmc[] = { - { - .twl_vmmc_dev_grp = VMMC1_DEV_GRP, - .twl_mmc_dedicated = VMMC1_DEDICATED, - }, - { - .twl_vmmc_dev_grp = VMMC2_DEV_GRP, - .twl_mmc_dedicated = VMMC2_DEDICATED, - }, -}; - -static int twl_mmc_card_detect(int irq) -{ - unsigned i; - - for (i = 0; i < ARRAY_SIZE(hsmmc); i++) { - struct omap_mmc_platform_data *mmc; - - mmc = hsmmc[i].mmc; - if (!mmc) - continue; - if (irq != mmc->slots[0].card_detect_irq) - continue; - - /* NOTE: assumes card detect signal is active-low */ - return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); - } - return -ENOSYS; -} - -static int twl_mmc_get_ro(struct device *dev, int slot) -{ - struct omap_mmc_platform_data *mmc = dev->platform_data; - - /* NOTE: assumes write protect signal is active-high */ - return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); -} - -/* - * MMC Slot Initialization. - */ -static int twl_mmc_late_init(struct device *dev) -{ - struct omap_mmc_platform_data *mmc = dev->platform_data; - int ret = 0; - int i; - - ret = gpio_request(mmc->slots[0].switch_pin, "mmc_cd"); - if (ret) - goto done; - ret = gpio_direction_input(mmc->slots[0].switch_pin); - if (ret) - goto err; - - for (i = 0; i < ARRAY_SIZE(hsmmc); i++) { - if (hsmmc[i].name == mmc->slots[0].name) { - hsmmc[i].mmc = mmc; - break; - } - } - - return 0; - -err: - gpio_free(mmc->slots[0].switch_pin); -done: - mmc->slots[0].card_detect_irq = 0; - mmc->slots[0].card_detect = NULL; - - dev_err(dev, "err %d configuring card detect\n", ret); - return ret; -} - -static void twl_mmc_cleanup(struct device *dev) -{ - struct omap_mmc_platform_data *mmc = dev->platform_data; - - gpio_free(mmc->slots[0].switch_pin); -} - -#ifdef CONFIG_PM - -static int twl_mmc_suspend(struct device *dev, int slot) -{ - struct omap_mmc_platform_data *mmc = dev->platform_data; - - disable_irq(mmc->slots[0].card_detect_irq); - return 0; -} - -static int twl_mmc_resume(struct device *dev, int slot) -{ - struct omap_mmc_platform_data *mmc = dev->platform_data; - - enable_irq(mmc->slots[0].card_detect_irq); - return 0; -} - -#else -#define twl_mmc_suspend NULL -#define twl_mmc_resume NULL -#endif - -/* - * Sets the MMC voltage in twl4030 - */ -static int twl_mmc_set_voltage(struct twl_mmc_controller *c, int vdd) -{ - int ret; - u8 vmmc, dev_grp_val; - - switch (1 << vdd) { - case MMC_VDD_35_36: - case MMC_VDD_34_35: - case MMC_VDD_33_34: - case MMC_VDD_32_33: - case MMC_VDD_31_32: - case MMC_VDD_30_31: - if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP) - vmmc = VMMC1_315V; - else - vmmc = VMMC2_315V; - break; - case MMC_VDD_29_30: - if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP) - vmmc = VMMC1_315V; - else - vmmc = VMMC2_300V; - break; - case MMC_VDD_27_28: - case MMC_VDD_26_27: - if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP) - vmmc = VMMC1_285V; - else - vmmc = VMMC2_285V; - break; - case MMC_VDD_25_26: - case MMC_VDD_24_25: - case MMC_VDD_23_24: - case MMC_VDD_22_23: - case MMC_VDD_21_22: - case MMC_VDD_20_21: - if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP) - vmmc = VMMC1_285V; - else - vmmc = VMMC2_260V; - break; - case MMC_VDD_165_195: - if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP) - vmmc = VMMC1_185V; - else - vmmc = VMMC2_185V; - break; - default: - vmmc = 0; - break; - } - - if (vmmc) - dev_grp_val = VMMC_DEV_GRP_P1; /* Power up */ - else - dev_grp_val = LDO_CLR; /* Power down */ - - ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, - dev_grp_val, c->twl_vmmc_dev_grp); - if (ret) - return ret; - - ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, - vmmc, c->twl_mmc_dedicated); - - return ret; -} - -static int twl_mmc1_set_power(struct device *dev, int slot, int power_on, - int vdd) -{ - u32 reg; - int ret = 0; - struct twl_mmc_controller *c = &hsmmc[0]; - struct omap_mmc_platform_data *mmc = dev->platform_data; - - if (power_on) { - if (cpu_is_omap2430()) { - reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1); - if ((1 << vdd) >= MMC_VDD_30_31) - reg |= OMAP243X_MMC1_ACTIVE_OVERWRITE; - else - reg &= ~OMAP243X_MMC1_ACTIVE_OVERWRITE; - omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1); - } - - if (mmc->slots[0].internal_clock) { - reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); - reg |= OMAP2_MMCSDIO1ADPCLKISEL; - omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0); - } - - reg = omap_ctrl_readl(control_pbias_offset); - reg |= OMAP2_PBIASSPEEDCTRL0; - reg &= ~OMAP2_PBIASLITEPWRDNZ0; - omap_ctrl_writel(reg, control_pbias_offset); - - ret = twl_mmc_set_voltage(c, vdd); - - /* 100ms delay required for PBIAS configuration */ - msleep(100); - reg = omap_ctrl_readl(control_pbias_offset); - reg |= (OMAP2_PBIASLITEPWRDNZ0 | OMAP2_PBIASSPEEDCTRL0); - if ((1 << vdd) <= MMC_VDD_165_195) - reg &= ~OMAP2_PBIASLITEVMODE0; - else - reg |= OMAP2_PBIASLITEVMODE0; - omap_ctrl_writel(reg, control_pbias_offset); - } else { - reg = omap_ctrl_readl(control_pbias_offset); - reg &= ~OMAP2_PBIASLITEPWRDNZ0; - omap_ctrl_writel(reg, control_pbias_offset); - - ret = twl_mmc_set_voltage(c, 0); - - /* 100ms delay required for PBIAS configuration */ - msleep(100); - reg = omap_ctrl_readl(control_pbias_offset); - reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0 | - OMAP2_PBIASLITEVMODE0); - omap_ctrl_writel(reg, control_pbias_offset); - } - - return ret; -} - -static int twl_mmc2_set_power(struct device *dev, int slot, int power_on, int vdd) -{ - int ret; - struct twl_mmc_controller *c = &hsmmc[1]; - struct omap_mmc_platform_data *mmc = dev->platform_data; - - if (power_on) { - if (mmc->slots[0].internal_clock) { - u32 reg; - - reg = omap_ctrl_readl(control_devconf1_offset); - reg |= OMAP2_MMCSDIO2ADPCLKISEL; - omap_ctrl_writel(reg, control_devconf1_offset); - } - ret = twl_mmc_set_voltage(c, vdd); - } else { - ret = twl_mmc_set_voltage(c, 0); - } - - return ret; -} - -static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata; - -void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers) -{ - struct twl4030_hsmmc_info *c; - int nr_hsmmc = ARRAY_SIZE(hsmmc_data); - - if (cpu_is_omap2430()) { - control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE; - control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1; - nr_hsmmc = 2; - } else { - control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE; - control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1; - } - - for (c = controllers; c->mmc; c++) { - struct twl_mmc_controller *twl = hsmmc + c->mmc - 1; - struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1]; - - if (!c->mmc || c->mmc > nr_hsmmc) { - pr_debug("MMC%d: no such controller\n", c->mmc); - continue; - } - if (mmc) { - pr_debug("MMC%d: already configured\n", c->mmc); - continue; - } - - mmc = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL); - if (!mmc) { - pr_err("Cannot allocate memory for mmc device!\n"); - return; - } - - sprintf(twl->name, "mmc%islot%i", c->mmc, 1); - mmc->slots[0].name = twl->name; - mmc->nr_slots = 1; - mmc->slots[0].ocr_mask = MMC_VDD_165_195 | - MMC_VDD_26_27 | MMC_VDD_27_28 | - MMC_VDD_29_30 | - MMC_VDD_30_31 | MMC_VDD_31_32; - mmc->slots[0].wires = c->wires; - mmc->slots[0].internal_clock = !c->ext_clock; - mmc->dma_mask = 0xffffffff; - - /* note: twl4030 card detect GPIOs normally switch VMMCx ... */ - if (gpio_is_valid(c->gpio_cd)) { - mmc->init = twl_mmc_late_init; - mmc->cleanup = twl_mmc_cleanup; - mmc->suspend = twl_mmc_suspend; - mmc->resume = twl_mmc_resume; - - mmc->slots[0].switch_pin = c->gpio_cd; - mmc->slots[0].card_detect_irq = gpio_to_irq(c->gpio_cd); - mmc->slots[0].card_detect = twl_mmc_card_detect; - } else - mmc->slots[0].switch_pin = -EINVAL; - - /* write protect normally uses an OMAP gpio */ - if (gpio_is_valid(c->gpio_wp)) { - gpio_request(c->gpio_wp, "mmc_wp"); - gpio_direction_input(c->gpio_wp); - - mmc->slots[0].gpio_wp = c->gpio_wp; - mmc->slots[0].get_ro = twl_mmc_get_ro; - } else - mmc->slots[0].gpio_wp = -EINVAL; - - /* NOTE: we assume OMAP's MMC1 and MMC2 use - * the TWL4030's VMMC1 and VMMC2, respectively; - * and that OMAP's MMC3 isn't used. - */ - - switch (c->mmc) { - case 1: - mmc->slots[0].set_power = twl_mmc1_set_power; - break; - case 2: - mmc->slots[0].set_power = twl_mmc2_set_power; - break; - default: - pr_err("MMC%d configuration not supported!\n", c->mmc); - continue; - } - hsmmc_data[c->mmc - 1] = mmc; - } - - omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC); -} - -#endif diff --git a/trunk/arch/arm/mach-omap2/mmc-twl4030.h b/trunk/arch/arm/mach-omap2/mmc-twl4030.h deleted file mode 100644 index e1c8076400ca..000000000000 --- a/trunk/arch/arm/mach-omap2/mmc-twl4030.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * MMC definitions for OMAP2 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -struct twl4030_hsmmc_info { - u8 mmc; /* controller 1/2/3 */ - u8 wires; /* 1/4/8 wires */ - int gpio_cd; /* or -EINVAL */ - int gpio_wp; /* or -EINVAL */ - int ext_clock:1; /* use external pin for input clock */ -}; - -#if defined(CONFIG_TWL4030_CORE) && \ - (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ - defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)) - -void twl4030_mmc_init(struct twl4030_hsmmc_info *); - -#else - -static inline void twl4030_mmc_init(struct twl4030_hsmmc_info *info) -{ -} - -#endif diff --git a/trunk/arch/arm/mach-pxa/include/mach/reset.h b/trunk/arch/arm/mach-pxa/include/mach/reset.h index 31e6a7b6ad80..7b8842cfa5fc 100644 --- a/trunk/arch/arm/mach-pxa/include/mach/reset.h +++ b/trunk/arch/arm/mach-pxa/include/mach/reset.h @@ -12,8 +12,9 @@ extern void clear_reset_status(unsigned int mask); /** * init_gpio_reset() - register GPIO as reset generator - * @gpio: gpio nr - * @output: set gpio as out/low instead of input during normal work + * + * @gpio - gpio nr + * @output - set gpio as out/low instead of input during normal work */ extern int init_gpio_reset(int gpio, int output); diff --git a/trunk/arch/arm/mm/fault.c b/trunk/arch/arm/mm/fault.c index 0455557a2899..ffd8b228a139 100644 --- a/trunk/arch/arm/mm/fault.c +++ b/trunk/arch/arm/mm/fault.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/trunk/arch/arm/plat-mxc/dma-mx1-mx2.c b/trunk/arch/arm/plat-mxc/dma-mx1-mx2.c index 214274344442..e1c2eb497fbc 100644 --- a/trunk/arch/arm/plat-mxc/dma-mx1-mx2.c +++ b/trunk/arch/arm/plat-mxc/dma-mx1-mx2.c @@ -34,7 +34,6 @@ #include #include #include -#include #include #define DMA_DCR 0x00 /* Control Register */ @@ -114,7 +113,7 @@ struct imx_dma_channel { void (*err_handler) (int, void *, int errcode); void (*prog_handler) (int, void *, struct scatterlist *); void *data; - dmamode_t dma_mode; + unsigned int dma_mode; struct scatterlist *sg; unsigned int resbytes; int dma_num; @@ -193,7 +192,7 @@ static inline int imx_dma_sg_next(int channel, struct scatterlist *sg) int imx_dma_setup_single(int channel, dma_addr_t dma_address, unsigned int dma_length, unsigned int dev_addr, - dmamode_t dmamode) + unsigned int dmamode) { struct imx_dma_channel *imxdma = &imx_dma_channels[channel]; @@ -288,7 +287,7 @@ int imx_dma_setup_sg(int channel, struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length, unsigned int dev_addr, - dmamode_t dmamode) + unsigned int dmamode) { struct imx_dma_channel *imxdma = &imx_dma_channels[channel]; diff --git a/trunk/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h b/trunk/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h index 6cc6f0c8cb25..b3876cc238ca 100644 --- a/trunk/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h +++ b/trunk/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h @@ -22,13 +22,15 @@ * MA 02110-1301, USA. */ -#include - #ifndef __ASM_ARCH_MXC_DMA_H #define __ASM_ARCH_MXC_DMA_H #define IMX_DMA_CHANNELS 16 +#define DMA_MODE_READ 0 +#define DMA_MODE_WRITE 1 +#define DMA_MODE_MASK 1 + #define DMA_BASE IO_ADDRESS(DMA_BASE_ADDR) #define IMX_DMA_MEMSIZE_32 (0 << 4) @@ -54,12 +56,12 @@ imx_dma_config_burstlen(int channel, unsigned int burstlen); int imx_dma_setup_single(int channel, dma_addr_t dma_address, unsigned int dma_length, unsigned int dev_addr, - dmamode_t dmamode); + unsigned int dmamode); int imx_dma_setup_sg(int channel, struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length, - unsigned int dev_addr, dmamode_t dmamode); + unsigned int dev_addr, unsigned int dmamode); int imx_dma_setup_handlers(int channel, diff --git a/trunk/arch/arm/plat-omap/devices.c b/trunk/arch/arm/plat-omap/devices.c index ac15c23fd5da..0cb2b22388e9 100644 --- a/trunk/arch/arm/plat-omap/devices.c +++ b/trunk/arch/arm/plat-omap/devices.c @@ -192,48 +192,202 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, /*-------------------------------------------------------------------------*/ -#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ +#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) -#define OMAP_MMC_NR_RES 2 +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) +#define OMAP_MMC1_BASE 0x4809c000 +#define OMAP_MMC1_END (OMAP_MMC1_BASE + 0x1fc) +#define OMAP_MMC1_INT INT_24XX_MMC_IRQ -/* - * Register MMC devices. Called from mach-omap1 and mach-omap2 device init. - */ -int __init omap_mmc_add(int id, unsigned long base, unsigned long size, - unsigned int irq, struct omap_mmc_platform_data *data) +#define OMAP_MMC2_BASE 0x480b4000 +#define OMAP_MMC2_END (OMAP_MMC2_BASE + 0x1fc) +#define OMAP_MMC2_INT INT_24XX_MMC2_IRQ + +#else + +#define OMAP_MMC1_BASE 0xfffb7800 +#define OMAP_MMC1_END (OMAP_MMC1_BASE + 0x7f) +#define OMAP_MMC1_INT INT_MMC + +#define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */ +#define OMAP_MMC2_END (OMAP_MMC2_BASE + 0x7f) +#define OMAP_MMC2_INT INT_1610_MMC2 + +#endif + +static struct omap_mmc_platform_data mmc1_data; + +static u64 mmc1_dmamask = 0xffffffff; + +static struct resource mmc1_resources[] = { + { + .start = OMAP_MMC1_BASE, + .end = OMAP_MMC1_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP_MMC1_INT, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mmc_omap_device1 = { + .name = "mmci-omap", + .id = 1, + .dev = { + .dma_mask = &mmc1_dmamask, + .platform_data = &mmc1_data, + }, + .num_resources = ARRAY_SIZE(mmc1_resources), + .resource = mmc1_resources, +}; + +#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \ + defined(CONFIG_ARCH_OMAP34XX) + +static struct omap_mmc_platform_data mmc2_data; + +static u64 mmc2_dmamask = 0xffffffff; + +static struct resource mmc2_resources[] = { + { + .start = OMAP_MMC2_BASE, + .end = OMAP_MMC2_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP_MMC2_INT, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mmc_omap_device2 = { + .name = "mmci-omap", + .id = 2, + .dev = { + .dma_mask = &mmc2_dmamask, + .platform_data = &mmc2_data, + }, + .num_resources = ARRAY_SIZE(mmc2_resources), + .resource = mmc2_resources, +}; +#endif + +static inline void omap_init_mmc_conf(const struct omap_mmc_config *mmc_conf) { - struct platform_device *pdev; - struct resource res[OMAP_MMC_NR_RES]; - int ret; - - pdev = platform_device_alloc("mmci-omap", id); - if (!pdev) - return -ENOMEM; - - memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource)); - res[0].start = base; - res[0].end = base + size - 1; - res[0].flags = IORESOURCE_MEM; - res[1].start = res[1].end = irq; - res[1].flags = IORESOURCE_IRQ; - - ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); - if (ret == 0) - ret = platform_device_add_data(pdev, data, sizeof(*data)); - if (ret) - goto fail; - - ret = platform_device_add(pdev); - if (ret) - goto fail; - return 0; + if (cpu_is_omap2430() || cpu_is_omap34xx()) + return; -fail: - platform_device_put(pdev); - return ret; + if (mmc_conf->mmc[0].enabled) { + if (cpu_is_omap24xx()) { + omap_cfg_reg(H18_24XX_MMC_CMD); + omap_cfg_reg(H15_24XX_MMC_CLKI); + omap_cfg_reg(G19_24XX_MMC_CLKO); + omap_cfg_reg(F20_24XX_MMC_DAT0); + omap_cfg_reg(F19_24XX_MMC_DAT_DIR0); + omap_cfg_reg(G18_24XX_MMC_CMD_DIR); + } else { + omap_cfg_reg(MMC_CMD); + omap_cfg_reg(MMC_CLK); + omap_cfg_reg(MMC_DAT0); + if (cpu_is_omap1710()) { + omap_cfg_reg(M15_1710_MMC_CLKI); + omap_cfg_reg(P19_1710_MMC_CMDDIR); + omap_cfg_reg(P20_1710_MMC_DATDIR0); + } + } + if (mmc_conf->mmc[0].wire4) { + if (cpu_is_omap24xx()) { + omap_cfg_reg(H14_24XX_MMC_DAT1); + omap_cfg_reg(E19_24XX_MMC_DAT2); + omap_cfg_reg(D19_24XX_MMC_DAT3); + omap_cfg_reg(E20_24XX_MMC_DAT_DIR1); + omap_cfg_reg(F18_24XX_MMC_DAT_DIR2); + omap_cfg_reg(E18_24XX_MMC_DAT_DIR3); + } else { + omap_cfg_reg(MMC_DAT1); + /* NOTE: DAT2 can be on W10 (here) or M15 */ + if (!mmc_conf->mmc[0].nomux) + omap_cfg_reg(MMC_DAT2); + omap_cfg_reg(MMC_DAT3); + } + } + } + +#ifdef CONFIG_ARCH_OMAP16XX + /* block 2 is on newer chips, and has many pinout options */ + if (mmc_conf->mmc[1].enabled) { + if (!mmc_conf->mmc[1].nomux) { + omap_cfg_reg(Y8_1610_MMC2_CMD); + omap_cfg_reg(Y10_1610_MMC2_CLK); + omap_cfg_reg(R18_1610_MMC2_CLKIN); + omap_cfg_reg(W8_1610_MMC2_DAT0); + if (mmc_conf->mmc[1].wire4) { + omap_cfg_reg(V8_1610_MMC2_DAT1); + omap_cfg_reg(W15_1610_MMC2_DAT2); + omap_cfg_reg(R10_1610_MMC2_DAT3); + } + + /* These are needed for the level shifter */ + omap_cfg_reg(V9_1610_MMC2_CMDDIR); + omap_cfg_reg(V5_1610_MMC2_DATDIR0); + omap_cfg_reg(W19_1610_MMC2_DATDIR1); + } + + /* Feedback clock must be set on OMAP-1710 MMC2 */ + if (cpu_is_omap1710()) + omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24), + MOD_CONF_CTRL_1); + } +#endif } +static void __init omap_init_mmc(void) +{ + const struct omap_mmc_config *mmc_conf; + + /* NOTE: assumes MMC was never (wrongly) enabled */ + mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config); + if (!mmc_conf) + return; + + omap_init_mmc_conf(mmc_conf); + + if (mmc_conf->mmc[0].enabled) { + mmc1_data.conf = mmc_conf->mmc[0]; + (void) platform_device_register(&mmc_omap_device1); + } + +#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \ + defined(CONFIG_ARCH_OMAP34XX) + if (mmc_conf->mmc[1].enabled) { + mmc2_data.conf = mmc_conf->mmc[1]; + (void) platform_device_register(&mmc_omap_device2); + } +#endif +} + +void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info) +{ + switch (host) { + case 1: + mmc1_data = *info; + break; +#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \ + defined(CONFIG_ARCH_OMAP34XX) + case 2: + mmc2_data = *info; + break; +#endif + default: + BUG(); + } +} + +#else +static inline void omap_init_mmc(void) {} +void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info) {} #endif /*-------------------------------------------------------------------------*/ @@ -378,6 +532,7 @@ static int __init omap_init_devices(void) */ omap_init_dsp(); omap_init_kp(); + omap_init_mmc(); omap_init_uwire(); omap_init_wdt(); omap_init_rng(); diff --git a/trunk/arch/arm/plat-omap/include/mach/board-h2.h b/trunk/arch/arm/plat-omap/include/mach/board-h2.h index 15531c8dc0e6..2a050e9be65f 100644 --- a/trunk/arch/arm/plat-omap/include/mach/board-h2.h +++ b/trunk/arch/arm/plat-omap/include/mach/board-h2.h @@ -29,13 +29,13 @@ #ifndef __ASM_ARCH_OMAP_H2_H #define __ASM_ARCH_OMAP_H2_H +/* Placeholder for H2 specific defines */ + /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ #define OMAP1610_ETHR_START 0x04000300 -#define H2_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */) -# define H2_TPS_GPIO_MMC_PWR_EN (H2_TPS_GPIO_BASE + 3) - extern void h2_mmc_init(void); +extern void h2_mmc_slot_cover_handler(void *arg, int state); #endif /* __ASM_ARCH_OMAP_H2_H */ diff --git a/trunk/arch/arm/plat-omap/include/mach/board.h b/trunk/arch/arm/plat-omap/include/mach/board.h index 9466772fc7c8..c23c12ccb353 100644 --- a/trunk/arch/arm/plat-omap/include/mach/board.h +++ b/trunk/arch/arm/plat-omap/include/mach/board.h @@ -16,6 +16,7 @@ /* Different peripheral ids */ #define OMAP_TAG_CLOCK 0x4f01 +#define OMAP_TAG_MMC 0x4f02 #define OMAP_TAG_SERIAL_CONSOLE 0x4f03 #define OMAP_TAG_USB 0x4f04 #define OMAP_TAG_LCD 0x4f05 @@ -34,6 +35,27 @@ struct omap_clock_config { u8 system_clock_type; }; +struct omap_mmc_conf { + unsigned enabled:1; + /* nomux means "standard" muxing is wrong on this board, and that + * board-specific code handled it before common init logic. + */ + unsigned nomux:1; + /* switch pin can be for card detect (default) or card cover */ + unsigned cover:1; + /* 4 wire signaling is optional, and is only used for SD/SDIO */ + unsigned wire4:1; + /* use the internal clock */ + unsigned internal_clock:1; + s16 power_pin; + s16 switch_pin; + s16 wp_pin; +}; + +struct omap_mmc_config { + struct omap_mmc_conf mmc[2]; +}; + struct omap_serial_console_config { u8 console_uart; u32 console_speed; diff --git a/trunk/arch/arm/plat-omap/include/mach/control.h b/trunk/arch/arm/plat-omap/include/mach/control.h index 269147f3836f..dc9886760577 100644 --- a/trunk/arch/arm/plat-omap/include/mach/control.h +++ b/trunk/arch/arm/plat-omap/include/mach/control.h @@ -74,7 +74,6 @@ #define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) #define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) #define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198) -#define OMAP243X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x0230) /* 24xx-only CONTROL_GENERAL register offsets */ #define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000) @@ -141,7 +140,6 @@ #define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) -#define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02b0) #define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4) /* @@ -156,14 +154,11 @@ * and the security mode (secure, non-secure, don't care) */ /* CONTROL_DEVCONF0 bits */ -#define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */ #define OMAP24XX_USBSTANDBYCTRL (1 << 15) #define OMAP2_MCBSP2_CLKS_MASK (1 << 6) #define OMAP2_MCBSP1_CLKS_MASK (1 << 2) /* CONTROL_DEVCONF1 bits */ -#define OMAP243X_MMC1_ACTIVE_OVERWRITE (1 << 31) -#define OMAP2_MMCSDIO2ADPCLKISEL (1 << 6) /* MMC2 loop back clock */ #define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */ #define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */ #define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */ @@ -177,18 +172,6 @@ #define OMAP2_SYSBOOT_1_MASK (1 << 1) #define OMAP2_SYSBOOT_0_MASK (1 << 0) -/* CONTROL_PBIAS_LITE bits */ -#define OMAP343X_PBIASLITESUPPLY_HIGH1 (1 << 15) -#define OMAP343X_PBIASLITEVMODEERROR1 (1 << 11) -#define OMAP343X_PBIASSPEEDCTRL1 (1 << 10) -#define OMAP343X_PBIASLITEPWRDNZ1 (1 << 9) -#define OMAP343X_PBIASLITEVMODE1 (1 << 8) -#define OMAP343X_PBIASLITESUPPLY_HIGH0 (1 << 7) -#define OMAP343X_PBIASLITEVMODEERROR0 (1 << 3) -#define OMAP2_PBIASSPEEDCTRL0 (1 << 2) -#define OMAP2_PBIASLITEPWRDNZ0 (1 << 1) -#define OMAP2_PBIASLITEVMODE0 (1 << 0) - #ifndef __ASSEMBLY__ #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) extern void __iomem *omap_ctrl_base_get(void); diff --git a/trunk/arch/arm/plat-omap/include/mach/mmc.h b/trunk/arch/arm/plat-omap/include/mach/mmc.h index 031250f02805..fc15d13058fc 100644 --- a/trunk/arch/arm/plat-omap/include/mach/mmc.h +++ b/trunk/arch/arm/plat-omap/include/mach/mmc.h @@ -17,28 +17,12 @@ #include -#define OMAP15XX_NR_MMC 1 -#define OMAP16XX_NR_MMC 2 -#define OMAP1_MMC_SIZE 0x080 -#define OMAP1_MMC1_BASE 0xfffb7800 -#define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */ - -#define OMAP24XX_NR_MMC 2 -#define OMAP34XX_NR_MMC 3 -#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE -#define HSMMC_SIZE 0x200 -#define OMAP2_MMC1_BASE 0x4809c000 -#define OMAP2_MMC2_BASE 0x480b4000 -#define OMAP3_MMC3_BASE 0x480ad000 -#define HSMMC3 (1 << 2) -#define HSMMC2 (1 << 1) -#define HSMMC1 (1 << 0) - #define OMAP_MMC_MAX_SLOTS 2 struct omap_mmc_platform_data { + struct omap_mmc_conf conf; - /* number of slots per controller */ + /* number of slots on board */ unsigned nr_slots:2; /* set if your board has components or wiring that limits the @@ -57,31 +41,7 @@ struct omap_mmc_platform_data { int (*suspend)(struct device *dev, int slot); int (*resume)(struct device *dev, int slot); - u64 dma_mask; - struct omap_mmc_slot_data { - - /* 4 wire signaling is optional, and is used for SD/SDIO/HSMMC; - * 8 wire signaling is also optional, and is used with HSMMC - */ - u8 wires; - - /* - * nomux means "standard" muxing is wrong on this board, and - * that board-specific code handled it before common init logic. - */ - unsigned nomux:1; - - /* switch pin can be for card detect (default) or card cover */ - unsigned cover:1; - - /* use the internal clock */ - unsigned internal_clock:1; - s16 power_pin; - - int switch_pin; /* gpio (card detect) */ - int gpio_wp; /* gpio (write protect) */ - int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); int (* set_power)(struct device *dev, int slot, int power_on, int vdd); int (* get_ro)(struct device *dev, int slot); @@ -89,8 +49,8 @@ struct omap_mmc_platform_data { /* return MMC cover switch state, can be NULL if not supported. * * possible return values: - * 0 - closed - * 1 - open + * 0 - open + * 1 - closed */ int (* get_cover_state)(struct device *dev, int slot); @@ -106,31 +66,9 @@ struct omap_mmc_platform_data { } slots[OMAP_MMC_MAX_SLOTS]; }; +extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info); + /* called from board-specific card detection service routine */ extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); -#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ - defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) -void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, - int nr_controllers); -void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, - int nr_controllers); -int omap_mmc_add(int id, unsigned long base, unsigned long size, - unsigned int irq, struct omap_mmc_platform_data *data); -#else -static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, - int nr_controllers) -{ -} -static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, - int nr_controllers) -{ -} -static inline int omap_mmc_add(int id, unsigned long base, unsigned long size, - unsigned int irq, struct omap_mmc_platform_data *data) -{ - return 0; -} - -#endif #endif diff --git a/trunk/arch/ia64/hp/sim/Kconfig b/trunk/arch/ia64/hp/sim/Kconfig index 8d513a8c5266..f92306bbedb8 100644 --- a/trunk/arch/ia64/hp/sim/Kconfig +++ b/trunk/arch/ia64/hp/sim/Kconfig @@ -4,7 +4,6 @@ menu "HP Simulator drivers" config HP_SIMETH bool "Simulated Ethernet " - depends on NET config HP_SIMSERIAL bool "Simulated serial driver support" diff --git a/trunk/arch/mips/Kconfig.debug b/trunk/arch/mips/Kconfig.debug index 364ca8938807..765c8e287d2b 100644 --- a/trunk/arch/mips/Kconfig.debug +++ b/trunk/arch/mips/Kconfig.debug @@ -48,7 +48,7 @@ config RUNTIME_DEBUG help If you say Y here, some debugging macros will do run-time checking. If you say N here, those macros will mostly turn to no-ops. See - arch/mips/include/asm/debug.h for debugging macros. + include/asm-mips/debug.h for debuging macros. If unsure, say N. endmenu diff --git a/trunk/arch/mips/configs/ip32_defconfig b/trunk/arch/mips/configs/ip32_defconfig index de4c7a0a96dd..fe4699df9626 100644 --- a/trunk/arch/mips/configs/ip32_defconfig +++ b/trunk/arch/mips/configs/ip32_defconfig @@ -1,71 +1,71 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.28-rc7 -# Wed Dec 10 14:39:08 2008 +# Linux kernel version: 2.6.20 +# Tue Feb 20 21:47:33 2007 # CONFIG_MIPS=y # # Machine selection # -# CONFIG_MACH_ALCHEMY is not set +CONFIG_ZONE_DMA=y +# CONFIG_MIPS_MTX1 is not set +# CONFIG_MIPS_BOSPORUS is not set +# CONFIG_MIPS_PB1000 is not set +# CONFIG_MIPS_PB1100 is not set +# CONFIG_MIPS_PB1500 is not set +# CONFIG_MIPS_PB1550 is not set +# CONFIG_MIPS_PB1200 is not set +# CONFIG_MIPS_DB1000 is not set +# CONFIG_MIPS_DB1100 is not set +# CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set +# CONFIG_MIPS_DB1200 is not set +# CONFIG_MIPS_MIRAGE is not set # CONFIG_BASLER_EXCITE is not set -# CONFIG_BCM47XX is not set # CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set # CONFIG_MACH_JAZZ is not set -# CONFIG_LASAT is not set -# CONFIG_LEMOTE_FULONG is not set # CONFIG_MIPS_MALTA is not set +# CONFIG_WR_PPMC is not set # CONFIG_MIPS_SIM is not set -# CONFIG_MACH_EMMA is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set +# CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_MIPS_XXS1500 is not set # CONFIG_PNX8550_JBS is not set # CONFIG_PNX8550_STB810 is not set -# CONFIG_PMC_MSP is not set +# CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_MARKEINS is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set CONFIG_SGI_IP32=y -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_BIGSUR is not set # CONFIG_SIBYTE_SWARM is not set -# CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CRHONE is not set # CONFIG_SNI_RM is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MIKROTIK_RB532 is not set -# CONFIG_WR_PPMC is not set +# CONFIG_TOSHIBA_JMR3927 is not set +# CONFIG_TOSHIBA_RBTX4927 is not set +# CONFIG_TOSHIBA_RBTX4938 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y CONFIG_GENERIC_FIND_NEXT_BIT=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y # CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set CONFIG_ARC=y -CONFIG_CEVT_R4K=y -CONFIG_CSRC_R4K=y CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NEED_PCI_MAP_STATE=y -# CONFIG_HOTPLUG_CPU is not set -# CONFIG_NO_IOPORT is not set CONFIG_CPU_BIG_ENDIAN=y # CONFIG_CPU_LITTLE_ENDIAN is not set CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_IRQ_CPU=y CONFIG_ARC32=y CONFIG_BOOT_ELF32=y CONFIG_MIPS_L1_CACHE_SHIFT=5 @@ -75,7 +75,6 @@ CONFIG_ARC_PROMLIB=y # # CPU selection # -# CONFIG_CPU_LOONGSON2 is not set # CONFIG_CPU_MIPS32_R1 is not set # CONFIG_CPU_MIPS32_R2 is not set # CONFIG_CPU_MIPS64_R1 is not set @@ -88,7 +87,6 @@ CONFIG_ARC_PROMLIB=y # CONFIG_CPU_TX49XX is not set CONFIG_CPU_R5000=y # CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5500 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_NEVADA is not set # CONFIG_CPU_R8000 is not set @@ -118,73 +116,65 @@ CONFIG_RM7000_CPU_SCACHE=y CONFIG_MIPS_MT_DISABLED=y # CONFIG_MIPS_MT_SMP is not set # CONFIG_MIPS_MT_SMTC is not set +# CONFIG_MIPS_VPE_LOADER is not set CONFIG_CPU_HAS_LLSC=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_ARCH_FLATMEM_ENABLE=y -CONFIG_ARCH_POPULATES_NODE_MAP=y CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y +# CONFIG_SPARSEMEM_STATIC is not set CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_RESOURCES_64BIT=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -CONFIG_UNEVICTABLE_LRU=y -# CONFIG_NO_HZ is not set -# CONFIG_HIGH_RES_TIMERS is not set -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_ZONE_DMA_FLAG=1 # CONFIG_HZ_48 is not set # CONFIG_HZ_100 is not set # CONFIG_HZ_128 is not set -CONFIG_HZ_250=y +# CONFIG_HZ_250 is not set # CONFIG_HZ_256 is not set -# CONFIG_HZ_1000 is not set +CONFIG_HZ_1000=y # CONFIG_HZ_1024 is not set CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_HZ=250 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_HZ=1000 +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT is not set # CONFIG_KEXEC is not set -# CONFIG_SECCOMP is not set CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# General setup +# Code maturity level options # CONFIG_EXPERIMENTAL=y CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y +# CONFIG_POSIX_MQUEUE is not set CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set # CONFIG_TASKSTATS is not set -CONFIG_AUDIT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CGROUPS is not set -# CONFIG_GROUP_SCHED is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set CONFIG_SYSFS_DEPRECATED=y -CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_RELAY=y -# CONFIG_NAMESPACES is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_EMBEDDED=y CONFIG_SYSCTL_SYSCALL=y @@ -194,43 +184,27 @@ CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_PCSPKR_PLATFORM=y -CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y -CONFIG_ANON_INODES=y CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_PCI_QUIRKS=y CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_PROFILING=y -# CONFIG_MARKERS is not set -CONFIG_OPROFILE=m -CONFIG_HAVE_OPROFILE=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_SLABINFO=y +CONFIG_VM_EVENT_COUNTERS=y CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y +# CONFIG_SLOB is not set + +# +# Loadable module support +# +# CONFIG_MODULES is not set + +# +# Block layer +# CONFIG_BLOCK=y # CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set -CONFIG_BLOCK_COMPAT=y # # IO Schedulers @@ -239,50 +213,59 @@ CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set +CONFIG_DEFAULT_AS=y # CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_CFQ is not set # CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -CONFIG_CLASSIC_RCU=y -# CONFIG_FREEZER is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # CONFIG_HW_HAS_PCI=y CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCI_LEGACY is not set CONFIG_MMU=y + +# +# PCCARD (PCMCIA/CardBus) support +# # CONFIG_PCCARD is not set + +# +# PCI Hotplug Support +# # CONFIG_HOTPLUG_PCI is not set # # Executable file formats # CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -# CONFIG_HAVE_AOUT is not set CONFIG_BINFMT_MISC=y +# CONFIG_BUILD_ELF64 is not set CONFIG_MIPS32_COMPAT=y CONFIG_COMPAT=y CONFIG_SYSVIPC_COMPAT=y CONFIG_MIPS32_O32=y -CONFIG_MIPS32_N32=y +# CONFIG_MIPS32_N32 is not set CONFIG_BINFMT_ELF32=y # # Power management options # -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# CONFIG_PM is not set +CONFIG_PM=y +# CONFIG_PM_LEGACY is not set +# CONFIG_PM_DEBUG is not set +# CONFIG_PM_SYSFS_DEPRECATED is not set + +# +# Networking +# CONFIG_NET=y # # Networking options # +# CONFIG_NETDEBUG is not set CONFIG_PACKET=y CONFIG_PACKET_MMAP=y CONFIG_UNIX=y @@ -290,83 +273,56 @@ CONFIG_XFRM=y CONFIG_XFRM_USER=y # CONFIG_XFRM_SUB_POLICY is not set CONFIG_XFRM_MIGRATE=y -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_IPCOMP=m CONFIG_NET_KEY=y CONFIG_NET_KEY_MIGRATE=y CONFIG_INET=y -CONFIG_IP_MULTICAST=y +# CONFIG_IP_MULTICAST is not set # CONFIG_IP_ADVANCED_ROUTER is not set CONFIG_IP_FIB_HASH=y CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_DHCP is not set CONFIG_IP_PNP_BOOTP=y # CONFIG_IP_PNP_RARP is not set -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -# CONFIG_NET_IPGRE_BROADCAST is not set -# CONFIG_IP_MROUTE is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set # CONFIG_ARPD is not set # CONFIG_SYN_COOKIES is not set -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=m +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m +# CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -# CONFIG_TCP_CONG_HSTCP is not set -# CONFIG_TCP_CONG_HYBLA is not set -# CONFIG_TCP_CONG_VEGAS is not set -# CONFIG_TCP_CONG_SCALABLE is not set -# CONFIG_TCP_CONG_LP is not set -# CONFIG_TCP_CONG_VENO is not set -# CONFIG_TCP_CONG_YEAH is not set -# CONFIG_TCP_CONG_ILLINOIS is not set -# CONFIG_DEFAULT_BIC is not set -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_HTCP is not set -# CONFIG_DEFAULT_VEGAS is not set -# CONFIG_DEFAULT_WESTWOOD is not set -# CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" CONFIG_TCP_MD5SIG=y -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -# CONFIG_IPV6_MIP6 is not set -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -CONFIG_IPV6_SIT=m -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set CONFIG_NETWORK_SECMARK=y # CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# # CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# # CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set # CONFIG_LLC2 is not set @@ -376,6 +332,10 @@ CONFIG_NETWORK_SECMARK=y # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# # CONFIG_NET_SCHED is not set # @@ -383,14 +343,15 @@ CONFIG_NETWORK_SECMARK=y # # CONFIG_NET_PKTGEN is not set # CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set # CONFIG_IRDA is not set # CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -# CONFIG_PHONET is not set -# CONFIG_WIRELESS is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set +CONFIG_IEEE80211=y +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=y +CONFIG_IEEE80211_CRYPT_CCMP=y +CONFIG_IEEE80211_SOFTMAC=y +# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set +CONFIG_WIRELESS_EXT=y # # Device Drivers @@ -399,40 +360,60 @@ CONFIG_NETWORK_SECMARK=y # # Generic Driver Options # -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" # CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y + +# +# Memory Technology Devices (MTD) +# # CONFIG_MTD is not set + +# +# Parallel port support +# # CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y + +# +# Plug and Play support +# +# CONFIG_PNPACPI is not set + +# +# Block devices +# # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -CONFIG_BLK_DEV_CRYPTOLOOP=m -CONFIG_BLK_DEV_NBD=m +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_RAM is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_MISC_DEVICES=y -# CONFIG_PHANTOM is not set -# CONFIG_EEPROM_93CX6 is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CDROM_PKTCDVD=y +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +CONFIG_ATA_OVER_ETH=y + +# +# Misc devices +# CONFIG_SGI_IOC4=y # CONFIG_TIFM_CORE is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_HP_ILO is not set -# CONFIG_C2PORT is not set -CONFIG_HAVE_IDE=y + +# +# ATA/ATAPI/MFM/RLL support +# # CONFIG_IDE is not set # @@ -440,20 +421,19 @@ CONFIG_HAVE_IDE=y # CONFIG_RAID_ATTRS=y CONFIG_SCSI=y -CONFIG_SCSI_DMA=y CONFIG_SCSI_TGT=y -# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_NETLINK=y CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set +CONFIG_CHR_DEV_ST=y +CONFIG_CHR_DEV_OSST=y CONFIG_BLK_DEV_SR=y CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=m +CONFIG_CHR_DEV_SG=y # CONFIG_CHR_DEV_SCH is not set # @@ -463,36 +443,35 @@ CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_SCSI_WAIT_SCAN=m # # SCSI Transports # CONFIG_SCSI_SPI_ATTRS=y -# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_FC_ATTRS=y # CONFIG_SCSI_ISCSI_ATTRS is not set CONFIG_SCSI_SAS_ATTRS=y CONFIG_SCSI_SAS_LIBSAS=y -CONFIG_SCSI_SAS_HOST_SMP=y # CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y + +# +# SCSI low-level drivers +# # CONFIG_ISCSI_TCP is not set # CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_SCSI_3W_9XXX is not set # CONFIG_SCSI_ACARD is not set # CONFIG_SCSI_AACRAID is not set CONFIG_SCSI_AIC7XXX=y -CONFIG_AIC7XXX_CMDS_PER_DEVICE=32 +CONFIG_AIC7XXX_CMDS_PER_DEVICE=8 CONFIG_AIC7XXX_RESET_DELAY_MS=15000 CONFIG_AIC7XXX_DEBUG_ENABLE=y CONFIG_AIC7XXX_DEBUG_MASK=0 CONFIG_AIC7XXX_REG_PRETTY_PRINT=y # CONFIG_SCSI_AIC7XXX_OLD is not set # CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_AIC94XX is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set +CONFIG_SCSI_AIC94XX=y +# CONFIG_AIC94XX_DEBUG is not set # CONFIG_SCSI_ARCMSR is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set @@ -503,7 +482,6 @@ CONFIG_AIC7XXX_REG_PRETTY_PRINT=y # CONFIG_SCSI_IPS is not set # CONFIG_SCSI_INITIO is not set # CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_MVSAS is not set # CONFIG_SCSI_STEX is not set # CONFIG_SCSI_SYM53C8XX_2 is not set # CONFIG_SCSI_QLOGIC_1280 is not set @@ -514,81 +492,147 @@ CONFIG_AIC7XXX_REG_PRETTY_PRINT=y # CONFIG_SCSI_DC390T is not set # CONFIG_SCSI_DEBUG is not set # CONFIG_SCSI_SRP is not set -# CONFIG_SCSI_DH is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# # CONFIG_ATA is not set + +# +# Multi-device support (RAID and LVM) +# # CONFIG_MD is not set + +# +# Fusion MPT device support +# # CONFIG_FUSION is not set +# CONFIG_FUSION_SPI is not set +# CONFIG_FUSION_FC is not set +# CONFIG_FUSION_SAS is not set # # IEEE 1394 (FireWire) support # +# CONFIG_IEEE1394 is not set # -# Enable only one of the two stacks, unless you know what you are doing +# I2O device support # -# CONFIG_FIREWIRE is not set -# CONFIG_IEEE1394 is not set # CONFIG_I2O is not set + +# +# Network device support +# CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -CONFIG_BONDING=m -# CONFIG_MACVLAN is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set -# CONFIG_VETH is not set + +# +# ARCnet devices +# # CONFIG_ARCNET is not set -# CONFIG_PHYLIB is not set + +# +# PHY device support +# +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +CONFIG_MARVELL_PHY=y +CONFIG_DAVICOM_PHY=y +CONFIG_QSEMI_PHY=y +CONFIG_LXT_PHY=y +CONFIG_CICADA_PHY=y +CONFIG_VITESSE_PHY=y +CONFIG_SMSC_PHY=y +# CONFIG_BROADCOM_PHY is not set +# CONFIG_FIXED_PHY is not set + +# +# Ethernet (10 or 100Mbit) +# CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set +# CONFIG_MII is not set CONFIG_SGI_O2MACE_ETH=y # CONFIG_HAPPYMEAL is not set # CONFIG_SUNGEM is not set # CONFIG_CASSINI is not set # CONFIG_NET_VENDOR_3COM is not set -# CONFIG_SMC91X is not set # CONFIG_DM9000 is not set -CONFIG_NET_TULIP=y -CONFIG_DE2104X=m -CONFIG_TULIP=m -# CONFIG_TULIP_MWI is not set -CONFIG_TULIP_MMIO=y -# CONFIG_TULIP_NAPI is not set -# CONFIG_DE4X5 is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_DM9102 is not set -# CONFIG_ULI526X is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set # CONFIG_NET_PCI is not set -# CONFIG_B44 is not set -# CONFIG_ATL2 is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +CONFIG_QLA3XXX=y +# CONFIG_ATL1 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_CHELSIO_T1 is not set +CONFIG_CHELSIO_T3=y +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set +CONFIG_NETXEN_NIC=y + +# +# Token Ring devices +# # CONFIG_TR is not set # -# Wireless LAN +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces # -# CONFIG_WLAN_PRE80211 is not set -# CONFIG_WLAN_80211 is not set -# CONFIG_IWLWIFI_LEDS is not set # CONFIG_WAN is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# # CONFIG_ISDN is not set + +# +# Telephony Support +# # CONFIG_PHONE is not set # @@ -596,7 +640,6 @@ CONFIG_TULIP_MMIO=y # CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set # # Userland interfaces @@ -606,32 +649,16 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=m +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set # CONFIG_INPUT_EVBUG is not set # # Input Device Drivers # -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_LIFEBOOK=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set # CONFIG_INPUT_MISC is not set @@ -642,8 +669,8 @@ CONFIG_SERIO=y # CONFIG_SERIO_I8042 is not set CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_PCIPS2 is not set -CONFIG_SERIO_MACEPS2=y -CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_MACEPS2 is not set +# CONFIG_SERIO_LIBPS2 is not set CONFIG_SERIO_RAW=y # CONFIG_GAMEPORT is not set @@ -651,13 +678,10 @@ CONFIG_SERIO_RAW=y # Character devices # CONFIG_VT=y -# CONFIG_CONSOLE_TRANSLATIONS is not set CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y +CONFIG_VT_HW_CONSOLE_BINDING=y # CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_NOZOMI is not set # # Serial drivers @@ -678,304 +702,192 @@ CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# # CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set +# CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# # CONFIG_TCG_TPM is not set -CONFIG_DEVPORT=y -# CONFIG_I2C is not set -# CONFIG_SPI is not set -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_SENSORS_I5K_AMB is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_SIS5595 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_VIA686A is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_VT8231 is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_HWMON_DEBUG_CHIP is not set -# CONFIG_THERMAL is not set -# CONFIG_THERMAL_HWMON is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set # -# Watchdog Device Drivers +# I2C support # -# CONFIG_SOFT_WATCHDOG is not set -# CONFIG_ALIM7101_WDT is not set +# CONFIG_I2C is not set # -# PCI-based Watchdog Cards +# SPI support # -# CONFIG_PCIPCWATCHDOG is not set -# CONFIG_WDTPCI is not set -CONFIG_SSB_POSSIBLE=y +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set # -# Sonics Silicon Backplane +# Dallas's 1-wire bus # -# CONFIG_SSB is not set +# CONFIG_W1 is not set # -# Multifunction device drivers +# Hardware Monitoring support # -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_REGULATOR is not set +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set # # Multimedia devices # +# CONFIG_VIDEO_DEV is not set # -# Multimedia core support +# Digital Video Broadcasting Devices # -CONFIG_VIDEO_DEV=m -CONFIG_VIDEO_V4L2_COMMON=m -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -# CONFIG_DVB_CORE is not set -CONFIG_VIDEO_MEDIA=m +# CONFIG_DVB is not set # -# Multimedia drivers +# Graphics support # -# CONFIG_MEDIA_ATTACH is not set -CONFIG_VIDEO_V4L2=m -CONFIG_VIDEO_V4L1=m -CONFIG_VIDEOBUF_GEN=m -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -CONFIG_VIDEO_HELPER_CHIPS_AUTO=y -CONFIG_VIDEO_VIVI=m -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_STRADIS is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_RADIO_ADAPTERS=y -# CONFIG_RADIO_GEMTEK_PCI is not set -# CONFIG_RADIO_MAXIRADIO is not set -# CONFIG_RADIO_MAESTRO is not set -CONFIG_DAB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB is not set # -# Graphics support +# Console display driver support # -# CONFIG_DRM is not set -# CONFIG_VGASTATE is not set -CONFIG_VIDEO_OUTPUT_CONTROL=y -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_CIRRUS is not set -# CONFIG_FB_PM2 is not set -# CONFIG_FB_CYBER2000 is not set -# CONFIG_FB_ASILIANT is not set -# CONFIG_FB_IMSTT is not set -# CONFIG_FB_UVESA is not set -CONFIG_FB_GBE=y -CONFIG_FB_GBE_MEM=4 -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_NVIDIA is not set -# CONFIG_FB_RIVA is not set -# CONFIG_FB_MATROX is not set -# CONFIG_FB_RADEON is not set -# CONFIG_FB_ATY128 is not set -# CONFIG_FB_ATY is not set -# CONFIG_FB_S3 is not set -# CONFIG_FB_SAVAGE is not set -# CONFIG_FB_SIS is not set -# CONFIG_FB_VIA is not set -# CONFIG_FB_NEOMAGIC is not set -# CONFIG_FB_KYRO is not set -# CONFIG_FB_3DFX is not set -# CONFIG_FB_VOODOO1 is not set -# CONFIG_FB_VT8623 is not set -# CONFIG_FB_TRIDENT is not set -# CONFIG_FB_ARK is not set -# CONFIG_FB_PM3 is not set -# CONFIG_FB_CARMINE is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y # CONFIG_BACKLIGHT_LCD_SUPPORT is not set # -# Display device support +# Sound # -# CONFIG_DISPLAY_SUPPORT is not set +# CONFIG_SOUND is not set # -# Console display driver support +# HID Devices # -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -# CONFIG_FONT_6x11 is not set -# CONFIG_FONT_7x14 is not set -# CONFIG_FONT_PEARL_8x8 is not set -# CONFIG_FONT_ACORN_8x8 is not set -# CONFIG_FONT_MINI_4x6 is not set -# CONFIG_FONT_SUN8x16 is not set -# CONFIG_FONT_SUN12x22 is not set -# CONFIG_FONT_10x18 is not set -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -# CONFIG_LOGO_LINUX_CLUT224 is not set -CONFIG_LOGO_SGI_CLUT224=y -# CONFIG_SOUND is not set -CONFIG_HID_SUPPORT=y CONFIG_HID=y # CONFIG_HID_DEBUG is not set -# CONFIG_HIDRAW is not set -# CONFIG_HID_PID is not set # -# Special HID drivers +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support # -CONFIG_HID_COMPAT=y -# CONFIG_USB_SUPPORT is not set -# CONFIG_UWB is not set # CONFIG_MMC is not set -# CONFIG_MEMSTICK is not set + +# +# LED devices +# # CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# InfiniBand support +# # CONFIG_INFINIBAND is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_HCTOSYS is not set -# CONFIG_RTC_DEBUG is not set # -# RTC interfaces +# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) # -# CONFIG_RTC_INTF_SYSFS is not set -# CONFIG_RTC_INTF_PROC is not set -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set # -# SPI RTC drivers +# Real Time Clock # +# CONFIG_RTC_CLASS is not set # -# Platform RTC drivers +# DMA Engine support # -CONFIG_RTC_DRV_CMOS=y -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_DMA_ENGINE is not set # -# on-CPU RTC drivers +# DMA Clients +# + +# +# DMA Devices +# + +# +# Auxiliary Display support +# + +# +# Virtualization # -# CONFIG_DMADEVICES is not set -# CONFIG_UIO is not set -# CONFIG_STAGING is not set -CONFIG_STAGING_EXCLUDE_BUILD=y # # File systems # CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -CONFIG_FS_MBCACHE=y +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y -CONFIG_FILE_LOCKING=y # CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set -CONFIG_DNOTIFY=y +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_QFMT_V1=m -CONFIG_QFMT_V2=m -CONFIG_QUOTACTL=y -CONFIG_AUTOFS_FS=m -CONFIG_AUTOFS4_FS=m -CONFIG_FUSE_FS=m +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +CONFIG_FUSE_FS=y CONFIG_GENERIC_ACL=y # # CD-ROM/DVD Filesystems # -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set # # DOS/FAT/NT Filesystems # -CONFIG_FAT_FS=m -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set # CONFIG_NTFS_FS is not set # @@ -984,11 +896,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y CONFIG_SYSFS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y # CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y CONFIG_CONFIGFS_FS=y # @@ -1004,42 +916,33 @@ CONFIG_CONFIGFS_FS=y # CONFIG_EFS_FS is not set # CONFIG_CRAMFS is not set # CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y + +# +# Network File Systems +# CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set # CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set CONFIG_LOCKD=y CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y -# CONFIG_SUNRPC_REGISTER_V4 is not set # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set -CONFIG_CIFS=m -# CONFIG_CIFS_STATS is not set -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -# CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set # # Partition Types @@ -1050,83 +953,45 @@ CONFIG_PARTITION_ADVANCED=y # CONFIG_AMIGA_PARTITION is not set # CONFIG_ATARI_PARTITION is not set # CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_MSDOS_PARTITION is not set # CONFIG_LDM_PARTITION is not set CONFIG_SGI_PARTITION=y # CONFIG_ULTRIX_PARTITION is not set # CONFIG_SUN_PARTITION is not set # CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=m -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=m -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=m -# CONFIG_DLM is not set + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Distributed Lock Manager +# +CONFIG_DLM=y +CONFIG_DLM_TCP=y +# CONFIG_DLM_SCTP is not set +# CONFIG_DLM_DEBUG is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set # # Kernel hacking # CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=2048 -CONFIG_MAGIC_SYSRQ=y +# CONFIG_MAGIC_SYSRQ is not set # CONFIG_UNUSED_SYMBOLS is not set # CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_SYSCTL_SYSCALL_CHECK=y - -# -# Tracers -# -# CONFIG_DYNAMIC_PRINTK_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_CROSSCOMPILE=y CONFIG_CMDLINE="" # @@ -1135,99 +1000,51 @@ CONFIG_CMDLINE="" CONFIG_KEYS=y CONFIG_KEYS_DEBUG_PROC_KEYS=y # CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set -CONFIG_CRYPTO=y # -# Crypto core or helper +# Cryptographic options # -# CONFIG_CRYPTO_FIPS is not set +CONFIG_CRYPTO=y CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_BLKCIPHER=y CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_NULL=y -# CONFIG_CRYPTO_CRYPTD is not set -CONFIG_CRYPTO_AUTHENC=m -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=y -CONFIG_CRYPTO_PCBC=y -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=y - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_MD4=y CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_TGR192=y CONFIG_CRYPTO_WP512=y - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ANUBIS=y -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_BLOWFISH=y -CONFIG_CRYPTO_CAMELLIA=y -CONFIG_CRYPTO_CAST5=y -CONFIG_CRYPTO_CAST6=y +CONFIG_CRYPTO_TGR192=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_PCBC=y +CONFIG_CRYPTO_LRW=y CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_FCRYPT=y -CONFIG_CRYPTO_KHAZAD=y -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -CONFIG_CRYPTO_SERPENT=y -CONFIG_CRYPTO_TEA=y +CONFIG_CRYPTO_BLOWFISH=y CONFIG_CRYPTO_TWOFISH=y CONFIG_CRYPTO_TWOFISH_COMMON=y - -# -# Compression -# +CONFIG_CRYPTO_SERPENT=y +CONFIG_CRYPTO_AES=y +CONFIG_CRYPTO_CAST5=y +CONFIG_CRYPTO_CAST6=y +CONFIG_CRYPTO_TEA=y +CONFIG_CRYPTO_ARC4=y +CONFIG_CRYPTO_KHAZAD=y +CONFIG_CRYPTO_ANUBIS=y CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CAMELLIA=y # -# Random Number Generation +# Hardware crypto devices # -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_HW=y -# CONFIG_CRYPTO_DEV_HIFN_795X is not set # # Library routines @@ -1235,15 +1052,10 @@ CONFIG_CRYPTO_HW=y CONFIG_BITREVERSE=y # CONFIG_CRC_CCITT is not set CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=m CONFIG_CRC32=y -# CONFIG_CRC7 is not set CONFIG_LIBCRC32C=y -CONFIG_AUDIT_GENERIC=y CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_PLIST=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y diff --git a/trunk/arch/mips/include/asm/asmmacro.h b/trunk/arch/mips/include/asm/asmmacro.h index 6c8342ae74db..7a881755800f 100644 --- a/trunk/arch/mips/include/asm/asmmacro.h +++ b/trunk/arch/mips/include/asm/asmmacro.h @@ -35,16 +35,6 @@ mtc0 \reg, CP0_TCSTATUS _ehb .endm -#elif defined(CONFIG_CPU_MIPSR2) - .macro local_irq_enable reg=t0 - ei - irq_enable_hazard - .endm - - .macro local_irq_disable reg=t0 - di - irq_disable_hazard - .endm #else .macro local_irq_enable reg=t0 mfc0 \reg, CP0_STATUS diff --git a/trunk/arch/mips/mm/dma-default.c b/trunk/arch/mips/mm/dma-default.c index e6708b3ad343..5b98d0e731c2 100644 --- a/trunk/arch/mips/mm/dma-default.c +++ b/trunk/arch/mips/mm/dma-default.c @@ -111,7 +111,6 @@ EXPORT_SYMBOL(dma_alloc_coherent); void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle) { - plat_unmap_dma_mem(dma_handle); free_pages((unsigned long) vaddr, get_order(size)); } @@ -122,8 +121,6 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr, { unsigned long addr = (unsigned long) vaddr; - plat_unmap_dma_mem(dma_handle); - if (!plat_device_is_coherent(dev)) addr = CAC_ADDR(addr); diff --git a/trunk/arch/powerpc/boot/Makefile b/trunk/arch/powerpc/boot/Makefile index 3d3daa674299..8fc6d72849ae 100644 --- a/trunk/arch/powerpc/boot/Makefile +++ b/trunk/arch/powerpc/boot/Makefile @@ -41,7 +41,6 @@ $(obj)/4xx.o: BOOTCFLAGS += -mcpu=405 $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405 $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405 $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405 -$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 $(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405 diff --git a/trunk/arch/powerpc/kernel/misc_32.S b/trunk/arch/powerpc/kernel/misc_32.S index d108715129e2..bdc8b0e860e5 100644 --- a/trunk/arch/powerpc/kernel/misc_32.S +++ b/trunk/arch/powerpc/kernel/misc_32.S @@ -479,8 +479,6 @@ _GLOBAL(_tlbil_pid) * (no broadcast) */ _GLOBAL(_tlbil_va) - mfmsr r10 - wrteei 0 slwi r4,r4,16 mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ tlbsx 0,r3 @@ -492,7 +490,6 @@ _GLOBAL(_tlbil_va) tlbwe msync isync - wrtee r10 blr #endif /* CONFIG_FSL_BOOKE */ diff --git a/trunk/arch/x86/include/asm/vmi.h b/trunk/arch/x86/include/asm/vmi.h index 61e08c0a2907..b7c0dea119fe 100644 --- a/trunk/arch/x86/include/asm/vmi.h +++ b/trunk/arch/x86/include/asm/vmi.h @@ -223,15 +223,9 @@ struct pci_header { } __attribute__((packed)); /* Function prototypes for bootstrapping */ -#ifdef CONFIG_VMI extern void vmi_init(void); -extern void vmi_activate(void); extern void vmi_bringup(void); -#else -static inline void vmi_init(void) {} -static inline void vmi_activate(void) {} -static inline void vmi_bringup(void) {} -#endif +extern void vmi_apply_boot_page_allocations(void); /* State needed to start an application processor in an SMP system. */ struct vmi_ap_state { diff --git a/trunk/arch/x86/kernel/setup.c b/trunk/arch/x86/kernel/setup.c index bdec76e55594..9d5674f7b6cc 100644 --- a/trunk/arch/x86/kernel/setup.c +++ b/trunk/arch/x86/kernel/setup.c @@ -794,9 +794,6 @@ void __init setup_arch(char **cmdline_p) printk(KERN_INFO "Command line: %s\n", boot_command_line); #endif - /* VMI may relocate the fixmap; do this before touching ioremap area */ - vmi_init(); - early_cpu_init(); early_ioremap_init(); @@ -883,8 +880,13 @@ void __init setup_arch(char **cmdline_p) check_efer(); #endif - /* Must be before kernel pagetables are setup */ - vmi_activate(); +#if defined(CONFIG_VMI) && defined(CONFIG_X86_32) + /* + * Must be before kernel pagetables are setup + * or fixmap area is touched. + */ + vmi_init(); +#endif /* after early param, so could get panic from serial */ reserve_early_setup_data(); diff --git a/trunk/arch/x86/kernel/smpboot.c b/trunk/arch/x86/kernel/smpboot.c index f71f96fc9e62..7b1093397319 100644 --- a/trunk/arch/x86/kernel/smpboot.c +++ b/trunk/arch/x86/kernel/smpboot.c @@ -294,7 +294,9 @@ static void __cpuinit start_secondary(void *unused) * fragile that we want to limit the things done here to the * most necessary things. */ +#ifdef CONFIG_VMI vmi_bringup(); +#endif cpu_init(); preempt_disable(); smp_callin(); diff --git a/trunk/arch/x86/kernel/vmi_32.c b/trunk/arch/x86/kernel/vmi_32.c index 22fd6577156a..8b6c393ab9fd 100644 --- a/trunk/arch/x86/kernel/vmi_32.c +++ b/trunk/arch/x86/kernel/vmi_32.c @@ -960,6 +960,8 @@ static inline int __init activate_vmi(void) void __init vmi_init(void) { + unsigned long flags; + if (!vmi_rom) probe_vmi_rom(); else @@ -971,21 +973,13 @@ void __init vmi_init(void) reserve_top_address(-vmi_rom->virtual_top); + local_irq_save(flags); + activate_vmi(); + #ifdef CONFIG_X86_IO_APIC /* This is virtual hardware; timer routing is wired correctly */ no_timer_check = 1; #endif -} - -void vmi_activate(void) -{ - unsigned long flags; - - if (!vmi_rom) - return; - - local_irq_save(flags); - activate_vmi(); local_irq_restore(flags & X86_EFLAGS_IF); } diff --git a/trunk/drivers/acpi/toshiba_acpi.c b/trunk/drivers/acpi/toshiba_acpi.c index 40e60fc2e596..25f531d892de 100644 --- a/trunk/drivers/acpi/toshiba_acpi.c +++ b/trunk/drivers/acpi/toshiba_acpi.c @@ -824,36 +824,32 @@ static int __init toshiba_acpi_init(void) toshiba_acpi_exit(); return -ENOMEM; } + } - /* Register input device for kill switch */ - toshiba_acpi.poll_dev = input_allocate_polled_device(); - if (!toshiba_acpi.poll_dev) { - printk(MY_ERR - "unable to allocate kill-switch input device\n"); - toshiba_acpi_exit(); - return -ENOMEM; - } - toshiba_acpi.poll_dev->private = &toshiba_acpi; - toshiba_acpi.poll_dev->poll = bt_poll_rfkill; - toshiba_acpi.poll_dev->poll_interval = 1000; /* msecs */ - - toshiba_acpi.poll_dev->input->name = toshiba_acpi.rfk_name; - toshiba_acpi.poll_dev->input->id.bustype = BUS_HOST; - /* Toshiba USB ID */ - toshiba_acpi.poll_dev->input->id.vendor = 0x0930; - set_bit(EV_SW, toshiba_acpi.poll_dev->input->evbit); - set_bit(SW_RFKILL_ALL, toshiba_acpi.poll_dev->input->swbit); - input_report_switch(toshiba_acpi.poll_dev->input, - SW_RFKILL_ALL, TRUE); - input_sync(toshiba_acpi.poll_dev->input); - - ret = input_register_polled_device(toshiba_acpi.poll_dev); - if (ret) { - printk(MY_ERR - "unable to register kill-switch input device\n"); - toshiba_acpi_exit(); - return ret; - } + /* Register input device for kill switch */ + toshiba_acpi.poll_dev = input_allocate_polled_device(); + if (!toshiba_acpi.poll_dev) { + printk(MY_ERR "unable to allocate kill-switch input device\n"); + toshiba_acpi_exit(); + return -ENOMEM; + } + toshiba_acpi.poll_dev->private = &toshiba_acpi; + toshiba_acpi.poll_dev->poll = bt_poll_rfkill; + toshiba_acpi.poll_dev->poll_interval = 1000; /* msecs */ + + toshiba_acpi.poll_dev->input->name = toshiba_acpi.rfk_name; + toshiba_acpi.poll_dev->input->id.bustype = BUS_HOST; + toshiba_acpi.poll_dev->input->id.vendor = 0x0930; /* Toshiba USB ID */ + set_bit(EV_SW, toshiba_acpi.poll_dev->input->evbit); + set_bit(SW_RFKILL_ALL, toshiba_acpi.poll_dev->input->swbit); + input_report_switch(toshiba_acpi.poll_dev->input, SW_RFKILL_ALL, TRUE); + input_sync(toshiba_acpi.poll_dev->input); + + ret = input_register_polled_device(toshiba_acpi.poll_dev); + if (ret) { + printk(MY_ERR "unable to register kill-switch input device\n"); + toshiba_acpi_exit(); + return ret; } return 0; diff --git a/trunk/drivers/cdrom/cdrom.c b/trunk/drivers/cdrom/cdrom.c index 7d2e91cccb13..d16b02423d61 100644 --- a/trunk/drivers/cdrom/cdrom.c +++ b/trunk/drivers/cdrom/cdrom.c @@ -2081,6 +2081,10 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf, if (!q) return -ENXIO; + rq = blk_get_request(q, READ, GFP_KERNEL); + if (!rq) + return -ENOMEM; + cdi->last_sense = 0; while (nframes) { @@ -2092,17 +2096,9 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf, len = nr * CD_FRAMESIZE_RAW; - rq = blk_get_request(q, READ, GFP_KERNEL); - if (!rq) { - ret = -ENOMEM; - break; - } - ret = blk_rq_map_user(q, rq, NULL, ubuf, len, GFP_KERNEL); - if (ret) { - blk_put_request(rq); + if (ret) break; - } rq->cmd[0] = GPCMD_READ_CD; rq->cmd[1] = 1 << 2; @@ -2128,7 +2124,6 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf, if (blk_rq_unmap_user(bio)) ret = -EFAULT; - blk_put_request(rq); if (ret) break; @@ -2138,6 +2133,7 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf, ubuf += len; } + blk_put_request(rq); return ret; } diff --git a/trunk/drivers/char/cp437.uni b/trunk/drivers/char/cp437.uni index bc6163484f62..1f06889a96b9 100644 --- a/trunk/drivers/char/cp437.uni +++ b/trunk/drivers/char/cp437.uni @@ -27,7 +27,7 @@ 0x0c U+2640 0x0d U+266a 0x0e U+266b -0x0f U+263c U+00a4 +0x0f U+263c 0x10 U+25b6 U+25ba 0x11 U+25c0 U+25c4 0x12 U+2195 @@ -55,7 +55,7 @@ 0x24 U+0024 0x25 U+0025 0x26 U+0026 -0x27 U+0027 U+00b4 +0x27 U+0027 0x28 U+0028 0x29 U+0029 0x2a U+002a @@ -84,7 +84,7 @@ 0x41 U+0041 U+00c0 U+00c1 U+00c2 U+00c3 0x42 U+0042 0x43 U+0043 U+00a9 -0x44 U+0044 U+00d0 +0x44 U+0044 0x45 U+0045 U+00c8 U+00ca U+00cb 0x46 U+0046 0x47 U+0047 @@ -140,7 +140,7 @@ 0x79 U+0079 U+00fd 0x7a U+007a 0x7b U+007b -0x7c U+007c U+00a6 +0x7c U+007c U+00a5 0x7d U+007d 0x7e U+007e # @@ -263,10 +263,10 @@ 0xe8 U+03a6 U+00d8 0xe9 U+0398 0xea U+03a9 U+2126 -0xeb U+03b4 U+00f0 +0xeb U+03b4 0xec U+221e 0xed U+03c6 U+00f8 -0xee U+03b5 U+2208 +0xee U+03b5 0xef U+2229 0xf0 U+2261 0xf1 U+00b1 diff --git a/trunk/drivers/char/vt.c b/trunk/drivers/char/vt.c index 008176edbd64..a5af6072e2b3 100644 --- a/trunk/drivers/char/vt.c +++ b/trunk/drivers/char/vt.c @@ -2274,7 +2274,7 @@ static int do_con_write(struct tty_struct *tty, const unsigned char *buf, int co continue; /* nothing to display */ } /* Glyph not found */ - if ((!(vc->vc_utf && !vc->vc_disp_ctrl) && c < 128) && !(c & ~charmask)) { + if ((!(vc->vc_utf && !vc->vc_disp_ctrl) || c < 128) && !(c & ~charmask)) { /* In legacy mode use the glyph we get by a 1:1 mapping. This would make absolutely no sense with Unicode in mind, but do this for ASCII characters since a font may lack diff --git a/trunk/drivers/i2c/busses/i2c-highlander.c b/trunk/drivers/i2c/busses/i2c-highlander.c index e5a8dae4a289..f4d22ae9d294 100644 --- a/trunk/drivers/i2c/busses/i2c-highlander.c +++ b/trunk/drivers/i2c/busses/i2c-highlander.c @@ -92,7 +92,7 @@ static void highlander_i2c_setup(struct highlander_i2c_dev *dev) static void smbus_write_data(u8 *src, u16 *dst, int len) { for (; len > 1; len -= 2) { - *dst++ = be16_to_cpup((__be16 *)src); + *dst++ = be16_to_cpup((u16 *)src); src += 2; } @@ -103,7 +103,7 @@ static void smbus_write_data(u8 *src, u16 *dst, int len) static void smbus_read_data(u16 *src, u8 *dst, int len) { for (; len > 1; len -= 2) { - *(__be16 *)dst = cpu_to_be16p(src++); + *(u16 *)dst = cpu_to_be16p(src++); dst += 2; } diff --git a/trunk/drivers/i2c/busses/i2c-pmcmsp.c b/trunk/drivers/i2c/busses/i2c-pmcmsp.c index 0bdb2d7f0570..dcf2045b5222 100644 --- a/trunk/drivers/i2c/busses/i2c-pmcmsp.c +++ b/trunk/drivers/i2c/busses/i2c-pmcmsp.c @@ -486,7 +486,7 @@ static enum pmcmsptwi_xfer_result pmcmsptwi_xfer_cmd( if (cmd->type == MSP_TWI_CMD_WRITE || cmd->type == MSP_TWI_CMD_WRITE_READ) { - u64 tmp = be64_to_cpup((__be64 *)cmd->write_data); + __be64 tmp = cpu_to_be64p((u64 *)cmd->write_data); tmp >>= (MSP_MAX_BYTES_PER_RW - cmd->write_len) * 8; dev_dbg(&pmcmsptwi_adapter.dev, "Writing 0x%016llx\n", tmp); pmcmsptwi_writel(tmp & 0x00000000ffffffffLL, diff --git a/trunk/drivers/mmc/host/omap.c b/trunk/drivers/mmc/host/omap.c index 67d7b7fef084..1b9fc3c6b875 100644 --- a/trunk/drivers/mmc/host/omap.c +++ b/trunk/drivers/mmc/host/omap.c @@ -1015,7 +1015,7 @@ static int mmc_omap_get_dma_channel(struct mmc_omap_host *host, struct mmc_data } if (is_read) { - if (host->id == 0) { + if (host->id == 1) { sync_dev = OMAP_DMA_MMC_RX; dma_dev_name = "MMC1 read"; } else { @@ -1023,7 +1023,7 @@ static int mmc_omap_get_dma_channel(struct mmc_omap_host *host, struct mmc_data dma_dev_name = "MMC2 read"; } } else { - if (host->id == 0) { + if (host->id == 1) { sync_dev = OMAP_DMA_MMC_TX; dma_dev_name = "MMC1 write"; } else { @@ -1317,7 +1317,7 @@ static int __init mmc_omap_new_slot(struct mmc_omap_host *host, int id) host->slots[id] = slot; mmc->caps = 0; - if (host->pdata->slots[id].wires >= 4) + if (host->pdata->conf.wire4) mmc->caps |= MMC_CAP_4_BIT_DATA; mmc->ops = &mmc_omap_ops; @@ -1451,7 +1451,6 @@ static int __init mmc_omap_probe(struct platform_device *pdev) host->irq = irq; host->use_dma = 1; - host->dev->dma_mask = &pdata->dma_mask; host->dma_ch = -1; host->irq = irq; diff --git a/trunk/drivers/net/e1000e/ich8lan.c b/trunk/drivers/net/e1000e/ich8lan.c index d115a6d30f29..523b9716a543 100644 --- a/trunk/drivers/net/e1000e/ich8lan.c +++ b/trunk/drivers/net/e1000e/ich8lan.c @@ -1893,17 +1893,12 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) ctrl |= E1000_CTRL_PHY_RST; } ret_val = e1000_acquire_swflag_ich8lan(hw); - /* Whether or not the swflag was acquired, we need to reset the part */ hw_dbg(hw, "Issuing a global reset to ich8lan"); ew32(CTRL, (ctrl | E1000_CTRL_RST)); msleep(20); - if (!ret_val) { - /* release the swflag because it is not reset by - * hardware reset - */ - e1000_release_swflag_ich8lan(hw); - } + /* release the swflag because it is not reset by hardware reset */ + e1000_release_swflag_ich8lan(hw); ret_val = e1000e_get_auto_rd_done(hw); if (ret_val) { diff --git a/trunk/drivers/net/sungem.c b/trunk/drivers/net/sungem.c index fed7eba65ead..1349e419673c 100644 --- a/trunk/drivers/net/sungem.c +++ b/trunk/drivers/net/sungem.c @@ -1142,70 +1142,6 @@ static int gem_start_xmit(struct sk_buff *skb, struct net_device *dev) return NETDEV_TX_OK; } -static void gem_pcs_reset(struct gem *gp) -{ - int limit; - u32 val; - - /* Reset PCS unit. */ - val = readl(gp->regs + PCS_MIICTRL); - val |= PCS_MIICTRL_RST; - writel(val, gp->regs + PCS_MIICTRL); - - limit = 32; - while (readl(gp->regs + PCS_MIICTRL) & PCS_MIICTRL_RST) { - udelay(100); - if (limit-- <= 0) - break; - } - if (limit <= 0) - printk(KERN_WARNING "%s: PCS reset bit would not clear.\n", - gp->dev->name); -} - -static void gem_pcs_reinit_adv(struct gem *gp) -{ - u32 val; - - /* Make sure PCS is disabled while changing advertisement - * configuration. - */ - val = readl(gp->regs + PCS_CFG); - val &= ~(PCS_CFG_ENABLE | PCS_CFG_TO); - writel(val, gp->regs + PCS_CFG); - - /* Advertise all capabilities except assymetric - * pause. - */ - val = readl(gp->regs + PCS_MIIADV); - val |= (PCS_MIIADV_FD | PCS_MIIADV_HD | - PCS_MIIADV_SP | PCS_MIIADV_AP); - writel(val, gp->regs + PCS_MIIADV); - - /* Enable and restart auto-negotiation, disable wrapback/loopback, - * and re-enable PCS. - */ - val = readl(gp->regs + PCS_MIICTRL); - val |= (PCS_MIICTRL_RAN | PCS_MIICTRL_ANE); - val &= ~PCS_MIICTRL_WB; - writel(val, gp->regs + PCS_MIICTRL); - - val = readl(gp->regs + PCS_CFG); - val |= PCS_CFG_ENABLE; - writel(val, gp->regs + PCS_CFG); - - /* Make sure serialink loopback is off. The meaning - * of this bit is logically inverted based upon whether - * you are in Serialink or SERDES mode. - */ - val = readl(gp->regs + PCS_SCTRL); - if (gp->phy_type == phy_serialink) - val &= ~PCS_SCTRL_LOOP; - else - val |= PCS_SCTRL_LOOP; - writel(val, gp->regs + PCS_SCTRL); -} - #define STOP_TRIES 32 /* Must be invoked under gp->lock and gp->tx_lock. */ @@ -1232,9 +1168,6 @@ static void gem_reset(struct gem *gp) if (limit <= 0) printk(KERN_ERR "%s: SW reset is ghetto.\n", gp->dev->name); - - if (gp->phy_type == phy_serialink || gp->phy_type == phy_serdes) - gem_pcs_reinit_adv(gp); } /* Must be invoked under gp->lock and gp->tx_lock. */ @@ -1391,7 +1324,7 @@ static int gem_set_link_modes(struct gem *gp) gp->phy_type == phy_serdes) { u32 pcs_lpa = readl(gp->regs + PCS_MIILP); - if ((pcs_lpa & PCS_MIIADV_FD) || gp->phy_type == phy_serdes) + if (pcs_lpa & PCS_MIIADV_FD) full_duplex = 1; speed = SPEED_1000; } @@ -1555,9 +1488,6 @@ static void gem_link_timer(unsigned long data) val = readl(gp->regs + PCS_MIISTAT); if ((val & PCS_MIISTAT_LS) != 0) { - if (gp->lstate == link_up) - goto restart; - gp->lstate = link_up; netif_carrier_on(gp->dev); (void)gem_set_link_modes(gp); @@ -1778,8 +1708,61 @@ static void gem_init_phy(struct gem *gp) if (gp->phy_mii.def && gp->phy_mii.def->ops->init) gp->phy_mii.def->ops->init(&gp->phy_mii); } else { - gem_pcs_reset(gp); - gem_pcs_reinit_adv(gp); + u32 val; + int limit; + + /* Reset PCS unit. */ + val = readl(gp->regs + PCS_MIICTRL); + val |= PCS_MIICTRL_RST; + writel(val, gp->regs + PCS_MIICTRL); + + limit = 32; + while (readl(gp->regs + PCS_MIICTRL) & PCS_MIICTRL_RST) { + udelay(100); + if (limit-- <= 0) + break; + } + if (limit <= 0) + printk(KERN_WARNING "%s: PCS reset bit would not clear.\n", + gp->dev->name); + + /* Make sure PCS is disabled while changing advertisement + * configuration. + */ + val = readl(gp->regs + PCS_CFG); + val &= ~(PCS_CFG_ENABLE | PCS_CFG_TO); + writel(val, gp->regs + PCS_CFG); + + /* Advertise all capabilities except assymetric + * pause. + */ + val = readl(gp->regs + PCS_MIIADV); + val |= (PCS_MIIADV_FD | PCS_MIIADV_HD | + PCS_MIIADV_SP | PCS_MIIADV_AP); + writel(val, gp->regs + PCS_MIIADV); + + /* Enable and restart auto-negotiation, disable wrapback/loopback, + * and re-enable PCS. + */ + val = readl(gp->regs + PCS_MIICTRL); + val |= (PCS_MIICTRL_RAN | PCS_MIICTRL_ANE); + val &= ~PCS_MIICTRL_WB; + writel(val, gp->regs + PCS_MIICTRL); + + val = readl(gp->regs + PCS_CFG); + val |= PCS_CFG_ENABLE; + writel(val, gp->regs + PCS_CFG); + + /* Make sure serialink loopback is off. The meaning + * of this bit is logically inverted based upon whether + * you are in Serialink or SERDES mode. + */ + val = readl(gp->regs + PCS_SCTRL); + if (gp->phy_type == phy_serialink) + val &= ~PCS_SCTRL_LOOP; + else + val |= PCS_SCTRL_LOOP; + writel(val, gp->regs + PCS_SCTRL); } /* Default aneg parameters */ @@ -2697,21 +2680,6 @@ static int gem_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) cmd->speed = 0; cmd->duplex = cmd->port = cmd->phy_address = cmd->transceiver = cmd->autoneg = 0; - - /* serdes means usually a Fibre connector, with most fixed */ - if (gp->phy_type == phy_serdes) { - cmd->port = PORT_FIBRE; - cmd->supported = (SUPPORTED_1000baseT_Half | - SUPPORTED_1000baseT_Full | - SUPPORTED_FIBRE | SUPPORTED_Autoneg | - SUPPORTED_Pause | SUPPORTED_Asym_Pause); - cmd->advertising = cmd->supported; - cmd->transceiver = XCVR_INTERNAL; - if (gp->lstate == link_up) - cmd->speed = SPEED_1000; - cmd->duplex = DUPLEX_FULL; - cmd->autoneg = 1; - } } cmd->maxtxpkt = cmd->maxrxpkt = 0; diff --git a/trunk/drivers/pcmcia/bfin_cf_pcmcia.c b/trunk/drivers/pcmcia/bfin_cf_pcmcia.c index b59d4115d20f..bb7338863fb9 100644 --- a/trunk/drivers/pcmcia/bfin_cf_pcmcia.c +++ b/trunk/drivers/pcmcia/bfin_cf_pcmcia.c @@ -334,6 +334,6 @@ static void __exit bfin_cf_exit(void) module_init(bfin_cf_init); module_exit(bfin_cf_exit); -MODULE_AUTHOR("Michael Hennerich "); +MODULE_AUTHOR("Michael Hennerich ") MODULE_DESCRIPTION("BFIN CF/PCMCIA Driver"); MODULE_LICENSE("GPL"); diff --git a/trunk/drivers/scsi/device_handler/scsi_dh_hp_sw.c b/trunk/drivers/scsi/device_handler/scsi_dh_hp_sw.c index f7da7530875e..9aec4ca64e56 100644 --- a/trunk/drivers/scsi/device_handler/scsi_dh_hp_sw.c +++ b/trunk/drivers/scsi/device_handler/scsi_dh_hp_sw.c @@ -107,7 +107,6 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h) struct request *req; int ret; -retry: req = blk_get_request(sdev->request_queue, WRITE, GFP_NOIO); if (!req) return SCSI_DH_RES_TEMP_UNAVAIL; @@ -122,6 +121,7 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h) memset(req->sense, 0, SCSI_SENSE_BUFFERSIZE); req->sense_len = 0; +retry: ret = blk_execute_rq(req->q, NULL, req, 1); if (ret == -EIO) { if (req->sense_len > 0) { @@ -136,10 +136,8 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h) h->path_state = HP_SW_PATH_ACTIVE; ret = SCSI_DH_OK; } - if (ret == SCSI_DH_IMM_RETRY) { - blk_put_request(req); + if (ret == SCSI_DH_IMM_RETRY) goto retry; - } if (ret == SCSI_DH_DEV_OFFLINED) { h->path_state = HP_SW_PATH_PASSIVE; ret = SCSI_DH_OK; @@ -202,7 +200,6 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h) struct request *req; int ret, retry; -retry: req = blk_get_request(sdev->request_queue, WRITE, GFP_NOIO); if (!req) return SCSI_DH_RES_TEMP_UNAVAIL; @@ -219,6 +216,7 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h) req->sense_len = 0; retry = h->retries; +retry: ret = blk_execute_rq(req->q, NULL, req, 1); if (ret == -EIO) { if (req->sense_len > 0) { @@ -233,10 +231,8 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h) ret = SCSI_DH_OK; if (ret == SCSI_DH_RETRY) { - if (--retry) { - blk_put_request(req); + if (--retry) goto retry; - } ret = SCSI_DH_IO; } diff --git a/trunk/drivers/video/aty/radeon_accel.c b/trunk/drivers/video/aty/radeon_accel.c index a469a3d6edcb..8da5e5ab8547 100644 --- a/trunk/drivers/video/aty/radeon_accel.c +++ b/trunk/drivers/video/aty/radeon_accel.c @@ -5,61 +5,61 @@ * --dte */ -static void radeon_fixup_offset(struct radeonfb_info *rinfo) +#define FLUSH_CACHE_WORKAROUND 1 + +void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries) { - u32 local_base; - - /* *** Ugly workaround *** */ - /* - * On some platforms, the video memory is mapped at 0 in radeon chip space - * (like PPCs) by the firmware. X will always move it up so that it's seen - * by the chip to be at the same address as the PCI BAR. - * That means that when switching back from X, there is a mismatch between - * the offsets programmed into the engine. This means that potentially, - * accel operations done before radeonfb has a chance to re-init the engine - * will have incorrect offsets, and potentially trash system memory ! - * - * The correct fix is for fbcon to never call any accel op before the engine - * has properly been re-initialized (by a call to set_var), but this is a - * complex fix. This workaround in the meantime, called before every accel - * operation, makes sure the offsets are in sync. - */ + int i; - radeon_fifo_wait (1); - local_base = INREG(MC_FB_LOCATION) << 16; - if (local_base == rinfo->fb_local_base) - return; + for (i=0; i<2000000; i++) { + rinfo->fifo_free = INREG(RBBM_STATUS) & 0x7f; + if (rinfo->fifo_free >= entries) + return; + udelay(10); + } + printk(KERN_ERR "radeonfb: FIFO Timeout !\n"); + /* XXX Todo: attempt to reset the engine */ +} - rinfo->fb_local_base = local_base; +static inline void radeon_fifo_wait(struct radeonfb_info *rinfo, int entries) +{ + if (entries <= rinfo->fifo_free) + rinfo->fifo_free -= entries; + else + radeon_fifo_update_and_wait(rinfo, entries); +} - radeon_fifo_wait (3); - OUTREG(DEFAULT_PITCH_OFFSET, (rinfo->pitch << 0x16) | - (rinfo->fb_local_base >> 10)); - OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); - OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); +static inline void radeonfb_set_creg(struct radeonfb_info *rinfo, u32 reg, + u32 *cache, u32 new_val) +{ + if (new_val == *cache) + return; + *cache = new_val; + radeon_fifo_wait(rinfo, 1); + OUTREG(reg, new_val); } static void radeonfb_prim_fillrect(struct radeonfb_info *rinfo, const struct fb_fillrect *region) { - radeon_fifo_wait(4); - - OUTREG(DP_GUI_MASTER_CNTL, - rinfo->dp_gui_master_cntl /* contains, like GMC_DST_32BPP */ - | GMC_BRUSH_SOLID_COLOR - | ROP3_P); - if (radeon_get_dstbpp(rinfo->depth) != DST_8BPP) - OUTREG(DP_BRUSH_FRGD_CLR, rinfo->pseudo_palette[region->color]); - else - OUTREG(DP_BRUSH_FRGD_CLR, region->color); - OUTREG(DP_WRITE_MSK, 0xffffffff); - OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM)); - - radeon_fifo_wait(2); + radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache, + rinfo->dp_gui_mc_base | GMC_BRUSH_SOLID_COLOR | ROP3_P); + radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache, + DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); + radeonfb_set_creg(rinfo, DP_BRUSH_FRGD_CLR, &rinfo->dp_brush_fg_cache, + region->color); + + /* Ensure the dst cache is flushed and the engine idle before + * issuing the operation. + * + * This works around engine lockups on some cards + */ +#if FLUSH_CACHE_WORKAROUND + radeon_fifo_wait(rinfo, 2); OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); - - radeon_fifo_wait(2); +#endif + radeon_fifo_wait(rinfo, 2); OUTREG(DST_Y_X, (region->dy << 16) | region->dx); OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height); } @@ -70,15 +70,14 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region) struct fb_fillrect modded; int vxres, vyres; - if (info->state != FBINFO_STATE_RUNNING) + WARN_ON(rinfo->gfx_mode); + if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode) return; if (info->flags & FBINFO_HWACCEL_DISABLED) { cfb_fillrect(info, region); return; } - radeon_fixup_offset(rinfo); - vxres = info->var.xres_virtual; vyres = info->var.yres_virtual; @@ -91,6 +90,10 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region) if(modded.dx + modded.width > vxres) modded.width = vxres - modded.dx; if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy; + if (info->fix.visual == FB_VISUAL_TRUECOLOR || + info->fix.visual == FB_VISUAL_DIRECTCOLOR ) + modded.color = ((u32 *) (info->pseudo_palette))[region->color]; + radeonfb_prim_fillrect(rinfo, &modded); } @@ -109,22 +112,22 @@ static void radeonfb_prim_copyarea(struct radeonfb_info *rinfo, if ( xdir < 0 ) { sx += w-1; dx += w-1; } if ( ydir < 0 ) { sy += h-1; dy += h-1; } - radeon_fifo_wait(3); - OUTREG(DP_GUI_MASTER_CNTL, - rinfo->dp_gui_master_cntl /* i.e. GMC_DST_32BPP */ - | GMC_BRUSH_NONE - | GMC_SRC_DSTCOLOR - | ROP3_S - | DP_SRC_SOURCE_MEMORY ); - OUTREG(DP_WRITE_MSK, 0xffffffff); - OUTREG(DP_CNTL, (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0) - | (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0)); - - radeon_fifo_wait(2); + radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache, + rinfo->dp_gui_mc_base | + GMC_BRUSH_NONE | + GMC_SRC_DATATYPE_COLOR | + ROP3_S | + DP_SRC_SOURCE_MEMORY); + radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache, + (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0) | + (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0)); + +#if FLUSH_CACHE_WORKAROUND + radeon_fifo_wait(rinfo, 2); OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); - - radeon_fifo_wait(3); +#endif + radeon_fifo_wait(rinfo, 3); OUTREG(SRC_Y_X, (sy << 16) | sx); OUTREG(DST_Y_X, (dy << 16) | dx); OUTREG(DST_HEIGHT_WIDTH, (h << 16) | w); @@ -143,15 +146,14 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) modded.width = area->width; modded.height = area->height; - if (info->state != FBINFO_STATE_RUNNING) + WARN_ON(rinfo->gfx_mode); + if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode) return; if (info->flags & FBINFO_HWACCEL_DISABLED) { cfb_copyarea(info, area); return; } - radeon_fixup_offset(rinfo); - vxres = info->var.xres_virtual; vyres = info->var.yres_virtual; @@ -168,13 +170,116 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) radeonfb_prim_copyarea(rinfo, &modded); } +static void radeonfb_prim_imageblit(struct radeonfb_info *rinfo, + const struct fb_image *image, + u32 fg, u32 bg) +{ + unsigned int dwords; + u32 *bits; + + radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache, + rinfo->dp_gui_mc_base | + GMC_BRUSH_NONE | GMC_DST_CLIP_LEAVE | + GMC_SRC_DATATYPE_MONO_FG_BG | + ROP3_S | + GMC_BYTE_ORDER_MSB_TO_LSB | + DP_SRC_SOURCE_HOST_DATA); + radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache, + DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); + radeonfb_set_creg(rinfo, DP_SRC_FRGD_CLR, &rinfo->dp_src_fg_cache, fg); + radeonfb_set_creg(rinfo, DP_SRC_BKGD_CLR, &rinfo->dp_src_bg_cache, bg); + + /* Ensure the dst cache is flushed and the engine idle before + * issuing the operation. + * + * This works around engine lockups on some cards + */ +#if FLUSH_CACHE_WORKAROUND + radeon_fifo_wait(rinfo, 2); + OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); + OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); +#endif + + /* X here pads width to a multiple of 32 and uses the clipper to + * adjust the result. Is that really necessary ? Things seem to + * work ok for me without that and the doco doesn't seem to imply] + * there is such a restriction. + */ + radeon_fifo_wait(rinfo, 4); + OUTREG(SC_TOP_LEFT, (image->dy << 16) | image->dx); + OUTREG(SC_BOTTOM_RIGHT, ((image->dy + image->height) << 16) | + (image->dx + image->width)); + OUTREG(DST_Y_X, (image->dy << 16) | image->dx); + + OUTREG(DST_HEIGHT_WIDTH, (image->height << 16) | ((image->width + 31) & ~31)); + + dwords = (image->width + 31) >> 5; + dwords *= image->height; + bits = (u32*)(image->data); + + while(dwords >= 8) { + radeon_fifo_wait(rinfo, 8); +#if BITS_PER_LONG == 64 + __raw_writeq(*((u64 *)(bits)), rinfo->mmio_base + HOST_DATA0); + __raw_writeq(*((u64 *)(bits+2)), rinfo->mmio_base + HOST_DATA2); + __raw_writeq(*((u64 *)(bits+4)), rinfo->mmio_base + HOST_DATA4); + __raw_writeq(*((u64 *)(bits+6)), rinfo->mmio_base + HOST_DATA6); + bits += 8; +#else + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA0); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA1); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA2); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA3); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA4); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA5); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA6); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA7); +#endif + dwords -= 8; + } + while(dwords--) { + radeon_fifo_wait(rinfo, 1); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA0); + } +} + void radeonfb_imageblit(struct fb_info *info, const struct fb_image *image) { struct radeonfb_info *rinfo = info->par; + u32 fg, bg; - if (info->state != FBINFO_STATE_RUNNING) + WARN_ON(rinfo->gfx_mode); + if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode) return; - radeon_engine_idle(); + + if (!image->width || !image->height) + return; + + /* We only do 1 bpp color expansion for now */ + if (!accel_cexp || + (info->flags & FBINFO_HWACCEL_DISABLED) || image->depth != 1) + goto fallback; + + /* Fallback if running out of the screen. We may do clipping + * in the future */ + if ((image->dx + image->width) > info->var.xres_virtual || + (image->dy + image->height) > info->var.yres_virtual) + goto fallback; + + if (info->fix.visual == FB_VISUAL_TRUECOLOR || + info->fix.visual == FB_VISUAL_DIRECTCOLOR) { + fg = ((u32*)(info->pseudo_palette))[image->fg_color]; + bg = ((u32*)(info->pseudo_palette))[image->bg_color]; + } else { + fg = image->fg_color; + bg = image->bg_color; + } + + radeonfb_prim_imageblit(rinfo, image, fg, bg); + return; + + fallback: + radeon_engine_idle(rinfo); cfb_imageblit(info, image); } @@ -185,7 +290,8 @@ int radeonfb_sync(struct fb_info *info) if (info->state != FBINFO_STATE_RUNNING) return 0; - radeon_engine_idle(); + + radeon_engine_idle(rinfo); return 0; } @@ -261,9 +367,10 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo) /* disable 3D engine */ OUTREG(RB3D_CNTL, 0); + rinfo->fifo_free = 0; radeonfb_engine_reset(rinfo); - radeon_fifo_wait (1); + radeon_fifo_wait(rinfo, 1); if (IS_R300_VARIANT(rinfo)) { OUTREG(RB2D_DSTCACHE_MODE, INREG(RB2D_DSTCACHE_MODE) | RB2D_DC_AUTOFLUSH_ENABLE | @@ -277,7 +384,7 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo) OUTREG(RB2D_DSTCACHE_MODE, 0); } - radeon_fifo_wait (3); + radeon_fifo_wait(rinfo, 3); /* We re-read MC_FB_LOCATION from card as it can have been * modified by XFree drivers (ouch !) */ @@ -288,41 +395,57 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo) OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); - radeon_fifo_wait (1); -#if defined(__BIG_ENDIAN) + radeon_fifo_wait(rinfo, 1); +#ifdef __BIG_ENDIAN OUTREGP(DP_DATATYPE, HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN); #else OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN); #endif - radeon_fifo_wait (2); + radeon_fifo_wait(rinfo, 2); OUTREG(DEFAULT_SC_TOP_LEFT, 0); OUTREG(DEFAULT_SC_BOTTOM_RIGHT, (DEFAULT_SC_RIGHT_MAX | DEFAULT_SC_BOTTOM_MAX)); + /* set default DP_GUI_MASTER_CNTL */ temp = radeon_get_dstbpp(rinfo->depth); - rinfo->dp_gui_master_cntl = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS); + rinfo->dp_gui_mc_base = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS); - radeon_fifo_wait (1); - OUTREG(DP_GUI_MASTER_CNTL, (rinfo->dp_gui_master_cntl | - GMC_BRUSH_SOLID_COLOR | - GMC_SRC_DATATYPE_COLOR)); + rinfo->dp_gui_mc_cache = rinfo->dp_gui_mc_base | + GMC_BRUSH_SOLID_COLOR | + GMC_SRC_DATATYPE_COLOR; + radeon_fifo_wait(rinfo, 1); + OUTREG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_mc_cache); - radeon_fifo_wait (7); /* clear line drawing regs */ + radeon_fifo_wait(rinfo, 2); OUTREG(DST_LINE_START, 0); OUTREG(DST_LINE_END, 0); - /* set brush color regs */ - OUTREG(DP_BRUSH_FRGD_CLR, 0xffffffff); - OUTREG(DP_BRUSH_BKGD_CLR, 0x00000000); - - /* set source color regs */ - OUTREG(DP_SRC_FRGD_CLR, 0xffffffff); - OUTREG(DP_SRC_BKGD_CLR, 0x00000000); + /* set brush and source color regs */ + rinfo->dp_brush_fg_cache = 0xffffffff; + rinfo->dp_brush_bg_cache = 0x00000000; + rinfo->dp_src_fg_cache = 0xffffffff; + rinfo->dp_src_bg_cache = 0x00000000; + radeon_fifo_wait(rinfo, 4); + OUTREG(DP_BRUSH_FRGD_CLR, rinfo->dp_brush_fg_cache); + OUTREG(DP_BRUSH_BKGD_CLR, rinfo->dp_brush_bg_cache); + OUTREG(DP_SRC_FRGD_CLR, rinfo->dp_src_fg_cache); + OUTREG(DP_SRC_BKGD_CLR, rinfo->dp_src_bg_cache); + + /* Default direction */ + rinfo->dp_cntl_cache = DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM; + radeon_fifo_wait(rinfo, 1); + OUTREG(DP_CNTL, rinfo->dp_cntl_cache); /* default write mask */ + radeon_fifo_wait(rinfo, 1); OUTREG(DP_WRITE_MSK, 0xffffffff); - radeon_engine_idle (); + /* Default to no swapping of host data */ + radeon_fifo_wait(rinfo, 1); + OUTREG(RBBM_GUICNTL, RBBM_GUICNTL_HOST_DATA_SWAP_NONE); + + /* Make sure it's settled */ + radeon_engine_idle(rinfo); } diff --git a/trunk/drivers/video/aty/radeon_backlight.c b/trunk/drivers/video/aty/radeon_backlight.c index 1a056adb61c8..f343ba83f0ae 100644 --- a/trunk/drivers/video/aty/radeon_backlight.c +++ b/trunk/drivers/video/aty/radeon_backlight.c @@ -66,7 +66,7 @@ static int radeon_bl_update_status(struct backlight_device *bd) level = bd->props.brightness; del_timer_sync(&rinfo->lvds_timer); - radeon_engine_idle(); + radeon_engine_idle(rinfo); lvds_gen_cntl = INREG(LVDS_GEN_CNTL); if (level > 0) { diff --git a/trunk/drivers/video/aty/radeon_base.c b/trunk/drivers/video/aty/radeon_base.c index d0f1a7fc2c9d..d5b27f9d374d 100644 --- a/trunk/drivers/video/aty/radeon_base.c +++ b/trunk/drivers/video/aty/radeon_base.c @@ -282,6 +282,8 @@ static int backlight = 1; static int backlight = 0; #endif +int accel_cexp = 0; + /* * prototypes */ @@ -852,7 +854,6 @@ static int radeonfb_pan_display (struct fb_var_screeninfo *var, if (rinfo->asleep) return 0; - radeon_fifo_wait(2); OUTREG(CRTC_OFFSET, ((var->yoffset * var->xres_virtual + var->xoffset) * var->bits_per_pixel / 8) & ~7); return 0; @@ -882,7 +883,6 @@ static int radeonfb_ioctl (struct fb_info *info, unsigned int cmd, if (rc) return rc; - radeon_fifo_wait(2); if (value & 0x01) { tmp = INREG(LVDS_GEN_CNTL); @@ -940,7 +940,7 @@ int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch) if (rinfo->lock_blank) return 0; - radeon_engine_idle(); + radeon_engine_idle(rinfo); val = INREG(CRTC_EXT_CNTL); val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS | @@ -1048,7 +1048,7 @@ static int radeonfb_blank (int blank, struct fb_info *info) if (rinfo->asleep) return 0; - + return radeon_screen_blank(rinfo, blank, 0); } @@ -1074,8 +1074,6 @@ static int radeon_setcolreg (unsigned regno, unsigned red, unsigned green, pindex = regno; if (!rinfo->asleep) { - radeon_fifo_wait(9); - if (rinfo->bpp == 16) { pindex = regno * 8; @@ -1244,8 +1242,6 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg { int i; - radeon_fifo_wait(20); - /* Workaround from XFree */ if (rinfo->is_mobility) { /* A temporal workaround for the occational blanking on certain laptop @@ -1341,7 +1337,7 @@ static void radeon_lvds_timer_func(unsigned long data) { struct radeonfb_info *rinfo = (struct radeonfb_info *)data; - radeon_engine_idle(); + radeon_engine_idle(rinfo); OUTREG(LVDS_GEN_CNTL, rinfo->pending_lvds_gen_cntl); } @@ -1359,10 +1355,11 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, if (nomodeset) return; + radeon_engine_idle(rinfo); + if (!regs_only) radeon_screen_blank(rinfo, FB_BLANK_NORMAL, 0); - radeon_fifo_wait(31); for (i=0; i<10; i++) OUTREG(common_regs[i].reg, common_regs[i].val); @@ -1390,7 +1387,6 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, radeon_write_pll_regs(rinfo, mode); if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) { - radeon_fifo_wait(10); OUTREG(FP_CRTC_H_TOTAL_DISP, mode->fp_crtc_h_total_disp); OUTREG(FP_CRTC_V_TOTAL_DISP, mode->fp_crtc_v_total_disp); OUTREG(FP_H_SYNC_STRT_WID, mode->fp_h_sync_strt_wid); @@ -1405,7 +1401,6 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, if (!regs_only) radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 0); - radeon_fifo_wait(2); OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl); return; @@ -1556,7 +1551,7 @@ static int radeonfb_set_par(struct fb_info *info) /* We always want engine to be idle on a mode switch, even * if we won't actually change the mode */ - radeon_engine_idle(); + radeon_engine_idle(rinfo); hSyncStart = mode->xres + mode->right_margin; hSyncEnd = hSyncStart + mode->hsync_len; @@ -1851,7 +1846,6 @@ static int radeonfb_set_par(struct fb_info *info) return 0; } - static struct fb_ops radeonfb_ops = { .owner = THIS_MODULE, .fb_check_var = radeonfb_check_var, @@ -1875,6 +1869,7 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo) info->par = rinfo; info->pseudo_palette = rinfo->pseudo_palette; info->flags = FBINFO_DEFAULT + | FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_XPAN @@ -1882,6 +1877,7 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo) info->fbops = &radeonfb_ops; info->screen_base = rinfo->fb_base; info->screen_size = rinfo->mapped_vram; + /* Fill fix common fields */ strlcpy(info->fix.id, rinfo->name, sizeof(info->fix.id)); info->fix.smem_start = rinfo->fb_base_phys; @@ -1896,8 +1892,25 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo) info->fix.mmio_len = RADEON_REGSIZE; info->fix.accel = FB_ACCEL_ATI_RADEON; + /* Allocate colormap */ fb_alloc_cmap(&info->cmap, 256, 0); + /* Setup pixmap used for acceleration */ +#define PIXMAP_SIZE (2048 * 4) + + info->pixmap.addr = kmalloc(PIXMAP_SIZE, GFP_KERNEL); + if (!info->pixmap.addr) { + printk(KERN_ERR "radeonfb: Failed to allocate pixmap !\n"); + noaccel = 1; + goto bail; + } + info->pixmap.size = PIXMAP_SIZE; + info->pixmap.flags = FB_PIXMAP_SYSTEM; + info->pixmap.scan_align = 4; + info->pixmap.buf_align = 4; + info->pixmap.access_align = 32; + +bail: if (noaccel) info->flags |= FBINFO_HWACCEL_DISABLED; @@ -2006,7 +2019,6 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo) u32 tom = INREG(NB_TOM); tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024); - radeon_fifo_wait(6); OUTREG(MC_FB_LOCATION, tom); OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); @@ -2510,6 +2522,8 @@ static int __init radeonfb_setup (char *options) } else if (!strncmp(this_opt, "ignore_devlist", 14)) { ignore_devlist = 1; #endif + } else if (!strncmp(this_opt, "accel_cexp", 12)) { + accel_cexp = 1; } else mode_option = this_opt; } @@ -2557,6 +2571,8 @@ module_param(monitor_layout, charp, 0); MODULE_PARM_DESC(monitor_layout, "Specify monitor mapping (like XFree86)"); module_param(force_measure_pll, bool, 0); MODULE_PARM_DESC(force_measure_pll, "Force measurement of PLL (debug)"); +module_param(accel_cexp, bool, 0); +MODULE_PARM_DESC(accel_cexp, "Use acceleration engine for color expansion"); #ifdef CONFIG_MTRR module_param(nomtrr, bool, 0); MODULE_PARM_DESC(nomtrr, "bool: disable use of MTRR registers"); diff --git a/trunk/drivers/video/aty/radeon_pm.c b/trunk/drivers/video/aty/radeon_pm.c index 675abdafc2d8..3df5015f1d13 100644 --- a/trunk/drivers/video/aty/radeon_pm.c +++ b/trunk/drivers/video/aty/radeon_pm.c @@ -2653,9 +2653,9 @@ int radeonfb_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) if (!(info->flags & FBINFO_HWACCEL_DISABLED)) { /* Make sure engine is reset */ - radeon_engine_idle(); + radeon_engine_idle(rinfo); radeonfb_engine_reset(rinfo); - radeon_engine_idle(); + radeon_engine_idle(rinfo); } /* Blank display and LCD */ @@ -2767,7 +2767,7 @@ int radeonfb_pci_resume(struct pci_dev *pdev) rinfo->asleep = 0; } else - radeon_engine_idle(); + radeon_engine_idle(rinfo); /* Restore display & engine */ radeon_write_mode (rinfo, &rinfo->state, 1); diff --git a/trunk/drivers/video/aty/radeonfb.h b/trunk/drivers/video/aty/radeonfb.h index 3ea1b00fdd22..974ca6d86540 100644 --- a/trunk/drivers/video/aty/radeonfb.h +++ b/trunk/drivers/video/aty/radeonfb.h @@ -336,7 +336,15 @@ struct radeonfb_info { int mon2_type; u8 *mon2_EDID; - u32 dp_gui_master_cntl; + /* accel bits */ + u32 dp_gui_mc_base; + u32 dp_gui_mc_cache; + u32 dp_cntl_cache; + u32 dp_brush_fg_cache; + u32 dp_brush_bg_cache; + u32 dp_src_fg_cache; + u32 dp_src_bg_cache; + u32 fifo_free; struct pll_info pll; @@ -348,6 +356,7 @@ struct radeonfb_info { int lock_blank; int dynclk; int no_schedule; + int gfx_mode; enum radeon_pm_mode pm_mode; reinit_function_ptr reinit_func; @@ -392,8 +401,14 @@ static inline void _radeon_msleep(struct radeonfb_info *rinfo, unsigned long ms) #define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr) #define INREG16(addr) readw((rinfo->mmio_base)+addr) #define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr) + +#ifdef CONFIG_PPC +#define INREG(addr) ({ eieio(); ld_le32(rinfo->mmio_base+(addr)); }) +#define OUTREG(addr,val) do { eieio(); st_le32(rinfo->mmio_base+(addr),(val)); } while(0) +#else #define INREG(addr) readl((rinfo->mmio_base)+addr) #define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr) +#endif static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr, u32 val, u32 mask) @@ -535,17 +550,7 @@ static inline u32 radeon_get_dstbpp(u16 depth) * 2D Engine helper routines */ -static inline void _radeon_fifo_wait(struct radeonfb_info *rinfo, int entries) -{ - int i; - - for (i=0; i<2000000; i++) { - if ((INREG(RBBM_STATUS) & 0x7f) >= entries) - return; - udelay(1); - } - printk(KERN_ERR "radeonfb: FIFO Timeout !\n"); -} +extern void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries); static inline void radeon_engine_flush (struct radeonfb_info *rinfo) { @@ -558,7 +563,7 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo) /* Ensure FIFO is empty, ie, make sure the flush commands * has reached the cache */ - _radeon_fifo_wait (rinfo, 64); + radeon_fifo_update_and_wait(rinfo, 64); /* Wait for the flush to complete */ for (i=0; i < 2000000; i++) { @@ -570,12 +575,12 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo) } -static inline void _radeon_engine_idle(struct radeonfb_info *rinfo) +static inline void radeon_engine_idle(struct radeonfb_info *rinfo) { int i; /* ensure FIFO is empty before waiting for idle */ - _radeon_fifo_wait (rinfo, 64); + radeon_fifo_update_and_wait (rinfo, 64); for (i=0; i<2000000; i++) { if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) { @@ -588,8 +593,6 @@ static inline void _radeon_engine_idle(struct radeonfb_info *rinfo) } -#define radeon_engine_idle() _radeon_engine_idle(rinfo) -#define radeon_fifo_wait(entries) _radeon_fifo_wait(rinfo,entries) #define radeon_msleep(ms) _radeon_msleep(rinfo,ms) @@ -619,6 +622,7 @@ extern void radeonfb_imageblit(struct fb_info *p, const struct fb_image *image); extern int radeonfb_sync(struct fb_info *info); extern void radeonfb_engine_init (struct radeonfb_info *rinfo); extern void radeonfb_engine_reset(struct radeonfb_info *rinfo); +extern void radeon_fixup_mem_offset(struct radeonfb_info *rinfo); /* Other functions */ extern int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch); @@ -634,4 +638,6 @@ static inline void radeonfb_bl_init(struct radeonfb_info *rinfo) {} static inline void radeonfb_bl_exit(struct radeonfb_info *rinfo) {} #endif +extern int accel_cexp; + #endif /* __RADEONFB_H__ */ diff --git a/trunk/drivers/video/imxfb.c b/trunk/drivers/video/imxfb.c index d58c68cd456e..ccd986140c95 100644 --- a/trunk/drivers/video/imxfb.c +++ b/trunk/drivers/video/imxfb.c @@ -1,4 +1,6 @@ /* + * linux/drivers/video/imxfb.c + * * Freescale i.MX Frame Buffer device driver * * Copyright (C) 2004 Sascha Hauer, Pengutronix @@ -14,6 +16,7 @@ * linux-arm-kernel@lists.arm.linux.org.uk */ +//#define DEBUG 1 #include #include @@ -29,8 +32,9 @@ #include #include #include -#include +#include +#include #include /* @@ -38,150 +42,23 @@ */ #define DEBUG_VAR 1 -#define DRIVER_NAME "imx-fb" - -#define LCDC_SSA 0x00 - -#define LCDC_SIZE 0x04 -#define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) -#define SIZE_YMAX(y) ((y) & 0x1ff) - -#define LCDC_VPW 0x08 -#define VPW_VPW(x) ((x) & 0x3ff) - -#define LCDC_CPOS 0x0C -#define CPOS_CC1 (1<<31) -#define CPOS_CC0 (1<<30) -#define CPOS_OP (1<<28) -#define CPOS_CXP(x) (((x) & 3ff) << 16) -#define CPOS_CYP(y) ((y) & 0x1ff) - -#define LCDC_LCWHB 0x10 -#define LCWHB_BK_EN (1<<31) -#define LCWHB_CW(w) (((w) & 0x1f) << 24) -#define LCWHB_CH(h) (((h) & 0x1f) << 16) -#define LCWHB_BD(x) ((x) & 0xff) - -#define LCDC_LCHCC 0x14 -#define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) -#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) -#define LCHCC_CUR_COL_B(b) ((b) & 0x1f) - -#define LCDC_PCR 0x18 - -#define LCDC_HCR 0x1C -#define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) -#define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) -#define HCR_H_WAIT_2(x) ((x) & 0xff) - -#define LCDC_VCR 0x20 -#define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) -#define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) -#define VCR_V_WAIT_2(x) ((x) & 0xff) - -#define LCDC_POS 0x24 -#define POS_POS(x) ((x) & 1f) - -#define LCDC_LSCR1 0x28 -/* bit fields in imxfb.h */ - -#define LCDC_PWMR 0x2C -/* bit fields in imxfb.h */ - -#define LCDC_DMACR 0x30 -/* bit fields in imxfb.h */ - -#define LCDC_RMCR 0x34 -#define RMCR_LCDC_EN (1<<1) -#define RMCR_SELF_REF (1<<0) - -#define LCDC_LCDICR 0x38 -#define LCDICR_INT_SYN (1<<2) -#define LCDICR_INT_CON (1) - -#define LCDC_LCDISR 0x40 -#define LCDISR_UDR_ERR (1<<3) -#define LCDISR_ERR_RES (1<<2) -#define LCDISR_EOF (1<<1) -#define LCDISR_BOF (1<<0) - -/* - * These are the bitfields for each - * display depth that we support. - */ -struct imxfb_rgb { - struct fb_bitfield red; - struct fb_bitfield green; - struct fb_bitfield blue; - struct fb_bitfield transp; -}; - -struct imxfb_info { - struct platform_device *pdev; - void __iomem *regs; +#include "imxfb.h" - u_int max_bpp; - u_int max_xres; - u_int max_yres; - - /* - * These are the addresses we mapped - * the framebuffer memory region to. - */ - dma_addr_t map_dma; - u_char *map_cpu; - u_int map_size; - - u_char *screen_cpu; - dma_addr_t screen_dma; - u_int palette_size; - - dma_addr_t dbar1; - dma_addr_t dbar2; - - u_int pcr; - u_int pwmr; - u_int lscr1; - u_int dmacr; - u_int cmap_inverse:1, - cmap_static:1, - unused:30; - - void (*lcd_power)(int); - void (*backlight_power)(int); -}; - -#define IMX_NAME "IMX" - -/* - * Minimum X and Y resolutions - */ -#define MIN_XRES 64 -#define MIN_YRES 64 - -static struct imxfb_rgb def_rgb_16_tft = { - .red = {.offset = 11, .length = 5,}, - .green = {.offset = 5, .length = 6,}, - .blue = {.offset = 0, .length = 5,}, - .transp = {.offset = 0, .length = 0,}, -}; - -static struct imxfb_rgb def_rgb_16_stn = { - .red = {.offset = 8, .length = 4,}, - .green = {.offset = 4, .length = 4,}, - .blue = {.offset = 0, .length = 4,}, - .transp = {.offset = 0, .length = 0,}, +static struct imxfb_rgb def_rgb_16 = { + .red = { .offset = 8, .length = 4, }, + .green = { .offset = 4, .length = 4, }, + .blue = { .offset = 0, .length = 4, }, + .transp = { .offset = 0, .length = 0, }, }; static struct imxfb_rgb def_rgb_8 = { - .red = {.offset = 0, .length = 8,}, - .green = {.offset = 0, .length = 8,}, - .blue = {.offset = 0, .length = 8,}, - .transp = {.offset = 0, .length = 0,}, + .red = { .offset = 0, .length = 8, }, + .green = { .offset = 0, .length = 8, }, + .blue = { .offset = 0, .length = 8, }, + .transp = { .offset = 0, .length = 0, }, }; -static int imxfb_activate_var(struct fb_var_screeninfo *var, - struct fb_info *info); +static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info); static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) { @@ -190,8 +67,10 @@ static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) return chan << bf->offset; } -static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, - u_int trans, struct fb_info *info) +#define LCDC_PALETTE(x) __REG2(IMX_LCDC_BASE+0x800, (x)<<2) +static int +imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, + u_int trans, struct fb_info *info) { struct imxfb_info *fbi = info->par; u_int val, ret = 1; @@ -202,13 +81,14 @@ static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, (CNVT_TOHW(green,4) << 4) | CNVT_TOHW(blue, 4); - writel(val, fbi->regs + 0x800 + (regno << 2)); + LCDC_PALETTE(regno) = val; ret = 0; } return ret; } -static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, +static int +imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, u_int trans, struct fb_info *info) { struct imxfb_info *fbi = info->par; @@ -268,10 +148,11 @@ static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, * bitfields, horizontal timing, vertical timing. */ -static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) +static int +imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) { struct imxfb_info *fbi = info->par; - struct imxfb_rgb *rgb; + int rgbidx; if (var->xres < MIN_XRES) var->xres = MIN_XRES; @@ -287,25 +168,23 @@ static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); switch (var->bits_per_pixel) { case 16: - default: - if (readl(fbi->regs + LCDC_PCR) & PCR_TFT) - rgb = &def_rgb_16_tft; - else - rgb = &def_rgb_16_stn; + rgbidx = RGB_16; break; case 8: - rgb = &def_rgb_8; + rgbidx = RGB_8; break; + default: + rgbidx = RGB_16; } /* * Copy the RGB parameters for this display * from the machine specific parameters. */ - var->red = rgb->red; - var->green = rgb->green; - var->blue = rgb->blue; - var->transp = rgb->transp; + var->red = fbi->rgb[rgbidx]->red; + var->green = fbi->rgb[rgbidx]->green; + var->blue = fbi->rgb[rgbidx]->blue; + var->transp = fbi->rgb[rgbidx]->transp; pr_debug("RGBT length = %d:%d:%d:%d\n", var->red.length, var->green.length, var->blue.length, @@ -342,7 +221,8 @@ static int imxfb_set_par(struct fb_info *info) info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; } - info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; + info->fix.line_length = var->xres_virtual * + var->bits_per_pixel / 8; fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; imxfb_activate_var(var, info); @@ -355,27 +235,22 @@ static void imxfb_enable_controller(struct imxfb_info *fbi) pr_debug("Enabling LCD controller\n"); /* initialize LCDC */ - writel(readl(fbi->regs + LCDC_RMCR) & ~RMCR_LCDC_EN, - fbi->regs + LCDC_RMCR); /* just to be safe... */ - - writel(fbi->screen_dma, fbi->regs + LCDC_SSA); + LCDC_RMCR &= ~RMCR_LCDC_EN; /* just to be safe... */ + LCDC_SSA = fbi->screen_dma; /* physical screen start address */ - writel(VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4), - fbi->regs + LCDC_VPW); + LCDC_VPW = VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4); - /* panning offset 0 (0 pixel offset) */ - writel(0x00000000, fbi->regs + LCDC_POS); + LCDC_POS = 0x00000000; /* panning offset 0 (0 pixel offset) */ /* disable hardware cursor */ - writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1), - fbi->regs + LCDC_CPOS); + LCDC_CPOS &= ~(CPOS_CC0 | CPOS_CC1); - writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR); + LCDC_RMCR = RMCR_LCDC_EN; - if (fbi->backlight_power) + if(fbi->backlight_power) fbi->backlight_power(1); - if (fbi->lcd_power) + if(fbi->lcd_power) fbi->lcd_power(1); } @@ -383,12 +258,12 @@ static void imxfb_disable_controller(struct imxfb_info *fbi) { pr_debug("Disabling LCD controller\n"); - if (fbi->backlight_power) + if(fbi->backlight_power) fbi->backlight_power(0); - if (fbi->lcd_power) + if(fbi->lcd_power) fbi->lcd_power(0); - writel(0, fbi->regs + LCDC_RMCR); + LCDC_RMCR = 0; } static int imxfb_blank(int blank, struct fb_info *info) @@ -465,26 +340,74 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf info->fix.id, var->lower_margin); #endif - writel(HCR_H_WIDTH(var->hsync_len) | - HCR_H_WAIT_1(var->right_margin) | - HCR_H_WAIT_2(var->left_margin), - fbi->regs + LCDC_HCR); + LCDC_HCR = HCR_H_WIDTH(var->hsync_len) | + HCR_H_WAIT_1(var->left_margin) | + HCR_H_WAIT_2(var->right_margin); - writel(VCR_V_WIDTH(var->vsync_len) | - VCR_V_WAIT_1(var->lower_margin) | - VCR_V_WAIT_2(var->upper_margin), - fbi->regs + LCDC_VCR); + LCDC_VCR = VCR_V_WIDTH(var->vsync_len) | + VCR_V_WAIT_1(var->upper_margin) | + VCR_V_WAIT_2(var->lower_margin); - writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), - fbi->regs + LCDC_SIZE); - writel(fbi->pcr, fbi->regs + LCDC_PCR); - writel(fbi->pwmr, fbi->regs + LCDC_PWMR); - writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); - writel(fbi->dmacr, fbi->regs + LCDC_DMACR); + LCDC_SIZE = SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres); + LCDC_PCR = fbi->pcr; + LCDC_PWMR = fbi->pwmr; + LCDC_LSCR1 = fbi->lscr1; + LCDC_DMACR = fbi->dmacr; return 0; } +static void imxfb_setup_gpio(struct imxfb_info *fbi) +{ + int width; + + LCDC_RMCR &= ~(RMCR_LCDC_EN | RMCR_SELF_REF); + + if( fbi->pcr & PCR_TFT ) + width = 16; + else + width = 1 << ((fbi->pcr >> 28) & 0x3); + + switch(width) { + case 16: + imx_gpio_mode(PD30_PF_LD15); + imx_gpio_mode(PD29_PF_LD14); + imx_gpio_mode(PD28_PF_LD13); + imx_gpio_mode(PD27_PF_LD12); + imx_gpio_mode(PD26_PF_LD11); + imx_gpio_mode(PD25_PF_LD10); + imx_gpio_mode(PD24_PF_LD9); + imx_gpio_mode(PD23_PF_LD8); + case 8: + imx_gpio_mode(PD22_PF_LD7); + imx_gpio_mode(PD21_PF_LD6); + imx_gpio_mode(PD20_PF_LD5); + imx_gpio_mode(PD19_PF_LD4); + case 4: + imx_gpio_mode(PD18_PF_LD3); + imx_gpio_mode(PD17_PF_LD2); + case 2: + imx_gpio_mode(PD16_PF_LD1); + case 1: + imx_gpio_mode(PD15_PF_LD0); + } + + /* initialize GPIOs */ + imx_gpio_mode(PD6_PF_LSCLK); + imx_gpio_mode(PD11_PF_CONTRAST); + imx_gpio_mode(PD14_PF_FLM_VSYNC); + imx_gpio_mode(PD13_PF_LP_HSYNC); + imx_gpio_mode(PD12_PF_ACD_OE); + + /* These are only needed for Sharp HR TFT displays */ + if (fbi->pcr & PCR_SHARP) { + imx_gpio_mode(PD7_PF_REV); + imx_gpio_mode(PD8_PF_CLS); + imx_gpio_mode(PD9_PF_PS); + imx_gpio_mode(PD10_PF_SPL_SPR); + } +} + #ifdef CONFIG_PM /* * Power management hooks. Note that we won't be called from IRQ context, @@ -493,8 +416,7 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf static int imxfb_suspend(struct platform_device *dev, pm_message_t state) { struct imxfb_info *fbi = platform_get_drvdata(dev); - - pr_debug("%s\n", __func__); + pr_debug("%s\n",__func__); imxfb_disable_controller(fbi); return 0; @@ -503,8 +425,7 @@ static int imxfb_suspend(struct platform_device *dev, pm_message_t state) static int imxfb_resume(struct platform_device *dev) { struct imxfb_info *fbi = platform_get_drvdata(dev); - - pr_debug("%s\n", __func__); + pr_debug("%s\n",__func__); imxfb_enable_controller(fbi); return 0; @@ -514,136 +435,149 @@ static int imxfb_resume(struct platform_device *dev) #define imxfb_resume NULL #endif -static int __init imxfb_init_fbinfo(struct platform_device *pdev) +static int __init imxfb_init_fbinfo(struct device *dev) { - struct imx_fb_platform_data *pdata = pdev->dev.platform_data; - struct fb_info *info = dev_get_drvdata(&pdev->dev); + struct imxfb_mach_info *inf = dev->platform_data; + struct fb_info *info = dev_get_drvdata(dev); struct imxfb_info *fbi = info->par; pr_debug("%s\n",__func__); - info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); + info->pseudo_palette = kmalloc( sizeof(u32) * 16, GFP_KERNEL); if (!info->pseudo_palette) return -ENOMEM; memset(fbi, 0, sizeof(struct imxfb_info)); + fbi->dev = dev; strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); - info->fix.type = FB_TYPE_PACKED_PIXELS; + info->fix.type = FB_TYPE_PACKED_PIXELS; info->fix.type_aux = 0; info->fix.xpanstep = 0; info->fix.ypanstep = 0; info->fix.ywrapstep = 0; - info->fix.accel = FB_ACCEL_NONE; + info->fix.accel = FB_ACCEL_NONE; info->var.nonstd = 0; info->var.activate = FB_ACTIVATE_NOW; info->var.height = -1; info->var.width = -1; info->var.accel_flags = 0; - info->var.vmode = FB_VMODE_NONINTERLACED; + info->var.vmode = FB_VMODE_NONINTERLACED; info->fbops = &imxfb_ops; - info->flags = FBINFO_FLAG_DEFAULT | - FBINFO_READS_FAST; - - fbi->max_xres = pdata->xres; - info->var.xres = pdata->xres; - info->var.xres_virtual = pdata->xres; - fbi->max_yres = pdata->yres; - info->var.yres = pdata->yres; - info->var.yres_virtual = pdata->yres; - fbi->max_bpp = pdata->bpp; - info->var.bits_per_pixel = pdata->bpp; - info->var.nonstd = pdata->nonstd; - info->var.pixclock = pdata->pixclock; - info->var.hsync_len = pdata->hsync_len; - info->var.left_margin = pdata->left_margin; - info->var.right_margin = pdata->right_margin; - info->var.vsync_len = pdata->vsync_len; - info->var.upper_margin = pdata->upper_margin; - info->var.lower_margin = pdata->lower_margin; - info->var.sync = pdata->sync; - info->var.grayscale = pdata->cmap_greyscale; - fbi->cmap_inverse = pdata->cmap_inverse; - fbi->cmap_static = pdata->cmap_static; - fbi->pcr = pdata->pcr; - fbi->lscr1 = pdata->lscr1; - fbi->dmacr = pdata->dmacr; - fbi->pwmr = pdata->pwmr; - fbi->lcd_power = pdata->lcd_power; - fbi->backlight_power = pdata->backlight_power; + info->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST; + + fbi->rgb[RGB_16] = &def_rgb_16; + fbi->rgb[RGB_8] = &def_rgb_8; + + fbi->max_xres = inf->xres; + info->var.xres = inf->xres; + info->var.xres_virtual = inf->xres; + fbi->max_yres = inf->yres; + info->var.yres = inf->yres; + info->var.yres_virtual = inf->yres; + fbi->max_bpp = inf->bpp; + info->var.bits_per_pixel = inf->bpp; + info->var.nonstd = inf->nonstd; + info->var.pixclock = inf->pixclock; + info->var.hsync_len = inf->hsync_len; + info->var.left_margin = inf->left_margin; + info->var.right_margin = inf->right_margin; + info->var.vsync_len = inf->vsync_len; + info->var.upper_margin = inf->upper_margin; + info->var.lower_margin = inf->lower_margin; + info->var.sync = inf->sync; + info->var.grayscale = inf->cmap_greyscale; + fbi->cmap_inverse = inf->cmap_inverse; + fbi->cmap_static = inf->cmap_static; + fbi->pcr = inf->pcr; + fbi->lscr1 = inf->lscr1; + fbi->dmacr = inf->dmacr; + fbi->pwmr = inf->pwmr; + fbi->lcd_power = inf->lcd_power; + fbi->backlight_power = inf->backlight_power; info->fix.smem_len = fbi->max_xres * fbi->max_yres * fbi->max_bpp / 8; return 0; } +/* + * Allocates the DRAM memory for the frame buffer. This buffer is + * remapped into a non-cached, non-buffered, memory region to + * allow pixel writes to occur without flushing the cache. + * Once this area is remapped, all virtual memory access to the + * video memory should occur at the new region. + */ +static int __init imxfb_map_video_memory(struct fb_info *info) +{ + struct imxfb_info *fbi = info->par; + + fbi->map_size = PAGE_ALIGN(info->fix.smem_len); + fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size, + &fbi->map_dma,GFP_KERNEL); + + if (fbi->map_cpu) { + info->screen_base = fbi->map_cpu; + fbi->screen_cpu = fbi->map_cpu; + fbi->screen_dma = fbi->map_dma; + info->fix.smem_start = fbi->screen_dma; + } + + return fbi->map_cpu ? 0 : -ENOMEM; +} + static int __init imxfb_probe(struct platform_device *pdev) { struct imxfb_info *fbi; struct fb_info *info; - struct imx_fb_platform_data *pdata; + struct imxfb_mach_info *inf; struct resource *res; int ret; printk("i.MX Framebuffer driver\n"); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) + if(!res) return -ENODEV; - pdata = pdev->dev.platform_data; - if (!pdata) { + inf = pdev->dev.platform_data; + if(!inf) { dev_err(&pdev->dev,"No platform_data available\n"); return -ENOMEM; } info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); - if (!info) + if(!info) return -ENOMEM; fbi = info->par; platform_set_drvdata(pdev, info); - ret = imxfb_init_fbinfo(pdev); - if (ret < 0) + ret = imxfb_init_fbinfo(&pdev->dev); + if( ret < 0 ) goto failed_init; - res = request_mem_region(res->start, resource_size(res), - DRIVER_NAME); + res = request_mem_region(res->start, res->end - res->start + 1, "IMXFB"); if (!res) { ret = -EBUSY; - goto failed_req; - } - - fbi->regs = ioremap(res->start, resource_size(res)); - if (fbi->regs == NULL) { - printk(KERN_ERR"Cannot map frame buffer registers\n"); - goto failed_ioremap; + goto failed_regs; } - if (!pdata->fixed_screen_cpu) { - fbi->map_size = PAGE_ALIGN(info->fix.smem_len); - fbi->map_cpu = dma_alloc_writecombine(&pdev->dev, - fbi->map_size, &fbi->map_dma, GFP_KERNEL); - - if (!fbi->map_cpu) { + if (!inf->fixed_screen_cpu) { + ret = imxfb_map_video_memory(info); + if (ret) { dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); ret = -ENOMEM; goto failed_map; } - - info->screen_base = fbi->map_cpu; - fbi->screen_cpu = fbi->map_cpu; - fbi->screen_dma = fbi->map_dma; - info->fix.smem_start = fbi->screen_dma; } else { /* Fixed framebuffer mapping enables location of the screen in eSRAM */ - fbi->map_cpu = pdata->fixed_screen_cpu; - fbi->map_dma = pdata->fixed_screen_dma; + fbi->map_cpu = inf->fixed_screen_cpu; + fbi->map_dma = inf->fixed_screen_dma; info->screen_base = fbi->map_cpu; fbi->screen_cpu = fbi->map_cpu; fbi->screen_dma = fbi->map_dma; @@ -656,10 +590,12 @@ static int __init imxfb_probe(struct platform_device *pdev) */ imxfb_check_var(&info->var, info); - ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0); + ret = fb_alloc_cmap(&info->cmap, 1<var.bits_per_pixel, 0); if (ret < 0) goto failed_cmap; + imxfb_setup_gpio(fbi); + imxfb_set_par(info); ret = register_framebuffer(info); if (ret < 0) { @@ -674,22 +610,20 @@ static int __init imxfb_probe(struct platform_device *pdev) failed_register: fb_dealloc_cmap(&info->cmap); failed_cmap: - if (!pdata->fixed_screen_cpu) + if (!inf->fixed_screen_cpu) dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, - fbi->map_dma); + fbi->map_dma); failed_map: - iounmap(fbi->regs); -failed_ioremap: - release_mem_region(res->start, res->end - res->start); -failed_req: kfree(info->pseudo_palette); +failed_regs: + release_mem_region(res->start, res->end - res->start); failed_init: platform_set_drvdata(pdev, NULL); framebuffer_release(info); return ret; } -static int __devexit imxfb_remove(struct platform_device *pdev) +static int imxfb_remove(struct platform_device *pdev) { struct fb_info *info = platform_get_drvdata(pdev); struct imxfb_info *fbi = info->par; @@ -705,7 +639,6 @@ static int __devexit imxfb_remove(struct platform_device *pdev) kfree(info->pseudo_palette); framebuffer_release(info); - iounmap(fbi->regs); release_mem_region(res->start, res->end - res->start + 1); platform_set_drvdata(pdev, NULL); @@ -720,18 +653,19 @@ void imxfb_shutdown(struct platform_device * dev) } static struct platform_driver imxfb_driver = { + .probe = imxfb_probe, .suspend = imxfb_suspend, .resume = imxfb_resume, - .remove = __devexit_p(imxfb_remove), + .remove = imxfb_remove, .shutdown = imxfb_shutdown, .driver = { - .name = DRIVER_NAME, + .name = "imx-fb", }, }; int __init imxfb_init(void) { - return platform_driver_probe(&imxfb_driver, imxfb_probe); + return platform_driver_register(&imxfb_driver); } static void __exit imxfb_cleanup(void) diff --git a/trunk/drivers/video/imxfb.h b/trunk/drivers/video/imxfb.h new file mode 100644 index 000000000000..e837a8b48eb8 --- /dev/null +++ b/trunk/drivers/video/imxfb.h @@ -0,0 +1,73 @@ +/* + * linux/drivers/video/imxfb.h + * + * Freescale i.MX Frame Buffer device driver + * + * Copyright (C) 2004 S.Hauer, Pengutronix + * + * Copyright (C) 1999 Eric A. Thomas + * Based on acornfb.c Copyright (C) Russell King. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +/* + * These are the bitfields for each + * display depth that we support. + */ +struct imxfb_rgb { + struct fb_bitfield red; + struct fb_bitfield green; + struct fb_bitfield blue; + struct fb_bitfield transp; +}; + +#define RGB_16 (0) +#define RGB_8 (1) +#define NR_RGB 2 + +struct imxfb_info { + struct device *dev; + struct imxfb_rgb *rgb[NR_RGB]; + + u_int max_bpp; + u_int max_xres; + u_int max_yres; + + /* + * These are the addresses we mapped + * the framebuffer memory region to. + */ + dma_addr_t map_dma; + u_char * map_cpu; + u_int map_size; + + u_char * screen_cpu; + dma_addr_t screen_dma; + u_int palette_size; + + dma_addr_t dbar1; + dma_addr_t dbar2; + + u_int pcr; + u_int pwmr; + u_int lscr1; + u_int dmacr; + u_int cmap_inverse:1, + cmap_static:1, + unused:30; + + void (*lcd_power)(int); + void (*backlight_power)(int); +}; + +#define IMX_NAME "IMX" + +/* + * Minimum X and Y resolutions + */ +#define MIN_XRES 64 +#define MIN_YRES 64 + diff --git a/trunk/include/linux/netdevice.h b/trunk/include/linux/netdevice.h index e26f54952892..9d77b1d7dca8 100644 --- a/trunk/include/linux/netdevice.h +++ b/trunk/include/linux/netdevice.h @@ -319,7 +319,6 @@ enum { NAPI_STATE_SCHED, /* Poll is scheduled */ NAPI_STATE_DISABLE, /* Disable pending */ - NAPI_STATE_NPSVC, /* Netpoll - don't dequeue from poll_list */ }; extern void __napi_schedule(struct napi_struct *n); @@ -1498,12 +1497,6 @@ static inline void netif_rx_complete(struct net_device *dev, { unsigned long flags; - /* - * don't let napi dequeue from the cpu poll list - * just in case its running on a different cpu - */ - if (unlikely(test_bit(NAPI_STATE_NPSVC, &napi->state))) - return; local_irq_save(flags); __netif_rx_complete(dev, napi); local_irq_restore(flags); diff --git a/trunk/include/linux/smp.h b/trunk/include/linux/smp.h index 6e7ba16ff454..3f9a60043a97 100644 --- a/trunk/include/linux/smp.h +++ b/trunk/include/linux/smp.h @@ -146,8 +146,6 @@ static inline void smp_send_reschedule(int cpu) { } }) #define smp_call_function_mask(mask, func, info, wait) \ (up_smp_call_function(func, info)) -#define smp_call_function_many(mask, func, info, wait) \ - (up_smp_call_function(func, info)) static inline void init_call_single_data(void) { } diff --git a/trunk/include/video/radeon.h b/trunk/include/video/radeon.h index 1cd09cc5b169..d5dcaf154ba4 100644 --- a/trunk/include/video/radeon.h +++ b/trunk/include/video/radeon.h @@ -525,6 +525,9 @@ #define CRTC_DISPLAY_DIS (1 << 10) #define CRTC_CRT_ON (1 << 15) +/* DSTCACHE_MODE bits constants */ +#define RB2D_DC_AUTOFLUSH_ENABLE (1 << 8) +#define RB2D_DC_DC_DISABLE_IGNORE_PE (1 << 17) /* DSTCACHE_CTLSTAT bit constants */ #define RB2D_DC_FLUSH_2D (1 << 0) @@ -866,15 +869,10 @@ #define GMC_DST_16BPP_YVYU422 0x00000c00 #define GMC_DST_32BPP_AYUV444 0x00000e00 #define GMC_DST_16BPP_ARGB4444 0x00000f00 -#define GMC_SRC_MONO 0x00000000 -#define GMC_SRC_MONO_LBKGD 0x00001000 -#define GMC_SRC_DSTCOLOR 0x00003000 #define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000 #define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000 #define GMC_DP_CONVERSION_TEMP_9300 0x00008000 #define GMC_DP_CONVERSION_TEMP_6500 0x00000000 -#define GMC_DP_SRC_RECT 0x02000000 -#define GMC_DP_SRC_HOST 0x03000000 #define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000 #define GMC_3D_FCN_EN_CLR 0x00000000 #define GMC_3D_FCN_EN_SET 0x08000000 @@ -885,6 +883,9 @@ #define GMC_WRITE_MASK_LEAVE 0x00000000 #define GMC_WRITE_MASK_SET 0x40000000 #define GMC_CLR_CMP_CNTL_DIS (1 << 28) +#define GMC_SRC_DATATYPE_MASK (3 << 12) +#define GMC_SRC_DATATYPE_MONO_FG_BG (0 << 12) +#define GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12) #define GMC_SRC_DATATYPE_COLOR (3 << 12) #define ROP3_S 0x00cc0000 #define ROP3_SRCCOPY 0x00cc0000 @@ -893,6 +894,7 @@ #define DP_SRC_SOURCE_MASK (7 << 24) #define GMC_BRUSH_NONE (15 << 4) #define DP_SRC_SOURCE_MEMORY (2 << 24) +#define DP_SRC_SOURCE_HOST_DATA (3 << 24) #define GMC_BRUSH_SOLIDCOLOR 0x000000d0 /* DP_MIX bit constants */ @@ -978,6 +980,12 @@ #define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25) #define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26) +/* RBBM_GUICNTL constants */ +#define RBBM_GUICNTL_HOST_DATA_SWAP_NONE (0 << 0) +#define RBBM_GUICNTL_HOST_DATA_SWAP_16BIT (1 << 0) +#define RBBM_GUICNTL_HOST_DATA_SWAP_32BIT (2 << 0) +#define RBBM_GUICNTL_HOST_DATA_SWAP_HDW (3 << 0) + /* masks */ #define CONFIG_MEMSIZE_MASK 0x1f000000 diff --git a/trunk/kernel/cgroup.c b/trunk/kernel/cgroup.c index 8185a0f09594..fe00b3b983a8 100644 --- a/trunk/kernel/cgroup.c +++ b/trunk/kernel/cgroup.c @@ -702,7 +702,7 @@ static int rebind_subsystems(struct cgroupfs_root *root, * any child cgroups exist. This is theoretically supportable * but involves complex error handling, so it's being left until * later */ - if (root->number_of_cgroups > 1) + if (!list_empty(&cgrp->children)) return -EBUSY; /* Process each subsystem */ diff --git a/trunk/kernel/sched_clock.c b/trunk/kernel/sched_clock.c index e8ab096ddfe3..81787248b60f 100644 --- a/trunk/kernel/sched_clock.c +++ b/trunk/kernel/sched_clock.c @@ -118,13 +118,13 @@ static u64 __update_sched_clock(struct sched_clock_data *scd, u64 now) /* * scd->clock = clamp(scd->tick_gtod + delta, - * max(scd->tick_gtod, scd->clock), - * scd->tick_gtod + TICK_NSEC); + * max(scd->tick_gtod, scd->clock), + * max(scd->clock, scd->tick_gtod + TICK_NSEC)); */ clock = scd->tick_gtod + delta; min_clock = wrap_max(scd->tick_gtod, scd->clock); - max_clock = scd->tick_gtod + TICK_NSEC; + max_clock = wrap_max(scd->clock, scd->tick_gtod + TICK_NSEC); clock = wrap_max(clock, min_clock); clock = wrap_min(clock, max_clock); diff --git a/trunk/mm/slob.c b/trunk/mm/slob.c index bf7e8fc3aed8..cb675d126791 100644 --- a/trunk/mm/slob.c +++ b/trunk/mm/slob.c @@ -535,7 +535,7 @@ struct kmem_cache *kmem_cache_create(const char *name, size_t size, struct kmem_cache *c; c = slob_alloc(sizeof(struct kmem_cache), - GFP_KERNEL, ARCH_KMALLOC_MINALIGN, -1); + flags, ARCH_KMALLOC_MINALIGN, -1); if (c) { c->name = name; diff --git a/trunk/net/core/netpoll.c b/trunk/net/core/netpoll.c index dadac6281f20..6c7af390be0a 100644 --- a/trunk/net/core/netpoll.c +++ b/trunk/net/core/netpoll.c @@ -133,11 +133,9 @@ static int poll_one_napi(struct netpoll_info *npinfo, npinfo->rx_flags |= NETPOLL_RX_DROP; atomic_inc(&trapped); - set_bit(NAPI_STATE_NPSVC, &napi->state); work = napi->poll(napi, budget); - clear_bit(NAPI_STATE_NPSVC, &napi->state); atomic_dec(&trapped); npinfo->rx_flags &= ~NETPOLL_RX_DROP; diff --git a/trunk/net/ipv4/netfilter/nf_nat_rule.c b/trunk/net/ipv4/netfilter/nf_nat_rule.c index 8d489e746b21..bea54a685109 100644 --- a/trunk/net/ipv4/netfilter/nf_nat_rule.c +++ b/trunk/net/ipv4/netfilter/nf_nat_rule.c @@ -61,7 +61,7 @@ static struct static struct xt_table nat_table = { .name = "nat", .valid_hooks = NAT_VALID_HOOKS, - .lock = __RW_LOCK_UNLOCKED(nat_table.lock), + .lock = __RW_LOCK_UNLOCKED(__nat_table.lock), .me = THIS_MODULE, .af = AF_INET, }; diff --git a/trunk/net/ipv4/tcp_vegas.c b/trunk/net/ipv4/tcp_vegas.c index a453aac91bd3..7cd22262de3a 100644 --- a/trunk/net/ipv4/tcp_vegas.c +++ b/trunk/net/ipv4/tcp_vegas.c @@ -40,14 +40,18 @@ #include "tcp_vegas.h" -static int alpha = 2; -static int beta = 4; -static int gamma = 1; +/* Default values of the Vegas variables, in fixed-point representation + * with V_PARAM_SHIFT bits to the right of the binary point. + */ +#define V_PARAM_SHIFT 1 +static int alpha = 2<beg_snd_nxt)) { /* Do the Vegas once-per-RTT cwnd adjustment. */ + u32 old_wnd, old_snd_cwnd; + + + /* Here old_wnd is essentially the window of data that was + * sent during the previous RTT, and has all + * been acknowledged in the course of the RTT that ended + * with the ACK we just received. Likewise, old_snd_cwnd + * is the cwnd during the previous RTT. + */ + old_wnd = (vegas->beg_snd_nxt - vegas->beg_snd_una) / + tp->mss_cache; + old_snd_cwnd = vegas->beg_snd_cwnd; /* Save the extent of the current window so we can use this * at the end of the next RTT. */ + vegas->beg_snd_una = vegas->beg_snd_nxt; vegas->beg_snd_nxt = tp->snd_nxt; + vegas->beg_snd_cwnd = tp->snd_cwnd; /* We do the Vegas calculations only if we got enough RTT * samples that we can be reasonably sure that we got @@ -212,14 +252,22 @@ static void tcp_vegas_cong_avoid(struct sock *sk, u32 ack, u32 in_flight) * * This is: * (actual rate in segments) * baseRTT + * We keep it as a fixed point number with + * V_PARAM_SHIFT bits to the right of the binary point. */ - target_cwnd = tp->snd_cwnd * vegas->baseRTT / rtt; + target_cwnd = ((u64)old_wnd * vegas->baseRTT); + target_cwnd <<= V_PARAM_SHIFT; + do_div(target_cwnd, rtt); /* Calculate the difference between the window we had, * and the window we would like to have. This quantity * is the "Diff" from the Arizona Vegas papers. + * + * Again, this is a fixed point number with + * V_PARAM_SHIFT bits to the right of the binary + * point. */ - diff = tp->snd_cwnd * (rtt-vegas->baseRTT) / vegas->baseRTT; + diff = (old_wnd << V_PARAM_SHIFT) - target_cwnd; if (diff > gamma && tp->snd_ssthresh > 2 ) { /* Going too fast. Time to slow down @@ -234,13 +282,16 @@ static void tcp_vegas_cong_avoid(struct sock *sk, u32 ack, u32 in_flight) * truncation robs us of full link * utilization. */ - tp->snd_cwnd = min(tp->snd_cwnd, (u32)target_cwnd+1); + tp->snd_cwnd = min(tp->snd_cwnd, + ((u32)target_cwnd >> + V_PARAM_SHIFT)+1); } else if (tp->snd_cwnd <= tp->snd_ssthresh) { /* Slow start. */ tcp_slow_start(tp); } else { /* Congestion avoidance. */ + u32 next_snd_cwnd; /* Figure out where we would like cwnd * to be. @@ -249,17 +300,26 @@ static void tcp_vegas_cong_avoid(struct sock *sk, u32 ack, u32 in_flight) /* The old window was too fast, so * we slow down. */ - tp->snd_cwnd--; + next_snd_cwnd = old_snd_cwnd - 1; } else if (diff < alpha) { /* We don't have enough extra packets * in the network, so speed up. */ - tp->snd_cwnd++; + next_snd_cwnd = old_snd_cwnd + 1; } else { /* Sending just as fast as we * should be. */ + next_snd_cwnd = old_snd_cwnd; } + + /* Adjust cwnd upward or downward, toward the + * desired value. + */ + if (next_snd_cwnd > tp->snd_cwnd) + tp->snd_cwnd++; + else if (next_snd_cwnd < tp->snd_cwnd) + tp->snd_cwnd--; } if (tp->snd_cwnd < 2) diff --git a/trunk/net/ipv6/ndisc.c b/trunk/net/ipv6/ndisc.c index d0f54d18e19b..172438320eec 100644 --- a/trunk/net/ipv6/ndisc.c +++ b/trunk/net/ipv6/ndisc.c @@ -912,13 +912,8 @@ static void ndisc_recv_na(struct sk_buff *skb) is invalid, but ndisc specs say nothing about it. It could be misconfiguration, or an smart proxy agent tries to help us :-) - - We should not print the error if NA has been - received from loopback - it is just our own - unsolicited advertisement. */ - if (skb->pkt_type != PACKET_LOOPBACK) - ND_PRINTK1(KERN_WARNING + ND_PRINTK1(KERN_WARNING "ICMPv6 NA: someone advertises our address on %s!\n", ifp->idev->dev->name); in6_ifa_put(ifp); diff --git a/trunk/net/netlabel/netlabel_unlabeled.c b/trunk/net/netlabel/netlabel_unlabeled.c index 8c0308032178..90c8506a0aac 100644 --- a/trunk/net/netlabel/netlabel_unlabeled.c +++ b/trunk/net/netlabel/netlabel_unlabeled.c @@ -562,6 +562,7 @@ static int netlbl_unlhsh_remove_addr4(struct net *net, const struct in_addr *mask, struct netlbl_audit *audit_info) { + int ret_val = 0; struct netlbl_af4list *list_entry; struct netlbl_unlhsh_addr4 *entry; struct audit_buffer *audit_buf; @@ -576,7 +577,7 @@ static int netlbl_unlhsh_remove_addr4(struct net *net, if (list_entry != NULL) entry = netlbl_unlhsh_addr4_entry(list_entry); else - entry = NULL; + ret_val = -ENOENT; audit_buf = netlbl_audit_start_common(AUDIT_MAC_UNLBL_STCDEL, audit_info); @@ -587,21 +588,19 @@ static int netlbl_unlhsh_remove_addr4(struct net *net, addr->s_addr, mask->s_addr); if (dev != NULL) dev_put(dev); - if (entry != NULL && - security_secid_to_secctx(entry->secid, - &secctx, &secctx_len) == 0) { + if (entry && security_secid_to_secctx(entry->secid, + &secctx, + &secctx_len) == 0) { audit_log_format(audit_buf, " sec_obj=%s", secctx); security_release_secctx(secctx, secctx_len); } - audit_log_format(audit_buf, " res=%u", entry != NULL ? 1 : 0); + audit_log_format(audit_buf, " res=%u", ret_val == 0 ? 1 : 0); audit_log_end(audit_buf); } - if (entry == NULL) - return -ENOENT; - - call_rcu(&entry->rcu, netlbl_unlhsh_free_addr4); - return 0; + if (ret_val == 0) + call_rcu(&entry->rcu, netlbl_unlhsh_free_addr4); + return ret_val; } #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) @@ -625,6 +624,7 @@ static int netlbl_unlhsh_remove_addr6(struct net *net, const struct in6_addr *mask, struct netlbl_audit *audit_info) { + int ret_val = 0; struct netlbl_af6list *list_entry; struct netlbl_unlhsh_addr6 *entry; struct audit_buffer *audit_buf; @@ -638,7 +638,7 @@ static int netlbl_unlhsh_remove_addr6(struct net *net, if (list_entry != NULL) entry = netlbl_unlhsh_addr6_entry(list_entry); else - entry = NULL; + ret_val = -ENOENT; audit_buf = netlbl_audit_start_common(AUDIT_MAC_UNLBL_STCDEL, audit_info); @@ -649,21 +649,19 @@ static int netlbl_unlhsh_remove_addr6(struct net *net, addr, mask); if (dev != NULL) dev_put(dev); - if (entry != NULL && - security_secid_to_secctx(entry->secid, - &secctx, &secctx_len) == 0) { + if (entry && security_secid_to_secctx(entry->secid, + &secctx, + &secctx_len) == 0) { audit_log_format(audit_buf, " sec_obj=%s", secctx); security_release_secctx(secctx, secctx_len); } - audit_log_format(audit_buf, " res=%u", entry != NULL ? 1 : 0); + audit_log_format(audit_buf, " res=%u", ret_val == 0 ? 1 : 0); audit_log_end(audit_buf); } - if (entry == NULL) - return -ENOENT; - - call_rcu(&entry->rcu, netlbl_unlhsh_free_addr6); - return 0; + if (ret_val == 0) + call_rcu(&entry->rcu, netlbl_unlhsh_free_addr6); + return ret_val; } #endif /* IPv6 */ diff --git a/trunk/net/phonet/pep-gprs.c b/trunk/net/phonet/pep-gprs.c index 803eeef0aa85..9978afbd9f2a 100644 --- a/trunk/net/phonet/pep-gprs.c +++ b/trunk/net/phonet/pep-gprs.c @@ -155,13 +155,12 @@ static void gprs_data_ready(struct sock *sk, int len) static void gprs_write_space(struct sock *sk) { struct gprs_dev *dev = sk->sk_user_data; - struct net_device *net = dev->net; unsigned credits = pep_writeable(sk); spin_lock_bh(&dev->tx_lock); dev->tx_max = credits; - if (credits > skb_queue_len(&dev->tx_queue) && netif_running(net)) - netif_wake_queue(net); + if (credits > skb_queue_len(&dev->tx_queue)) + netif_wake_queue(dev->net); spin_unlock_bh(&dev->tx_lock); } @@ -169,23 +168,6 @@ static void gprs_write_space(struct sock *sk) * Network device callbacks */ -static int gprs_open(struct net_device *dev) -{ - struct gprs_dev *gp = netdev_priv(dev); - - gprs_write_space(gp->sk); - return 0; -} - -static int gprs_close(struct net_device *dev) -{ - struct gprs_dev *gp = netdev_priv(dev); - - netif_stop_queue(dev); - flush_work(&gp->tx_work); - return 0; -} - static int gprs_xmit(struct sk_buff *skb, struct net_device *net) { struct gprs_dev *dev = netdev_priv(net); @@ -272,8 +254,6 @@ static void gprs_setup(struct net_device *net) net->tx_queue_len = 10; net->destructor = free_netdev; - net->open = gprs_open; - net->stop = gprs_close; net->hard_start_xmit = gprs_xmit; /* mandatory */ net->change_mtu = gprs_set_mtu; net->get_stats = gprs_get_stats; @@ -338,6 +318,7 @@ int gprs_attach(struct sock *sk) dev->sk = sk; printk(KERN_DEBUG"%s: attached\n", net->name); + gprs_write_space(sk); /* kick off TX */ return net->ifindex; out_rel: @@ -360,5 +341,7 @@ void gprs_detach(struct sock *sk) printk(KERN_DEBUG"%s: detached\n", net->name); unregister_netdev(net); + flush_scheduled_work(); sock_put(sk); + skb_queue_purge(&dev->tx_queue); } diff --git a/trunk/net/sched/sch_netem.c b/trunk/net/sched/sch_netem.c index 98402f0efa47..a11959908d9a 100644 --- a/trunk/net/sched/sch_netem.c +++ b/trunk/net/sched/sch_netem.c @@ -46,6 +46,9 @@ layering other disciplines. It does not need to do bandwidth control either since that can be handled by using token bucket or other rate control. + + The simulator is limited by the Linux timer resolution + and will create packet bursts on the HZ boundary (1ms). */ struct netem_sched_data {