From 90cfcc2bdadbec304a07228f614a9fff05a9b606 Mon Sep 17 00:00:00 2001
From: Keith Packard <keithp@keithp.com>
Date: Mon, 26 Sep 2011 20:42:37 -0700
Subject: [PATCH] --- yaml --- r: 269813 b: refs/heads/master c:
 afffb9dfb62a9eb2a6e467a3875907189e49a2d2 h: refs/heads/master i:   269811:
 6ec2ca0aa7ae61be38aa2b5e743290b0ade966f2 v: v3

---
 [refs]                                     |  2 +-
 trunk/drivers/gpu/drm/i915/intel_display.c | 14 ++++----------
 2 files changed, 5 insertions(+), 11 deletions(-)

diff --git a/[refs] b/[refs]
index 5e80fa54b965..39bb29a91de3 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 99eb6a01e5ac6cf28aadc64e6ff346939874dfd2
+refs/heads/master: afffb9dfb62a9eb2a6e467a3875907189e49a2d2
diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c
index 4c9684c54f18..b072a35b6f52 100644
--- a/trunk/drivers/gpu/drm/i915/intel_display.c
+++ b/trunk/drivers/gpu/drm/i915/intel_display.c
@@ -5281,16 +5281,10 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
 		num_connectors++;
 	}
 
-	if (is_lvds && intel_panel_use_ssc(dev_priv) && num_connectors < 2) {
-		refclk = dev_priv->lvds_ssc_freq * 1000;
-		DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n",
-			      refclk / 1000);
-	} else {
-		refclk = 96000;
-		if (!has_edp_encoder ||
-		    intel_encoder_is_pch_edp(&has_edp_encoder->base))
-			refclk = 120000; /* 120Mhz refclk */
-	}
+	/*
+	 * Every reference clock in a PCH system is 120MHz
+	 */
+	refclk = 120000;
 
 	/*
 	 * Returns a set of divisors for the desired target clock with the given