From 92c6f81bd6ed05b69c83b10e60c5a042ab1eb043 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Tue, 19 Feb 2013 15:16:39 +0200 Subject: [PATCH] --- yaml --- r: 371163 b: refs/heads/master c: 21ad833075801a7cd81b5ef1604ffc6c600e5ff9 h: refs/heads/master i: 371161: 16ab411952e1f05116601dccee1fc3a618d12589 371159: 44f91e179c8d3dd3b156e93d7cd47ea86701e5af v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/i915_irq.c | 31 +++++++++++++++++---------- 2 files changed, 21 insertions(+), 12 deletions(-) diff --git a/[refs] b/[refs] index 5593851d3141..95e7b82a1a9f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 5e2032d47ac9b67e671bd855c5e68005190954da +refs/heads/master: 21ad833075801a7cd81b5ef1604ffc6c600e5ff9 diff --git a/trunk/drivers/gpu/drm/i915/i915_irq.c b/trunk/drivers/gpu/drm/i915/i915_irq.c index 6488249477db..18de788f1aa8 100644 --- a/trunk/drivers/gpu/drm/i915/i915_irq.c +++ b/trunk/drivers/gpu/drm/i915/i915_irq.c @@ -1547,7 +1547,7 @@ void i915_handle_error(struct drm_device *dev, bool wedged) queue_work(dev_priv->wq, &dev_priv->gpu_error.work); } -static void i915_pageflip_stall_check(struct drm_device *dev, int pipe) +static void __always_unused i915_pageflip_stall_check(struct drm_device *dev, int pipe) { drm_i915_private_t *dev_priv = dev->dev_private; struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; @@ -2598,6 +2598,8 @@ static int i965_irq_postinstall(struct drm_device *dev) I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT); enable_mask = ~dev_priv->irq_mask; + enable_mask &= ~(I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT | + I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT); enable_mask |= I915_USER_INTERRUPT; if (IS_G4X(dev)) @@ -2684,6 +2686,13 @@ static irqreturn_t i965_irq_handler(int irq, void *arg) unsigned long irqflags; int irq_received; int ret = IRQ_NONE, pipe; + u32 flip[2] = { + I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT, + I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT + }; + u32 flip_mask = + I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT | + I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT; atomic_inc(&dev_priv->irq_received); @@ -2692,7 +2701,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg) for (;;) { bool blc_event = false; - irq_received = iir != 0; + irq_received = (iir & ~flip_mask) != 0; /* Can't rely on pipestat interrupt bit in iir as it might * have been cleared after the pipestat interrupt was received. @@ -2739,7 +2748,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg) I915_READ(PORT_HOTPLUG_STAT); } - I915_WRITE(IIR, iir); + I915_WRITE(IIR, iir & ~flip_mask); new_iir = I915_READ(IIR); /* Flush posted writes */ if (iir & I915_USER_INTERRUPT) @@ -2747,17 +2756,17 @@ static irqreturn_t i965_irq_handler(int irq, void *arg) if (iir & I915_BSD_USER_INTERRUPT) notify_ring(dev, &dev_priv->ring[VCS]); - if (iir & I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT) - intel_prepare_page_flip(dev, 0); - - if (iir & I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT) - intel_prepare_page_flip(dev, 1); - for_each_pipe(pipe) { if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS && drm_handle_vblank(dev, pipe)) { - i915_pageflip_stall_check(dev, pipe); - intel_finish_page_flip(dev, pipe); + if (iir & flip[pipe]) { + intel_prepare_page_flip(dev, pipe); + + if ((I915_READ(ISR) & flip[pipe]) == 0) { + intel_finish_page_flip(dev, pipe); + flip_mask &= ~flip[pipe]; + } + } } if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)