From 930c70a349ea0f166569000327c77b85cc286d01 Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Thu, 25 Oct 2012 10:37:43 -0200 Subject: [PATCH] --- yaml --- r: 345171 b: refs/heads/master c: fc316cbe4692fc0da19dfc9a87db270964d3d056 h: refs/heads/master i: 345169: c91a424e6a7b288bcbe71d12775b0293aeedb6d3 345167: c9db13ab16f28777b1938fedd1ca5650963dc862 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_display.c | 28 +++++++--------------- 2 files changed, 9 insertions(+), 21 deletions(-) diff --git a/[refs] b/[refs] index 861109346bc0..039d72bde072 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 1f544388be50653aec6334cefc4955a3588ae679 +refs/heads/master: fc316cbe4692fc0da19dfc9a87db270964d3d056 diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index a90da35dff1a..10222e88b95e 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -2849,7 +2849,7 @@ static void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc) mutex_unlock(&dev->struct_mutex); } -static bool intel_crtc_driving_pch(struct drm_crtc *crtc) +static bool ironlake_crtc_driving_pch(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; struct intel_encoder *intel_encoder; @@ -2859,23 +2859,6 @@ static bool intel_crtc_driving_pch(struct drm_crtc *crtc) * must be driven by its own crtc; no sharing is possible. */ for_each_encoder_on_crtc(dev, crtc, intel_encoder) { - - /* On Haswell, LPT PCH handles the VGA connection via FDI, and Haswell - * CPU handles all others */ - if (IS_HASWELL(dev)) { - /* It is still unclear how this will work on PPT, so throw up a warning */ - WARN_ON(!HAS_PCH_LPT(dev)); - - if (intel_encoder->type == INTEL_OUTPUT_ANALOG) { - DRM_DEBUG_KMS("Haswell detected DAC encoder, assuming is PCH\n"); - return true; - } else { - DRM_DEBUG_KMS("Haswell detected encoder %d, assuming is CPU\n", - intel_encoder->type); - return false; - } - } - switch (intel_encoder->type) { case INTEL_OUTPUT_EDP: if (!intel_encoder_is_pch_edp(&intel_encoder->base)) @@ -2887,6 +2870,11 @@ static bool intel_crtc_driving_pch(struct drm_crtc *crtc) return true; } +static bool haswell_crtc_driving_pch(struct drm_crtc *crtc) +{ + return intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG); +} + /* Program iCLKIP clock to the desired frequency */ static void lpt_program_iclkip(struct drm_crtc *crtc) { @@ -3215,7 +3203,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) I915_WRITE(PCH_LVDS, temp | LVDS_PORT_EN); } - is_pch_port = intel_crtc_driving_pch(crtc); + is_pch_port = ironlake_crtc_driving_pch(crtc); if (is_pch_port) { ironlake_fdi_pll_enable(intel_crtc); @@ -3293,7 +3281,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) intel_crtc->active = true; intel_update_watermarks(dev); - is_pch_port = intel_crtc_driving_pch(crtc); + is_pch_port = haswell_crtc_driving_pch(crtc); if (is_pch_port) { ironlake_fdi_pll_enable(intel_crtc);