diff --git a/[refs] b/[refs] index 44fb72eba17e..1193507ce5f9 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 3ff80abce7d0d3c1eacda53e73c94a57ade2e0a5 +refs/heads/master: 7bf1c8753c3937820b8a2b6e3d21c955ceaa0706 diff --git a/trunk/Documentation/DocBook/media/v4l/pixfmt-nv12m.xml b/trunk/Documentation/DocBook/media/v4l/pixfmt-nv12m.xml index 3fd3ce5df270..5274c24d11e0 100644 --- a/trunk/Documentation/DocBook/media/v4l/pixfmt-nv12m.xml +++ b/trunk/Documentation/DocBook/media/v4l/pixfmt-nv12m.xml @@ -1,6 +1,6 @@ - V4L2_PIX_FMT_NV12M ('NV12M') + V4L2_PIX_FMT_NV12M ('NM12') &manvol; diff --git a/trunk/Documentation/DocBook/media/v4l/pixfmt-yuv420m.xml b/trunk/Documentation/DocBook/media/v4l/pixfmt-yuv420m.xml index 9957863daf18..60308f1eefdf 100644 --- a/trunk/Documentation/DocBook/media/v4l/pixfmt-yuv420m.xml +++ b/trunk/Documentation/DocBook/media/v4l/pixfmt-yuv420m.xml @@ -1,6 +1,6 @@ - V4L2_PIX_FMT_YUV420M ('YU12M') + V4L2_PIX_FMT_YUV420M ('YM12') &manvol; diff --git a/trunk/Documentation/arm/00-INDEX b/trunk/Documentation/arm/00-INDEX index 36420e116c90..91c24a1e8a9e 100644 --- a/trunk/Documentation/arm/00-INDEX +++ b/trunk/Documentation/arm/00-INDEX @@ -4,6 +4,8 @@ Booting - requirements for booting Interrupts - ARM Interrupt subsystem documentation +IXP2000 + - Release Notes for Linux on Intel's IXP2000 Network Processor msm - MSM specific documentation Netwinder diff --git a/trunk/Documentation/arm/IXP2000 b/trunk/Documentation/arm/IXP2000 new file mode 100644 index 000000000000..68d21d92a30b --- /dev/null +++ b/trunk/Documentation/arm/IXP2000 @@ -0,0 +1,69 @@ + +------------------------------------------------------------------------- +Release Notes for Linux on Intel's IXP2000 Network Processor + +Maintained by Deepak Saxena +------------------------------------------------------------------------- + +1. Overview + +Intel's IXP2000 family of NPUs (IXP2400, IXP2800, IXP2850) is designed +for high-performance network applications such high-availability +telecom systems. In addition to an XScale core, it contains up to 8 +"MicroEngines" that run special code, several high-end networking +interfaces (UTOPIA, SPI, etc), a PCI host bridge, one serial port, +flash interface, and some other odds and ends. For more information, see: + +http://developer.intel.com + +2. Linux Support + +Linux currently supports the following features on the IXP2000 NPUs: + +- On-chip serial +- PCI +- Flash (MTD/JFFS2) +- I2C through GPIO +- Timers (watchdog, OS) + +That is about all we can support under Linux ATM b/c the core networking +components of the chip are accessed via Intel's closed source SDK. +Please contact Intel directly on issues with using those. There is +also a mailing list run by some folks at Princeton University that might +be of help: https://lists.cs.princeton.edu/mailman/listinfo/ixp2xxx + +WHATEVER YOU DO, DO NOT POST EMAIL TO THE LINUX-ARM OR LINUX-ARM-KERNEL +MAILING LISTS REGARDING THE INTEL SDK. + +3. Supported Platforms + +- Intel IXDP2400 Reference Platform +- Intel IXDP2800 Reference Platform +- Intel IXDP2401 Reference Platform +- Intel IXDP2801 Reference Platform +- RadiSys ENP-2611 + +4. Usage Notes + +- The IXP2000 platforms usually have rather complex PCI bus topologies + with large memory space requirements. In addition, b/c of the way the + Intel SDK is designed, devices are enumerated in a very specific + way. B/c of this this, we use "pci=firmware" option in the kernel + command line so that we do not re-enumerate the bus. + +- IXDP2x01 systems have variable clock tick rates that we cannot determine + via HW registers. The "ixdp2x01_clk=XXX" cmd line options allow you + to pass the clock rate to the board port. + +5. Thanks + +The IXP2000 work has been funded by Intel Corp. and MontaVista Software, Inc. + +The following people have contributed patches/comments/etc: + +Naeem F. Afzal +Lennert Buytenhek +Jeffrey Daly + +------------------------------------------------------------------------- +Last Update: 8/09/2004 diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 8b2011b0188e..1a2f8f5823e0 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -640,6 +640,13 @@ S: Maintained F: drivers/amba/ F: include/linux/amba/bus.h +ARM/ADI ROADRUNNER MACHINE SUPPORT +M: Lennert Buytenhek +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +S: Maintained +F: arch/arm/mach-ixp23xx/ +F: arch/arm/mach-ixp23xx/include/mach/ + ARM/ADS SPHERE MACHINE SUPPORT M: Lennert Buytenhek L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) @@ -852,11 +859,21 @@ M: Dan Williams L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained +ARM/INTEL IXP2000 ARM ARCHITECTURE +M: Lennert Buytenhek +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +S: Maintained + ARM/INTEL IXDP2850 MACHINE SUPPORT M: Lennert Buytenhek L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained +ARM/INTEL IXP23XX ARM ARCHITECTURE +M: Lennert Buytenhek +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +S: Maintained + ARM/INTEL IXP4XX ARM ARCHITECTURE M: Imre Kaloz M: Krzysztof Halasa @@ -2304,9 +2321,9 @@ S: Supported F: drivers/acpi/dock.c DOCUMENTATION -M: Randy Dunlap +M: Rob Landley L: linux-doc@vger.kernel.org -T: quilt http://xenotime.net/kernel-doc-patches/current/ +T: TBD S: Maintained F: Documentation/ diff --git a/trunk/Makefile b/trunk/Makefile index f6578f47e21e..afc868e6c75d 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 3 PATCHLEVEL = 4 SUBLEVEL = 0 -EXTRAVERSION = -rc3 +EXTRAVERSION = -rc4 NAME = Saber-toothed Squirrel # *DOCUMENTATION* diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index a231594ba44e..cf006d40342c 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -340,8 +340,8 @@ config ARCH_AT91 select IRQ_DOMAIN select NEED_MACH_IO_H if PCCARD help - This enables support for systems based on Atmel - AT91RM9200 and AT91SAM9* processors. + This enables support for systems based on the Atmel AT91RM9200, + AT91SAM9 processors. config ARCH_BCMRING bool "Broadcom BCMRING" @@ -528,6 +528,28 @@ config ARCH_IOP33X help Support for Intel's IOP33X (XScale) family of processors. +config ARCH_IXP23XX + bool "IXP23XX-based" + depends on MMU + select CPU_XSC3 + select PCI + select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_IO_H + select NEED_MACH_MEMORY_H + help + Support for Intel's IXP23xx (XScale) family of processors. + +config ARCH_IXP2000 + bool "IXP2400/2800-based" + depends on MMU + select CPU_XSCALE + select PCI + select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_IO_H + select NEED_MACH_MEMORY_H + help + Support for Intel's IXP2400/2800 (XScale) family of processors. + config ARCH_IXP4XX bool "IXP4xx-based" depends on MMU @@ -1024,6 +1046,10 @@ source "arch/arm/mach-iop13xx/Kconfig" source "arch/arm/mach-ixp4xx/Kconfig" +source "arch/arm/mach-ixp2000/Kconfig" + +source "arch/arm/mach-ixp23xx/Kconfig" + source "arch/arm/mach-kirkwood/Kconfig" source "arch/arm/mach-ks8695/Kconfig" diff --git a/trunk/arch/arm/Makefile b/trunk/arch/arm/Makefile index a0c40a0986cd..047a20780fc1 100644 --- a/trunk/arch/arm/Makefile +++ b/trunk/arch/arm/Makefile @@ -149,6 +149,8 @@ machine-$(CONFIG_ARCH_INTEGRATOR) := integrator machine-$(CONFIG_ARCH_IOP13XX) := iop13xx machine-$(CONFIG_ARCH_IOP32X) := iop32x machine-$(CONFIG_ARCH_IOP33X) := iop33x +machine-$(CONFIG_ARCH_IXP2000) := ixp2000 +machine-$(CONFIG_ARCH_IXP23XX) := ixp23xx machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx machine-$(CONFIG_ARCH_KIRKWOOD) := kirkwood machine-$(CONFIG_ARCH_KS8695) := ks8695 diff --git a/trunk/arch/arm/boot/compressed/head-xscale.S b/trunk/arch/arm/boot/compressed/head-xscale.S index 6ab0599c02dd..aa5ee49c5c5a 100644 --- a/trunk/arch/arm/boot/compressed/head-xscale.S +++ b/trunk/arch/arm/boot/compressed/head-xscale.S @@ -32,3 +32,10 @@ __XScale_start: bic r0, r0, #0x1000 @ clear Icache mcr p15, 0, r0, c1, c0, 0 +#ifdef CONFIG_ARCH_IXP2000 + mov r1, #-1 + mov r0, #0xd6000000 + str r1, [r0, #0x14] + str r1, [r0, #0x18] +#endif + diff --git a/trunk/arch/arm/common/Makefile b/trunk/arch/arm/common/Makefile index e8a4e58f1b82..215816f1775f 100644 --- a/trunk/arch/arm/common/Makefile +++ b/trunk/arch/arm/common/Makefile @@ -11,5 +11,7 @@ obj-$(CONFIG_DMABOUNCE) += dmabounce.o obj-$(CONFIG_SHARP_LOCOMO) += locomo.o obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o obj-$(CONFIG_SHARP_SCOOP) += scoop.o +obj-$(CONFIG_ARCH_IXP2000) += uengine.o +obj-$(CONFIG_ARCH_IXP23XX) += uengine.o obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o diff --git a/trunk/arch/arm/common/uengine.c b/trunk/arch/arm/common/uengine.c new file mode 100644 index 000000000000..bef408f3d76c --- /dev/null +++ b/trunk/arch/arm/common/uengine.c @@ -0,0 +1,507 @@ +/* + * Generic library functions for the microengines found on the Intel + * IXP2000 series of network processors. + * + * Copyright (C) 2004, 2005 Lennert Buytenhek + * Dedicated to Marija Kulikova. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as + * published by the Free Software Foundation; either version 2.1 of the + * License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#if defined(CONFIG_ARCH_IXP2000) +#define IXP_UENGINE_CSR_VIRT_BASE IXP2000_UENGINE_CSR_VIRT_BASE +#define IXP_PRODUCT_ID IXP2000_PRODUCT_ID +#define IXP_MISC_CONTROL IXP2000_MISC_CONTROL +#define IXP_RESET1 IXP2000_RESET1 +#else +#if defined(CONFIG_ARCH_IXP23XX) +#define IXP_UENGINE_CSR_VIRT_BASE IXP23XX_UENGINE_CSR_VIRT_BASE +#define IXP_PRODUCT_ID IXP23XX_PRODUCT_ID +#define IXP_MISC_CONTROL IXP23XX_MISC_CONTROL +#define IXP_RESET1 IXP23XX_RESET1 +#else +#error unknown platform +#endif +#endif + +#define USTORE_ADDRESS 0x000 +#define USTORE_DATA_LOWER 0x004 +#define USTORE_DATA_UPPER 0x008 +#define CTX_ENABLES 0x018 +#define CC_ENABLE 0x01c +#define CSR_CTX_POINTER 0x020 +#define INDIRECT_CTX_STS 0x040 +#define ACTIVE_CTX_STS 0x044 +#define INDIRECT_CTX_SIG_EVENTS 0x048 +#define INDIRECT_CTX_WAKEUP_EVENTS 0x050 +#define NN_PUT 0x080 +#define NN_GET 0x084 +#define TIMESTAMP_LOW 0x0c0 +#define TIMESTAMP_HIGH 0x0c4 +#define T_INDEX_BYTE_INDEX 0x0f4 +#define LOCAL_CSR_STATUS 0x180 + +u32 ixp2000_uengine_mask; + +static void *ixp2000_uengine_csr_area(int uengine) +{ + return ((void *)IXP_UENGINE_CSR_VIRT_BASE) + (uengine << 10); +} + +/* + * LOCAL_CSR_STATUS=1 after a read or write to a microengine's CSR + * space means that the microengine we tried to access was also trying + * to access its own CSR space on the same clock cycle as we did. When + * this happens, we lose the arbitration process by default, and the + * read or write we tried to do was not actually performed, so we try + * again until it succeeds. + */ +u32 ixp2000_uengine_csr_read(int uengine, int offset) +{ + void *uebase; + u32 *local_csr_status; + u32 *reg; + u32 value; + + uebase = ixp2000_uengine_csr_area(uengine); + + local_csr_status = (u32 *)(uebase + LOCAL_CSR_STATUS); + reg = (u32 *)(uebase + offset); + do { + value = ixp2000_reg_read(reg); + } while (ixp2000_reg_read(local_csr_status) & 1); + + return value; +} +EXPORT_SYMBOL(ixp2000_uengine_csr_read); + +void ixp2000_uengine_csr_write(int uengine, int offset, u32 value) +{ + void *uebase; + u32 *local_csr_status; + u32 *reg; + + uebase = ixp2000_uengine_csr_area(uengine); + + local_csr_status = (u32 *)(uebase + LOCAL_CSR_STATUS); + reg = (u32 *)(uebase + offset); + do { + ixp2000_reg_write(reg, value); + } while (ixp2000_reg_read(local_csr_status) & 1); +} +EXPORT_SYMBOL(ixp2000_uengine_csr_write); + +void ixp2000_uengine_reset(u32 uengine_mask) +{ + u32 value; + + value = ixp2000_reg_read(IXP_RESET1) & ~ixp2000_uengine_mask; + + uengine_mask &= ixp2000_uengine_mask; + ixp2000_reg_wrb(IXP_RESET1, value | uengine_mask); + ixp2000_reg_wrb(IXP_RESET1, value); +} +EXPORT_SYMBOL(ixp2000_uengine_reset); + +void ixp2000_uengine_set_mode(int uengine, u32 mode) +{ + /* + * CTL_STR_PAR_EN: unconditionally enable parity checking on + * control store. + */ + mode |= 0x10000000; + ixp2000_uengine_csr_write(uengine, CTX_ENABLES, mode); + + /* + * Enable updating of condition codes. + */ + ixp2000_uengine_csr_write(uengine, CC_ENABLE, 0x00002000); + + /* + * Initialise other per-microengine registers. + */ + ixp2000_uengine_csr_write(uengine, NN_PUT, 0x00); + ixp2000_uengine_csr_write(uengine, NN_GET, 0x00); + ixp2000_uengine_csr_write(uengine, T_INDEX_BYTE_INDEX, 0); +} +EXPORT_SYMBOL(ixp2000_uengine_set_mode); + +static int make_even_parity(u32 x) +{ + return hweight32(x) & 1; +} + +static void ustore_write(int uengine, u64 insn) +{ + /* + * Generate even parity for top and bottom 20 bits. + */ + insn |= (u64)make_even_parity((insn >> 20) & 0x000fffff) << 41; + insn |= (u64)make_even_parity(insn & 0x000fffff) << 40; + + /* + * Write to microstore. The second write auto-increments + * the USTORE_ADDRESS index register. + */ + ixp2000_uengine_csr_write(uengine, USTORE_DATA_LOWER, (u32)insn); + ixp2000_uengine_csr_write(uengine, USTORE_DATA_UPPER, (u32)(insn >> 32)); +} + +void ixp2000_uengine_load_microcode(int uengine, u8 *ucode, int insns) +{ + int i; + + /* + * Start writing to microstore at address 0. + */ + ixp2000_uengine_csr_write(uengine, USTORE_ADDRESS, 0x80000000); + for (i = 0; i < insns; i++) { + u64 insn; + + insn = (((u64)ucode[0]) << 32) | + (((u64)ucode[1]) << 24) | + (((u64)ucode[2]) << 16) | + (((u64)ucode[3]) << 8) | + ((u64)ucode[4]); + ucode += 5; + + ustore_write(uengine, insn); + } + + /* + * Pad with a few NOPs at the end (to avoid the microengine + * aborting as it prefetches beyond the last instruction), unless + * we run off the end of the instruction store first, at which + * point the address register will wrap back to zero. + */ + for (i = 0; i < 4; i++) { + u32 addr; + + addr = ixp2000_uengine_csr_read(uengine, USTORE_ADDRESS); + if (addr == 0x80000000) + break; + ustore_write(uengine, 0xf0000c0300ULL); + } + + /* + * End programming. + */ + ixp2000_uengine_csr_write(uengine, USTORE_ADDRESS, 0x00000000); +} +EXPORT_SYMBOL(ixp2000_uengine_load_microcode); + +void ixp2000_uengine_init_context(int uengine, int context, int pc) +{ + /* + * Select the right context for indirect access. + */ + ixp2000_uengine_csr_write(uengine, CSR_CTX_POINTER, context); + + /* + * Initialise signal masks to immediately go to Ready state. + */ + ixp2000_uengine_csr_write(uengine, INDIRECT_CTX_SIG_EVENTS, 1); + ixp2000_uengine_csr_write(uengine, INDIRECT_CTX_WAKEUP_EVENTS, 1); + + /* + * Set program counter. + */ + ixp2000_uengine_csr_write(uengine, INDIRECT_CTX_STS, pc); +} +EXPORT_SYMBOL(ixp2000_uengine_init_context); + +void ixp2000_uengine_start_contexts(int uengine, u8 ctx_mask) +{ + u32 mask; + + /* + * Enable the specified context to go to Executing state. + */ + mask = ixp2000_uengine_csr_read(uengine, CTX_ENABLES); + mask |= ctx_mask << 8; + ixp2000_uengine_csr_write(uengine, CTX_ENABLES, mask); +} +EXPORT_SYMBOL(ixp2000_uengine_start_contexts); + +void ixp2000_uengine_stop_contexts(int uengine, u8 ctx_mask) +{ + u32 mask; + + /* + * Disable the Ready->Executing transition. Note that this + * does not stop the context until it voluntarily yields. + */ + mask = ixp2000_uengine_csr_read(uengine, CTX_ENABLES); + mask &= ~(ctx_mask << 8); + ixp2000_uengine_csr_write(uengine, CTX_ENABLES, mask); +} +EXPORT_SYMBOL(ixp2000_uengine_stop_contexts); + +static int check_ixp_type(struct ixp2000_uengine_code *c) +{ + u32 product_id; + u32 rev; + + product_id = ixp2000_reg_read(IXP_PRODUCT_ID); + if (((product_id >> 16) & 0x1f) != 0) + return 0; + + switch ((product_id >> 8) & 0xff) { +#ifdef CONFIG_ARCH_IXP2000 + case 0: /* IXP2800 */ + if (!(c->cpu_model_bitmask & 4)) + return 0; + break; + + case 1: /* IXP2850 */ + if (!(c->cpu_model_bitmask & 8)) + return 0; + break; + + case 2: /* IXP2400 */ + if (!(c->cpu_model_bitmask & 2)) + return 0; + break; +#endif + +#ifdef CONFIG_ARCH_IXP23XX + case 4: /* IXP23xx */ + if (!(c->cpu_model_bitmask & 0x3f0)) + return 0; + break; +#endif + + default: + return 0; + } + + rev = product_id & 0xff; + if (rev < c->cpu_min_revision || rev > c->cpu_max_revision) + return 0; + + return 1; +} + +static void generate_ucode(u8 *ucode, u32 *gpr_a, u32 *gpr_b) +{ + int offset; + int i; + + offset = 0; + + for (i = 0; i < 128; i++) { + u8 b3; + u8 b2; + u8 b1; + u8 b0; + + b3 = (gpr_a[i] >> 24) & 0xff; + b2 = (gpr_a[i] >> 16) & 0xff; + b1 = (gpr_a[i] >> 8) & 0xff; + b0 = gpr_a[i] & 0xff; + + /* immed[@ai, (b1 << 8) | b0] */ + /* 11110000 0000VVVV VVVV11VV VVVVVV00 1IIIIIII */ + ucode[offset++] = 0xf0; + ucode[offset++] = (b1 >> 4); + ucode[offset++] = (b1 << 4) | 0x0c | (b0 >> 6); + ucode[offset++] = (b0 << 2); + ucode[offset++] = 0x80 | i; + + /* immed_w1[@ai, (b3 << 8) | b2] */ + /* 11110100 0100VVVV VVVV11VV VVVVVV00 1IIIIIII */ + ucode[offset++] = 0xf4; + ucode[offset++] = 0x40 | (b3 >> 4); + ucode[offset++] = (b3 << 4) | 0x0c | (b2 >> 6); + ucode[offset++] = (b2 << 2); + ucode[offset++] = 0x80 | i; + } + + for (i = 0; i < 128; i++) { + u8 b3; + u8 b2; + u8 b1; + u8 b0; + + b3 = (gpr_b[i] >> 24) & 0xff; + b2 = (gpr_b[i] >> 16) & 0xff; + b1 = (gpr_b[i] >> 8) & 0xff; + b0 = gpr_b[i] & 0xff; + + /* immed[@bi, (b1 << 8) | b0] */ + /* 11110000 0000VVVV VVVV001I IIIIII11 VVVVVVVV */ + ucode[offset++] = 0xf0; + ucode[offset++] = (b1 >> 4); + ucode[offset++] = (b1 << 4) | 0x02 | (i >> 6); + ucode[offset++] = (i << 2) | 0x03; + ucode[offset++] = b0; + + /* immed_w1[@bi, (b3 << 8) | b2] */ + /* 11110100 0100VVVV VVVV001I IIIIII11 VVVVVVVV */ + ucode[offset++] = 0xf4; + ucode[offset++] = 0x40 | (b3 >> 4); + ucode[offset++] = (b3 << 4) | 0x02 | (i >> 6); + ucode[offset++] = (i << 2) | 0x03; + ucode[offset++] = b2; + } + + /* ctx_arb[kill] */ + ucode[offset++] = 0xe0; + ucode[offset++] = 0x00; + ucode[offset++] = 0x01; + ucode[offset++] = 0x00; + ucode[offset++] = 0x00; +} + +static int set_initial_registers(int uengine, struct ixp2000_uengine_code *c) +{ + int per_ctx_regs; + u32 *gpr_a; + u32 *gpr_b; + u8 *ucode; + int i; + + gpr_a = kzalloc(128 * sizeof(u32), GFP_KERNEL); + gpr_b = kzalloc(128 * sizeof(u32), GFP_KERNEL); + ucode = kmalloc(513 * 5, GFP_KERNEL); + if (gpr_a == NULL || gpr_b == NULL || ucode == NULL) { + kfree(ucode); + kfree(gpr_b); + kfree(gpr_a); + return 1; + } + + per_ctx_regs = 16; + if (c->uengine_parameters & IXP2000_UENGINE_4_CONTEXTS) + per_ctx_regs = 32; + + for (i = 0; i < 256; i++) { + struct ixp2000_reg_value *r = c->initial_reg_values + i; + u32 *bank; + int inc; + int j; + + if (r->reg == -1) + break; + + bank = (r->reg & 0x400) ? gpr_b : gpr_a; + inc = (r->reg & 0x80) ? 128 : per_ctx_regs; + + j = r->reg & 0x7f; + while (j < 128) { + bank[j] = r->value; + j += inc; + } + } + + generate_ucode(ucode, gpr_a, gpr_b); + ixp2000_uengine_load_microcode(uengine, ucode, 513); + ixp2000_uengine_init_context(uengine, 0, 0); + ixp2000_uengine_start_contexts(uengine, 0x01); + for (i = 0; i < 100; i++) { + u32 status; + + status = ixp2000_uengine_csr_read(uengine, ACTIVE_CTX_STS); + if (!(status & 0x80000000)) + break; + } + ixp2000_uengine_stop_contexts(uengine, 0x01); + + kfree(ucode); + kfree(gpr_b); + kfree(gpr_a); + + return !!(i == 100); +} + +int ixp2000_uengine_load(int uengine, struct ixp2000_uengine_code *c) +{ + int ctx; + + if (!check_ixp_type(c)) + return 1; + + if (!(ixp2000_uengine_mask & (1 << uengine))) + return 1; + + ixp2000_uengine_reset(1 << uengine); + ixp2000_uengine_set_mode(uengine, c->uengine_parameters); + if (set_initial_registers(uengine, c)) + return 1; + ixp2000_uengine_load_microcode(uengine, c->insns, c->num_insns); + + for (ctx = 0; ctx < 8; ctx++) + ixp2000_uengine_init_context(uengine, ctx, 0); + + return 0; +} +EXPORT_SYMBOL(ixp2000_uengine_load); + + +static int __init ixp2000_uengine_init(void) +{ + int uengine; + u32 value; + + /* + * Determine number of microengines present. + */ + switch ((ixp2000_reg_read(IXP_PRODUCT_ID) >> 8) & 0x1fff) { +#ifdef CONFIG_ARCH_IXP2000 + case 0: /* IXP2800 */ + case 1: /* IXP2850 */ + ixp2000_uengine_mask = 0x00ff00ff; + break; + + case 2: /* IXP2400 */ + ixp2000_uengine_mask = 0x000f000f; + break; +#endif + +#ifdef CONFIG_ARCH_IXP23XX + case 4: /* IXP23xx */ + ixp2000_uengine_mask = (*IXP23XX_EXP_CFG_FUSE >> 8) & 0xf; + break; +#endif + + default: + printk(KERN_INFO "Detected unknown IXP2000 model (%.8x)\n", + (unsigned int)ixp2000_reg_read(IXP_PRODUCT_ID)); + ixp2000_uengine_mask = 0x00000000; + break; + } + + /* + * Reset microengines. + */ + ixp2000_uengine_reset(ixp2000_uengine_mask); + + /* + * Synchronise timestamp counters across all microengines. + */ + value = ixp2000_reg_read(IXP_MISC_CONTROL); + ixp2000_reg_wrb(IXP_MISC_CONTROL, value & ~0x80); + for (uengine = 0; uengine < 32; uengine++) { + if (ixp2000_uengine_mask & (1 << uengine)) { + ixp2000_uengine_csr_write(uengine, TIMESTAMP_LOW, 0); + ixp2000_uengine_csr_write(uengine, TIMESTAMP_HIGH, 0); + } + } + ixp2000_reg_wrb(IXP_MISC_CONTROL, value | 0x80); + + return 0; +} + +subsys_initcall(ixp2000_uengine_init); diff --git a/trunk/arch/arm/configs/at91_dt_defconfig b/trunk/arch/arm/configs/at91_dt_defconfig deleted file mode 100644 index 67bc571ed0c3..000000000000 --- a/trunk/arch/arm/configs/at91_dt_defconfig +++ /dev/null @@ -1,196 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_KALLSYMS_ALL=y -CONFIG_EMBEDDED=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_LBDAF is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_AT91=y -CONFIG_SOC_AT91SAM9260=y -CONFIG_SOC_AT91SAM9263=y -CONFIG_SOC_AT91SAM9G45=y -CONFIG_SOC_AT91SAM9X5=y -CONFIG_MACH_AT91SAM_DT=y -CONFIG_AT91_PROGRAMMABLE_CLOCKS=y -CONFIG_AT91_TIMER_HZ=128 -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_LEDS=y -CONFIG_LEDS_CPU=y -CONFIG_UACCESS_WITH_MEMCPY=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ARM_APPENDED_DTB=y -CONFIG_ARM_ATAG_DTB_COMPAT=y -CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw" -CONFIG_KEXEC=y -CONFIG_AUTO_ZRELADDR=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_DIAG is not set -CONFIG_IPV6=y -# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET6_XFRM_MODE_TUNNEL is not set -# CONFIG_INET6_XFRM_MODE_BEET is not set -CONFIG_IPV6_SIT_6RD=y -# CONFIG_WIRELESS is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -# CONFIG_STANDALONE is not set -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ATMEL=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_GLUEBI=y -CONFIG_PROC_DEVICETREE=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=4 -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_ATMEL_PWM=y -CONFIG_ATMEL_TCLIB=y -CONFIG_EEPROM_93CX6=m -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_NETDEVICES=y -CONFIG_MII=y -CONFIG_MACB=y -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_CHELSIO is not set -# CONFIG_NET_VENDOR_FARADAY is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_STMICRO is not set -CONFIG_DAVICOM_PHY=y -CONFIG_MICREL_PHY=y -# CONFIG_WLAN is not set -CONFIG_INPUT_POLLDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=480 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272 -CONFIG_INPUT_JOYDEV=y -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_SERIO is not set -CONFIG_LEGACY_PTY_COUNT=4 -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_GPIO=y -CONFIG_SPI=y -CONFIG_SPI_ATMEL=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_AT91SAM9X_WATCHDOG=y -CONFIG_SSB=m -CONFIG_FB=y -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_ATMEL=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -# CONFIG_LCD_CLASS_DEVICE is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_ATMEL_LCDC=y -# CONFIG_BACKLIGHT_GENERIC is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_ACORN_8x8=y -CONFIG_FONT_MINI_4x6=y -CONFIG_LOGO=y -# CONFIG_HID_SUPPORT is not set -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_ACM=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SERIAL=y -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_FTDI_SIO=y -CONFIG_USB_SERIAL_PL2303=y -CONFIG_USB_GADGET=y -CONFIG_USB_AT91=m -CONFIG_USB_ATMEL_USBA=m -CONFIG_USB_ETH=m -CONFIG_USB_GADGETFS=m -CONFIG_USB_CDC_COMPOSITE=m -CONFIG_USB_G_ACM_MS=m -CONFIG_USB_G_MULTI=m -CONFIG_USB_G_MULTI_CDC=y -CONFIG_MMC=y -CONFIG_MMC_ATMELMCI=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_GPIO=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_AT91RM9200=y -CONFIG_RTC_DRV_AT91SAM9=y -CONFIG_DMADEVICES=y -# CONFIG_IOMMU_SUPPORT is not set -CONFIG_EXT2_FS=y -CONFIG_FANOTIFY=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_ISO8859_1=y -CONFIG_STRIP_ASM_SYMS=y -CONFIG_DEBUG_FS=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_FTRACE is not set -CONFIG_DEBUG_USER=y -CONFIG_CRYPTO=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_ARC4=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_USER_API_HASH=m -CONFIG_CRYPTO_USER_API_SKCIPHER=m -# CONFIG_CRYPTO_HW is not set -CONFIG_CRC_CCITT=m -CONFIG_CRC_ITU_T=m -CONFIG_CRC7=m -CONFIG_AVERAGE=y diff --git a/trunk/arch/arm/configs/at91rm9200_defconfig b/trunk/arch/arm/configs/at91rm9200_defconfig index d54e2acd3ab1..bbe4e1a1f5d8 100644 --- a/trunk/arch/arm/configs/at91rm9200_defconfig +++ b/trunk/arch/arm/configs/at91rm9200_defconfig @@ -14,7 +14,6 @@ CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_IOSCHED_CFQ is not set CONFIG_ARCH_AT91=y -CONFIG_ARCH_AT91RM9200=y CONFIG_MACH_ONEARM=y CONFIG_ARCH_AT91RM9200DK=y CONFIG_MACH_AT91RM9200EK=y diff --git a/trunk/arch/arm/configs/imx_v4_v5_defconfig b/trunk/arch/arm/configs/imx_v4_v5_defconfig index b5ac644e12af..6b31cb60daab 100644 --- a/trunk/arch/arm/configs/imx_v4_v5_defconfig +++ b/trunk/arch/arm/configs/imx_v4_v5_defconfig @@ -112,6 +112,7 @@ CONFIG_WATCHDOG=y CONFIG_IMX2_WDT=y CONFIG_MFD_MC13XXX=y CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_MC13783=y CONFIG_REGULATOR_MC13892=y CONFIG_FB=y diff --git a/trunk/arch/arm/configs/ixp2000_defconfig b/trunk/arch/arm/configs/ixp2000_defconfig new file mode 100644 index 000000000000..8405aded97a3 --- /dev/null +++ b/trunk/arch/arm/configs/ixp2000_defconfig @@ -0,0 +1,99 @@ +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +# CONFIG_HOTPLUG is not set +CONFIG_SLAB=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_ARCH_IXP2000=y +CONFIG_ARCH_ENP2611=y +CONFIG_ARCH_IXDP2400=y +CONFIG_ARCH_IXDP2800=y +CONFIG_ARCH_IXDP2401=y +CONFIG_ARCH_IXDP2801=y +# CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO is not set +# CONFIG_ARM_THUMB is not set +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyS0,57600 root=/dev/nfs ip=bootp mem=64M@0x0" +CONFIG_FPE_NWFPE=y +CONFIG_FPE_NWFPE_XP=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_SYN_COOKIES=y +CONFIG_IPV6=y +# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET6_XFRM_MODE_TUNNEL is not set +# CONFIG_INET6_XFRM_MODE_BEET is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_PREVENT_FIRMWARE_BUILD is not set +CONFIG_MTD=y +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y +CONFIG_MTD_REDBOOT_PARTS_READONLY=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_IXP2000=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_NBD=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_EEPROM_LEGACY=y +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +CONFIG_NET_ETHERNET=y +CONFIG_NET_PCI=y +CONFIG_CS89x0=y +CONFIG_E100=y +CONFIG_ENP2611_MSF_NET=y +CONFIG_WAN=y +CONFIG_HDLC=y +CONFIG_HDLC_RAW=y +CONFIG_HDLC_CISCO=y +CONFIG_HDLC_FR=y +CONFIG_HDLC_PPP=y +CONFIG_DLCI=y +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_SERIO is not set +# CONFIG_VT is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=3 +# CONFIG_HW_RANDOM is not set +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_IXP2000=y +CONFIG_WATCHDOG=y +CONFIG_IXP2000_WATCHDOG=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_INOTIFY=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_ROOT_NFS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_LL=y diff --git a/trunk/arch/arm/configs/ixp23xx_defconfig b/trunk/arch/arm/configs/ixp23xx_defconfig new file mode 100644 index 000000000000..688717612e91 --- /dev/null +++ b/trunk/arch/arm/configs/ixp23xx_defconfig @@ -0,0 +1,105 @@ +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_SLAB=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_ARCH_IXP23XX=y +CONFIG_MACH_ESPRESSO=y +CONFIG_MACH_IXDP2351=y +CONFIG_MACH_ROADRUNNER=y +# CONFIG_ARM_THUMB is not set +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs ip=bootp" +CONFIG_FPE_NWFPE=y +CONFIG_FPE_NWFPE_XP=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_SYN_COOKIES=y +CONFIG_IPV6=y +# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET6_XFRM_MODE_TUNNEL is not set +# CONFIG_INET6_XFRM_MODE_BEET is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_PREVENT_FIRMWARE_BUILD is not set +# CONFIG_FW_LOADER is not set +CONFIG_MTD=y +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y +CONFIG_MTD_REDBOOT_PARTS_READONLY=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_NBD=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_EEPROM_LEGACY=y +CONFIG_IDE=y +CONFIG_BLK_DEV_SIIMAGE=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +CONFIG_NET_ETHERNET=y +CONFIG_NET_PCI=y +CONFIG_E100=y +CONFIG_E1000=y +CONFIG_WAN=y +CONFIG_HDLC=y +CONFIG_HDLC_RAW=y +CONFIG_HDLC_CISCO=y +CONFIG_HDLC_FR=y +CONFIG_HDLC_PPP=y +CONFIG_DLCI=y +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_SERIO is not set +# CONFIG_VT is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +# CONFIG_HW_RANDOM is not set +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_WATCHDOG=y +# CONFIG_USB_HID is not set +CONFIG_USB=y +CONFIG_USB_MON=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_UHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_INOTIFY=y +CONFIG_MSDOS_FS=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_ROOT_NFS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_LL=y diff --git a/trunk/arch/arm/configs/u8500_defconfig b/trunk/arch/arm/configs/u8500_defconfig index 889d73ac1ae1..7e84f453e8a6 100644 --- a/trunk/arch/arm/configs/u8500_defconfig +++ b/trunk/arch/arm/configs/u8500_defconfig @@ -8,8 +8,6 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_LBDAF is not set # CONFIG_BLK_DEV_BSG is not set CONFIG_ARCH_U8500=y -CONFIG_UX500_SOC_DB5500=y -CONFIG_UX500_SOC_DB8500=y CONFIG_MACH_HREFV60=y CONFIG_MACH_SNOWBALL=y CONFIG_MACH_U5500=y @@ -39,7 +37,6 @@ CONFIG_CAIF=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=65536 -CONFIG_MISC_DEVICES=y CONFIG_AB8500_PWM=y CONFIG_SENSORS_BH1780=y CONFIG_NETDEVICES=y @@ -65,16 +62,18 @@ CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_NOMADIK=y -CONFIG_I2C=y -CONFIG_I2C_NOMADIK=y CONFIG_SPI=y CONFIG_SPI_PL022=y CONFIG_GPIO_STMPE=y CONFIG_GPIO_TC3589X=y +CONFIG_POWER_SUPPLY=y +CONFIG_AB8500_BM=y +CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL=y CONFIG_MFD_STMPE=y CONFIG_MFD_TC3589X=y CONFIG_AB5500_CORE=y CONFIG_AB8500_CORE=y +CONFIG_REGULATOR=y CONFIG_REGULATOR_AB8500=y # CONFIG_HID_SUPPORT is not set CONFIG_USB_GADGET=y diff --git a/trunk/arch/arm/include/asm/hardware/uengine.h b/trunk/arch/arm/include/asm/hardware/uengine.h new file mode 100644 index 000000000000..b442d65c6593 --- /dev/null +++ b/trunk/arch/arm/include/asm/hardware/uengine.h @@ -0,0 +1,62 @@ +/* + * Generic library functions for the microengines found on the Intel + * IXP2000 series of network processors. + * + * Copyright (C) 2004, 2005 Lennert Buytenhek + * Dedicated to Marija Kulikova. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as + * published by the Free Software Foundation; either version 2.1 of the + * License, or (at your option) any later version. + */ + +#ifndef __IXP2000_UENGINE_H +#define __IXP2000_UENGINE_H + +extern u32 ixp2000_uengine_mask; + +struct ixp2000_uengine_code +{ + u32 cpu_model_bitmask; + u8 cpu_min_revision; + u8 cpu_max_revision; + + u32 uengine_parameters; + + struct ixp2000_reg_value { + int reg; + u32 value; + } *initial_reg_values; + + int num_insns; + u8 *insns; +}; + +u32 ixp2000_uengine_csr_read(int uengine, int offset); +void ixp2000_uengine_csr_write(int uengine, int offset, u32 value); +void ixp2000_uengine_reset(u32 uengine_mask); +void ixp2000_uengine_set_mode(int uengine, u32 mode); +void ixp2000_uengine_load_microcode(int uengine, u8 *ucode, int insns); +void ixp2000_uengine_init_context(int uengine, int context, int pc); +void ixp2000_uengine_start_contexts(int uengine, u8 ctx_mask); +void ixp2000_uengine_stop_contexts(int uengine, u8 ctx_mask); +int ixp2000_uengine_load(int uengine, struct ixp2000_uengine_code *c); + +#define IXP2000_UENGINE_8_CONTEXTS 0x00000000 +#define IXP2000_UENGINE_4_CONTEXTS 0x80000000 +#define IXP2000_UENGINE_PRN_UPDATE_EVERY 0x40000000 +#define IXP2000_UENGINE_PRN_UPDATE_ON_ACCESS 0x00000000 +#define IXP2000_UENGINE_NN_FROM_SELF 0x00100000 +#define IXP2000_UENGINE_NN_FROM_PREVIOUS 0x00000000 +#define IXP2000_UENGINE_ASSERT_EMPTY_AT_3 0x000c0000 +#define IXP2000_UENGINE_ASSERT_EMPTY_AT_2 0x00080000 +#define IXP2000_UENGINE_ASSERT_EMPTY_AT_1 0x00040000 +#define IXP2000_UENGINE_ASSERT_EMPTY_AT_0 0x00000000 +#define IXP2000_UENGINE_LM_ADDR1_GLOBAL 0x00020000 +#define IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT 0x00000000 +#define IXP2000_UENGINE_LM_ADDR0_GLOBAL 0x00010000 +#define IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT 0x00000000 + + +#endif diff --git a/trunk/arch/arm/mach-at91/Kconfig b/trunk/arch/arm/mach-at91/Kconfig index 98a42f3472d5..45db05d8d94c 100644 --- a/trunk/arch/arm/mach-at91/Kconfig +++ b/trunk/arch/arm/mach-at91/Kconfig @@ -9,6 +9,15 @@ config HAVE_AT91_DBGU0 config HAVE_AT91_DBGU1 bool +config HAVE_AT91_USART3 + bool + +config HAVE_AT91_USART4 + bool + +config HAVE_AT91_USART5 + bool + config AT91_SAM9_ALT_RESET bool default !ARCH_AT91X40 @@ -17,121 +26,87 @@ config AT91_SAM9G45_RESET bool default !ARCH_AT91X40 -config SOC_AT91SAM9 - bool - select GENERIC_CLOCKEVENTS - select CPU_ARM926T - menu "Atmel AT91 System-on-Chip" -comment "Atmel AT91 Processor" - -config SOC_AT91SAM9 - bool - select CPU_ARM926T - select AT91_SAM9_TIME - select AT91_SAM9_SMC +choice + prompt "Atmel AT91 Processor" -config SOC_AT91RM9200 +config ARCH_AT91RM9200 bool "AT91RM9200" select CPU_ARM920T select GENERIC_CLOCKEVENTS select HAVE_AT91_DBGU0 - -config SOC_AT91SAM9260 - bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20" - select SOC_AT91SAM9 - select HAVE_AT91_DBGU0 - select HAVE_NET_MACB - help - Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE - or AT91SAM9G20 SoC. - -config SOC_AT91SAM9261 - bool "AT91SAM9261 or AT91SAM9G10" - select SOC_AT91SAM9 - select HAVE_AT91_DBGU0 - select HAVE_FB_ATMEL - help - Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC. - -config SOC_AT91SAM9263 - bool "AT91SAM9263" - select SOC_AT91SAM9 - select HAVE_AT91_DBGU1 - select HAVE_FB_ATMEL - select HAVE_NET_MACB - -config SOC_AT91SAM9RL - bool "AT91SAM9RL" - select SOC_AT91SAM9 - select HAVE_AT91_DBGU0 - select HAVE_FB_ATMEL - -config SOC_AT91SAM9G45 - bool "AT91SAM9G45 or AT91SAM9M10 families" - select SOC_AT91SAM9 - select HAVE_AT91_DBGU1 - select HAVE_FB_ATMEL - select HAVE_NET_MACB - help - Select this if you are using one of Atmel's AT91SAM9G45 family SoC. - This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. - -config SOC_AT91SAM9X5 - bool "AT91SAM9x5 family" - select SOC_AT91SAM9 - select HAVE_AT91_DBGU0 - select HAVE_FB_ATMEL - select HAVE_NET_MACB - help - Select this if you are using one of Atmel's AT91SAM9x5 family SoC. - This means that your SAM9 name finishes with a '5' (except if it is - AT91SAM9G45!). - This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35 - and AT91SAM9X35. - -choice - prompt "Atmel AT91 Processor Devices for non DT boards" - -config ARCH_AT91_NONE - bool "None" - -config ARCH_AT91RM9200 - bool "AT91RM9200" - select SOC_AT91RM9200 + select HAVE_AT91_USART3 config ARCH_AT91SAM9260 bool "AT91SAM9260 or AT91SAM9XE" - select SOC_AT91SAM9260 + select CPU_ARM926T + select GENERIC_CLOCKEVENTS + select HAVE_AT91_DBGU0 + select HAVE_AT91_USART3 + select HAVE_AT91_USART4 + select HAVE_AT91_USART5 + select HAVE_NET_MACB config ARCH_AT91SAM9261 bool "AT91SAM9261" - select SOC_AT91SAM9261 + select CPU_ARM926T + select GENERIC_CLOCKEVENTS + select HAVE_FB_ATMEL + select HAVE_AT91_DBGU0 config ARCH_AT91SAM9G10 bool "AT91SAM9G10" - select SOC_AT91SAM9261 + select CPU_ARM926T + select GENERIC_CLOCKEVENTS + select HAVE_AT91_DBGU0 + select HAVE_FB_ATMEL config ARCH_AT91SAM9263 bool "AT91SAM9263" - select SOC_AT91SAM9263 + select CPU_ARM926T + select GENERIC_CLOCKEVENTS + select HAVE_FB_ATMEL + select HAVE_NET_MACB + select HAVE_AT91_DBGU1 config ARCH_AT91SAM9RL bool "AT91SAM9RL" - select SOC_AT91SAM9RL + select CPU_ARM926T + select GENERIC_CLOCKEVENTS + select HAVE_AT91_USART3 + select HAVE_FB_ATMEL + select HAVE_AT91_DBGU0 config ARCH_AT91SAM9G20 bool "AT91SAM9G20" - select SOC_AT91SAM9260 + select CPU_ARM926T + select GENERIC_CLOCKEVENTS + select HAVE_AT91_DBGU0 + select HAVE_AT91_USART3 + select HAVE_AT91_USART4 + select HAVE_AT91_USART5 + select HAVE_NET_MACB config ARCH_AT91SAM9G45 bool "AT91SAM9G45" - select SOC_AT91SAM9G45 + select CPU_ARM926T + select GENERIC_CLOCKEVENTS + select HAVE_AT91_USART3 + select HAVE_FB_ATMEL + select HAVE_NET_MACB + select HAVE_AT91_DBGU1 + +config ARCH_AT91SAM9X5 + bool "AT91SAM9x5 family" + select CPU_ARM926T + select GENERIC_CLOCKEVENTS + select HAVE_FB_ATMEL + select HAVE_NET_MACB + select HAVE_AT91_DBGU0 config ARCH_AT91X40 bool "AT91x40" - depends on !MMU select ARCH_USES_GETTIMEOFFSET endchoice @@ -389,7 +364,6 @@ config MACH_AT91SAM9G20EK_2MMC Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and onwards. - config MACH_CPU9G20 bool "Eukrea CPU9G20 board" @@ -459,10 +433,9 @@ comment "AT91SAM9G45 Board Type" config MACH_AT91SAM9M10G45EK bool "Atmel AT91SAM9M10G45-EK Evaluation Kits" help - Select this if you are using Atmel's AT91SAM9M10G45-EK Evaluation Kit. - Those boards can be populated with any SoC of AT91SAM9G45 or AT91SAM9M10 - families: AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. - + Select this if you are using Atmel's AT91SAM9G45-EKES Evaluation Kit. + "ES" at the end of the name means that this board is an + Engineering Sample. endif @@ -542,6 +515,41 @@ config AT91_TIMER_HZ system clock (of at least several MHz), rounding is less of a problem so it can be safer to use a decimal values like 100. +choice + prompt "Select a UART for early kernel messages" + +config AT91_EARLY_DBGU0 + bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl" + depends on HAVE_AT91_DBGU0 + +config AT91_EARLY_DBGU1 + bool "DBGU on 9263 and 9g45" + depends on HAVE_AT91_DBGU1 + +config AT91_EARLY_USART0 + bool "USART0" + +config AT91_EARLY_USART1 + bool "USART1" + +config AT91_EARLY_USART2 + bool "USART2" + depends on ! ARCH_AT91X40 + +config AT91_EARLY_USART3 + bool "USART3" + depends on HAVE_AT91_USART3 + +config AT91_EARLY_USART4 + bool "USART4" + depends on HAVE_AT91_USART4 + +config AT91_EARLY_USART5 + bool "USART5" + depends on HAVE_AT91_USART5 + +endchoice + endmenu endif diff --git a/trunk/arch/arm/mach-at91/Makefile b/trunk/arch/arm/mach-at91/Makefile index 79d0f60af0b2..8512e53bed93 100644 --- a/trunk/arch/arm/mach-at91/Makefile +++ b/trunk/arch/arm/mach-at91/Makefile @@ -10,25 +10,17 @@ obj- := obj-$(CONFIG_AT91_PMC_UNIT) += clock.o obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o -obj-$(CONFIG_SOC_AT91SAM9) += at91sam926x_time.o sam9_smc.o # CPU-specific support -obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o -obj-$(CONFIG_SOC_AT91SAM9260) += at91sam9260.o -obj-$(CONFIG_SOC_AT91SAM9261) += at91sam9261.o -obj-$(CONFIG_SOC_AT91SAM9263) += at91sam9263.o -obj-$(CONFIG_SOC_AT91SAM9G45) += at91sam9g45.o -obj-$(CONFIG_SOC_AT91SAM9X5) += at91sam9x5.o -obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o - -obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o -obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o -obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o -obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261_devices.o -obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263_devices.o -obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl_devices.o -obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260_devices.o -obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45_devices.o +obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o +obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o +obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o +obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o +obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o +obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o +obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o +obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o +obj-$(CONFIG_ARCH_AT91SAM9X5) += at91sam9x5.o at91sam926x_time.o sam9_smc.o obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o # AT91RM9200 board-specific support diff --git a/trunk/arch/arm/mach-at91/at91rm9200.c b/trunk/arch/arm/mach-at91/at91rm9200.c index d50da1a9d0bf..364c19357e60 100644 --- a/trunk/arch/arm/mach-at91/at91rm9200.c +++ b/trunk/arch/arm/mach-at91/at91rm9200.c @@ -258,6 +258,18 @@ static void __init at91rm9200_register_clocks(void) clk_register(&pck3); } +static struct clk_lookup console_clock_lookup; + +void __init at91rm9200_set_console_clock(int id) +{ + if (id >= ARRAY_SIZE(usart_clocks_lookups)) + return; + + console_clock_lookup.con_id = "usart"; + console_clock_lookup.clk = usart_clocks_lookups[id].clk; + clkdev_add(&console_clock_lookup); +} + /* -------------------------------------------------------------------- * GPIO * -------------------------------------------------------------------- */ diff --git a/trunk/arch/arm/mach-at91/at91rm9200_devices.c b/trunk/arch/arm/mach-at91/at91rm9200_devices.c index d9f0d770978e..05774e5b1cba 100644 --- a/trunk/arch/arm/mach-at91/at91rm9200_devices.c +++ b/trunk/arch/arm/mach-at91/at91rm9200_devices.c @@ -1152,6 +1152,14 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) at91_uarts[portnr] = pdev; } +void __init at91_set_serial_console(unsigned portnr) +{ + if (portnr < ATMEL_MAX_UART) { + atmel_default_console_device = at91_uarts[portnr]; + at91rm9200_set_console_clock(at91_uarts[portnr]->id); + } +} + void __init at91_add_device_serial(void) { int i; @@ -1160,10 +1168,13 @@ void __init at91_add_device_serial(void) if (at91_uarts[i]) platform_device_register(at91_uarts[i]); } + + if (!atmel_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); } #else -void __init __deprecated at91_init_serial(struct at91_uart_config *config) {} void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} +void __init at91_set_serial_console(unsigned portnr) {} void __init at91_add_device_serial(void) {} #endif diff --git a/trunk/arch/arm/mach-at91/at91rm9200_time.c b/trunk/arch/arm/mach-at91/at91rm9200_time.c index dd7f782b0b91..104ca40d8d18 100644 --- a/trunk/arch/arm/mach-at91/at91rm9200_time.c +++ b/trunk/arch/arm/mach-at91/at91rm9200_time.c @@ -23,6 +23,7 @@ #include #include #include +#include #include @@ -176,6 +177,7 @@ static struct clock_event_device clkevt = { }; void __iomem *at91_st_base; +EXPORT_SYMBOL_GPL(at91_st_base); void __init at91rm9200_ioremap_st(u32 addr) { diff --git a/trunk/arch/arm/mach-at91/at91sam9260.c b/trunk/arch/arm/mach-at91/at91sam9260.c index a27bbec50ca3..46f774233298 100644 --- a/trunk/arch/arm/mach-at91/at91sam9260.c +++ b/trunk/arch/arm/mach-at91/at91sam9260.c @@ -268,6 +268,18 @@ static void __init at91sam9260_register_clocks(void) clk_register(&pck1); } +static struct clk_lookup console_clock_lookup; + +void __init at91sam9260_set_console_clock(int id) +{ + if (id >= ARRAY_SIZE(usart_clocks_lookups)) + return; + + console_clock_lookup.con_id = "usart"; + console_clock_lookup.clk = usart_clocks_lookups[id].clk; + clkdev_add(&console_clock_lookup); +} + /* -------------------------------------------------------------------- * GPIO * -------------------------------------------------------------------- */ diff --git a/trunk/arch/arm/mach-at91/at91sam9260_devices.c b/trunk/arch/arm/mach-at91/at91sam9260_devices.c index ad00fe91d37d..5652dde4bbe2 100644 --- a/trunk/arch/arm/mach-at91/at91sam9260_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9260_devices.c @@ -1229,6 +1229,14 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) at91_uarts[portnr] = pdev; } +void __init at91_set_serial_console(unsigned portnr) +{ + if (portnr < ATMEL_MAX_UART) { + atmel_default_console_device = at91_uarts[portnr]; + at91sam9260_set_console_clock(at91_uarts[portnr]->id); + } +} + void __init at91_add_device_serial(void) { int i; @@ -1237,9 +1245,13 @@ void __init at91_add_device_serial(void) if (at91_uarts[i]) platform_device_register(at91_uarts[i]); } + + if (!atmel_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); } #else void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} +void __init at91_set_serial_console(unsigned portnr) {} void __init at91_add_device_serial(void) {} #endif diff --git a/trunk/arch/arm/mach-at91/at91sam9261.c b/trunk/arch/arm/mach-at91/at91sam9261.c index c77d503d09d1..7de81e6222f1 100644 --- a/trunk/arch/arm/mach-at91/at91sam9261.c +++ b/trunk/arch/arm/mach-at91/at91sam9261.c @@ -239,6 +239,18 @@ static void __init at91sam9261_register_clocks(void) clk_register(&hck1); } +static struct clk_lookup console_clock_lookup; + +void __init at91sam9261_set_console_clock(int id) +{ + if (id >= ARRAY_SIZE(usart_clocks_lookups)) + return; + + console_clock_lookup.con_id = "usart"; + console_clock_lookup.clk = usart_clocks_lookups[id].clk; + clkdev_add(&console_clock_lookup); +} + /* -------------------------------------------------------------------- * GPIO * -------------------------------------------------------------------- */ diff --git a/trunk/arch/arm/mach-at91/at91sam9261_devices.c b/trunk/arch/arm/mach-at91/at91sam9261_devices.c index 9295e90b08ff..4db961a93085 100644 --- a/trunk/arch/arm/mach-at91/at91sam9261_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9261_devices.c @@ -1051,6 +1051,14 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) at91_uarts[portnr] = pdev; } +void __init at91_set_serial_console(unsigned portnr) +{ + if (portnr < ATMEL_MAX_UART) { + atmel_default_console_device = at91_uarts[portnr]; + at91sam9261_set_console_clock(at91_uarts[portnr]->id); + } +} + void __init at91_add_device_serial(void) { int i; @@ -1059,9 +1067,13 @@ void __init at91_add_device_serial(void) if (at91_uarts[i]) platform_device_register(at91_uarts[i]); } + + if (!atmel_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); } #else void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} +void __init at91_set_serial_console(unsigned portnr) {} void __init at91_add_device_serial(void) {} #endif diff --git a/trunk/arch/arm/mach-at91/at91sam9263.c b/trunk/arch/arm/mach-at91/at91sam9263.c index 7fae36502fbb..ef301be66575 100644 --- a/trunk/arch/arm/mach-at91/at91sam9263.c +++ b/trunk/arch/arm/mach-at91/at91sam9263.c @@ -255,6 +255,18 @@ static void __init at91sam9263_register_clocks(void) clk_register(&pck3); } +static struct clk_lookup console_clock_lookup; + +void __init at91sam9263_set_console_clock(int id) +{ + if (id >= ARRAY_SIZE(usart_clocks_lookups)) + return; + + console_clock_lookup.con_id = "usart"; + console_clock_lookup.clk = usart_clocks_lookups[id].clk; + clkdev_add(&console_clock_lookup); +} + /* -------------------------------------------------------------------- * GPIO * -------------------------------------------------------------------- */ diff --git a/trunk/arch/arm/mach-at91/at91sam9263_devices.c b/trunk/arch/arm/mach-at91/at91sam9263_devices.c index dfe5bc006d5e..fe99206de880 100644 --- a/trunk/arch/arm/mach-at91/at91sam9263_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9263_devices.c @@ -1461,6 +1461,14 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) at91_uarts[portnr] = pdev; } +void __init at91_set_serial_console(unsigned portnr) +{ + if (portnr < ATMEL_MAX_UART) { + atmel_default_console_device = at91_uarts[portnr]; + at91sam9263_set_console_clock(at91_uarts[portnr]->id); + } +} + void __init at91_add_device_serial(void) { int i; @@ -1469,9 +1477,13 @@ void __init at91_add_device_serial(void) if (at91_uarts[i]) platform_device_register(at91_uarts[i]); } + + if (!atmel_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); } #else void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} +void __init at91_set_serial_console(unsigned portnr) {} void __init at91_add_device_serial(void) {} #endif diff --git a/trunk/arch/arm/mach-at91/at91sam9g45.c b/trunk/arch/arm/mach-at91/at91sam9g45.c index f2054495a655..d222f8333dab 100644 --- a/trunk/arch/arm/mach-at91/at91sam9g45.c +++ b/trunk/arch/arm/mach-at91/at91sam9g45.c @@ -288,6 +288,18 @@ static void __init at91sam9g45_register_clocks(void) clk_register(&pck1); } +static struct clk_lookup console_clock_lookup; + +void __init at91sam9g45_set_console_clock(int id) +{ + if (id >= ARRAY_SIZE(usart_clocks_lookups)) + return; + + console_clock_lookup.con_id = "usart"; + console_clock_lookup.clk = usart_clocks_lookups[id].clk; + clkdev_add(&console_clock_lookup); +} + /* -------------------------------------------------------------------- * GPIO * -------------------------------------------------------------------- */ diff --git a/trunk/arch/arm/mach-at91/at91sam9g45_devices.c b/trunk/arch/arm/mach-at91/at91sam9g45_devices.c index db2f88c246ff..6b008aee1dff 100644 --- a/trunk/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9g45_devices.c @@ -1741,6 +1741,14 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) at91_uarts[portnr] = pdev; } +void __init at91_set_serial_console(unsigned portnr) +{ + if (portnr < ATMEL_MAX_UART) { + atmel_default_console_device = at91_uarts[portnr]; + at91sam9g45_set_console_clock(at91_uarts[portnr]->id); + } +} + void __init at91_add_device_serial(void) { int i; @@ -1749,9 +1757,13 @@ void __init at91_add_device_serial(void) if (at91_uarts[i]) platform_device_register(at91_uarts[i]); } + + if (!atmel_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); } #else void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} +void __init at91_set_serial_console(unsigned portnr) {} void __init at91_add_device_serial(void) {} #endif diff --git a/trunk/arch/arm/mach-at91/at91sam9rl.c b/trunk/arch/arm/mach-at91/at91sam9rl.c index e420085a57ef..d9f2774f385e 100644 --- a/trunk/arch/arm/mach-at91/at91sam9rl.c +++ b/trunk/arch/arm/mach-at91/at91sam9rl.c @@ -232,6 +232,18 @@ static void __init at91sam9rl_register_clocks(void) clk_register(&pck1); } +static struct clk_lookup console_clock_lookup; + +void __init at91sam9rl_set_console_clock(int id) +{ + if (id >= ARRAY_SIZE(usart_clocks_lookups)) + return; + + console_clock_lookup.con_id = "usart"; + console_clock_lookup.clk = usart_clocks_lookups[id].clk; + clkdev_add(&console_clock_lookup); +} + /* -------------------------------------------------------------------- * GPIO * -------------------------------------------------------------------- */ diff --git a/trunk/arch/arm/mach-at91/at91sam9rl_devices.c b/trunk/arch/arm/mach-at91/at91sam9rl_devices.c index 9c0b1481a9a7..fe4ae22e8561 100644 --- a/trunk/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9rl_devices.c @@ -1192,6 +1192,14 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) at91_uarts[portnr] = pdev; } +void __init at91_set_serial_console(unsigned portnr) +{ + if (portnr < ATMEL_MAX_UART) { + atmel_default_console_device = at91_uarts[portnr]; + at91sam9rl_set_console_clock(at91_uarts[portnr]->id); + } +} + void __init at91_add_device_serial(void) { int i; @@ -1200,9 +1208,13 @@ void __init at91_add_device_serial(void) if (at91_uarts[i]) platform_device_register(at91_uarts[i]); } + + if (!atmel_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); } #else void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} +void __init at91_set_serial_console(unsigned portnr) {} void __init at91_add_device_serial(void) {} #endif diff --git a/trunk/arch/arm/mach-at91/board-1arm.c b/trunk/arch/arm/mach-at91/board-1arm.c index 271f994314a4..2628384aaae1 100644 --- a/trunk/arch/arm/mach-at91/board-1arm.c +++ b/trunk/arch/arm/mach-at91/board-1arm.c @@ -47,6 +47,20 @@ static void __init onearm_init_early(void) /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */ + at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata onearm_eth_data = { @@ -68,16 +82,6 @@ static struct at91_udc_data __initdata onearm_udc_data = { static void __init onearm_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */ - at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); - - /* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&onearm_eth_data); diff --git a/trunk/arch/arm/mach-at91/board-afeb-9260v1.c b/trunk/arch/arm/mach-at91/board-afeb-9260v1.c index b7d8aa7b81e6..161efbaa1029 100644 --- a/trunk/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/trunk/arch/arm/mach-at91/board-afeb-9260v1.c @@ -52,6 +52,22 @@ static void __init afeb9260_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, + ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR + | ATMEL_UART_DCD | ATMEL_UART_RI); + + /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9260_ID_US1, 2, + ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -167,18 +183,6 @@ static struct at91_cf_data afeb9260_cf_data = { static void __init afeb9260_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91SAM9260_ID_US0, 1, - ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR - | ATMEL_UART_DCD | ATMEL_UART_RI); - - /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ - at91_register_uart(AT91SAM9260_ID_US1, 2, - ATMEL_UART_CTS | ATMEL_UART_RTS); at91_add_device_serial(); /* USB Host */ at91_add_device_usbh(&afeb9260_usbh_data); diff --git a/trunk/arch/arm/mach-at91/board-cam60.c b/trunk/arch/arm/mach-at91/board-cam60.c index 29d3ef0a50fb..c6d44ee0c77e 100644 --- a/trunk/arch/arm/mach-at91/board-cam60.c +++ b/trunk/arch/arm/mach-at91/board-cam60.c @@ -49,6 +49,12 @@ static void __init cam60_init_early(void) { /* Initialize processor: 10 MHz crystal */ at91_initialize(10000000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -169,8 +175,6 @@ static void __init cam60_add_device_nand(void) static void __init cam60_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); at91_add_device_serial(); /* SPI */ at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices)); diff --git a/trunk/arch/arm/mach-at91/board-carmeva.c b/trunk/arch/arm/mach-at91/board-carmeva.c index 44328a6d4609..59d9cf997537 100644 --- a/trunk/arch/arm/mach-at91/board-carmeva.c +++ b/trunk/arch/arm/mach-at91/board-carmeva.c @@ -44,6 +44,17 @@ static void __init carmeva_init_early(void) { /* Initialize processor: 20.000 MHz crystal */ at91_initialize(20000000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata carmeva_eth_data = { @@ -128,13 +139,6 @@ static struct gpio_led carmeva_leds[] = { static void __init carmeva_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&carmeva_eth_data); diff --git a/trunk/arch/arm/mach-at91/board-cpu9krea.c b/trunk/arch/arm/mach-at91/board-cpu9krea.c index 69951ec7dbf3..5f3680e7c883 100644 --- a/trunk/arch/arm/mach-at91/board-cpu9krea.c +++ b/trunk/arch/arm/mach-at91/board-cpu9krea.c @@ -52,6 +52,34 @@ static void __init cpu9krea_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* DGBU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | + ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR | + ATMEL_UART_DCD | ATMEL_UART_RI); + + /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | + ATMEL_UART_RTS); + + /* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | + ATMEL_UART_RTS); + + /* USART3 on ttyS4. (Rx, Tx) */ + at91_register_uart(AT91SAM9260_ID_US3, 4, 0); + + /* USART4 on ttyS5. (Rx, Tx) */ + at91_register_uart(AT91SAM9260_ID_US4, 5, 0); + + /* USART5 on ttyS6. (Rx, Tx) */ + at91_register_uart(AT91SAM9260_ID_US5, 6, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -324,30 +352,6 @@ static void __init cpu9krea_board_init(void) /* NOR */ cpu9krea_add_device_nor(); /* Serial */ - /* DGBU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | - ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR | - ATMEL_UART_DCD | ATMEL_UART_RI); - - /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ - at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | - ATMEL_UART_RTS); - - /* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */ - at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | - ATMEL_UART_RTS); - - /* USART3 on ttyS4. (Rx, Tx) */ - at91_register_uart(AT91SAM9260_ID_US3, 4, 0); - - /* USART4 on ttyS5. (Rx, Tx) */ - at91_register_uart(AT91SAM9260_ID_US4, 5, 0); - - /* USART5 on ttyS6. (Rx, Tx) */ - at91_register_uart(AT91SAM9260_ID_US5, 6, 0); at91_add_device_serial(); /* USB Host */ at91_add_device_usbh(&cpu9krea_usbh_data); diff --git a/trunk/arch/arm/mach-at91/board-cpuat91.c b/trunk/arch/arm/mach-at91/board-cpuat91.c index 895cf2dba612..e094cc81fe25 100644 --- a/trunk/arch/arm/mach-at91/board-cpuat91.c +++ b/trunk/arch/arm/mach-at91/board-cpuat91.c @@ -59,6 +59,28 @@ static void __init cpuat91_init_early(void) /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */ + at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | + ATMEL_UART_RTS); + + /* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | + ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR | + ATMEL_UART_DCD | ATMEL_UART_RI); + + /* USART2 on ttyS3 (Rx, Tx) */ + at91_register_uart(AT91RM9200_ID_US2, 3, 0); + + /* USART3 on ttyS4 (Rx, Tx, CTS, RTS) */ + at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS | + ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata cpuat91_eth_data = { @@ -139,24 +161,6 @@ static struct platform_device *platform_devices[] __initdata = { static void __init cpuat91_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */ - at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | - ATMEL_UART_RTS); - - /* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | - ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR | - ATMEL_UART_DCD | ATMEL_UART_RI); - - /* USART2 on ttyS3 (Rx, Tx) */ - at91_register_uart(AT91RM9200_ID_US2, 3, 0); - - /* USART3 on ttyS4 (Rx, Tx, CTS, RTS) */ - at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS | - ATMEL_UART_RTS); at91_add_device_serial(); /* LEDs. */ at91_gpio_leds(cpuat91_leds, ARRAY_SIZE(cpuat91_leds)); diff --git a/trunk/arch/arm/mach-at91/board-csb337.c b/trunk/arch/arm/mach-at91/board-csb337.c index cd813361cd26..1a1547b1ce4e 100644 --- a/trunk/arch/arm/mach-at91/board-csb337.c +++ b/trunk/arch/arm/mach-at91/board-csb337.c @@ -47,6 +47,15 @@ static void __init csb337_init_early(void) { /* Initialize processor: 3.6864 MHz crystal */ at91_initialize(3686400); + + /* Setup the LEDs */ + at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); + + /* DBGU on ttyS0 */ + at91_register_uart(0, 0, 0); + + /* make console=ttyS0 the default */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata csb337_eth_data = { @@ -219,11 +228,7 @@ static struct gpio_led csb_leds[] = { static void __init csb337_board_init(void) { - /* Setup the LEDs */ - at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); /* Serial */ - /* DBGU on ttyS0 */ - at91_register_uart(0, 0, 0); at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&csb337_eth_data); diff --git a/trunk/arch/arm/mach-at91/board-csb637.c b/trunk/arch/arm/mach-at91/board-csb637.c index 7c8b05a57d7f..f650bf39455d 100644 --- a/trunk/arch/arm/mach-at91/board-csb637.c +++ b/trunk/arch/arm/mach-at91/board-csb637.c @@ -44,6 +44,12 @@ static void __init csb637_init_early(void) { /* Initialize processor: 3.6864 MHz crystal */ at91_initialize(3686400); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* make console=ttyS0 (ie, DBGU) the default */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata csb637_eth_data = { @@ -112,8 +118,6 @@ static void __init csb637_board_init(void) /* LED(s) */ at91_gpio_leds(csb_leds, ARRAY_SIZE(csb_leds)); /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&csb637_eth_data); diff --git a/trunk/arch/arm/mach-at91/board-dt.c b/trunk/arch/arm/mach-at91/board-dt.c index a1fce05aa7a5..c18d4d307801 100644 --- a/trunk/arch/arm/mach-at91/board-dt.c +++ b/trunk/arch/arm/mach-at91/board-dt.c @@ -1,6 +1,10 @@ /* * Setup code for AT91SAM Evaluation Kits with Device Tree support * + * Covers: * AT91SAM9G45-EKES board + * * AT91SAM9M10-EKES board + * * AT91SAM9M10G45-EK board + * * Copyright (C) 2011 Atmel, * 2011 Nicolas Ferre * @@ -45,7 +49,9 @@ static void __init at91_dt_device_init(void) } static const char *at91_dt_board_compat[] __initdata = { - "atmel,at91sam9", + "atmel,at91sam9m10g45ek", + "atmel,at91sam9x5ek", + "calao,usb-a9g20", NULL }; diff --git a/trunk/arch/arm/mach-at91/board-eb9200.c b/trunk/arch/arm/mach-at91/board-eb9200.c index bd1017297989..d302ca3eeb64 100644 --- a/trunk/arch/arm/mach-at91/board-eb9200.c +++ b/trunk/arch/arm/mach-at91/board-eb9200.c @@ -44,6 +44,20 @@ static void __init eb9200_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* USART2 on ttyS2. (Rx, Tx) - IRDA */ + at91_register_uart(AT91RM9200_ID_US2, 2, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata eb9200_eth_data = { @@ -87,16 +101,6 @@ static struct i2c_board_info __initdata eb9200_i2c_devices[] = { static void __init eb9200_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); - - /* USART2 on ttyS2. (Rx, Tx) - IRDA */ - at91_register_uart(AT91RM9200_ID_US2, 2, 0); at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&eb9200_eth_data); diff --git a/trunk/arch/arm/mach-at91/board-ecbat91.c b/trunk/arch/arm/mach-at91/board-ecbat91.c index 89cc3726a9ce..69966ce4d776 100644 --- a/trunk/arch/arm/mach-at91/board-ecbat91.c +++ b/trunk/arch/arm/mach-at91/board-ecbat91.c @@ -50,6 +50,18 @@ static void __init ecb_at91init_early(void) /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* Setup the LEDs */ + at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx & Tx only) */ + at91_register_uart(AT91RM9200_ID_US0, 1, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata ecb_at91eth_data = { @@ -139,15 +151,7 @@ static struct spi_board_info __initdata ecb_at91spi_devices[] = { static void __init ecb_at91board_init(void) { - /* Setup the LEDs */ - at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7); - /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx & Tx only) */ - at91_register_uart(AT91RM9200_ID_US0, 1, 0); at91_add_device_serial(); /* Ethernet */ diff --git a/trunk/arch/arm/mach-at91/board-eco920.c b/trunk/arch/arm/mach-at91/board-eco920.c index 558546cf63f4..f23aabef8551 100644 --- a/trunk/arch/arm/mach-at91/board-eco920.c +++ b/trunk/arch/arm/mach-at91/board-eco920.c @@ -37,6 +37,15 @@ static void __init eco920_init_early(void) at91rm9200_set_type(ARCH_REVISON_9200_PQFP); at91_initialize(18432000); + + /* Setup the LEDs */ + at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); + + /* DBGU on ttyS0. (Rx & Tx only */ + at91_register_uart(0, 0, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata eco920_eth_data = { @@ -94,10 +103,6 @@ static struct spi_board_info eco920_spi_devices[] = { static void __init eco920_board_init(void) { - /* Setup the LEDs */ - at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); - /* DBGU on ttyS0. (Rx & Tx only */ - at91_register_uart(0, 0, 0); at91_add_device_serial(); at91_add_device_eth(&eco920_eth_data); at91_add_device_usbh(&eco920_usbh_data); diff --git a/trunk/arch/arm/mach-at91/board-flexibity.c b/trunk/arch/arm/mach-at91/board-flexibity.c index 47658f78105d..1815152001f7 100644 --- a/trunk/arch/arm/mach-at91/board-flexibity.c +++ b/trunk/arch/arm/mach-at91/board-flexibity.c @@ -41,6 +41,12 @@ static void __init flexibity_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* USB Host port */ @@ -137,8 +143,6 @@ static struct gpio_led flexibity_leds[] = { static void __init flexibity_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); at91_add_device_serial(); /* USB Host */ at91_add_device_usbh(&flexibity_usbh_data); diff --git a/trunk/arch/arm/mach-at91/board-foxg20.c b/trunk/arch/arm/mach-at91/board-foxg20.c index 33411e6ecb1f..caf017f0f4ee 100644 --- a/trunk/arch/arm/mach-at91/board-foxg20.c +++ b/trunk/arch/arm/mach-at91/board-foxg20.c @@ -61,6 +61,44 @@ static void __init foxg20_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, + ATMEL_UART_CTS + | ATMEL_UART_RTS + | ATMEL_UART_DTR + | ATMEL_UART_DSR + | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9260_ID_US1, 2, + ATMEL_UART_CTS + | ATMEL_UART_RTS); + + /* USART2 on ttyS3. (Rx & Tx only) */ + at91_register_uart(AT91SAM9260_ID_US2, 3, 0); + + /* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9260_ID_US3, 4, + ATMEL_UART_CTS + | ATMEL_UART_RTS); + + /* USART4 on ttyS5. (Rx & Tx only) */ + at91_register_uart(AT91SAM9260_ID_US4, 5, 0); + + /* USART5 on ttyS6. (Rx & Tx only) */ + at91_register_uart(AT91SAM9260_ID_US5, 6, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); + + /* Set the internal pull-up resistor on DRXD */ + at91_set_A_periph(AT91_PIN_PB14, 1); + } /* @@ -203,39 +241,6 @@ static struct i2c_board_info __initdata foxg20_i2c_devices[] = { static void __init foxg20_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91SAM9260_ID_US0, 1, - ATMEL_UART_CTS - | ATMEL_UART_RTS - | ATMEL_UART_DTR - | ATMEL_UART_DSR - | ATMEL_UART_DCD - | ATMEL_UART_RI); - - /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ - at91_register_uart(AT91SAM9260_ID_US1, 2, - ATMEL_UART_CTS - | ATMEL_UART_RTS); - - /* USART2 on ttyS3. (Rx & Tx only) */ - at91_register_uart(AT91SAM9260_ID_US2, 3, 0); - - /* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */ - at91_register_uart(AT91SAM9260_ID_US3, 4, - ATMEL_UART_CTS - | ATMEL_UART_RTS); - - /* USART4 on ttyS5. (Rx & Tx only) */ - at91_register_uart(AT91SAM9260_ID_US4, 5, 0); - - /* USART5 on ttyS6. (Rx & Tx only) */ - at91_register_uart(AT91SAM9260_ID_US5, 6, 0); - - /* Set the internal pull-up resistor on DRXD */ - at91_set_A_periph(AT91_PIN_PB14, 1); at91_add_device_serial(); /* USB Host */ at91_add_device_usbh(&foxg20_usbh_data); diff --git a/trunk/arch/arm/mach-at91/board-gsia18s.c b/trunk/arch/arm/mach-at91/board-gsia18s.c index 3e0dfa643a86..230e71969fb7 100644 --- a/trunk/arch/arm/mach-at91/board-gsia18s.c +++ b/trunk/arch/arm/mach-at91/board-gsia18s.c @@ -41,6 +41,38 @@ static void __init gsia18s_init_early(void) { stamp9g20_init_early(); + + /* + * USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI). + * Used for Internal Analog Modem. + */ + at91_register_uart(AT91SAM9260_ID_US0, 1, + ATMEL_UART_CTS | ATMEL_UART_RTS | + ATMEL_UART_DTR | ATMEL_UART_DSR | + ATMEL_UART_DCD | ATMEL_UART_RI); + /* + * USART1 on ttyS2 (Rx, Tx, CTS, RTS). + * Used for GPS or WiFi or Data stream. + */ + at91_register_uart(AT91SAM9260_ID_US1, 2, + ATMEL_UART_CTS | ATMEL_UART_RTS); + /* + * USART2 on ttyS3 (Rx, Tx, CTS, RTS). + * Used for External Modem. + */ + at91_register_uart(AT91SAM9260_ID_US2, 3, + ATMEL_UART_CTS | ATMEL_UART_RTS); + /* + * USART3 on ttyS4 (Rx, Tx, RTS). + * Used for RS-485. + */ + at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS); + + /* + * USART4 on ttyS5 (Rx, Tx). + * Used for TRX433 Radio Module. + */ + at91_register_uart(AT91SAM9260_ID_US4, 5, 0); } /* @@ -526,37 +558,6 @@ static int __init gsia18s_power_off_init(void) static void __init gsia18s_board_init(void) { - /* - * USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI). - * Used for Internal Analog Modem. - */ - at91_register_uart(AT91SAM9260_ID_US0, 1, - ATMEL_UART_CTS | ATMEL_UART_RTS | - ATMEL_UART_DTR | ATMEL_UART_DSR | - ATMEL_UART_DCD | ATMEL_UART_RI); - /* - * USART1 on ttyS2 (Rx, Tx, CTS, RTS). - * Used for GPS or WiFi or Data stream. - */ - at91_register_uart(AT91SAM9260_ID_US1, 2, - ATMEL_UART_CTS | ATMEL_UART_RTS); - /* - * USART2 on ttyS3 (Rx, Tx, CTS, RTS). - * Used for External Modem. - */ - at91_register_uart(AT91SAM9260_ID_US2, 3, - ATMEL_UART_CTS | ATMEL_UART_RTS); - /* - * USART3 on ttyS4 (Rx, Tx, RTS). - * Used for RS-485. - */ - at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS); - - /* - * USART4 on ttyS5 (Rx, Tx). - * Used for TRX433 Radio Module. - */ - at91_register_uart(AT91SAM9260_ID_US4, 5, 0); stamp9g20_board_init(); at91_add_device_usbh(&usbh_data); at91_add_device_udc(&udc_data); diff --git a/trunk/arch/arm/mach-at91/board-kafa.c b/trunk/arch/arm/mach-at91/board-kafa.c index f260657f32bc..efde1b2327c8 100644 --- a/trunk/arch/arm/mach-at91/board-kafa.c +++ b/trunk/arch/arm/mach-at91/board-kafa.c @@ -47,6 +47,18 @@ static void __init kafa_init_early(void) /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* Set up the LEDs */ + at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */ + at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata kafa_eth_data = { @@ -67,15 +79,7 @@ static struct at91_udc_data __initdata kafa_udc_data = { static void __init kafa_board_init(void) { - /* Set up the LEDs */ - at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4); - /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */ - at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&kafa_eth_data); diff --git a/trunk/arch/arm/mach-at91/board-kb9202.c b/trunk/arch/arm/mach-at91/board-kb9202.c index ba39db5482b9..59b92aab9bcf 100644 --- a/trunk/arch/arm/mach-at91/board-kb9202.c +++ b/trunk/arch/arm/mach-at91/board-kb9202.c @@ -50,6 +50,24 @@ static void __init kb9202_init_early(void) /* Initialize processor: 10 MHz crystal */ at91_initialize(10000000); + + /* Set up the LEDs */ + at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1 (Rx & Tx only) */ + at91_register_uart(AT91RM9200_ID_US0, 1, 0); + + /* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */ + at91_register_uart(AT91RM9200_ID_US1, 2, 0); + + /* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */ + at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata kb9202_eth_data = { @@ -97,21 +115,7 @@ static struct atmel_nand_data __initdata kb9202_nand_data = { static void __init kb9202_board_init(void) { - /* Set up the LEDs */ - at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18); - /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1 (Rx & Tx only) */ - at91_register_uart(AT91RM9200_ID_US0, 1, 0); - - /* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */ - at91_register_uart(AT91RM9200_ID_US1, 2, 0); - - /* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */ - at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS); at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&kb9202_eth_data); diff --git a/trunk/arch/arm/mach-at91/board-neocore926.c b/trunk/arch/arm/mach-at91/board-neocore926.c index d2f4cc161766..57d5f6a4726a 100644 --- a/trunk/arch/arm/mach-at91/board-neocore926.c +++ b/trunk/arch/arm/mach-at91/board-neocore926.c @@ -55,6 +55,15 @@ static void __init neocore926_init_early(void) { /* Initialize processor: 20 MHz crystal */ at91_initialize(20000000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -332,11 +341,6 @@ static struct ac97c_platform_data neocore926_ac97_data = { static void __init neocore926_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */ - at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); at91_add_device_serial(); /* USB Host */ diff --git a/trunk/arch/arm/mach-at91/board-pcontrol-g20.c b/trunk/arch/arm/mach-at91/board-pcontrol-g20.c index 7fe638342421..b4a12fc184c8 100644 --- a/trunk/arch/arm/mach-at91/board-pcontrol-g20.c +++ b/trunk/arch/arm/mach-at91/board-pcontrol-g20.c @@ -40,6 +40,17 @@ static void __init pcontrol_g20_init_early(void) { stamp9g20_init_early(); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */ + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS + | ATMEL_UART_RTS); + + /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485 X5 */ + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS + | ATMEL_UART_RTS); + + /* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */ + at91_register_uart(AT91SAM9260_ID_US4, 3, 0); } static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { { @@ -188,16 +199,6 @@ static struct spi_board_info pcontrol_g20_spi_devices[] = { static void __init pcontrol_g20_board_init(void) { - /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */ - at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS - | ATMEL_UART_RTS); - - /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485 X5 */ - at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS - | ATMEL_UART_RTS); - - /* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */ - at91_register_uart(AT91SAM9260_ID_US4, 3, 0); stamp9g20_board_init(); at91_add_device_usbh(&usbh_data); at91_add_device_eth(&macb_data); diff --git a/trunk/arch/arm/mach-at91/board-picotux200.c b/trunk/arch/arm/mach-at91/board-picotux200.c index b45c0a5d5ca7..59e35dd14863 100644 --- a/trunk/arch/arm/mach-at91/board-picotux200.c +++ b/trunk/arch/arm/mach-at91/board-picotux200.c @@ -48,6 +48,17 @@ static void __init picotux200_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata picotux200_eth_data = { @@ -95,13 +106,6 @@ static struct platform_device picotux200_flash = { static void __init picotux200_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&picotux200_eth_data); diff --git a/trunk/arch/arm/mach-at91/board-qil-a9260.c b/trunk/arch/arm/mach-at91/board-qil-a9260.c index 0c61bf0d272c..b6ed5ed7081a 100644 --- a/trunk/arch/arm/mach-at91/board-qil-a9260.c +++ b/trunk/arch/arm/mach-at91/board-qil-a9260.c @@ -52,6 +52,24 @@ static void __init ek_init_early(void) { /* Initialize processor: 12.000 MHz crystal */ at91_initialize(12000000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */ + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */ + at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS1 (ie, USART0) */ + at91_set_serial_console(1); + } /* @@ -217,19 +235,6 @@ static struct gpio_led ek_leds[] = { static void __init ek_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); - - /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */ - at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); - - /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */ - at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS); at91_add_device_serial(); /* USB Host */ at91_add_device_usbh(&ek_usbh_data); diff --git a/trunk/arch/arm/mach-at91/board-rm9200dk.c b/trunk/arch/arm/mach-at91/board-rm9200dk.c index afd7a4713766..01332aa538b2 100644 --- a/trunk/arch/arm/mach-at91/board-rm9200dk.c +++ b/trunk/arch/arm/mach-at91/board-rm9200dk.c @@ -50,6 +50,20 @@ static void __init dk_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* Setup the LEDs */ + at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata dk_eth_data = { @@ -176,17 +190,7 @@ static struct gpio_led dk_leds[] = { static void __init dk_board_init(void) { - /* Setup the LEDs */ - at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2); - /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&dk_eth_data); diff --git a/trunk/arch/arm/mach-at91/board-rm9200ek.c b/trunk/arch/arm/mach-at91/board-rm9200ek.c index 78ffc8315f97..b2e4fe21f346 100644 --- a/trunk/arch/arm/mach-at91/board-rm9200ek.c +++ b/trunk/arch/arm/mach-at91/board-rm9200ek.c @@ -50,6 +50,20 @@ static void __init ek_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* Setup the LEDs */ + at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static struct macb_platform_data __initdata ek_eth_data = { @@ -103,7 +117,7 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = { }; #define EK_FLASH_BASE AT91_CHIPSELECT_0 -#define EK_FLASH_SIZE SZ_2M +#define EK_FLASH_SIZE SZ_8M static struct physmap_flash_data ek_flash_data = { .width = 2, @@ -147,17 +161,7 @@ static struct gpio_led ek_leds[] = { static void __init ek_board_init(void) { - /* Setup the LEDs */ - at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2); - /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&ek_eth_data); diff --git a/trunk/arch/arm/mach-at91/board-rsi-ews.c b/trunk/arch/arm/mach-at91/board-rsi-ews.c index 24ab9be7510f..af0750fafa29 100644 --- a/trunk/arch/arm/mach-at91/board-rsi-ews.c +++ b/trunk/arch/arm/mach-at91/board-rsi-ews.c @@ -35,6 +35,26 @@ static void __init rsi_ews_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* Setup the LEDs */ + at91_init_leds(AT91_PIN_PB6, AT91_PIN_PB9); + + /* DBGU on ttyS0. (Rx & Tx only) */ + /* This one is for debugging */ + at91_register_uart(0, 0, 0); + + /* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + /* Dialin/-out modem interface */ + at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* USART3 on ttyS4. (Rx, Tx, RTS) */ + /* RS485 communication */ + at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -184,23 +204,7 @@ static struct platform_device rsiews_nor_flash = { */ static void __init rsi_ews_board_init(void) { - /* Setup the LEDs */ - at91_init_leds(AT91_PIN_PB6, AT91_PIN_PB9); - /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - /* This one is for debugging */ - at91_register_uart(0, 0, 0); - - /* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - /* Dialin/-out modem interface */ - at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); - - /* USART3 on ttyS4. (Rx, Tx, RTS) */ - /* RS485 communication */ - at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_RTS); at91_add_device_serial(); at91_set_gpio_output(AT91_PIN_PA21, 0); /* Ethernet */ diff --git a/trunk/arch/arm/mach-at91/board-sam9-l9260.c b/trunk/arch/arm/mach-at91/board-sam9-l9260.c index cdd21f2595d2..e8b116b6cba6 100644 --- a/trunk/arch/arm/mach-at91/board-sam9-l9260.c +++ b/trunk/arch/arm/mach-at91/board-sam9-l9260.c @@ -48,6 +48,23 @@ static void __init ek_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* Setup the LEDs */ + at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */ + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -167,20 +184,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = { static void __init ek_board_init(void) { - /* Setup the LEDs */ - at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6); - /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); - - /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */ - at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); at91_add_device_serial(); /* USB Host */ at91_add_device_usbh(&ek_usbh_data); diff --git a/trunk/arch/arm/mach-at91/board-sam9260ek.c b/trunk/arch/arm/mach-at91/board-sam9260ek.c index 7b3c3913551a..d5aec55b0eb4 100644 --- a/trunk/arch/arm/mach-at91/board-sam9260ek.c +++ b/trunk/arch/arm/mach-at91/board-sam9260ek.c @@ -54,6 +54,20 @@ static void __init ek_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -306,16 +320,6 @@ static void __init ek_add_device_buttons(void) {} static void __init ek_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); - - /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ - at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); at91_add_device_serial(); /* USB Host */ at91_add_device_usbh(&ek_usbh_data); diff --git a/trunk/arch/arm/mach-at91/board-sam9261ek.c b/trunk/arch/arm/mach-at91/board-sam9261ek.c index 065b5ee35070..065fed342424 100644 --- a/trunk/arch/arm/mach-at91/board-sam9261ek.c +++ b/trunk/arch/arm/mach-at91/board-sam9261ek.c @@ -58,6 +58,15 @@ static void __init ek_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* Setup the LEDs */ + at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -76,8 +85,6 @@ static struct resource dm9000_resource[] = { .flags = IORESOURCE_MEM }, [2] = { - .start = AT91_PIN_PC11, - .end = AT91_PIN_PC11, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE, } @@ -121,6 +128,8 @@ static struct sam9_smc_config __initdata dm9000_smc_config = { static void __init ek_add_device_dm9000(void) { + struct resource *r = &dm9000_resource[2]; + /* Configure chip-select 2 (DM9000) */ sam9_smc_configure(0, 2, &dm9000_smc_config); @@ -130,6 +139,7 @@ static void __init ek_add_device_dm9000(void) /* Configure Interrupt pin as input, no pull-up */ at91_set_gpio_input(AT91_PIN_PC11, 0); + r->start = r->end = gpio_to_irq(AT91_PIN_PC11); platform_device_register(&dm9000_device); } #else @@ -567,12 +577,7 @@ static struct gpio_led ek_leds[] = { static void __init ek_board_init(void) { - /* Setup the LEDs */ - at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14); - /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); at91_add_device_serial(); /* USB Host */ at91_add_device_usbh(&ek_usbh_data); diff --git a/trunk/arch/arm/mach-at91/board-sam9263ek.c b/trunk/arch/arm/mach-at91/board-sam9263ek.c index 983cb98d2465..2ffe50f3a9e9 100644 --- a/trunk/arch/arm/mach-at91/board-sam9263ek.c +++ b/trunk/arch/arm/mach-at91/board-sam9263ek.c @@ -57,6 +57,15 @@ static void __init ek_init_early(void) { /* Initialize processor: 16.367 MHz crystal */ at91_initialize(16367660); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -403,11 +412,6 @@ static struct at91_can_data ek_can_data = { static void __init ek_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */ - at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); at91_add_device_serial(); /* USB Host */ at91_add_device_usbh(&ek_usbh_data); diff --git a/trunk/arch/arm/mach-at91/board-sam9g20ek.c b/trunk/arch/arm/mach-at91/board-sam9g20ek.c index 3d615532ae5c..8923ec9f5831 100644 --- a/trunk/arch/arm/mach-at91/board-sam9g20ek.c +++ b/trunk/arch/arm/mach-at91/board-sam9g20ek.c @@ -65,6 +65,20 @@ static void __init ek_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -358,16 +372,6 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = { static void __init ek_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); - - /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ - at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); at91_add_device_serial(); /* USB Host */ at91_add_device_usbh(&ek_usbh_data); diff --git a/trunk/arch/arm/mach-at91/board-sam9m10g45ek.c b/trunk/arch/arm/mach-at91/board-sam9m10g45ek.c index 9a87f0b072f8..c88e908ddd82 100644 --- a/trunk/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/trunk/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -53,6 +53,16 @@ static void __init ek_init_early(void) { /* Initialize processor: 12.000 MHz crystal */ at91_initialize(12000000); + + /* DGBU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 not connected on the -EK board */ + /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -447,12 +457,6 @@ static struct platform_device *devices[] __initdata = { static void __init ek_board_init(void) { /* Serial */ - /* DGBU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 not connected on the -EK board */ - /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ - at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); at91_add_device_serial(); /* USB HS Host */ at91_add_device_usbh_ohci(&ek_usbh_hs_data); diff --git a/trunk/arch/arm/mach-at91/board-sam9rlek.c b/trunk/arch/arm/mach-at91/board-sam9rlek.c index be3239f13daa..b109ce2ba864 100644 --- a/trunk/arch/arm/mach-at91/board-sam9rlek.c +++ b/trunk/arch/arm/mach-at91/board-sam9rlek.c @@ -42,6 +42,15 @@ static void __init ek_init_early(void) { /* Initialize processor: 12.000 MHz crystal */ at91_initialize(12000000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */ + at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -287,11 +296,6 @@ static void __init ek_add_device_buttons(void) {} static void __init ek_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */ - at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); at91_add_device_serial(); /* USB HS */ at91_add_device_usba(&ek_usba_udc_data); diff --git a/trunk/arch/arm/mach-at91/board-snapper9260.c b/trunk/arch/arm/mach-at91/board-snapper9260.c index 9d446f1bb45f..ebc9d01ce742 100644 --- a/trunk/arch/arm/mach-at91/board-snapper9260.c +++ b/trunk/arch/arm/mach-at91/board-snapper9260.c @@ -43,6 +43,16 @@ static void __init snapper9260_init_early(void) { at91_initialize(18432000); + + /* Debug on ttyS0 */ + at91_register_uart(0, 0, 0); + at91_set_serial_console(0); + + at91_register_uart(AT91SAM9260_ID_US0, 1, + ATMEL_UART_CTS | ATMEL_UART_RTS); + at91_register_uart(AT91SAM9260_ID_US1, 2, + ATMEL_UART_CTS | ATMEL_UART_RTS); + at91_register_uart(AT91SAM9260_ID_US2, 3, 0); } static struct at91_usbh_data __initdata snapper9260_usbh_data = { @@ -158,14 +168,6 @@ static void __init snapper9260_board_init(void) snapper9260_i2c_isl1208.irq = gpio_to_irq(AT91_PIN_PA31); i2c_register_board_info(0, &snapper9260_i2c_isl1208, 1); - /* Debug on ttyS0 */ - at91_register_uart(0, 0, 0); - - at91_register_uart(AT91SAM9260_ID_US0, 1, - ATMEL_UART_CTS | ATMEL_UART_RTS); - at91_register_uart(AT91SAM9260_ID_US1, 2, - ATMEL_UART_CTS | ATMEL_UART_RTS); - at91_register_uart(AT91SAM9260_ID_US2, 3, 0); at91_add_device_serial(); at91_add_device_usbh(&snapper9260_usbh_data); at91_add_device_udc(&snapper9260_udc_data); diff --git a/trunk/arch/arm/mach-at91/board-stamp9g20.c b/trunk/arch/arm/mach-at91/board-stamp9g20.c index ee86f9d7ee72..7640049410a0 100644 --- a/trunk/arch/arm/mach-at91/board-stamp9g20.c +++ b/trunk/arch/arm/mach-at91/board-stamp9g20.c @@ -36,6 +36,44 @@ void __init stamp9g20_init_early(void) { /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* DGBU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); +} + +static void __init stamp9g20evb_init_early(void) +{ + stamp9g20_init_early(); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR + | ATMEL_UART_DCD | ATMEL_UART_RI); +} + +static void __init portuxg20_init_early(void) +{ + stamp9g20_init_early(); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR + | ATMEL_UART_DCD | ATMEL_UART_RI); + + /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */ + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */ + at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* USART4 on ttyS5. (Rx, Tx only) */ + at91_register_uart(AT91SAM9260_ID_US4, 5, 0); + + /* USART5 on ttyS6. (Rx, Tx only) */ + at91_register_uart(AT91SAM9260_ID_US5, 6, 0); } /* @@ -216,8 +254,6 @@ void add_w1(void) void __init stamp9g20_board_init(void) { /* Serial */ - /* DGBU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); at91_add_device_serial(); /* NAND */ add_device_nand(); @@ -233,22 +269,6 @@ void __init stamp9g20_board_init(void) static void __init portuxg20_board_init(void) { - /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR - | ATMEL_UART_DCD | ATMEL_UART_RI); - - /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */ - at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); - - /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */ - at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS); - - /* USART4 on ttyS5. (Rx, Tx only) */ - at91_register_uart(AT91SAM9260_ID_US4, 5, 0); - - /* USART5 on ttyS6. (Rx, Tx only) */ - at91_register_uart(AT91SAM9260_ID_US5, 6, 0); stamp9g20_board_init(); /* USB Host */ at91_add_device_usbh(&usbh_data); @@ -266,10 +286,6 @@ static void __init portuxg20_board_init(void) static void __init stamp9g20evb_board_init(void) { - /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR - | ATMEL_UART_DCD | ATMEL_UART_RI); stamp9g20_board_init(); /* USB Host */ at91_add_device_usbh(&usbh_data); @@ -287,7 +303,7 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20") /* Maintainer: taskit GmbH */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .init_early = stamp9g20_init_early, + .init_early = portuxg20_init_early, .init_irq = at91_init_irq_default, .init_machine = portuxg20_board_init, MACHINE_END @@ -296,7 +312,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20") /* Maintainer: taskit GmbH */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .init_early = stamp9g20_init_early, + .init_early = stamp9g20evb_init_early, .init_irq = at91_init_irq_default, .init_machine = stamp9g20evb_board_init, MACHINE_END diff --git a/trunk/arch/arm/mach-at91/board-usb-a926x.c b/trunk/arch/arm/mach-at91/board-usb-a926x.c index 332ecd40bd02..b7483a3d0980 100644 --- a/trunk/arch/arm/mach-at91/board-usb-a926x.c +++ b/trunk/arch/arm/mach-at91/board-usb-a926x.c @@ -53,6 +53,12 @@ static void __init ek_init_early(void) { /* Initialize processor: 12.00 MHz crystal */ at91_initialize(12000000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -319,8 +325,6 @@ static void __init ek_add_device_leds(void) static void __init ek_board_init(void) { /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); at91_add_device_serial(); /* USB Host */ at91_add_device_usbh(&ek_usbh_data); diff --git a/trunk/arch/arm/mach-at91/board-yl-9200.c b/trunk/arch/arm/mach-at91/board-yl-9200.c index d56665ea4b55..38dd279d30b2 100644 --- a/trunk/arch/arm/mach-at91/board-yl-9200.c +++ b/trunk/arch/arm/mach-at91/board-yl-9200.c @@ -58,6 +58,26 @@ static void __init yl9200_init_early(void) /* Initialize processor: 18.432 MHz crystal */ at91_initialize(18432000); + + /* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */ + at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* USART0 on ttyS2. (Rx & Tx only to JP3) */ + at91_register_uart(AT91RM9200_ID_US0, 2, 0); + + /* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */ + at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } /* @@ -540,23 +560,7 @@ void __init yl9200_add_device_video(void) {} static void __init yl9200_board_init(void) { - /* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */ - at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17); - /* Serial */ - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); - - /* USART0 on ttyS2. (Rx & Tx only to JP3) */ - at91_register_uart(AT91RM9200_ID_US0, 2, 0); - - /* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */ - at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS); at91_add_device_serial(); /* Ethernet */ at91_add_device_eth(&yl9200_eth_data); diff --git a/trunk/arch/arm/mach-at91/clock.c b/trunk/arch/arm/mach-at91/clock.c index a0f4d7424cdc..6b692824c988 100644 --- a/trunk/arch/arm/mach-at91/clock.c +++ b/trunk/arch/arm/mach-at91/clock.c @@ -35,6 +35,7 @@ #include "generic.h" void __iomem *at91_pmc_base; +EXPORT_SYMBOL_GPL(at91_pmc_base); /* * There's a lot more which can be done with clocks, including cpufreq diff --git a/trunk/arch/arm/mach-at91/cpuidle.c b/trunk/arch/arm/mach-at91/cpuidle.c index 0c6381516a5a..ece1f9aefb47 100644 --- a/trunk/arch/arm/mach-at91/cpuidle.c +++ b/trunk/arch/arm/mach-at91/cpuidle.c @@ -21,7 +21,6 @@ #include #include #include -#include #include "pm.h" @@ -34,12 +33,7 @@ static int at91_enter_idle(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - if (cpu_is_at91rm9200()) - at91rm9200_standby(); - else if (cpu_is_at91sam9g45()) - at91sam9g45_standby(); - else - at91sam9_standby(); + at91_standby(); return index; } diff --git a/trunk/arch/arm/mach-at91/generic.h b/trunk/arch/arm/mach-at91/generic.h index 0a60bf837037..dd9b346c451d 100644 --- a/trunk/arch/arm/mach-at91/generic.h +++ b/trunk/arch/arm/mach-at91/generic.h @@ -40,6 +40,17 @@ extern struct sys_timer at91sam926x_timer; extern struct sys_timer at91x40_timer; /* Clocks */ +/* + * function to specify the clock of the default console. As we do not + * use the device/driver bus, the dev_name is not intialize. So we need + * to link the clock to a specific con_id only "usart" + */ +extern void __init at91rm9200_set_console_clock(int id); +extern void __init at91sam9260_set_console_clock(int id); +extern void __init at91sam9261_set_console_clock(int id); +extern void __init at91sam9263_set_console_clock(int id); +extern void __init at91sam9rl_set_console_clock(int id); +extern void __init at91sam9g45_set_console_clock(int id); #ifdef CONFIG_AT91_PMC_UNIT extern int __init at91_clock_init(unsigned long main_clock); extern int __init at91_dt_clock_init(void); diff --git a/trunk/arch/arm/mach-at91/include/mach/at91_pmc.h b/trunk/arch/arm/mach-at91/include/mach/at91_pmc.h index 36604782a78f..ea2c57a86ca6 100644 --- a/trunk/arch/arm/mach-at91/include/mach/at91_pmc.h +++ b/trunk/arch/arm/mach-at91/include/mach/at91_pmc.h @@ -25,7 +25,7 @@ extern void __iomem *at91_pmc_base; #define at91_pmc_write(field, value) \ __raw_writel(value, at91_pmc_base + field) #else -.extern at91_aic_base +.extern at91_pmc_base #endif #define AT91_PMC_SCER 0x00 /* System Clock Enable Register */ diff --git a/trunk/arch/arm/mach-at91/include/mach/at91rm9200.h b/trunk/arch/arm/mach-at91/include/mach/at91rm9200.h index e67317c67761..603e6aac2a4f 100644 --- a/trunk/arch/arm/mach-at91/include/mach/at91rm9200.h +++ b/trunk/arch/arm/mach-at91/include/mach/at91rm9200.h @@ -88,6 +88,11 @@ #define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */ #define AT91RM9200_BASE_MC 0xffffff00 /* Memory Controllers */ +#define AT91_USART0 AT91RM9200_BASE_US0 +#define AT91_USART1 AT91RM9200_BASE_US1 +#define AT91_USART2 AT91RM9200_BASE_US2 +#define AT91_USART3 AT91RM9200_BASE_US3 + /* * Internal Memory. */ diff --git a/trunk/arch/arm/mach-at91/include/mach/at91sam9260.h b/trunk/arch/arm/mach-at91/include/mach/at91sam9260.h index 416c7b6c56d3..08ae9afd00fe 100644 --- a/trunk/arch/arm/mach-at91/include/mach/at91sam9260.h +++ b/trunk/arch/arm/mach-at91/include/mach/at91sam9260.h @@ -95,6 +95,13 @@ #define AT91SAM9260_BASE_WDT 0xfffffd40 #define AT91SAM9260_BASE_GPBR 0xfffffd50 +#define AT91_USART0 AT91SAM9260_BASE_US0 +#define AT91_USART1 AT91SAM9260_BASE_US1 +#define AT91_USART2 AT91SAM9260_BASE_US2 +#define AT91_USART3 AT91SAM9260_BASE_US3 +#define AT91_USART4 AT91SAM9260_BASE_US4 +#define AT91_USART5 AT91SAM9260_BASE_US5 + /* * Internal Memory. diff --git a/trunk/arch/arm/mach-at91/include/mach/at91sam9261.h b/trunk/arch/arm/mach-at91/include/mach/at91sam9261.h index a041406d06ee..44fbdc12ee62 100644 --- a/trunk/arch/arm/mach-at91/include/mach/at91sam9261.h +++ b/trunk/arch/arm/mach-at91/include/mach/at91sam9261.h @@ -79,6 +79,10 @@ #define AT91SAM9261_BASE_WDT 0xfffffd40 #define AT91SAM9261_BASE_GPBR 0xfffffd50 +#define AT91_USART0 AT91SAM9261_BASE_US0 +#define AT91_USART1 AT91SAM9261_BASE_US1 +#define AT91_USART2 AT91SAM9261_BASE_US2 + /* * Internal Memory. diff --git a/trunk/arch/arm/mach-at91/include/mach/at91sam9263.h b/trunk/arch/arm/mach-at91/include/mach/at91sam9263.h index d201029d60b3..d96cbb2e03c4 100644 --- a/trunk/arch/arm/mach-at91/include/mach/at91sam9263.h +++ b/trunk/arch/arm/mach-at91/include/mach/at91sam9263.h @@ -95,6 +95,10 @@ #define AT91SAM9263_BASE_RTT1 0xfffffd50 #define AT91SAM9263_BASE_GPBR 0xfffffd60 +#define AT91_USART0 AT91SAM9263_BASE_US0 +#define AT91_USART1 AT91SAM9263_BASE_US1 +#define AT91_USART2 AT91SAM9263_BASE_US2 + #define AT91_SMC AT91_SMC0 /* diff --git a/trunk/arch/arm/mach-at91/include/mach/at91sam9g45.h b/trunk/arch/arm/mach-at91/include/mach/at91sam9g45.h index 3a4da24d5911..d052abcff852 100644 --- a/trunk/arch/arm/mach-at91/include/mach/at91sam9g45.h +++ b/trunk/arch/arm/mach-at91/include/mach/at91sam9g45.h @@ -106,6 +106,11 @@ #define AT91SAM9G45_BASE_RTC 0xfffffdb0 #define AT91SAM9G45_BASE_GPBR 0xfffffd60 +#define AT91_USART0 AT91SAM9G45_BASE_US0 +#define AT91_USART1 AT91SAM9G45_BASE_US1 +#define AT91_USART2 AT91SAM9G45_BASE_US2 +#define AT91_USART3 AT91SAM9G45_BASE_US3 + /* * Internal Memory. */ diff --git a/trunk/arch/arm/mach-at91/include/mach/at91sam9rl.h b/trunk/arch/arm/mach-at91/include/mach/at91sam9rl.h index a15db56d33fa..e0073eb10144 100644 --- a/trunk/arch/arm/mach-at91/include/mach/at91sam9rl.h +++ b/trunk/arch/arm/mach-at91/include/mach/at91sam9rl.h @@ -89,6 +89,11 @@ #define AT91SAM9RL_BASE_GPBR 0xfffffd60 #define AT91SAM9RL_BASE_RTC 0xfffffe00 +#define AT91_USART0 AT91SAM9RL_BASE_US0 +#define AT91_USART1 AT91SAM9RL_BASE_US1 +#define AT91_USART2 AT91SAM9RL_BASE_US2 +#define AT91_USART3 AT91SAM9RL_BASE_US3 + /* * Internal Memory. diff --git a/trunk/arch/arm/mach-at91/include/mach/at91sam9x5.h b/trunk/arch/arm/mach-at91/include/mach/at91sam9x5.h index c75ee19b58d3..88e43d534cdf 100644 --- a/trunk/arch/arm/mach-at91/include/mach/at91sam9x5.h +++ b/trunk/arch/arm/mach-at91/include/mach/at91sam9x5.h @@ -54,6 +54,14 @@ #define AT91SAM9X5_BASE_USART1 0xf8020000 #define AT91SAM9X5_BASE_USART2 0xf8024000 +/* + * Base addresses for early serial code (uncompress.h) + */ +#define AT91_DBGU AT91_BASE_DBGU0 +#define AT91_USART0 AT91SAM9X5_BASE_USART0 +#define AT91_USART1 AT91SAM9X5_BASE_USART1 +#define AT91_USART2 AT91SAM9X5_BASE_USART2 + /* * Internal Memory. */ diff --git a/trunk/arch/arm/mach-at91/include/mach/board.h b/trunk/arch/arm/mach-at91/include/mach/board.h index 369afc2ffc5b..49a821192c65 100644 --- a/trunk/arch/arm/mach-at91/include/mach/board.h +++ b/trunk/arch/arm/mach-at91/include/mach/board.h @@ -121,6 +121,7 @@ extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_de #define ATMEL_UART_RI 0x20 extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins); +extern void __init at91_set_serial_console(unsigned portnr); extern struct platform_device *atmel_default_console_device; diff --git a/trunk/arch/arm/mach-at91/include/mach/cpu.h b/trunk/arch/arm/mach-at91/include/mach/cpu.h index 73d2fd209ce4..0118c3338552 100644 --- a/trunk/arch/arm/mach-at91/include/mach/cpu.h +++ b/trunk/arch/arm/mach-at91/include/mach/cpu.h @@ -54,7 +54,6 @@ #define ARCH_REVISON_9200_BGA (0 << 0) #define ARCH_REVISON_9200_PQFP (1 << 0) -#ifndef __ASSEMBLY__ enum at91_soc_type { /* 920T */ AT91_SOC_RM9200, @@ -107,7 +106,7 @@ static inline int at91_soc_is_detected(void) return at91_soc_initdata.type != AT91_SOC_NONE; } -#ifdef CONFIG_SOC_AT91RM9200 +#ifdef CONFIG_ARCH_AT91RM9200 #define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200) #define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA) #define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP) @@ -117,37 +116,45 @@ static inline int at91_soc_is_detected(void) #define cpu_is_at91rm9200_pqfp() (0) #endif -#ifdef CONFIG_SOC_AT91SAM9260 +#ifdef CONFIG_ARCH_AT91SAM9260 #define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE) #define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260) -#define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20) #else #define cpu_is_at91sam9xe() (0) #define cpu_is_at91sam9260() (0) +#endif + +#ifdef CONFIG_ARCH_AT91SAM9G20 +#define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20) +#else #define cpu_is_at91sam9g20() (0) #endif -#ifdef CONFIG_SOC_AT91SAM9261 +#ifdef CONFIG_ARCH_AT91SAM9261 #define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261) -#define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10) #else #define cpu_is_at91sam9261() (0) +#endif + +#ifdef CONFIG_ARCH_AT91SAM9G10 +#define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10) +#else #define cpu_is_at91sam9g10() (0) #endif -#ifdef CONFIG_SOC_AT91SAM9263 +#ifdef CONFIG_ARCH_AT91SAM9263 #define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263) #else #define cpu_is_at91sam9263() (0) #endif -#ifdef CONFIG_SOC_AT91SAM9RL +#ifdef CONFIG_ARCH_AT91SAM9RL #define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL) #else #define cpu_is_at91sam9rl() (0) #endif -#ifdef CONFIG_SOC_AT91SAM9G45 +#ifdef CONFIG_ARCH_AT91SAM9G45 #define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45) #define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES) #define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10) @@ -161,7 +168,7 @@ static inline int at91_soc_is_detected(void) #define cpu_is_at91sam9m11() (0) #endif -#ifdef CONFIG_SOC_AT91SAM9X5 +#ifdef CONFIG_ARCH_AT91SAM9X5 #define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5) #define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15) #define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35) @@ -182,6 +189,5 @@ static inline int at91_soc_is_detected(void) * definitions may reduce clutter in common drivers. */ #define cpu_is_at32ap7000() (0) -#endif /* __ASSEMBLY__ */ #endif /* __MACH_CPU_H__ */ diff --git a/trunk/arch/arm/mach-at91/include/mach/hardware.h b/trunk/arch/arm/mach-at91/include/mach/hardware.h index 3a01f8ff7e74..e9e29a6c3868 100644 --- a/trunk/arch/arm/mach-at91/include/mach/hardware.h +++ b/trunk/arch/arm/mach-at91/include/mach/hardware.h @@ -22,17 +22,27 @@ /* 9263, 9g45 */ #define AT91_BASE_DBGU1 0xffffee00 -#if defined(CONFIG_ARCH_AT91X40) -#include -#else +#if defined(CONFIG_ARCH_AT91RM9200) #include +#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) #include +#elif defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10) #include +#elif defined(CONFIG_ARCH_AT91SAM9263) #include +#elif defined(CONFIG_ARCH_AT91SAM9RL) #include +#elif defined(CONFIG_ARCH_AT91SAM9G45) #include +#elif defined(CONFIG_ARCH_AT91SAM9X5) #include +#elif defined(CONFIG_ARCH_AT91X40) +#include +#else +#error "Unsupported AT91 processor" +#endif +#if !defined(CONFIG_ARCH_AT91X40) /* * On all at91 except rm9200 and x40 have the System Controller starts * at address 0xffffc000 and has a size of 16KiB. diff --git a/trunk/arch/arm/mach-at91/include/mach/uncompress.h b/trunk/arch/arm/mach-at91/include/mach/uncompress.h index 6f6118d1576a..4218647c1fcd 100644 --- a/trunk/arch/arm/mach-at91/include/mach/uncompress.h +++ b/trunk/arch/arm/mach-at91/include/mach/uncompress.h @@ -1,8 +1,7 @@ /* * arch/arm/mach-at91/include/mach/uncompress.h * - * Copyright (C) 2003 SAN People - * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD + * Copyright (C) 2003 SAN People * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -26,147 +25,22 @@ #include #include -#include -#include - -void __iomem *at91_uart; - -#if !defined(CONFIG_ARCH_AT91X40) -static const u32 uarts_rm9200[] = { - AT91_BASE_DBGU0, - AT91RM9200_BASE_US0, - AT91RM9200_BASE_US1, - AT91RM9200_BASE_US2, - AT91RM9200_BASE_US3, - 0, -}; - -static const u32 uarts_sam9260[] = { - AT91_BASE_DBGU0, - AT91SAM9260_BASE_US0, - AT91SAM9260_BASE_US1, - AT91SAM9260_BASE_US2, - AT91SAM9260_BASE_US3, - AT91SAM9260_BASE_US4, - AT91SAM9260_BASE_US5, - 0, -}; - -static const u32 uarts_sam9261[] = { - AT91_BASE_DBGU0, - AT91SAM9261_BASE_US0, - AT91SAM9261_BASE_US1, - AT91SAM9261_BASE_US2, - 0, -}; - -static const u32 uarts_sam9263[] = { - AT91_BASE_DBGU1, - AT91SAM9263_BASE_US0, - AT91SAM9263_BASE_US1, - AT91SAM9263_BASE_US2, - 0, -}; - -static const u32 uarts_sam9g45[] = { - AT91_BASE_DBGU1, - AT91SAM9G45_BASE_US0, - AT91SAM9G45_BASE_US1, - AT91SAM9G45_BASE_US2, - AT91SAM9G45_BASE_US3, - 0, -}; - -static const u32 uarts_sam9rl[] = { - AT91_BASE_DBGU0, - AT91SAM9RL_BASE_US0, - AT91SAM9RL_BASE_US1, - AT91SAM9RL_BASE_US2, - AT91SAM9RL_BASE_US3, - 0, -}; - -static const u32 uarts_sam9x5[] = { - AT91_BASE_DBGU0, - AT91SAM9X5_BASE_USART0, - AT91SAM9X5_BASE_USART1, - AT91SAM9X5_BASE_USART2, - 0, -}; - -static inline const u32* decomp_soc_detect(u32 dbgu_base) -{ - u32 cidr, socid; - - cidr = __raw_readl(dbgu_base + AT91_DBGU_CIDR); - socid = cidr & ~AT91_CIDR_VERSION; - - switch (socid) { - case ARCH_ID_AT91RM9200: - return uarts_rm9200; - - case ARCH_ID_AT91SAM9G20: - case ARCH_ID_AT91SAM9260: - return uarts_sam9260; - - case ARCH_ID_AT91SAM9261: - return uarts_sam9261; - - case ARCH_ID_AT91SAM9263: - return uarts_sam9263; - - case ARCH_ID_AT91SAM9G45: - return uarts_sam9g45; - - case ARCH_ID_AT91SAM9RL64: - return uarts_sam9rl; - - case ARCH_ID_AT91SAM9X5: - return uarts_sam9x5; - } - - /* at91sam9g10 */ - if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) { - return uarts_sam9261; - } - /* at91sam9xe */ - else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) { - return uarts_sam9260; - } - - return NULL; -} - -static inline void arch_decomp_setup(void) -{ - int i = 0; - const u32* usarts; - - usarts = decomp_soc_detect(AT91_BASE_DBGU0); - - if (!usarts) - usarts = decomp_soc_detect(AT91_BASE_DBGU1); - if (!usarts) { - at91_uart = NULL; - return; - } - - do { - /* physical address */ - at91_uart = (void __iomem *)usarts[i]; - - if (__raw_readl(at91_uart + ATMEL_US_BRGR)) - return; - i++; - } while (usarts[i]); - - at91_uart = NULL; -} -#else -static inline void arch_decomp_setup(void) -{ - at91_uart = NULL; -} +#if defined(CONFIG_AT91_EARLY_DBGU0) +#define UART_OFFSET AT91_BASE_DBGU0 +#elif defined(CONFIG_AT91_EARLY_DBGU1) +#define UART_OFFSET AT91_BASE_DBGU1 +#elif defined(CONFIG_AT91_EARLY_USART0) +#define UART_OFFSET AT91_USART0 +#elif defined(CONFIG_AT91_EARLY_USART1) +#define UART_OFFSET AT91_USART1 +#elif defined(CONFIG_AT91_EARLY_USART2) +#define UART_OFFSET AT91_USART2 +#elif defined(CONFIG_AT91_EARLY_USART3) +#define UART_OFFSET AT91_USART3 +#elif defined(CONFIG_AT91_EARLY_USART4) +#define UART_OFFSET AT91_USART4 +#elif defined(CONFIG_AT91_EARLY_USART5) +#define UART_OFFSET AT91_USART5 #endif /* @@ -178,24 +52,28 @@ static inline void arch_decomp_setup(void) */ static void putc(int c) { - if (!at91_uart) - return; +#ifdef UART_OFFSET + void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */ - while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXRDY)) + while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXRDY)) barrier(); - __raw_writel(c, at91_uart + ATMEL_US_THR); + __raw_writel(c, sys + ATMEL_US_THR); +#endif } static inline void flush(void) { - if (!at91_uart) - return; +#ifdef UART_OFFSET + void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */ /* wait for transmission to complete */ - while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXEMPTY)) + while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXEMPTY)) barrier(); +#endif } +#define arch_decomp_setup() + #define arch_decomp_wdog() #endif diff --git a/trunk/arch/arm/mach-at91/pm.c b/trunk/arch/arm/mach-at91/pm.c index 1bfaad628731..f630250c6b87 100644 --- a/trunk/arch/arm/mach-at91/pm.c +++ b/trunk/arch/arm/mach-at91/pm.c @@ -261,12 +261,7 @@ static int at91_pm_enter(suspend_state_t state) * For ARM 926 based chips, this requirement is weaker * as at91sam9 can access a RAM in self-refresh mode. */ - if (cpu_is_at91rm9200()) - at91rm9200_standby(); - else if (cpu_is_at91sam9g45()) - at91sam9g45_standby(); - else - at91sam9_standby(); + at91_standby(); break; case PM_SUSPEND_ON: @@ -312,9 +307,10 @@ static int __init at91_pm_init(void) pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : "")); +#ifdef CONFIG_ARCH_AT91RM9200 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */ - if (cpu_is_at91rm9200()) - at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); + at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); +#endif suspend_set_ops(&at91_pm_ops); diff --git a/trunk/arch/arm/mach-at91/pm.h b/trunk/arch/arm/mach-at91/pm.h index 38f467c6b710..89f56f3a802e 100644 --- a/trunk/arch/arm/mach-at91/pm.h +++ b/trunk/arch/arm/mach-at91/pm.h @@ -12,6 +12,7 @@ #define __ARCH_ARM_MACH_AT91_PM #include +#ifdef CONFIG_ARCH_AT91RM9200 #include /* @@ -42,6 +43,10 @@ static inline void at91rm9200_standby(void) "r" (lpr)); } +#define at91_standby at91rm9200_standby + +#elif defined(CONFIG_ARCH_AT91SAM9G45) + /* We manage both DDRAM/SDRAM controllers, we need more than one value to * remember. */ @@ -70,7 +75,11 @@ static inline void at91sam9g45_standby(void) at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); } -#ifdef CONFIG_SOC_AT91SAM9263 +#define at91_standby at91sam9g45_standby + +#else + +#ifdef CONFIG_ARCH_AT91SAM9263 /* * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; * handle those cases both here and in the Suspend-To-RAM support. @@ -93,4 +102,8 @@ static inline void at91sam9_standby(void) at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr); } +#define at91_standby at91sam9_standby + +#endif + #endif diff --git a/trunk/arch/arm/mach-at91/pm_slowclock.S b/trunk/arch/arm/mach-at91/pm_slowclock.S index 098c28ddf025..db5452123f17 100644 --- a/trunk/arch/arm/mach-at91/pm_slowclock.S +++ b/trunk/arch/arm/mach-at91/pm_slowclock.S @@ -18,7 +18,7 @@ #include -#ifdef CONFIG_SOC_AT91SAM9263 +#ifdef CONFIG_ARCH_AT91SAM9263 /* * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; * handle those cases both here and in the Suspend-To-RAM support. diff --git a/trunk/arch/arm/mach-at91/setup.c b/trunk/arch/arm/mach-at91/setup.c index 97cc04dc8073..f44a2e7272e3 100644 --- a/trunk/arch/arm/mach-at91/setup.c +++ b/trunk/arch/arm/mach-at91/setup.c @@ -54,6 +54,7 @@ void __init at91_init_interrupts(unsigned int *priority) } void __iomem *at91_ramc_base[2]; +EXPORT_SYMBOL_GPL(at91_ramc_base); void __init at91_ioremap_ramc(int id, u32 addr, u32 size) { @@ -292,6 +293,7 @@ void __init at91_ioremap_rstc(u32 base_addr) } void __iomem *at91_matrix_base; +EXPORT_SYMBOL_GPL(at91_matrix_base); void __init at91_ioremap_matrix(u32 base_addr) { diff --git a/trunk/arch/arm/mach-at91/soc.h b/trunk/arch/arm/mach-at91/soc.h index 683dddfd8b13..5db4aa45404a 100644 --- a/trunk/arch/arm/mach-at91/soc.h +++ b/trunk/arch/arm/mach-at91/soc.h @@ -26,30 +26,30 @@ static inline int at91_soc_is_enabled(void) return at91_boot_soc.init != NULL; } -#if !defined(CONFIG_SOC_AT91RM9200) +#if !defined(CONFIG_ARCH_AT91RM9200) #define at91rm9200_soc at91_boot_soc #endif -#if !defined(CONFIG_SOC_AT91SAM9260) +#if !(defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)) #define at91sam9260_soc at91_boot_soc #endif -#if !defined(CONFIG_SOC_AT91SAM9261) +#if !(defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10)) #define at91sam9261_soc at91_boot_soc #endif -#if !defined(CONFIG_SOC_AT91SAM9263) +#if !defined(CONFIG_ARCH_AT91SAM9263) #define at91sam9263_soc at91_boot_soc #endif -#if !defined(CONFIG_SOC_AT91SAM9G45) +#if !defined(CONFIG_ARCH_AT91SAM9G45) #define at91sam9g45_soc at91_boot_soc #endif -#if !defined(CONFIG_SOC_AT91SAM9RL) +#if !defined(CONFIG_ARCH_AT91SAM9RL) #define at91sam9rl_soc at91_boot_soc #endif -#if !defined(CONFIG_SOC_AT91SAM9X5) +#if !defined(CONFIG_ARCH_AT91SAM9X5) #define at91sam9x5_soc at91_boot_soc #endif diff --git a/trunk/arch/arm/mach-bcmring/core.c b/trunk/arch/arm/mach-bcmring/core.c index 22e4e0a28ad1..adbfb1994582 100644 --- a/trunk/arch/arm/mach-bcmring/core.c +++ b/trunk/arch/arm/mach-bcmring/core.c @@ -52,8 +52,8 @@ #include #include -static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL); -static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL); +static AMBA_APB_DEVICE(uartA, "uartA", 0, MM_ADDR_IO_UARTA, {IRQ_UARTA}, NULL); +static AMBA_APB_DEVICE(uartB, "uartB", 0, MM_ADDR_IO_UARTB, {IRQ_UARTB}, NULL); static struct clk pll1_clk = { .name = "PLL1", diff --git a/trunk/arch/arm/mach-imx/imx27-dt.c b/trunk/arch/arm/mach-imx/imx27-dt.c index 861ceb8232d6..ed38d03c61f2 100644 --- a/trunk/arch/arm/mach-imx/imx27-dt.c +++ b/trunk/arch/arm/mach-imx/imx27-dt.c @@ -35,7 +35,7 @@ static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = { static int __init imx27_avic_add_irq_domain(struct device_node *np, struct device_node *interrupt_parent) { - irq_domain_add_simple(np, 0); + irq_domain_add_legacy(np, 64, 0, 0, &irq_domain_simple_ops, NULL); return 0; } @@ -44,7 +44,9 @@ static int __init imx27_gpio_add_irq_domain(struct device_node *np, { static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; - irq_domain_add_simple(np, gpio_irq_base); + gpio_irq_base -= 32; + irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, + NULL); return 0; } diff --git a/trunk/arch/arm/mach-imx/mach-cpuimx35.c b/trunk/arch/arm/mach-imx/mach-cpuimx35.c index 8ecc872b2547..c515f8ede1a1 100644 --- a/trunk/arch/arm/mach-imx/mach-cpuimx35.c +++ b/trunk/arch/arm/mach-imx/mach-cpuimx35.c @@ -194,7 +194,7 @@ static void __init eukrea_cpuimx35_timer_init(void) mx35_clocks_init(); } -struct sys_timer eukrea_cpuimx35_timer = { +static struct sys_timer eukrea_cpuimx35_timer = { .init = eukrea_cpuimx35_timer_init, }; diff --git a/trunk/arch/arm/mach-imx/mach-mx1ads.c b/trunk/arch/arm/mach-imx/mach-mx1ads.c index 97046088ff1a..7274e7928136 100644 --- a/trunk/arch/arm/mach-imx/mach-mx1ads.c +++ b/trunk/arch/arm/mach-imx/mach-mx1ads.c @@ -134,7 +134,7 @@ static void __init mx1ads_timer_init(void) mx1_clocks_init(32000); } -struct sys_timer mx1ads_timer = { +static struct sys_timer mx1ads_timer = { .init = mx1ads_timer_init, }; diff --git a/trunk/arch/arm/mach-imx/mach-mx21ads.c b/trunk/arch/arm/mach-imx/mach-mx21ads.c index d14bbe949a4f..e432d4acee1f 100644 --- a/trunk/arch/arm/mach-imx/mach-mx21ads.c +++ b/trunk/arch/arm/mach-imx/mach-mx21ads.c @@ -304,7 +304,8 @@ static void __init mx21ads_board_init(void) imx21_add_mxc_nand(&mx21ads_nand_board_info); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); - platform_device_register_full(&mx21ads_cs8900_devinfo); + platform_device_register_full( + (struct platform_device_info *)&mx21ads_cs8900_devinfo); } static void __init mx21ads_timer_init(void) diff --git a/trunk/arch/arm/mach-imx/mach-mx31lite.c b/trunk/arch/arm/mach-imx/mach-mx31lite.c index 0abef5f13df5..686c60587980 100644 --- a/trunk/arch/arm/mach-imx/mach-mx31lite.c +++ b/trunk/arch/arm/mach-imx/mach-mx31lite.c @@ -283,7 +283,7 @@ static void __init mx31lite_timer_init(void) mx31_clocks_init(26000000); } -struct sys_timer mx31lite_timer = { +static struct sys_timer mx31lite_timer = { .init = mx31lite_timer_init, }; diff --git a/trunk/arch/arm/mach-imx/mach-mx31moboard.c b/trunk/arch/arm/mach-imx/mach-mx31moboard.c index f17a15f28316..1dfe3c7a7be1 100644 --- a/trunk/arch/arm/mach-imx/mach-mx31moboard.c +++ b/trunk/arch/arm/mach-imx/mach-mx31moboard.c @@ -580,7 +580,7 @@ static void __init mx31moboard_timer_init(void) mx31_clocks_init(26000000); } -struct sys_timer mx31moboard_timer = { +static struct sys_timer mx31moboard_timer = { .init = mx31moboard_timer_init, }; diff --git a/trunk/arch/arm/mach-imx/mach-mx35_3ds.c b/trunk/arch/arm/mach-imx/mach-mx35_3ds.c index 6ae51c6b95b7..c433187988a2 100644 --- a/trunk/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/trunk/arch/arm/mach-imx/mach-mx35_3ds.c @@ -419,7 +419,7 @@ static void __init mx35pdk_timer_init(void) mx35_clocks_init(); } -struct sys_timer mx35pdk_timer = { +static struct sys_timer mx35pdk_timer = { .init = mx35pdk_timer_init, }; diff --git a/trunk/arch/arm/mach-imx/mach-mx51_efikamx.c b/trunk/arch/arm/mach-imx/mach-mx51_efikamx.c index 86e96ef11f9d..586e9f822124 100644 --- a/trunk/arch/arm/mach-imx/mach-mx51_efikamx.c +++ b/trunk/arch/arm/mach-imx/mach-mx51_efikamx.c @@ -284,7 +284,8 @@ static struct sys_timer mx51_efikamx_timer = { .init = mx51_efikamx_timer_init, }; -MACHINE_START(MX51_EFIKAMX, "Genesi Efika MX (Smarttop)") +MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop") + /* Maintainer: Amit Kucheria */ .atag_offset = 0x100, .map_io = mx51_map_io, .init_early = imx51_init_early, diff --git a/trunk/arch/arm/mach-imx/mach-mx51_efikasb.c b/trunk/arch/arm/mach-imx/mach-mx51_efikasb.c index 88f837a6cc76..24aded9e109f 100644 --- a/trunk/arch/arm/mach-imx/mach-mx51_efikasb.c +++ b/trunk/arch/arm/mach-imx/mach-mx51_efikasb.c @@ -280,7 +280,7 @@ static struct sys_timer mx51_efikasb_timer = { .init = mx51_efikasb_timer_init, }; -MACHINE_START(MX51_EFIKASB, "Genesi Efika MX (Smartbook)") +MACHINE_START(MX51_EFIKASB, "Genesi Efika Smartbook") .atag_offset = 0x100, .map_io = mx51_map_io, .init_early = imx51_init_early, diff --git a/trunk/arch/arm/mach-imx/mach-pcm037.c b/trunk/arch/arm/mach-imx/mach-pcm037.c index 5fddf94cc969..10c9795934a3 100644 --- a/trunk/arch/arm/mach-imx/mach-pcm037.c +++ b/trunk/arch/arm/mach-imx/mach-pcm037.c @@ -683,7 +683,7 @@ static void __init pcm037_timer_init(void) mx31_clocks_init(26000000); } -struct sys_timer pcm037_timer = { +static struct sys_timer pcm037_timer = { .init = pcm037_timer_init, }; diff --git a/trunk/arch/arm/mach-imx/mach-pcm043.c b/trunk/arch/arm/mach-imx/mach-pcm043.c index 237474fcca23..73585f55cca0 100644 --- a/trunk/arch/arm/mach-imx/mach-pcm043.c +++ b/trunk/arch/arm/mach-imx/mach-pcm043.c @@ -399,7 +399,7 @@ static void __init pcm043_timer_init(void) mx35_clocks_init(); } -struct sys_timer pcm043_timer = { +static struct sys_timer pcm043_timer = { .init = pcm043_timer_init, }; diff --git a/trunk/arch/arm/mach-imx/mach-vpr200.c b/trunk/arch/arm/mach-imx/mach-vpr200.c index 033257e553ef..add8c69c6c1a 100644 --- a/trunk/arch/arm/mach-imx/mach-vpr200.c +++ b/trunk/arch/arm/mach-imx/mach-vpr200.c @@ -310,7 +310,7 @@ static void __init vpr200_timer_init(void) mx35_clocks_init(); } -struct sys_timer vpr200_timer = { +static struct sys_timer vpr200_timer = { .init = vpr200_timer_init, }; diff --git a/trunk/arch/arm/mach-imx/mm-imx5.c b/trunk/arch/arm/mach-imx/mm-imx5.c index 05250aed61fb..e10f3914fcfe 100644 --- a/trunk/arch/arm/mach-imx/mm-imx5.c +++ b/trunk/arch/arm/mach-imx/mm-imx5.c @@ -35,7 +35,7 @@ static void imx5_idle(void) } clk_enable(gpc_dvfs_clk); mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); - if (tzic_enable_wake() != 0) + if (!tzic_enable_wake()) cpu_do_idle(); clk_disable(gpc_dvfs_clk); } diff --git a/trunk/arch/arm/mach-ixp2000/Kconfig b/trunk/arch/arm/mach-ixp2000/Kconfig new file mode 100644 index 000000000000..08d2707f6ca8 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/Kconfig @@ -0,0 +1,72 @@ + +if ARCH_IXP2000 + +config ARCH_SUPPORTS_BIG_ENDIAN + bool + default y + +menu "Intel IXP2400/2800 Implementation Options" + +comment "IXP2400/2800 Platforms" + +config ARCH_ENP2611 + bool "Support Radisys ENP-2611" + help + Say 'Y' here if you want your kernel to support the Radisys + ENP2611 PCI network processing card. For more information on + this card, see . + +config ARCH_IXDP2400 + bool "Support Intel IXDP2400" + help + Say 'Y' here if you want your kernel to support the Intel + IXDP2400 reference platform. For more information on + this platform, see . + +config ARCH_IXDP2800 + bool "Support Intel IXDP2800" + help + Say 'Y' here if you want your kernel to support the Intel + IXDP2800 reference platform. For more information on + this platform, see . + +config ARCH_IXDP2X00 + bool + depends on ARCH_IXDP2400 || ARCH_IXDP2800 + default y + +config ARCH_IXDP2401 + bool "Support Intel IXDP2401" + help + Say 'Y' here if you want your kernel to support the Intel + IXDP2401 reference platform. For more information on + this platform, see . + +config ARCH_IXDP2801 + bool "Support Intel IXDP2801 and IXDP28x5" + help + Say 'Y' here if you want your kernel to support the Intel + IXDP2801/2805/2855 reference platforms. For more information on + this platform, see . + +config MACH_IXDP28X5 + bool + depends on ARCH_IXDP2801 + default y + +config ARCH_IXDP2X01 + bool + depends on ARCH_IXDP2401 || ARCH_IXDP2801 + default y + +config IXP2000_SUPPORT_BROKEN_PCI_IO + bool "Support broken PCI I/O on older IXP2000s" + default y + help + Say 'N' here if you only intend to run your kernel on an + IXP2000 B0 or later model and do not need the PCI I/O + byteswap workaround. Say 'Y' otherwise. + +endmenu + +endif diff --git a/trunk/arch/arm/mach-ixp2000/Makefile b/trunk/arch/arm/mach-ixp2000/Makefile new file mode 100644 index 000000000000..1e6139d42a92 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/Makefile @@ -0,0 +1,14 @@ +# +# Makefile for the linux kernel. +# +obj-y := core.o pci.o +obj-m := +obj-n := +obj- := + +obj-$(CONFIG_ARCH_ENP2611) += enp2611.o +obj-$(CONFIG_ARCH_IXDP2400) += ixdp2400.o +obj-$(CONFIG_ARCH_IXDP2800) += ixdp2800.o +obj-$(CONFIG_ARCH_IXDP2X00) += ixdp2x00.o +obj-$(CONFIG_ARCH_IXDP2X01) += ixdp2x01.o + diff --git a/trunk/arch/arm/mach-ixp2000/Makefile.boot b/trunk/arch/arm/mach-ixp2000/Makefile.boot new file mode 100644 index 000000000000..9c7af91d93da --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/Makefile.boot @@ -0,0 +1,3 @@ + zreladdr-y += 0x00008000 +params_phys-y := 0x00000100 + diff --git a/trunk/arch/arm/mach-ixp2000/core.c b/trunk/arch/arm/mach-ixp2000/core.c new file mode 100644 index 000000000000..f214cdff01cb --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/core.c @@ -0,0 +1,520 @@ +/* + * arch/arm/mach-ixp2000/core.c + * + * Common routines used by all IXP2400/2800 based platforms. + * + * Author: Deepak Saxena + * + * Copyright 2004 (C) MontaVista Software, Inc. + * + * Based on work Copyright (C) 2002-2003 Intel Corporation + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +static DEFINE_SPINLOCK(ixp2000_slowport_lock); +static unsigned long ixp2000_slowport_irq_flags; + +/************************************************************************* + * Slowport access routines + *************************************************************************/ +void ixp2000_acquire_slowport(struct slowport_cfg *new_cfg, struct slowport_cfg *old_cfg) +{ + spin_lock_irqsave(&ixp2000_slowport_lock, ixp2000_slowport_irq_flags); + + old_cfg->CCR = *IXP2000_SLOWPORT_CCR; + old_cfg->WTC = *IXP2000_SLOWPORT_WTC2; + old_cfg->RTC = *IXP2000_SLOWPORT_RTC2; + old_cfg->PCR = *IXP2000_SLOWPORT_PCR; + old_cfg->ADC = *IXP2000_SLOWPORT_ADC; + + ixp2000_reg_write(IXP2000_SLOWPORT_CCR, new_cfg->CCR); + ixp2000_reg_write(IXP2000_SLOWPORT_WTC2, new_cfg->WTC); + ixp2000_reg_write(IXP2000_SLOWPORT_RTC2, new_cfg->RTC); + ixp2000_reg_write(IXP2000_SLOWPORT_PCR, new_cfg->PCR); + ixp2000_reg_wrb(IXP2000_SLOWPORT_ADC, new_cfg->ADC); +} + +void ixp2000_release_slowport(struct slowport_cfg *old_cfg) +{ + ixp2000_reg_write(IXP2000_SLOWPORT_CCR, old_cfg->CCR); + ixp2000_reg_write(IXP2000_SLOWPORT_WTC2, old_cfg->WTC); + ixp2000_reg_write(IXP2000_SLOWPORT_RTC2, old_cfg->RTC); + ixp2000_reg_write(IXP2000_SLOWPORT_PCR, old_cfg->PCR); + ixp2000_reg_wrb(IXP2000_SLOWPORT_ADC, old_cfg->ADC); + + spin_unlock_irqrestore(&ixp2000_slowport_lock, + ixp2000_slowport_irq_flags); +} + +/************************************************************************* + * Chip specific mappings shared by all IXP2000 systems + *************************************************************************/ +static struct map_desc ixp2000_io_desc[] __initdata = { + { + .virtual = IXP2000_CAP_VIRT_BASE, + .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), + .length = IXP2000_CAP_SIZE, + .type = MT_DEVICE, + }, { + .virtual = IXP2000_INTCTL_VIRT_BASE, + .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), + .length = IXP2000_INTCTL_SIZE, + .type = MT_DEVICE, + }, { + .virtual = IXP2000_PCI_CREG_VIRT_BASE, + .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), + .length = IXP2000_PCI_CREG_SIZE, + .type = MT_DEVICE, + }, { + .virtual = IXP2000_PCI_CSR_VIRT_BASE, + .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), + .length = IXP2000_PCI_CSR_SIZE, + .type = MT_DEVICE, + }, { + .virtual = IXP2000_MSF_VIRT_BASE, + .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), + .length = IXP2000_MSF_SIZE, + .type = MT_DEVICE, + }, { + .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, + .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), + .length = IXP2000_SCRATCH_RING_SIZE, + .type = MT_DEVICE, + }, { + .virtual = IXP2000_SRAM0_VIRT_BASE, + .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), + .length = IXP2000_SRAM0_SIZE, + .type = MT_DEVICE, + }, { + .virtual = IXP2000_PCI_IO_VIRT_BASE, + .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), + .length = IXP2000_PCI_IO_SIZE, + .type = MT_DEVICE, + }, { + .virtual = IXP2000_PCI_CFG0_VIRT_BASE, + .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), + .length = IXP2000_PCI_CFG0_SIZE, + .type = MT_DEVICE, + }, { + .virtual = IXP2000_PCI_CFG1_VIRT_BASE, + .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), + .length = IXP2000_PCI_CFG1_SIZE, + .type = MT_DEVICE, + } +}; + +void __init ixp2000_map_io(void) +{ + iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc)); + + /* Set slowport to 8-bit mode. */ + ixp2000_reg_wrb(IXP2000_SLOWPORT_FRM, 1); +} + + +/************************************************************************* + * Serial port support for IXP2000 + *************************************************************************/ +static struct plat_serial8250_port ixp2000_serial_port[] = { + { + .mapbase = IXP2000_UART_PHYS_BASE, + .membase = (char *)(IXP2000_UART_VIRT_BASE + 3), + .irq = IRQ_IXP2000_UART, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = 50000000, + }, + { }, +}; + +static struct resource ixp2000_uart_resource = { + .start = IXP2000_UART_PHYS_BASE, + .end = IXP2000_UART_PHYS_BASE + 0x1f, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device ixp2000_serial_device = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = ixp2000_serial_port, + }, + .num_resources = 1, + .resource = &ixp2000_uart_resource, +}; + +void __init ixp2000_uart_init(void) +{ + platform_device_register(&ixp2000_serial_device); +} + + +/************************************************************************* + * Timer-tick functions for IXP2000 + *************************************************************************/ +static unsigned ticks_per_jiffy; +static unsigned ticks_per_usec; +static unsigned next_jiffy_time; +static volatile unsigned long *missing_jiffy_timer_csr; + +unsigned long ixp2000_gettimeoffset (void) +{ + unsigned long offset; + + offset = next_jiffy_time - *missing_jiffy_timer_csr; + + return offset / ticks_per_usec; +} + +static irqreturn_t ixp2000_timer_interrupt(int irq, void *dev_id) +{ + /* clear timer 1 */ + ixp2000_reg_wrb(IXP2000_T1_CLR, 1); + + while ((signed long)(next_jiffy_time - *missing_jiffy_timer_csr) + >= ticks_per_jiffy) { + timer_tick(); + next_jiffy_time -= ticks_per_jiffy; + } + + return IRQ_HANDLED; +} + +static struct irqaction ixp2000_timer_irq = { + .name = "IXP2000 Timer Tick", + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .handler = ixp2000_timer_interrupt, +}; + +void __init ixp2000_init_time(unsigned long tick_rate) +{ + ticks_per_jiffy = (tick_rate + HZ/2) / HZ; + ticks_per_usec = tick_rate / 1000000; + + /* + * We use timer 1 as our timer interrupt. + */ + ixp2000_reg_write(IXP2000_T1_CLR, 0); + ixp2000_reg_write(IXP2000_T1_CLD, ticks_per_jiffy - 1); + ixp2000_reg_write(IXP2000_T1_CTL, (1 << 7)); + + /* + * We use a second timer as a monotonic counter for tracking + * missed jiffies. The IXP2000 has four timers, but if we're + * on an A-step IXP2800, timer 2 and 3 don't work, so on those + * chips we use timer 4. Timer 4 is the only timer that can + * be used for the watchdog, so we use timer 2 if we're on a + * non-buggy chip. + */ + if ((*IXP2000_PRODUCT_ID & 0x001ffef0) == 0x00000000) { + printk(KERN_INFO "Enabling IXP2800 erratum #25 workaround\n"); + + ixp2000_reg_write(IXP2000_T4_CLR, 0); + ixp2000_reg_write(IXP2000_T4_CLD, -1); + ixp2000_reg_wrb(IXP2000_T4_CTL, (1 << 7)); + missing_jiffy_timer_csr = IXP2000_T4_CSR; + } else { + ixp2000_reg_write(IXP2000_T2_CLR, 0); + ixp2000_reg_write(IXP2000_T2_CLD, -1); + ixp2000_reg_wrb(IXP2000_T2_CTL, (1 << 7)); + missing_jiffy_timer_csr = IXP2000_T2_CSR; + } + next_jiffy_time = 0xffffffff; + + /* register for interrupt */ + setup_irq(IRQ_IXP2000_TIMER1, &ixp2000_timer_irq); +} + +/************************************************************************* + * GPIO helpers + *************************************************************************/ +static unsigned long GPIO_IRQ_falling_edge; +static unsigned long GPIO_IRQ_rising_edge; +static unsigned long GPIO_IRQ_level_low; +static unsigned long GPIO_IRQ_level_high; + +static void update_gpio_int_csrs(void) +{ + ixp2000_reg_write(IXP2000_GPIO_FEDR, GPIO_IRQ_falling_edge); + ixp2000_reg_write(IXP2000_GPIO_REDR, GPIO_IRQ_rising_edge); + ixp2000_reg_write(IXP2000_GPIO_LSLR, GPIO_IRQ_level_low); + ixp2000_reg_wrb(IXP2000_GPIO_LSHR, GPIO_IRQ_level_high); +} + +void gpio_line_config(int line, int direction) +{ + unsigned long flags; + + local_irq_save(flags); + if (direction == GPIO_OUT) { + /* if it's an output, it ain't an interrupt anymore */ + GPIO_IRQ_falling_edge &= ~(1 << line); + GPIO_IRQ_rising_edge &= ~(1 << line); + GPIO_IRQ_level_low &= ~(1 << line); + GPIO_IRQ_level_high &= ~(1 << line); + update_gpio_int_csrs(); + + ixp2000_reg_wrb(IXP2000_GPIO_PDSR, 1 << line); + } else if (direction == GPIO_IN) { + ixp2000_reg_wrb(IXP2000_GPIO_PDCR, 1 << line); + } + local_irq_restore(flags); +} +EXPORT_SYMBOL(gpio_line_config); + + +/************************************************************************* + * IRQ handling IXP2000 + *************************************************************************/ +static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irq_desc *desc) +{ + int i; + unsigned long status = *IXP2000_GPIO_INST; + + for (i = 0; i <= 7; i++) { + if (status & (1<irq - IRQ_IXP2000_GPIO0; + + /* + * First, configure this GPIO line as an input. + */ + ixp2000_reg_write(IXP2000_GPIO_PDCR, 1 << line); + + /* + * Then, set the proper trigger type. + */ + if (type & IRQ_TYPE_EDGE_FALLING) + GPIO_IRQ_falling_edge |= 1 << line; + else + GPIO_IRQ_falling_edge &= ~(1 << line); + if (type & IRQ_TYPE_EDGE_RISING) + GPIO_IRQ_rising_edge |= 1 << line; + else + GPIO_IRQ_rising_edge &= ~(1 << line); + if (type & IRQ_TYPE_LEVEL_LOW) + GPIO_IRQ_level_low |= 1 << line; + else + GPIO_IRQ_level_low &= ~(1 << line); + if (type & IRQ_TYPE_LEVEL_HIGH) + GPIO_IRQ_level_high |= 1 << line; + else + GPIO_IRQ_level_high &= ~(1 << line); + update_gpio_int_csrs(); + + return 0; +} + +static void ixp2000_GPIO_irq_mask_ack(struct irq_data *d) +{ + unsigned int irq = d->irq; + + ixp2000_reg_write(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0))); + + ixp2000_reg_write(IXP2000_GPIO_EDSR, (1 << (irq - IRQ_IXP2000_GPIO0))); + ixp2000_reg_write(IXP2000_GPIO_LDSR, (1 << (irq - IRQ_IXP2000_GPIO0))); + ixp2000_reg_wrb(IXP2000_GPIO_INST, (1 << (irq - IRQ_IXP2000_GPIO0))); +} + +static void ixp2000_GPIO_irq_mask(struct irq_data *d) +{ + unsigned int irq = d->irq; + + ixp2000_reg_wrb(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0))); +} + +static void ixp2000_GPIO_irq_unmask(struct irq_data *d) +{ + unsigned int irq = d->irq; + + ixp2000_reg_write(IXP2000_GPIO_INSR, (1 << (irq - IRQ_IXP2000_GPIO0))); +} + +static struct irq_chip ixp2000_GPIO_irq_chip = { + .irq_ack = ixp2000_GPIO_irq_mask_ack, + .irq_mask = ixp2000_GPIO_irq_mask, + .irq_unmask = ixp2000_GPIO_irq_unmask, + .irq_set_type = ixp2000_GPIO_irq_type, +}; + +static void ixp2000_pci_irq_mask(struct irq_data *d) +{ + unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE; + if (d->irq == IRQ_IXP2000_PCIA) + ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 26))); + else if (d->irq == IRQ_IXP2000_PCIB) + ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 27))); +} + +static void ixp2000_pci_irq_unmask(struct irq_data *d) +{ + unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE; + if (d->irq == IRQ_IXP2000_PCIA) + ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 26))); + else if (d->irq == IRQ_IXP2000_PCIB) + ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 27))); +} + +/* + * Error interrupts. These are used extensively by the microengine drivers + */ +static void ixp2000_err_irq_handler(unsigned int irq, struct irq_desc *desc) +{ + int i; + unsigned long status = *IXP2000_IRQ_ERR_STATUS; + + for(i = 31; i >= 0; i--) { + if(status & (1 << i)) { + generic_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i); + } + } +} + +static void ixp2000_err_irq_mask(struct irq_data *d) +{ + ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_CLR, + (1 << (d->irq - IRQ_IXP2000_DRAM0_MIN_ERR))); +} + +static void ixp2000_err_irq_unmask(struct irq_data *d) +{ + ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_SET, + (1 << (d->irq - IRQ_IXP2000_DRAM0_MIN_ERR))); +} + +static struct irq_chip ixp2000_err_irq_chip = { + .irq_ack = ixp2000_err_irq_mask, + .irq_mask = ixp2000_err_irq_mask, + .irq_unmask = ixp2000_err_irq_unmask +}; + +static struct irq_chip ixp2000_pci_irq_chip = { + .irq_ack = ixp2000_pci_irq_mask, + .irq_mask = ixp2000_pci_irq_mask, + .irq_unmask = ixp2000_pci_irq_unmask +}; + +static void ixp2000_irq_mask(struct irq_data *d) +{ + ixp2000_reg_wrb(IXP2000_IRQ_ENABLE_CLR, (1 << d->irq)); +} + +static void ixp2000_irq_unmask(struct irq_data *d) +{ + ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << d->irq)); +} + +static struct irq_chip ixp2000_irq_chip = { + .irq_ack = ixp2000_irq_mask, + .irq_mask = ixp2000_irq_mask, + .irq_unmask = ixp2000_irq_unmask +}; + +void __init ixp2000_init_irq(void) +{ + int irq; + + /* + * Mask all sources + */ + ixp2000_reg_write(IXP2000_IRQ_ENABLE_CLR, 0xffffffff); + ixp2000_reg_write(IXP2000_FIQ_ENABLE_CLR, 0xffffffff); + + /* clear all GPIO edge/level detects */ + ixp2000_reg_write(IXP2000_GPIO_REDR, 0); + ixp2000_reg_write(IXP2000_GPIO_FEDR, 0); + ixp2000_reg_write(IXP2000_GPIO_LSHR, 0); + ixp2000_reg_write(IXP2000_GPIO_LSLR, 0); + ixp2000_reg_write(IXP2000_GPIO_INCR, -1); + + /* clear PCI interrupt sources */ + ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, 0); + + /* + * Certain bits in the IRQ status register of the + * IXP2000 are reserved. Instead of trying to map + * things non 1:1 from bit position to IRQ number, + * we mark the reserved IRQs as invalid. This makes + * our mask/unmask code much simpler. + */ + for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) { + if ((1 << irq) & IXP2000_VALID_IRQ_MASK) { + irq_set_chip_and_handler(irq, &ixp2000_irq_chip, + handle_level_irq); + set_irq_flags(irq, IRQF_VALID); + } else set_irq_flags(irq, 0); + } + + for (irq = IRQ_IXP2000_DRAM0_MIN_ERR; irq <= IRQ_IXP2000_SP_INT; irq++) { + if((1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) & + IXP2000_VALID_ERR_IRQ_MASK) { + irq_set_chip_and_handler(irq, &ixp2000_err_irq_chip, + handle_level_irq); + set_irq_flags(irq, IRQF_VALID); + } + else + set_irq_flags(irq, 0); + } + irq_set_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler); + + for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) { + irq_set_chip_and_handler(irq, &ixp2000_GPIO_irq_chip, + handle_level_irq); + set_irq_flags(irq, IRQF_VALID); + } + irq_set_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler); + + /* + * Enable PCI irqs. The actual PCI[AB] decoding is done in + * entry-macro.S, so we don't need a chained handler for the + * PCI interrupt source. + */ + ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI)); + for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) { + irq_set_chip_and_handler(irq, &ixp2000_pci_irq_chip, + handle_level_irq); + set_irq_flags(irq, IRQF_VALID); + } +} + +void ixp2000_restart(char mode, const char *cmd) +{ + ixp2000_reg_wrb(IXP2000_RESET0, RSTALL); +} diff --git a/trunk/arch/arm/mach-ixp2000/enp2611.c b/trunk/arch/arm/mach-ixp2000/enp2611.c new file mode 100644 index 000000000000..4867f408617c --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/enp2611.c @@ -0,0 +1,265 @@ +/* + * arch/arm/mach-ixp2000/enp2611.c + * + * Radisys ENP-2611 support. + * + * Created 2004 by Lennert Buytenhek from the ixdp2x01 code. The + * original version carries the following notices: + * + * Original Author: Andrzej Mialkowski + * Maintainer: Deepak Saxena + * + * Copyright (C) 2002-2003 Intel Corp. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +/************************************************************************* + * ENP-2611 timer tick configuration + *************************************************************************/ +static void __init enp2611_timer_init(void) +{ + ixp2000_init_time(50 * 1000 * 1000); +} + +static struct sys_timer enp2611_timer = { + .init = enp2611_timer_init, + .offset = ixp2000_gettimeoffset, +}; + + +/************************************************************************* + * ENP-2611 I/O + *************************************************************************/ +static struct map_desc enp2611_io_desc[] __initdata = { + { + .virtual = ENP2611_CALEB_VIRT_BASE, + .pfn = __phys_to_pfn(ENP2611_CALEB_PHYS_BASE), + .length = ENP2611_CALEB_SIZE, + .type = MT_DEVICE, + }, { + .virtual = ENP2611_PM3386_0_VIRT_BASE, + .pfn = __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE), + .length = ENP2611_PM3386_0_SIZE, + .type = MT_DEVICE, + }, { + .virtual = ENP2611_PM3386_1_VIRT_BASE, + .pfn = __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE), + .length = ENP2611_PM3386_1_SIZE, + .type = MT_DEVICE, + } +}; + +void __init enp2611_map_io(void) +{ + ixp2000_map_io(); + iotable_init(enp2611_io_desc, ARRAY_SIZE(enp2611_io_desc)); +} + + +/************************************************************************* + * ENP-2611 PCI + *************************************************************************/ +static int enp2611_pci_setup(int nr, struct pci_sys_data *sys) +{ + sys->mem_offset = 0xe0000000; + ixp2000_pci_setup(nr, sys); + return 1; +} + +static void __init enp2611_pci_preinit(void) +{ + ixp2000_reg_write(IXP2000_PCI_ADDR_EXT, 0x00100000); + ixp2000_pci_preinit(); + pcibios_setup("firmware"); +} + +static inline int enp2611_pci_valid_device(struct pci_bus *bus, + unsigned int devfn) +{ + /* The 82559 ethernet controller appears at both PCI:1:0:0 and + * PCI:1:2:0, so let's pretend the second one isn't there. + */ + if (bus->number == 0x01 && devfn == 0x10) + return 0; + + return 1; +} + +static int enp2611_pci_read_config(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 *value) +{ + if (enp2611_pci_valid_device(bus, devfn)) + return ixp2000_pci_read_config(bus, devfn, where, size, value); + + return PCIBIOS_DEVICE_NOT_FOUND; +} + +static int enp2611_pci_write_config(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 value) +{ + if (enp2611_pci_valid_device(bus, devfn)) + return ixp2000_pci_write_config(bus, devfn, where, size, value); + + return PCIBIOS_DEVICE_NOT_FOUND; +} + +static struct pci_ops enp2611_pci_ops = { + .read = enp2611_pci_read_config, + .write = enp2611_pci_write_config +}; + +static struct pci_bus * __init enp2611_pci_scan_bus(int nr, + struct pci_sys_data *sys) +{ + return pci_scan_root_bus(NULL, sys->busnr, &enp2611_pci_ops, sys, + &sys->resources); +} + +static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) +{ + int irq; + + if (dev->bus->number == 0 && PCI_SLOT(dev->devfn) == 0) { + /* IXP2400. */ + irq = IRQ_IXP2000_PCIA; + } else if (dev->bus->number == 0 && PCI_SLOT(dev->devfn) == 1) { + /* 21555 non-transparent bridge. */ + irq = IRQ_IXP2000_PCIB; + } else if (dev->bus->number == 0 && PCI_SLOT(dev->devfn) == 4) { + /* PCI2050B transparent bridge. */ + irq = -1; + } else if (dev->bus->number == 1 && PCI_SLOT(dev->devfn) == 0) { + /* 82559 ethernet. */ + irq = IRQ_IXP2000_PCIA; + } else if (dev->bus->number == 1 && PCI_SLOT(dev->devfn) == 1) { + /* SPI-3 option board. */ + irq = IRQ_IXP2000_PCIB; + } else { + printk(KERN_ERR "enp2611_pci_map_irq() called for unknown " + "device PCI:%d:%d:%d\n", dev->bus->number, + PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); + irq = -1; + } + + return irq; +} + +struct hw_pci enp2611_pci __initdata = { + .nr_controllers = 1, + .setup = enp2611_pci_setup, + .preinit = enp2611_pci_preinit, + .scan = enp2611_pci_scan_bus, + .map_irq = enp2611_pci_map_irq, +}; + +int __init enp2611_pci_init(void) +{ + if (machine_is_enp2611()) + pci_common_init(&enp2611_pci); + + return 0; +} + +subsys_initcall(enp2611_pci_init); + + +/************************************************************************* + * ENP-2611 Machine Initialization + *************************************************************************/ +static struct flash_platform_data enp2611_flash_platform_data = { + .map_name = "cfi_probe", + .width = 1, +}; + +static struct ixp2000_flash_data enp2611_flash_data = { + .platform_data = &enp2611_flash_platform_data, + .nr_banks = 1 +}; + +static struct resource enp2611_flash_resource = { + .start = 0xc4000000, + .end = 0xc4000000 + 0x00ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device enp2611_flash = { + .name = "IXP2000-Flash", + .id = 0, + .dev = { + .platform_data = &enp2611_flash_data, + }, + .num_resources = 1, + .resource = &enp2611_flash_resource, +}; + +static struct ixp2000_i2c_pins enp2611_i2c_gpio_pins = { + .sda_pin = ENP2611_GPIO_SDA, + .scl_pin = ENP2611_GPIO_SCL, +}; + +static struct platform_device enp2611_i2c_controller = { + .name = "IXP2000-I2C", + .id = 0, + .dev = { + .platform_data = &enp2611_i2c_gpio_pins + }, + .num_resources = 0 +}; + +static struct platform_device *enp2611_devices[] __initdata = { + &enp2611_flash, + &enp2611_i2c_controller +}; + +static void __init enp2611_init_machine(void) +{ + platform_add_devices(enp2611_devices, ARRAY_SIZE(enp2611_devices)); + ixp2000_uart_init(); +} + + +MACHINE_START(ENP2611, "Radisys ENP-2611 PCI network processor board") + /* Maintainer: Lennert Buytenhek */ + .atag_offset = 0x100, + .map_io = enp2611_map_io, + .init_irq = ixp2000_init_irq, + .timer = &enp2611_timer, + .init_machine = enp2611_init_machine, + .restart = ixp2000_restart, +MACHINE_END + + diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/debug-macro.S b/trunk/arch/arm/mach-ixp2000/include/mach/debug-macro.S new file mode 100644 index 000000000000..bdd3ccdc2890 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/debug-macro.S @@ -0,0 +1,25 @@ +/* arch/arm/mach-ixp2000/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + + .macro addruart, rp, rv, tmp + mov \rp, #0x00030000 +#ifdef __ARMEB__ + orr \rp, \rp, #0x00000003 +#endif + orr \rv, \rp, #0xfe000000 @ virtual base + orr \rv, \rv, #0x00f00000 + orr \rp, \rp, #0xc0000000 @ Physical base + .endm + +#define UART_SHIFT 2 +#include diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/enp2611.h b/trunk/arch/arm/mach-ixp2000/include/mach/enp2611.h new file mode 100644 index 000000000000..9ce3690061d5 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/enp2611.h @@ -0,0 +1,46 @@ +/* + * arch/arm/mach-ixp2000/include/mach/enp2611.h + * + * Register and other defines for Radisys ENP-2611 + * + * Created 2004 by Lennert Buytenhek from the ixdp2x01 code. The + * original version carries the following notices: + * + * Original Author: Naeem Afzal + * Maintainer: Deepak Saxena + * + * Copyright (C) 2002 Intel Corp. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __ENP2611_H +#define __ENP2611_H + +#define ENP2611_CALEB_PHYS_BASE 0xc5000000 +#define ENP2611_CALEB_VIRT_BASE 0xfe000000 +#define ENP2611_CALEB_SIZE 0x00100000 + +#define ENP2611_PM3386_0_PHYS_BASE 0xc6000000 +#define ENP2611_PM3386_0_VIRT_BASE 0xfe100000 +#define ENP2611_PM3386_0_SIZE 0x00100000 + +#define ENP2611_PM3386_1_PHYS_BASE 0xc6400000 +#define ENP2611_PM3386_1_VIRT_BASE 0xfe200000 +#define ENP2611_PM3386_1_SIZE 0x00100000 + +#define ENP2611_GPIO_SCL 7 +#define ENP2611_GPIO_SDA 6 + +#define IRQ_ENP2611_THERMAL IRQ_IXP2000_GPIO4 +#define IRQ_ENP2611_OPTION_BOARD IRQ_IXP2000_GPIO3 +#define IRQ_ENP2611_CALEB IRQ_IXP2000_GPIO2 +#define IRQ_ENP2611_PM3386_1 IRQ_IXP2000_GPIO1 +#define IRQ_ENP2611_PM3386_0 IRQ_IXP2000_GPIO0 + + +#endif diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/entry-macro.S b/trunk/arch/arm/mach-ixp2000/include/mach/entry-macro.S new file mode 100644 index 000000000000..c4444dff9202 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/entry-macro.S @@ -0,0 +1,54 @@ +/* + * arch/arm/mach-ixp2000/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for IXP2000-based platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include + + .macro get_irqnr_preamble, base, tmp + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + + mov \irqnr, #0x0 @clear out irqnr as default + mov \base, #0xfe000000 + orr \base, \base, #0x00e00000 + orr \base, \base, #0x08 + ldr \irqstat, [\base] @ get interrupts + + cmp \irqstat, #0 + beq 1001f + + clz \irqnr, \irqstat + mov \base, #31 + subs \irqnr, \base, \irqnr + + /* + * We handle PCIA and PCIB here so we don't have an + * extra layer of code just to check these two bits. + */ + cmp \irqnr, #IRQ_IXP2000_PCI + bne 1001f + + mov \base, #0xfe000000 + orr \base, \base, #0x00c00000 + orr \base, \base, #0x00000100 + orr \base, \base, #0x00000058 + ldr \irqstat, [\base] + + mov \tmp, #(1<<26) + tst \irqstat, \tmp + movne \irqnr, #IRQ_IXP2000_PCIA + bne 1001f + + mov \tmp, #(1<<27) + tst \irqstat, \tmp + movne \irqnr, #IRQ_IXP2000_PCIB + +1001: + .endm + diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h b/trunk/arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h new file mode 100644 index 000000000000..af836c76c3f1 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h @@ -0,0 +1,48 @@ +/* + * arch/arm/mach-ixp2000/include/mach/gpio.h + * + * Copyright (C) 2002 Intel Corporation. + * + * This program is free software, you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * IXP2000 GPIO in/out, edge/level detection for IRQs: + * IRQs are generated on Falling-edge, Rising-Edge, Level-low, Level-High + * or both Falling-edge and Rising-edge. + * This must be called *before* the corresponding IRQ is registerd. + * Use this instead of directly setting the GPIO registers. + * GPIOs may also be used as GPIOs (e.g. for emulating i2c/smb) + */ +#ifndef __ASM_ARCH_GPIO_H +#define __ASM_ARCH_GPIO_H + +#ifndef __ASSEMBLY__ + +#define GPIO_IN 0 +#define GPIO_OUT 1 + +#define IXP2000_GPIO_LOW 0 +#define IXP2000_GPIO_HIGH 1 + +extern void gpio_line_config(int line, int direction); + +static inline int gpio_line_get(int line) +{ + return (((*IXP2000_GPIO_PLR) >> line) & 1); +} + +static inline void gpio_line_set(int line, int value) +{ + if (value == IXP2000_GPIO_HIGH) { + ixp2000_reg_write(IXP2000_GPIO_POSR, 1 << line); + } else if (value == IXP2000_GPIO_LOW) { + ixp2000_reg_write(IXP2000_GPIO_POCR, 1 << line); + } +} + +#endif /* !__ASSEMBLY__ */ + +#endif /* ASM_ARCH_IXP2000_GPIO_H_ */ diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/hardware.h b/trunk/arch/arm/mach-ixp2000/include/mach/hardware.h new file mode 100644 index 000000000000..cdaf1db84003 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/hardware.h @@ -0,0 +1,36 @@ +/* + * arch/arm/mach-ixp2000/include/mach/hardware.h + * + * Hardware definitions for IXP2400/2800 based systems + * + * Original Author: Naeem M Afzal + * + * Maintainer: Deepak Saxena + * + * Copyright (C) 2001-2002 Intel Corp. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __ASM_ARCH_HARDWARE_H__ +#define __ASM_ARCH_HARDWARE_H__ + +#include "ixp2000-regs.h" /* Chipset Registers */ + +/* + * Platform helper functions + */ +#include "platform.h" + +/* + * Platform-specific bits + */ +#include "enp2611.h" /* ENP-2611 */ +#include "ixdp2x00.h" /* IXDP2400/2800 */ +#include "ixdp2x01.h" /* IXDP2401/2801 */ + +#endif /* _ASM_ARCH_HARDWARE_H__ */ diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/io.h b/trunk/arch/arm/mach-ixp2000/include/mach/io.h new file mode 100644 index 000000000000..f6552d6f35ab --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/io.h @@ -0,0 +1,133 @@ +/* + * arch/arm/mach-ixp2000/include/mach/io.h + * + * Original Author: Naeem M Afzal + * Maintainer: Deepak Saxena + * + * Copyright (C) 2002 Intel Corp. + * Copyrgiht (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#include + +#define IO_SPACE_LIMIT 0xffffffff + +/* + * The A? revisions of the IXP2000s assert byte lanes for PCI I/O + * transactions the other way round (MEM transactions don't have this + * issue), so if we want to support those models, we need to override + * the standard I/O functions. + * + * B0 and later have a bit that can be set to 1 to get the proper + * behavior for I/O transactions, which then allows us to use the + * standard I/O functions. This is what we do if the user does not + * explicitly ask for support for pre-B0. + */ +#ifdef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO +#define ___io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE)) + +#define alignb(addr) (void __iomem *)((unsigned long)(addr) ^ 3) +#define alignw(addr) (void __iomem *)((unsigned long)(addr) ^ 2) + +#define outb(v,p) __raw_writeb((v),alignb(___io(p))) +#define outw(v,p) __raw_writew((v),alignw(___io(p))) +#define outl(v,p) __raw_writel((v),___io(p)) + +#define inb(p) ({ unsigned int __v = __raw_readb(alignb(___io(p))); __v; }) +#define inw(p) \ + ({ unsigned int __v = (__raw_readw(alignw(___io(p)))); __v; }) +#define inl(p) \ + ({ unsigned int __v = (__raw_readl(___io(p))); __v; }) + +#define outsb(p,d,l) __raw_writesb(alignb(___io(p)),d,l) +#define outsw(p,d,l) __raw_writesw(alignw(___io(p)),d,l) +#define outsl(p,d,l) __raw_writesl(___io(p),d,l) + +#define insb(p,d,l) __raw_readsb(alignb(___io(p)),d,l) +#define insw(p,d,l) __raw_readsw(alignw(___io(p)),d,l) +#define insl(p,d,l) __raw_readsl(___io(p),d,l) + +#define __is_io_address(p) ((((unsigned long)(p)) & ~(IXP2000_PCI_IO_SIZE - 1)) == IXP2000_PCI_IO_VIRT_BASE) + +#define ioread8(p) \ + ({ \ + unsigned int __v; \ + \ + if (__is_io_address(p)) { \ + __v = __raw_readb(alignb(p)); \ + } else { \ + __v = __raw_readb(p); \ + } \ + \ + __v; \ + }) \ + +#define ioread16(p) \ + ({ \ + unsigned int __v; \ + \ + if (__is_io_address(p)) { \ + __v = __raw_readw(alignw(p)); \ + } else { \ + __v = le16_to_cpu(__raw_readw(p)); \ + } \ + \ + __v; \ + }) + +#define ioread32(p) \ + ({ \ + unsigned int __v; \ + \ + if (__is_io_address(p)) { \ + __v = __raw_readl(p); \ + } else { \ + __v = le32_to_cpu(__raw_readl(p)); \ + } \ + \ + __v; \ + }) + +#define iowrite8(v,p) \ + ({ \ + if (__is_io_address(p)) { \ + __raw_writeb((v), alignb(p)); \ + } else { \ + __raw_writeb((v), p); \ + } \ + }) + +#define iowrite16(v,p) \ + ({ \ + if (__is_io_address(p)) { \ + __raw_writew((v), alignw(p)); \ + } else { \ + __raw_writew(cpu_to_le16(v), p); \ + } \ + }) + +#define iowrite32(v,p) \ + ({ \ + if (__is_io_address(p)) { \ + __raw_writel((v), p); \ + } else { \ + __raw_writel(cpu_to_le32(v), p); \ + } \ + }) + +#define ioport_map(port, nr) ___io(port) + +#define ioport_unmap(addr) +#else +#define __io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE)) +#endif + + +#endif diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/irqs.h b/trunk/arch/arm/mach-ixp2000/include/mach/irqs.h new file mode 100644 index 000000000000..bee96bcafdca --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/irqs.h @@ -0,0 +1,207 @@ +/* + * arch/arm/mach-ixp2000/include/mach/irqs.h + * + * Original Author: Naeem Afzal + * Maintainer: Deepak Saxena + * + * Copyright (C) 2002 Intel Corp. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _IRQS_H +#define _IRQS_H + +/* + * Do NOT add #ifdef MACHINE_FOO in here. + * Simpy add your machine IRQs here and increase NR_IRQS if needed to + * hold your machine's IRQ table. + */ + +/* + * Some interrupt numbers go unused b/c the IRQ mask/ummask/status + * register has those bit reserved. We just mark those interrupts + * as invalid and this allows us to do mask/unmask with a single + * shift operation instead of having to map the IRQ number to + * a HW IRQ number. + */ +#define IRQ_IXP2000_SOFT_INT 0 /* soft interrupt */ +#define IRQ_IXP2000_ERRSUM 1 /* OR of all bits in ErrorStatus reg*/ +#define IRQ_IXP2000_UART 2 +#define IRQ_IXP2000_GPIO 3 +#define IRQ_IXP2000_TIMER1 4 +#define IRQ_IXP2000_TIMER2 5 +#define IRQ_IXP2000_TIMER3 6 +#define IRQ_IXP2000_TIMER4 7 +#define IRQ_IXP2000_PMU 8 +#define IRQ_IXP2000_SPF 9 /* Slow port framer IRQ */ +#define IRQ_IXP2000_DMA1 10 +#define IRQ_IXP2000_DMA2 11 +#define IRQ_IXP2000_DMA3 12 +#define IRQ_IXP2000_PCI_DOORBELL 13 +#define IRQ_IXP2000_ME_ATTN 14 +#define IRQ_IXP2000_PCI 15 /* PCI INTA or INTB */ +#define IRQ_IXP2000_THDA0 16 /* thread 0-31A */ +#define IRQ_IXP2000_THDA1 17 /* thread 32-63A, IXP2800 only */ +#define IRQ_IXP2000_THDA2 18 /* thread 64-95A */ +#define IRQ_IXP2000_THDA3 19 /* thread 96-127A, IXP2800 only */ +#define IRQ_IXP2000_THDB0 24 /* thread 0-31B */ +#define IRQ_IXP2000_THDB1 25 /* thread 32-63B, IXP2800 only */ +#define IRQ_IXP2000_THDB2 26 /* thread 64-95B */ +#define IRQ_IXP2000_THDB3 27 /* thread 96-127B, IXP2800 only */ + +/* define generic GPIOs */ +#define IRQ_IXP2000_GPIO0 32 +#define IRQ_IXP2000_GPIO1 33 +#define IRQ_IXP2000_GPIO2 34 +#define IRQ_IXP2000_GPIO3 35 +#define IRQ_IXP2000_GPIO4 36 +#define IRQ_IXP2000_GPIO5 37 +#define IRQ_IXP2000_GPIO6 38 +#define IRQ_IXP2000_GPIO7 39 + +/* split off the 2 PCI sources */ +#define IRQ_IXP2000_PCIA 40 +#define IRQ_IXP2000_PCIB 41 + +/* Int sources from IRQ_ERROR_STATUS */ +#define IRQ_IXP2000_DRAM0_MIN_ERR 42 +#define IRQ_IXP2000_DRAM0_MAJ_ERR 43 +#define IRQ_IXP2000_DRAM1_MIN_ERR 44 +#define IRQ_IXP2000_DRAM1_MAJ_ERR 45 +#define IRQ_IXP2000_DRAM2_MIN_ERR 46 +#define IRQ_IXP2000_DRAM2_MAJ_ERR 47 +/* 48-57 reserved */ +#define IRQ_IXP2000_SRAM0_ERR 58 +#define IRQ_IXP2000_SRAM1_ERR 59 +#define IRQ_IXP2000_SRAM2_ERR 60 +#define IRQ_IXP2000_SRAM3_ERR 61 +/* 62-65 reserved */ +#define IRQ_IXP2000_MEDIA_ERR 66 +#define IRQ_IXP2000_PCI_ERR 67 +#define IRQ_IXP2000_SP_INT 68 + +#define NR_IXP2000_IRQS 69 + +#define IXP2000_BOARD_IRQ(x) (NR_IXP2000_IRQS + (x)) + +#define IXP2000_BOARD_IRQ_MASK(irq) (1 << (irq - NR_IXP2000_IRQS)) + +#define IXP2000_ERR_IRQ_MASK(irq) ( 1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) +#define IXP2000_VALID_ERR_IRQ_MASK (\ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MIN_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MAJ_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MIN_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MAJ_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MIN_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MAJ_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM0_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM1_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM2_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM3_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_MEDIA_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_PCI_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SP_INT) ) + +/* + * This allows for all the on-chip sources plus up to 32 CPLD based + * IRQs. Should be more than enough. + */ +#define IXP2000_BOARD_IRQS 32 +#define NR_IRQS (NR_IXP2000_IRQS + IXP2000_BOARD_IRQS) + + +/* + * IXDP2400 specific IRQs + */ +#define IRQ_IXDP2400_INGRESS_NPU IXP2000_BOARD_IRQ(0) +#define IRQ_IXDP2400_ENET IXP2000_BOARD_IRQ(1) +#define IRQ_IXDP2400_MEDIA_PCI IXP2000_BOARD_IRQ(2) +#define IRQ_IXDP2400_MEDIA_SP IXP2000_BOARD_IRQ(3) +#define IRQ_IXDP2400_SF_PCI IXP2000_BOARD_IRQ(4) +#define IRQ_IXDP2400_SF_SP IXP2000_BOARD_IRQ(5) +#define IRQ_IXDP2400_PMC IXP2000_BOARD_IRQ(6) +#define IRQ_IXDP2400_TVM IXP2000_BOARD_IRQ(7) + +#define NR_IXDP2400_IRQS ((IRQ_IXDP2400_TVM)+1) +#define IXDP2400_NR_IRQS NR_IXDP2400_IRQS - NR_IXP2000_IRQS + +/* IXDP2800 specific IRQs */ +#define IRQ_IXDP2800_EGRESS_ENET IXP2000_BOARD_IRQ(0) +#define IRQ_IXDP2800_INGRESS_NPU IXP2000_BOARD_IRQ(1) +#define IRQ_IXDP2800_PMC IXP2000_BOARD_IRQ(2) +#define IRQ_IXDP2800_FABRIC_PCI IXP2000_BOARD_IRQ(3) +#define IRQ_IXDP2800_FABRIC IXP2000_BOARD_IRQ(4) +#define IRQ_IXDP2800_MEDIA IXP2000_BOARD_IRQ(5) + +#define NR_IXDP2800_IRQS ((IRQ_IXDP2800_MEDIA)+1) +#define IXDP2800_NR_IRQS NR_IXDP2800_IRQS - NR_IXP2000_IRQS + +/* + * IRQs on both IXDP2x01 boards + */ +#define IRQ_IXDP2X01_SPCI_DB_0 IXP2000_BOARD_IRQ(2) +#define IRQ_IXDP2X01_SPCI_DB_1 IXP2000_BOARD_IRQ(3) +#define IRQ_IXDP2X01_SPCI_PMC_INTA IXP2000_BOARD_IRQ(4) +#define IRQ_IXDP2X01_SPCI_PMC_INTB IXP2000_BOARD_IRQ(5) +#define IRQ_IXDP2X01_SPCI_PMC_INTC IXP2000_BOARD_IRQ(6) +#define IRQ_IXDP2X01_SPCI_PMC_INTD IXP2000_BOARD_IRQ(7) +#define IRQ_IXDP2X01_SPCI_FIC_INT IXP2000_BOARD_IRQ(8) +#define IRQ_IXDP2X01_IPMI_FROM IXP2000_BOARD_IRQ(16) +#define IRQ_IXDP2X01_125US IXP2000_BOARD_IRQ(17) +#define IRQ_IXDP2X01_DB_0_ADD IXP2000_BOARD_IRQ(18) +#define IRQ_IXDP2X01_DB_1_ADD IXP2000_BOARD_IRQ(19) +#define IRQ_IXDP2X01_UART1 IXP2000_BOARD_IRQ(21) +#define IRQ_IXDP2X01_UART2 IXP2000_BOARD_IRQ(22) +#define IRQ_IXDP2X01_FIC_ADD_INT IXP2000_BOARD_IRQ(24) +#define IRQ_IXDP2X01_CS8900 IXP2000_BOARD_IRQ(25) +#define IRQ_IXDP2X01_BBSRAM IXP2000_BOARD_IRQ(26) + +#define IXDP2X01_VALID_IRQ_MASK ( \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_DB_0) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_DB_1) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTA) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTB) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTC) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTD) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_FIC_INT) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_IPMI_FROM) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_125US) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_DB_0_ADD) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_DB_1_ADD) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_UART1) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_UART2) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_FIC_ADD_INT) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_CS8900) | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_BBSRAM) ) + +/* + * IXDP2401 specific IRQs + */ +#define IRQ_IXDP2401_INTA_82546 IXP2000_BOARD_IRQ(0) +#define IRQ_IXDP2401_INTB_82546 IXP2000_BOARD_IRQ(1) + +#define IXDP2401_VALID_IRQ_MASK ( \ + IXDP2X01_VALID_IRQ_MASK | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2401_INTA_82546) |\ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2401_INTB_82546)) + +/* + * IXDP2801-specific IRQs + */ +#define IRQ_IXDP2801_RIV IXP2000_BOARD_IRQ(0) +#define IRQ_IXDP2801_CNFG_MEDIA IXP2000_BOARD_IRQ(27) +#define IRQ_IXDP2801_CLOCK_REF IXP2000_BOARD_IRQ(28) + +#define IXDP2801_VALID_IRQ_MASK ( \ + IXDP2X01_VALID_IRQ_MASK | \ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_RIV) |\ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_CNFG_MEDIA) |\ + IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_CLOCK_REF)) + +#define NR_IXDP2X01_IRQS ((IRQ_IXDP2801_CLOCK_REF) + 1) + +#endif /*_IRQS_H*/ diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/ixdp2x00.h b/trunk/arch/arm/mach-ixp2000/include/mach/ixdp2x00.h new file mode 100644 index 000000000000..5df8479d9481 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/ixdp2x00.h @@ -0,0 +1,92 @@ +/* + * arch/arm/mach-ixp2000/include/mach/ixdp2x00.h + * + * Register and other defines for IXDP2[48]00 platforms + * + * Original Author: Naeem Afzal + * Maintainer: Deepak Saxena + * + * Copyright (C) 2002 Intel Corp. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#ifndef _IXDP2X00_H_ +#define _IXDP2X00_H_ + +/* + * On board CPLD memory map + */ +#define IXDP2X00_PHYS_CPLD_BASE 0xc7000000 +#define IXDP2X00_VIRT_CPLD_BASE 0xfe000000 +#define IXDP2X00_CPLD_SIZE 0x00100000 + + +#define IXDP2X00_CPLD_REG(x) \ + (volatile unsigned long *)(IXDP2X00_VIRT_CPLD_BASE | x) + +/* + * IXDP2400 CPLD registers + */ +#define IXDP2400_CPLD_SYSLED IXDP2X00_CPLD_REG(0x0) +#define IXDP2400_CPLD_DISP_DATA IXDP2X00_CPLD_REG(0x4) +#define IXDP2400_CPLD_CLOCK_SPEED IXDP2X00_CPLD_REG(0x8) +#define IXDP2400_CPLD_INT_STAT IXDP2X00_CPLD_REG(0xc) +#define IXDP2400_CPLD_REV IXDP2X00_CPLD_REG(0x10) +#define IXDP2400_CPLD_SYS_CLK_M IXDP2X00_CPLD_REG(0x14) +#define IXDP2400_CPLD_SYS_CLK_N IXDP2X00_CPLD_REG(0x18) +#define IXDP2400_CPLD_INT_MASK IXDP2X00_CPLD_REG(0x48) + +/* + * IXDP2800 CPLD registers + */ +#define IXDP2800_CPLD_INT_STAT IXDP2X00_CPLD_REG(0x0) +#define IXDP2800_CPLD_INT_MASK IXDP2X00_CPLD_REG(0x140) + + +#define IXDP2X00_GPIO_I2C_ENABLE 0x02 +#define IXDP2X00_GPIO_SCL 0x07 +#define IXDP2X00_GPIO_SDA 0x06 + +/* + * PCI devfns for on-board devices. We need these to be able to + * properly translate IRQs and for device removal. + */ +#define IXDP2400_SLAVE_ENET_DEVFN 0x18 /* Bus 1 */ +#define IXDP2400_MASTER_ENET_DEVFN 0x20 /* Bus 1 */ +#define IXDP2400_MEDIA_DEVFN 0x28 /* Bus 1 */ +#define IXDP2400_SWITCH_FABRIC_DEVFN 0x30 /* Bus 1 */ + +#define IXDP2800_SLAVE_ENET_DEVFN 0x20 /* Bus 1 */ +#define IXDP2800_MASTER_ENET_DEVFN 0x18 /* Bus 1 */ +#define IXDP2800_SWITCH_FABRIC_DEVFN 0x30 /* Bus 1 */ + +#define IXDP2X00_P2P_DEVFN 0x20 /* Bus 0 */ +#define IXDP2X00_21555_DEVFN 0x30 /* Bus 0 */ +#define IXDP2X00_SLAVE_NPU_DEVFN 0x28 /* Bus 1 */ +#define IXDP2X00_PMC_DEVFN 0x38 /* Bus 1 */ +#define IXDP2X00_MASTER_NPU_DEVFN 0x38 /* Bus 1 */ + +#ifndef __ASSEMBLY__ +/* + * The master NPU is always PCI master. + */ +static inline unsigned int ixdp2x00_master_npu(void) +{ + return !!ixp2000_is_pcimaster(); +} + +/* + * Helper functions used by ixdp2400 and ixdp2800 specific code + */ +void ixdp2x00_init_irq(volatile unsigned long*, volatile unsigned long *, unsigned long); +void ixdp2x00_slave_pci_postinit(void); +void ixdp2x00_init_machine(void); +void ixdp2x00_map_io(void); + +#endif + +#endif /*_IXDP2X00_H_ */ diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/ixdp2x01.h b/trunk/arch/arm/mach-ixp2000/include/mach/ixdp2x01.h new file mode 100644 index 000000000000..4c1f04083e54 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/ixdp2x01.h @@ -0,0 +1,57 @@ +/* + * arch/arm/mach-ixp2000/include/mach/ixdp2x01.h + * + * Platform definitions for IXDP2X01 && IXDP2801 systems + * + * Author: Deepak Saxena + * + * Copyright 2004 (c) MontaVista Software, Inc. + * + * Based on original code Copyright (c) 2002-2003 Intel Corporation + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __IXDP2X01_H__ +#define __IXDP2X01_H__ + +#define IXDP2X01_PHYS_CPLD_BASE 0xc6024000 +#define IXDP2X01_VIRT_CPLD_BASE 0xfe000000 +#define IXDP2X01_CPLD_REGION_SIZE 0x00100000 + +#define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg) +#define IXDP2X01_CPLD_PHYS_REG(reg) (IXDP2X01_PHYS_CPLD_BASE | reg) + +#define IXDP2X01_UART1_VIRT_BASE IXDP2X01_CPLD_VIRT_REG(0x40) +#define IXDP2X01_UART1_PHYS_BASE IXDP2X01_CPLD_PHYS_REG(0x40) + +#define IXDP2X01_UART2_VIRT_BASE IXDP2X01_CPLD_VIRT_REG(0x60) +#define IXDP2X01_UART2_PHYS_BASE IXDP2X01_CPLD_PHYS_REG(0x60) + +#define IXDP2X01_CS8900_VIRT_BASE IXDP2X01_CPLD_VIRT_REG(0x80) +#define IXDP2X01_CS8900_VIRT_END (IXDP2X01_CS8900_VIRT_BASE + 16) + +#define IXDP2X01_CPLD_RESET_REG IXDP2X01_CPLD_VIRT_REG(0x00) +#define IXDP2X01_INT_MASK_SET_REG IXDP2X01_CPLD_VIRT_REG(0x08) +#define IXDP2X01_INT_STAT_REG IXDP2X01_CPLD_VIRT_REG(0x0C) +#define IXDP2X01_INT_RAW_REG IXDP2X01_CPLD_VIRT_REG(0x10) +#define IXDP2X01_INT_MASK_CLR_REG IXDP2X01_INT_RAW_REG +#define IXDP2X01_INT_SIM_REG IXDP2X01_CPLD_VIRT_REG(0x14) + +#define IXDP2X01_CPLD_FLASH_REG IXDP2X01_CPLD_VIRT_REG(0x20) + +#define IXDP2X01_CPLD_FLASH_INTERN 0x8000 +#define IXDP2X01_CPLD_FLASH_BANK_MASK 0xF +#define IXDP2X01_FLASH_WINDOW_BITS 25 +#define IXDP2X01_FLASH_WINDOW_SIZE (1 << IXDP2X01_FLASH_WINDOW_BITS) +#define IXDP2X01_FLASH_WINDOW_MASK (IXDP2X01_FLASH_WINDOW_SIZE - 1) + +#define IXDP2X01_UART_CLK 1843200 + +#define IXDP2X01_GPIO_I2C_ENABLE 0x02 +#define IXDP2X01_GPIO_SCL 0x07 +#define IXDP2X01_GPIO_SDA 0x06 + +#endif /* __IXDP2x01_H__ */ diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h b/trunk/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h new file mode 100644 index 000000000000..822f63f2f4a2 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h @@ -0,0 +1,451 @@ +/* + * arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h + * + * Chipset register definitions for IXP2400/2800 based systems. + * + * Original Author: Naeem Afzal + * + * Maintainer: Deepak Saxena + * + * Copyright (C) 2002 Intel Corp. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#ifndef _IXP2000_REGS_H_ +#define _IXP2000_REGS_H_ + +/* + * IXP2000 linux memory map: + * + * virt phys size + * fb000000 db000000 16M PCI CFG1 + * fc000000 da000000 16M PCI CFG0 + * fd000000 d8000000 16M PCI I/O + * fe[0-7]00000 8M per-platform mappings + * fe900000 80000000 1M SRAM #0 (first MB) + * fea00000 cb400000 1M SCRATCH ring get/put + * feb00000 c8000000 1M MSF + * fec00000 df000000 1M PCI CSRs + * fed00000 de000000 1M PCI CREG + * fee00000 d6000000 1M INTCTL + * fef00000 c0000000 1M CAP + */ + +/* + * Static I/O regions. + * + * Most of the registers are clumped in 4K regions spread throughout + * the 0xc0000000 -> 0xc0100000 address range, but we just map in + * the whole range using a single 1 MB section instead of small + * 4K pages. + * + * CAP stands for CSR Access Proxy. + * + * If you change the virtual address of this mapping, please propagate + * the change to arch/arm/kernel/debug.S, which hardcodes the virtual + * address of the UART located in this region. + */ + +#define IXP2000_CAP_PHYS_BASE 0xc0000000 +#define IXP2000_CAP_VIRT_BASE 0xfef00000 +#define IXP2000_CAP_SIZE 0x00100000 + +/* + * Addresses for specific on-chip peripherals. + */ +#define IXP2000_SLOWPORT_CSR_VIRT_BASE 0xfef80000 +#define IXP2000_GLOBAL_REG_VIRT_BASE 0xfef04000 +#define IXP2000_UART_PHYS_BASE 0xc0030000 +#define IXP2000_UART_VIRT_BASE 0xfef30000 +#define IXP2000_TIMER_VIRT_BASE 0xfef20000 +#define IXP2000_UENGINE_CSR_VIRT_BASE 0xfef18000 +#define IXP2000_GPIO_VIRT_BASE 0xfef10000 + +/* + * Devices outside of the 0xc0000000 -> 0xc0100000 range. The virtual + * addresses of the INTCTL and PCI_CSR mappings are hardcoded in + * entry-macro.S, so if you ever change these please propagate + * the change. + */ +#define IXP2000_INTCTL_PHYS_BASE 0xd6000000 +#define IXP2000_INTCTL_VIRT_BASE 0xfee00000 +#define IXP2000_INTCTL_SIZE 0x00100000 + +#define IXP2000_PCI_CREG_PHYS_BASE 0xde000000 +#define IXP2000_PCI_CREG_VIRT_BASE 0xfed00000 +#define IXP2000_PCI_CREG_SIZE 0x00100000 + +#define IXP2000_PCI_CSR_PHYS_BASE 0xdf000000 +#define IXP2000_PCI_CSR_VIRT_BASE 0xfec00000 +#define IXP2000_PCI_CSR_SIZE 0x00100000 + +#define IXP2000_MSF_PHYS_BASE 0xc8000000 +#define IXP2000_MSF_VIRT_BASE 0xfeb00000 +#define IXP2000_MSF_SIZE 0x00100000 + +#define IXP2000_SCRATCH_RING_PHYS_BASE 0xcb400000 +#define IXP2000_SCRATCH_RING_VIRT_BASE 0xfea00000 +#define IXP2000_SCRATCH_RING_SIZE 0x00100000 + +#define IXP2000_SRAM0_PHYS_BASE 0x80000000 +#define IXP2000_SRAM0_VIRT_BASE 0xfe900000 +#define IXP2000_SRAM0_SIZE 0x00100000 + +#define IXP2000_PCI_IO_PHYS_BASE 0xd8000000 +#define IXP2000_PCI_IO_VIRT_BASE 0xfd000000 +#define IXP2000_PCI_IO_SIZE 0x01000000 + +#define IXP2000_PCI_CFG0_PHYS_BASE 0xda000000 +#define IXP2000_PCI_CFG0_VIRT_BASE 0xfc000000 +#define IXP2000_PCI_CFG0_SIZE 0x01000000 + +#define IXP2000_PCI_CFG1_PHYS_BASE 0xdb000000 +#define IXP2000_PCI_CFG1_VIRT_BASE 0xfb000000 +#define IXP2000_PCI_CFG1_SIZE 0x01000000 + +/* + * Timers + */ +#define IXP2000_TIMER_REG(x) ((volatile unsigned long*)(IXP2000_TIMER_VIRT_BASE | (x))) +/* Timer control */ +#define IXP2000_T1_CTL IXP2000_TIMER_REG(0x00) +#define IXP2000_T2_CTL IXP2000_TIMER_REG(0x04) +#define IXP2000_T3_CTL IXP2000_TIMER_REG(0x08) +#define IXP2000_T4_CTL IXP2000_TIMER_REG(0x0c) +/* Store initial value */ +#define IXP2000_T1_CLD IXP2000_TIMER_REG(0x10) +#define IXP2000_T2_CLD IXP2000_TIMER_REG(0x14) +#define IXP2000_T3_CLD IXP2000_TIMER_REG(0x18) +#define IXP2000_T4_CLD IXP2000_TIMER_REG(0x1c) +/* Read current value */ +#define IXP2000_T1_CSR IXP2000_TIMER_REG(0x20) +#define IXP2000_T2_CSR IXP2000_TIMER_REG(0x24) +#define IXP2000_T3_CSR IXP2000_TIMER_REG(0x28) +#define IXP2000_T4_CSR IXP2000_TIMER_REG(0x2c) +/* Clear associated timer interrupt */ +#define IXP2000_T1_CLR IXP2000_TIMER_REG(0x30) +#define IXP2000_T2_CLR IXP2000_TIMER_REG(0x34) +#define IXP2000_T3_CLR IXP2000_TIMER_REG(0x38) +#define IXP2000_T4_CLR IXP2000_TIMER_REG(0x3c) +/* Timer watchdog enable for T4 */ +#define IXP2000_TWDE IXP2000_TIMER_REG(0x40) + +#define WDT_ENABLE 0x00000001 +#define TIMER_DIVIDER_256 0x00000008 +#define TIMER_ENABLE 0x00000080 +#define IRQ_MASK_TIMER1 (1 << 4) + +/* + * Interrupt controller registers + */ +#define IXP2000_INTCTL_REG(x) (volatile unsigned long*)(IXP2000_INTCTL_VIRT_BASE | (x)) +#define IXP2000_IRQ_STATUS IXP2000_INTCTL_REG(0x08) +#define IXP2000_IRQ_ENABLE IXP2000_INTCTL_REG(0x10) +#define IXP2000_IRQ_ENABLE_SET IXP2000_INTCTL_REG(0x10) +#define IXP2000_IRQ_ENABLE_CLR IXP2000_INTCTL_REG(0x18) +#define IXP2000_FIQ_ENABLE_CLR IXP2000_INTCTL_REG(0x14) +#define IXP2000_IRQ_ERR_STATUS IXP2000_INTCTL_REG(0x24) +#define IXP2000_IRQ_ERR_ENABLE_SET IXP2000_INTCTL_REG(0x2c) +#define IXP2000_FIQ_ERR_ENABLE_CLR IXP2000_INTCTL_REG(0x30) +#define IXP2000_IRQ_ERR_ENABLE_CLR IXP2000_INTCTL_REG(0x34) +#define IXP2000_IRQ_THD_RAW_STATUS_A_0 IXP2000_INTCTL_REG(0x60) +#define IXP2000_IRQ_THD_RAW_STATUS_A_1 IXP2000_INTCTL_REG(0x64) +#define IXP2000_IRQ_THD_RAW_STATUS_A_2 IXP2000_INTCTL_REG(0x68) +#define IXP2000_IRQ_THD_RAW_STATUS_A_3 IXP2000_INTCTL_REG(0x6c) +#define IXP2000_IRQ_THD_RAW_STATUS_B_0 IXP2000_INTCTL_REG(0x80) +#define IXP2000_IRQ_THD_RAW_STATUS_B_1 IXP2000_INTCTL_REG(0x84) +#define IXP2000_IRQ_THD_RAW_STATUS_B_2 IXP2000_INTCTL_REG(0x88) +#define IXP2000_IRQ_THD_RAW_STATUS_B_3 IXP2000_INTCTL_REG(0x8c) +#define IXP2000_IRQ_THD_STATUS_A_0 IXP2000_INTCTL_REG(0xe0) +#define IXP2000_IRQ_THD_STATUS_A_1 IXP2000_INTCTL_REG(0xe4) +#define IXP2000_IRQ_THD_STATUS_A_2 IXP2000_INTCTL_REG(0xe8) +#define IXP2000_IRQ_THD_STATUS_A_3 IXP2000_INTCTL_REG(0xec) +#define IXP2000_IRQ_THD_STATUS_B_0 IXP2000_INTCTL_REG(0x100) +#define IXP2000_IRQ_THD_STATUS_B_1 IXP2000_INTCTL_REG(0x104) +#define IXP2000_IRQ_THD_STATUS_B_2 IXP2000_INTCTL_REG(0x108) +#define IXP2000_IRQ_THD_STATUS_B_3 IXP2000_INTCTL_REG(0x10c) +#define IXP2000_IRQ_THD_ENABLE_SET_A_0 IXP2000_INTCTL_REG(0x160) +#define IXP2000_IRQ_THD_ENABLE_SET_A_1 IXP2000_INTCTL_REG(0x164) +#define IXP2000_IRQ_THD_ENABLE_SET_A_2 IXP2000_INTCTL_REG(0x168) +#define IXP2000_IRQ_THD_ENABLE_SET_A_3 IXP2000_INTCTL_REG(0x16c) +#define IXP2000_IRQ_THD_ENABLE_SET_B_0 IXP2000_INTCTL_REG(0x180) +#define IXP2000_IRQ_THD_ENABLE_SET_B_1 IXP2000_INTCTL_REG(0x184) +#define IXP2000_IRQ_THD_ENABLE_SET_B_2 IXP2000_INTCTL_REG(0x188) +#define IXP2000_IRQ_THD_ENABLE_SET_B_3 IXP2000_INTCTL_REG(0x18c) +#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_0 IXP2000_INTCTL_REG(0x1e0) +#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_1 IXP2000_INTCTL_REG(0x1e4) +#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_2 IXP2000_INTCTL_REG(0x1e8) +#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_3 IXP2000_INTCTL_REG(0x1ec) +#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_0 IXP2000_INTCTL_REG(0x200) +#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_1 IXP2000_INTCTL_REG(0x204) +#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_2 IXP2000_INTCTL_REG(0x208) +#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_3 IXP2000_INTCTL_REG(0x20c) + +/* + * Mask of valid IRQs in the 32-bit IRQ register. We use + * this to mark certain IRQs as being invalid. + */ +#define IXP2000_VALID_IRQ_MASK 0x0f0fffff + +/* + * PCI config register access from core + */ +#define IXP2000_PCI_CREG(x) (volatile unsigned long*)(IXP2000_PCI_CREG_VIRT_BASE | (x)) +#define IXP2000_PCI_CMDSTAT IXP2000_PCI_CREG(0x04) +#define IXP2000_PCI_CSR_BAR IXP2000_PCI_CREG(0x10) +#define IXP2000_PCI_SRAM_BAR IXP2000_PCI_CREG(0x14) +#define IXP2000_PCI_SDRAM_BAR IXP2000_PCI_CREG(0x18) + +/* + * PCI CSRs + */ +#define IXP2000_PCI_CSR(x) (volatile unsigned long*)(IXP2000_PCI_CSR_VIRT_BASE | (x)) + +/* + * PCI outbound interrupts + */ +#define IXP2000_PCI_OUT_INT_STATUS IXP2000_PCI_CSR(0x30) +#define IXP2000_PCI_OUT_INT_MASK IXP2000_PCI_CSR(0x34) +/* + * PCI communications + */ +#define IXP2000_PCI_MAILBOX0 IXP2000_PCI_CSR(0x50) +#define IXP2000_PCI_MAILBOX1 IXP2000_PCI_CSR(0x54) +#define IXP2000_PCI_MAILBOX2 IXP2000_PCI_CSR(0x58) +#define IXP2000_PCI_MAILBOX3 IXP2000_PCI_CSR(0x5C) +#define IXP2000_XSCALE_DOORBELL IXP2000_PCI_CSR(0x60) +#define IXP2000_XSCALE_DOORBELL_SETUP IXP2000_PCI_CSR(0x64) +#define IXP2000_PCI_DOORBELL IXP2000_PCI_CSR(0x70) +#define IXP2000_PCI_DOORBELL_SETUP IXP2000_PCI_CSR(0x74) + +/* + * DMA engines + */ +#define IXP2000_PCI_CH1_BYTE_CNT IXP2000_PCI_CSR(0x80) +#define IXP2000_PCI_CH1_ADDR IXP2000_PCI_CSR(0x84) +#define IXP2000_PCI_CH1_DRAM_ADDR IXP2000_PCI_CSR(0x88) +#define IXP2000_PCI_CH1_DESC_PTR IXP2000_PCI_CSR(0x8C) +#define IXP2000_PCI_CH1_CNTRL IXP2000_PCI_CSR(0x90) +#define IXP2000_PCI_CH1_ME_PARAM IXP2000_PCI_CSR(0x94) +#define IXP2000_PCI_CH2_BYTE_CNT IXP2000_PCI_CSR(0xA0) +#define IXP2000_PCI_CH2_ADDR IXP2000_PCI_CSR(0xA4) +#define IXP2000_PCI_CH2_DRAM_ADDR IXP2000_PCI_CSR(0xA8) +#define IXP2000_PCI_CH2_DESC_PTR IXP2000_PCI_CSR(0xAC) +#define IXP2000_PCI_CH2_CNTRL IXP2000_PCI_CSR(0xB0) +#define IXP2000_PCI_CH2_ME_PARAM IXP2000_PCI_CSR(0xB4) +#define IXP2000_PCI_CH3_BYTE_CNT IXP2000_PCI_CSR(0xC0) +#define IXP2000_PCI_CH3_ADDR IXP2000_PCI_CSR(0xC4) +#define IXP2000_PCI_CH3_DRAM_ADDR IXP2000_PCI_CSR(0xC8) +#define IXP2000_PCI_CH3_DESC_PTR IXP2000_PCI_CSR(0xCC) +#define IXP2000_PCI_CH3_CNTRL IXP2000_PCI_CSR(0xD0) +#define IXP2000_PCI_CH3_ME_PARAM IXP2000_PCI_CSR(0xD4) +#define IXP2000_DMA_INF_MODE IXP2000_PCI_CSR(0xE0) +/* + * Size masks for BARs + */ +#define IXP2000_PCI_SRAM_BASE_ADDR_MASK IXP2000_PCI_CSR(0xFC) +#define IXP2000_PCI_DRAM_BASE_ADDR_MASK IXP2000_PCI_CSR(0x100) +/* + * Control and uEngine related + */ +#define IXP2000_PCI_CONTROL IXP2000_PCI_CSR(0x13C) +#define IXP2000_PCI_ADDR_EXT IXP2000_PCI_CSR(0x140) +#define IXP2000_PCI_ME_PUSH_STATUS IXP2000_PCI_CSR(0x148) +#define IXP2000_PCI_ME_PUSH_EN IXP2000_PCI_CSR(0x14C) +#define IXP2000_PCI_ERR_STATUS IXP2000_PCI_CSR(0x150) +#define IXP2000_PCI_ERR_ENABLE IXP2000_PCI_CSR(0x154) +/* + * Inbound PCI interrupt control + */ +#define IXP2000_PCI_XSCALE_INT_STATUS IXP2000_PCI_CSR(0x158) +#define IXP2000_PCI_XSCALE_INT_ENABLE IXP2000_PCI_CSR(0x15C) + +#define IXP2000_PCICNTL_PNR (1<<17) /* PCI not Reset bit of PCI_CONTROL */ +#define IXP2000_PCICNTL_PCF (1<<28) /* PCI Central function bit */ +#define IXP2000_XSCALE_INT (1<<1) /* Interrupt from XScale to PCI */ + +/* These are from the IRQ register in the PCI ISR register */ +#define PCI_CONTROL_BE_DEO (1 << 22) /* Big Endian Data Enable Out */ +#define PCI_CONTROL_BE_DEI (1 << 21) /* Big Endian Data Enable In */ +#define PCI_CONTROL_BE_BEO (1 << 20) /* Big Endian Byte Enable Out */ +#define PCI_CONTROL_BE_BEI (1 << 19) /* Big Endian Byte Enable In */ +#define PCI_CONTROL_IEE (1 << 17) /* I/O cycle Endian swap Enable */ + +#define IXP2000_PCI_RST_REL (1 << 2) +#define CFG_RST_DIR (*IXP2000_PCI_CONTROL & IXP2000_PCICNTL_PCF) +#define CFG_PCI_BOOT_HOST (1 << 2) +#define CFG_BOOT_PROM (1 << 1) + +/* + * SlowPort CSRs + * + * The slowport is used to access things like flash, SONET framer control + * ports, slave microprocessors, CPLDs, and others of chip memory mapped + * peripherals. + */ +#define SLOWPORT_CSR(x) (volatile unsigned long*)(IXP2000_SLOWPORT_CSR_VIRT_BASE | (x)) + +#define IXP2000_SLOWPORT_CCR SLOWPORT_CSR(0x00) +#define IXP2000_SLOWPORT_WTC1 SLOWPORT_CSR(0x04) +#define IXP2000_SLOWPORT_WTC2 SLOWPORT_CSR(0x08) +#define IXP2000_SLOWPORT_RTC1 SLOWPORT_CSR(0x0c) +#define IXP2000_SLOWPORT_RTC2 SLOWPORT_CSR(0x10) +#define IXP2000_SLOWPORT_FSR SLOWPORT_CSR(0x14) +#define IXP2000_SLOWPORT_PCR SLOWPORT_CSR(0x18) +#define IXP2000_SLOWPORT_ADC SLOWPORT_CSR(0x1C) +#define IXP2000_SLOWPORT_FAC SLOWPORT_CSR(0x20) +#define IXP2000_SLOWPORT_FRM SLOWPORT_CSR(0x24) +#define IXP2000_SLOWPORT_FIN SLOWPORT_CSR(0x28) + +/* + * CCR values. + * The CCR configures the clock division for the slowport interface. + */ +#define SLOWPORT_CCR_DIV_1 0x00 +#define SLOWPORT_CCR_DIV_2 0x01 +#define SLOWPORT_CCR_DIV_4 0x02 +#define SLOWPORT_CCR_DIV_6 0x03 +#define SLOWPORT_CCR_DIV_8 0x04 +#define SLOWPORT_CCR_DIV_10 0x05 +#define SLOWPORT_CCR_DIV_12 0x06 +#define SLOWPORT_CCR_DIV_14 0x07 +#define SLOWPORT_CCR_DIV_16 0x08 +#define SLOWPORT_CCR_DIV_18 0x09 +#define SLOWPORT_CCR_DIV_20 0x0a +#define SLOWPORT_CCR_DIV_22 0x0b +#define SLOWPORT_CCR_DIV_24 0x0c +#define SLOWPORT_CCR_DIV_26 0x0d +#define SLOWPORT_CCR_DIV_28 0x0e +#define SLOWPORT_CCR_DIV_30 0x0f + +/* + * PCR values. PCR configure the mode of the interface. + */ +#define SLOWPORT_MODE_FLASH 0x00 +#define SLOWPORT_MODE_LUCENT 0x01 +#define SLOWPORT_MODE_PMC_SIERRA 0x02 +#define SLOWPORT_MODE_INTEL_UP 0x03 +#define SLOWPORT_MODE_MOTOROLA_UP 0x04 + +/* + * ADC values. Defines data and address bus widths. + */ +#define SLOWPORT_ADDR_WIDTH_8 0x00 +#define SLOWPORT_ADDR_WIDTH_16 0x01 +#define SLOWPORT_ADDR_WIDTH_24 0x02 +#define SLOWPORT_ADDR_WIDTH_32 0x03 +#define SLOWPORT_DATA_WIDTH_8 0x00 +#define SLOWPORT_DATA_WIDTH_16 0x10 +#define SLOWPORT_DATA_WIDTH_24 0x20 +#define SLOWPORT_DATA_WIDTH_32 0x30 + +/* + * Masks and shifts for various fields in the WTC and RTC registers. + */ +#define SLOWPORT_WRTC_MASK_HD 0x0003 +#define SLOWPORT_WRTC_MASK_PW 0x003c +#define SLOWPORT_WRTC_MASK_SU 0x03c0 + +#define SLOWPORT_WRTC_SHIFT_HD 0x00 +#define SLOWPORT_WRTC_SHIFT_SU 0x02 +#define SLOWPORT_WRTC_SHFIT_PW 0x06 + + +/* + * GPIO registers & GPIO interface. + */ +#define IXP2000_GPIO_REG(x) ((volatile unsigned long*)(IXP2000_GPIO_VIRT_BASE+(x))) +#define IXP2000_GPIO_PLR IXP2000_GPIO_REG(0x00) +#define IXP2000_GPIO_PDPR IXP2000_GPIO_REG(0x04) +#define IXP2000_GPIO_PDSR IXP2000_GPIO_REG(0x08) +#define IXP2000_GPIO_PDCR IXP2000_GPIO_REG(0x0c) +#define IXP2000_GPIO_POPR IXP2000_GPIO_REG(0x10) +#define IXP2000_GPIO_POSR IXP2000_GPIO_REG(0x14) +#define IXP2000_GPIO_POCR IXP2000_GPIO_REG(0x18) +#define IXP2000_GPIO_REDR IXP2000_GPIO_REG(0x1c) +#define IXP2000_GPIO_FEDR IXP2000_GPIO_REG(0x20) +#define IXP2000_GPIO_EDSR IXP2000_GPIO_REG(0x24) +#define IXP2000_GPIO_LSHR IXP2000_GPIO_REG(0x28) +#define IXP2000_GPIO_LSLR IXP2000_GPIO_REG(0x2c) +#define IXP2000_GPIO_LDSR IXP2000_GPIO_REG(0x30) +#define IXP2000_GPIO_INER IXP2000_GPIO_REG(0x34) +#define IXP2000_GPIO_INSR IXP2000_GPIO_REG(0x38) +#define IXP2000_GPIO_INCR IXP2000_GPIO_REG(0x3c) +#define IXP2000_GPIO_INST IXP2000_GPIO_REG(0x40) + +/* + * "Global" registers...whatever that's supposed to mean. + */ +#define GLOBAL_REG_BASE (IXP2000_GLOBAL_REG_VIRT_BASE + 0x0a00) +#define GLOBAL_REG(x) (volatile unsigned long*)(GLOBAL_REG_BASE | (x)) + +#define IXP2000_MAJ_PROD_TYPE_MASK 0x001F0000 +#define IXP2000_MAJ_PROD_TYPE_IXP2000 0x00000000 +#define IXP2000_MIN_PROD_TYPE_MASK 0x0000FF00 +#define IXP2000_MIN_PROD_TYPE_IXP2400 0x00000200 +#define IXP2000_MIN_PROD_TYPE_IXP2850 0x00000100 +#define IXP2000_MIN_PROD_TYPE_IXP2800 0x00000000 +#define IXP2000_MAJ_REV_MASK 0x000000F0 +#define IXP2000_MIN_REV_MASK 0x0000000F +#define IXP2000_PROD_ID_MASK 0xFFFFFFFF + +#define IXP2000_PRODUCT_ID GLOBAL_REG(0x00) +#define IXP2000_MISC_CONTROL GLOBAL_REG(0x04) +#define IXP2000_MSF_CLK_CNTRL GLOBAL_REG(0x08) +#define IXP2000_RESET0 GLOBAL_REG(0x0c) +#define IXP2000_RESET1 GLOBAL_REG(0x10) +#define IXP2000_CCR GLOBAL_REG(0x14) +#define IXP2000_STRAP_OPTIONS GLOBAL_REG(0x18) + +#define RSTALL (1 << 16) +#define WDT_RESET_ENABLE 0x01000000 + + +/* + * MSF registers. The IXP2400 and IXP2800 have somewhat different MSF + * units, but the registers that differ between the two don't overlap, + * so we can have one register list for both. + */ +#define IXP2000_MSF_REG(x) ((volatile unsigned long*)(IXP2000_MSF_VIRT_BASE + (x))) +#define IXP2000_MSF_RX_CONTROL IXP2000_MSF_REG(0x0000) +#define IXP2000_MSF_TX_CONTROL IXP2000_MSF_REG(0x0004) +#define IXP2000_MSF_INTERRUPT_STATUS IXP2000_MSF_REG(0x0008) +#define IXP2000_MSF_INTERRUPT_ENABLE IXP2000_MSF_REG(0x000c) +#define IXP2000_MSF_CSIX_TYPE_MAP IXP2000_MSF_REG(0x0010) +#define IXP2000_MSF_FC_EGRESS_STATUS IXP2000_MSF_REG(0x0014) +#define IXP2000_MSF_FC_INGRESS_STATUS IXP2000_MSF_REG(0x0018) +#define IXP2000_MSF_HWM_CONTROL IXP2000_MSF_REG(0x0024) +#define IXP2000_MSF_FC_STATUS_OVERRIDE IXP2000_MSF_REG(0x0028) +#define IXP2000_MSF_CLOCK_CONTROL IXP2000_MSF_REG(0x002c) +#define IXP2000_MSF_RX_PORT_MAP IXP2000_MSF_REG(0x0040) +#define IXP2000_MSF_RBUF_ELEMENT_DONE IXP2000_MSF_REG(0x0044) +#define IXP2000_MSF_RX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0048) +#define IXP2000_MSF_RX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0048) +#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_0 IXP2000_MSF_REG(0x0050) +#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_1 IXP2000_MSF_REG(0x0054) +#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_2 IXP2000_MSF_REG(0x0058) +#define IXP2000_MSF_TX_SEQUENCE_0 IXP2000_MSF_REG(0x0060) +#define IXP2000_MSF_TX_SEQUENCE_1 IXP2000_MSF_REG(0x0064) +#define IXP2000_MSF_TX_SEQUENCE_2 IXP2000_MSF_REG(0x0068) +#define IXP2000_MSF_TX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0070) +#define IXP2000_MSF_TX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0070) +#define IXP2000_MSF_RX_UP_CONTROL_0 IXP2000_MSF_REG(0x0080) +#define IXP2000_MSF_RX_UP_CONTROL_1 IXP2000_MSF_REG(0x0084) +#define IXP2000_MSF_RX_UP_CONTROL_2 IXP2000_MSF_REG(0x0088) +#define IXP2000_MSF_RX_UP_CONTROL_3 IXP2000_MSF_REG(0x008c) +#define IXP2000_MSF_TX_UP_CONTROL_0 IXP2000_MSF_REG(0x0090) +#define IXP2000_MSF_TX_UP_CONTROL_1 IXP2000_MSF_REG(0x0094) +#define IXP2000_MSF_TX_UP_CONTROL_2 IXP2000_MSF_REG(0x0098) +#define IXP2000_MSF_TX_UP_CONTROL_3 IXP2000_MSF_REG(0x009c) +#define IXP2000_MSF_TRAIN_DATA IXP2000_MSF_REG(0x00a0) +#define IXP2000_MSF_TRAIN_CALENDAR IXP2000_MSF_REG(0x00a4) +#define IXP2000_MSF_TRAIN_FLOW_CONTROL IXP2000_MSF_REG(0x00a8) +#define IXP2000_MSF_TX_CALENDAR_0 IXP2000_MSF_REG(0x1000) +#define IXP2000_MSF_RX_PORT_CALENDAR_STATUS IXP2000_MSF_REG(0x1400) + + +#endif /* _IXP2000_H_ */ diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/memory.h b/trunk/arch/arm/mach-ixp2000/include/mach/memory.h new file mode 100644 index 000000000000..5f0c4fd4076a --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/memory.h @@ -0,0 +1,31 @@ +/* + * arch/arm/mach-ixp2000/include/mach/memory.h + * + * Copyright (c) 2002 Intel Corp. + * Copyright (c) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#define PLAT_PHYS_OFFSET UL(0x00000000) + +#include + +#define IXP2000_PCI_SDRAM_OFFSET (*IXP2000_PCI_SDRAM_BAR & 0xfffffff0) + +#define __phys_to_bus(x) ((x) + (IXP2000_PCI_SDRAM_OFFSET - PHYS_OFFSET)) +#define __bus_to_phys(x) ((x) - (IXP2000_PCI_SDRAM_OFFSET - PHYS_OFFSET)) + +#define __virt_to_bus(v) __phys_to_bus(__virt_to_phys(v)) +#define __bus_to_virt(b) __phys_to_virt(__bus_to_phys(b)) +#define __pfn_to_bus(p) __phys_to_bus(__pfn_to_phys(p)) +#define __bus_to_pfn(b) __phys_to_pfn(__bus_to_phys(b)) + +#endif + diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/platform.h b/trunk/arch/arm/mach-ixp2000/include/mach/platform.h new file mode 100644 index 000000000000..bb0f8dcf9ee1 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/platform.h @@ -0,0 +1,153 @@ +/* + * arch/arm/mach-ixp2000/include/mach/platform.h + * + * Various bits of code used by platform-level code. + * + * Author: Deepak Saxena + * + * Copyright 2004 (c) MontaVista Software, Inc. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + + +#ifndef __ASSEMBLY__ + +static inline unsigned long ixp2000_reg_read(volatile void *reg) +{ + return *((volatile unsigned long *)reg); +} + +static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) +{ + *((volatile unsigned long *)reg) = val; +} + +/* + * On the IXP2400, we can't use XCB=000 due to chip bugs. We use + * XCB=101 instead, but that makes all I/O accesses bufferable. This + * is not a problem in general, but we do have to be slightly more + * careful because I/O writes are no longer automatically flushed out + * of the write buffer. + * + * In cases where we want to make sure that a write has been flushed + * out of the write buffer before we proceed, for example when masking + * a device interrupt before re-enabling IRQs in CPSR, we can use this + * function, ixp2000_reg_wrb, which performs a write, a readback, and + * issues a dummy instruction dependent on the value of the readback + * (mov rX, rX) to make sure that the readback has completed before we + * continue. + */ +static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) +{ + unsigned long dummy; + + *((volatile unsigned long *)reg) = val; + + dummy = *((volatile unsigned long *)reg); + __asm__ __volatile__("mov %0, %0" : "+r" (dummy)); +} + +/* + * Boards may multiplex different devices on the 2nd channel of + * the slowport interface that each need different configuration + * settings. For example, the IXDP2400 uses channel 2 on the interface + * to access the CPLD, the switch fabric card, and the media card. Each + * one needs a different mode so drivers must save/restore the mode + * before and after each operation. + * + * acquire_slowport(&your_config); + * ... + * do slowport operations + * ... + * release_slowport(); + * + * Note that while you have the slowport, you are holding a spinlock, + * so your code should be written as if you explicitly acquired a lock. + * + * The configuration only affects device 2 on the slowport, so the + * MTD map driver does not acquire/release the slowport. + */ +struct slowport_cfg { + unsigned long CCR; /* Clock divide */ + unsigned long WTC; /* Write Timing Control */ + unsigned long RTC; /* Read Timing Control */ + unsigned long PCR; /* Protocol Control Register */ + unsigned long ADC; /* Address/Data Width Control */ +}; + + +void ixp2000_acquire_slowport(struct slowport_cfg *, struct slowport_cfg *); +void ixp2000_release_slowport(struct slowport_cfg *); + +/* + * IXP2400 A0/A1 and IXP2800 A0/A1/A2 have broken slowport that requires + * tweaking of addresses in the MTD driver. + */ +static inline unsigned ixp2000_has_broken_slowport(void) +{ + unsigned long id = *IXP2000_PRODUCT_ID; + unsigned long id_prod = id & (IXP2000_MAJ_PROD_TYPE_MASK | + IXP2000_MIN_PROD_TYPE_MASK); + return (((id_prod == + /* fixed in IXP2400-B0 */ + (IXP2000_MAJ_PROD_TYPE_IXP2000 | + IXP2000_MIN_PROD_TYPE_IXP2400)) && + ((id & IXP2000_MAJ_REV_MASK) == 0)) || + ((id_prod == + /* fixed in IXP2800-B0 */ + (IXP2000_MAJ_PROD_TYPE_IXP2000 | + IXP2000_MIN_PROD_TYPE_IXP2800)) && + ((id & IXP2000_MAJ_REV_MASK) == 0)) || + ((id_prod == + /* fixed in IXP2850-B0 */ + (IXP2000_MAJ_PROD_TYPE_IXP2000 | + IXP2000_MIN_PROD_TYPE_IXP2850)) && + ((id & IXP2000_MAJ_REV_MASK) == 0))); +} + +static inline unsigned int ixp2000_has_flash(void) +{ + return ((*IXP2000_STRAP_OPTIONS) & (CFG_BOOT_PROM)); +} + +static inline unsigned int ixp2000_is_pcimaster(void) +{ + return ((*IXP2000_STRAP_OPTIONS) & (CFG_PCI_BOOT_HOST)); +} + +void ixp2000_map_io(void); +void ixp2000_uart_init(void); +void ixp2000_init_irq(void); +void ixp2000_init_time(unsigned long); +void ixp2000_restart(char, const char *); +unsigned long ixp2000_gettimeoffset(void); + +struct pci_sys_data; + +u32 *ixp2000_pci_config_addr(unsigned int bus, unsigned int devfn, int where); +void ixp2000_pci_preinit(void); +int ixp2000_pci_setup(int, struct pci_sys_data*); +struct pci_bus* ixp2000_pci_scan_bus(int, struct pci_sys_data*); +int ixp2000_pci_read_config(struct pci_bus*, unsigned int, int, int, u32 *); +int ixp2000_pci_write_config(struct pci_bus*, unsigned int, int, int, u32); + +/* + * Several of the IXP2000 systems have banked flash so we need to extend the + * flash_platform_data structure with some private pointers + */ +struct ixp2000_flash_data { + struct flash_platform_data *platform_data; + int nr_banks; + unsigned long (*bank_setup)(unsigned long); +}; + +struct ixp2000_i2c_pins { + unsigned long sda_pin; + unsigned long scl_pin; +}; + + +#endif /* !__ASSEMBLY__ */ diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/timex.h b/trunk/arch/arm/mach-ixp2000/include/mach/timex.h new file mode 100644 index 000000000000..835e659f93d4 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/timex.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-ixp2000/include/mach/timex.h + * + * IXP2000 architecture timex specifications + */ + + +/* + * Default clock is 50MHz APB, but platform code can override this + */ +#define CLOCK_TICK_RATE 50000000 + + diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/uncompress.h b/trunk/arch/arm/mach-ixp2000/include/mach/uncompress.h new file mode 100644 index 000000000000..ce363087df78 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/uncompress.h @@ -0,0 +1,47 @@ +/* + * arch/arm/mach-ixp2000/include/mach/uncompress.h + * + * + * Original Author: Naeem Afzal + * Maintainer: Deepak Saxena + * + * Copyright 2002 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include + +#define UART_BASE 0xc0030000 + +#define PHYS(x) ((volatile unsigned long *)(UART_BASE + x)) + +#define UARTDR PHYS(0x00) /* Transmit reg dlab=0 */ +#define UARTDLL PHYS(0x00) /* Divisor Latch reg dlab=1*/ +#define UARTDLM PHYS(0x04) /* Divisor Latch reg dlab=1*/ +#define UARTIER PHYS(0x04) /* Interrupt enable reg */ +#define UARTFCR PHYS(0x08) /* FIFO control reg dlab =0*/ +#define UARTLCR PHYS(0x0c) /* Control reg */ +#define UARTSR PHYS(0x14) /* Status reg */ + + +static inline void putc(int c) +{ + int j = 0x1000; + + while (--j && !(*UARTSR & UART_LSR_THRE)) + barrier(); + + *UARTDR = c; +} + +static inline void flush(void) +{ +} + +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/trunk/arch/arm/mach-ixp2000/ixdp2400.c b/trunk/arch/arm/mach-ixp2000/ixdp2400.c new file mode 100644 index 000000000000..915ad49e3b8f --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/ixdp2400.c @@ -0,0 +1,180 @@ +/* + * arch/arm/mach-ixp2000/ixdp2400.c + * + * IXDP2400 platform support + * + * Original Author: Naeem Afzal + * Maintainer: Deepak Saxena + * + * Copyright (C) 2002 Intel Corp. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +/************************************************************************* + * IXDP2400 timer tick + *************************************************************************/ +static void __init ixdp2400_timer_init(void) +{ + int numerator, denominator; + int denom_array[] = {2, 4, 8, 16, 1, 2, 4, 8}; + + numerator = (*(IXDP2400_CPLD_SYS_CLK_M) & 0xFF) *2; + denominator = denom_array[(*(IXDP2400_CPLD_SYS_CLK_N) & 0x7)]; + + ixp2000_init_time(((3125000 * numerator) / (denominator)) / 2); +} + +static struct sys_timer ixdp2400_timer = { + .init = ixdp2400_timer_init, + .offset = ixp2000_gettimeoffset, +}; + +/************************************************************************* + * IXDP2400 PCI + *************************************************************************/ +void __init ixdp2400_pci_preinit(void) +{ + ixp2000_reg_write(IXP2000_PCI_ADDR_EXT, 0x00100000); + ixp2000_pci_preinit(); + pcibios_setup("firmware"); +} + +int ixdp2400_pci_setup(int nr, struct pci_sys_data *sys) +{ + sys->mem_offset = 0xe0000000; + + ixp2000_pci_setup(nr, sys); + + return 1; +} + +static int __init ixdp2400_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) +{ + if (ixdp2x00_master_npu()) { + + /* + * Root bus devices. Slave NPU is only one with interrupt. + * Everything else, we just return -1 b/c nothing else + * on the root bus has interrupts. + */ + if(!dev->bus->self) { + if(dev->devfn == IXDP2X00_SLAVE_NPU_DEVFN ) + return IRQ_IXDP2400_INGRESS_NPU; + + return -1; + } + + /* + * Bridge behind the PMC slot. + * NOTE: Only INTA from the PMC slot is routed. VERY BAD. + */ + if(dev->bus->self->devfn == IXDP2X00_PMC_DEVFN && + dev->bus->parent->self->devfn == IXDP2X00_P2P_DEVFN && + !dev->bus->parent->self->bus->parent) + return IRQ_IXDP2400_PMC; + + /* + * Device behind the first bridge + */ + if(dev->bus->self->devfn == IXDP2X00_P2P_DEVFN) { + switch(dev->devfn) { + case IXDP2400_MASTER_ENET_DEVFN: + return IRQ_IXDP2400_ENET; + + case IXDP2400_MEDIA_DEVFN: + return IRQ_IXDP2400_MEDIA_PCI; + + case IXDP2400_SWITCH_FABRIC_DEVFN: + return IRQ_IXDP2400_SF_PCI; + + case IXDP2X00_PMC_DEVFN: + return IRQ_IXDP2400_PMC; + } + } + + return -1; + } else return IRQ_IXP2000_PCIB; /* Slave NIC interrupt */ +} + + +static void ixdp2400_pci_postinit(void) +{ + struct pci_dev *dev; + + if (ixdp2x00_master_npu()) { + dev = pci_get_bus_and_slot(1, IXDP2400_SLAVE_ENET_DEVFN); + pci_stop_and_remove_bus_device(dev); + pci_dev_put(dev); + } else { + dev = pci_get_bus_and_slot(1, IXDP2400_MASTER_ENET_DEVFN); + pci_stop_and_remove_bus_device(dev); + pci_dev_put(dev); + + ixdp2x00_slave_pci_postinit(); + } +} + +static struct hw_pci ixdp2400_pci __initdata = { + .nr_controllers = 1, + .setup = ixdp2400_pci_setup, + .preinit = ixdp2400_pci_preinit, + .postinit = ixdp2400_pci_postinit, + .scan = ixp2000_pci_scan_bus, + .map_irq = ixdp2400_pci_map_irq, +}; + +int __init ixdp2400_pci_init(void) +{ + if (machine_is_ixdp2400()) + pci_common_init(&ixdp2400_pci); + + return 0; +} + +subsys_initcall(ixdp2400_pci_init); + +void __init ixdp2400_init_irq(void) +{ + ixdp2x00_init_irq(IXDP2400_CPLD_INT_STAT, IXDP2400_CPLD_INT_MASK, IXDP2400_NR_IRQS); +} + +MACHINE_START(IXDP2400, "Intel IXDP2400 Development Platform") + /* Maintainer: MontaVista Software, Inc. */ + .atag_offset = 0x100, + .map_io = ixdp2x00_map_io, + .init_irq = ixdp2400_init_irq, + .timer = &ixdp2400_timer, + .init_machine = ixdp2x00_init_machine, + .restart = ixp2000_restart, +MACHINE_END + diff --git a/trunk/arch/arm/mach-ixp2000/ixdp2800.c b/trunk/arch/arm/mach-ixp2000/ixdp2800.c new file mode 100644 index 000000000000..a9f1819ea049 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/ixdp2800.c @@ -0,0 +1,295 @@ +/* + * arch/arm/mach-ixp2000/ixdp2800.c + * + * IXDP2800 platform support + * + * Original Author: Jeffrey Daly + * Maintainer: Deepak Saxena + * + * Copyright (C) 2002 Intel Corp. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +/************************************************************************* + * IXDP2800 timer tick + *************************************************************************/ + +static void __init ixdp2800_timer_init(void) +{ + ixp2000_init_time(50000000); +} + +static struct sys_timer ixdp2800_timer = { + .init = ixdp2800_timer_init, + .offset = ixp2000_gettimeoffset, +}; + +/************************************************************************* + * IXDP2800 PCI + *************************************************************************/ +static void __init ixdp2800_slave_disable_pci_master(void) +{ + *IXP2000_PCI_CMDSTAT &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); +} + +static void __init ixdp2800_master_wait_for_slave(void) +{ + volatile u32 *addr; + + printk(KERN_INFO "IXDP2800: waiting for slave NPU to configure " + "its BAR sizes\n"); + + addr = ixp2000_pci_config_addr(0, IXDP2X00_SLAVE_NPU_DEVFN, + PCI_BASE_ADDRESS_1); + do { + *addr = 0xffffffff; + cpu_relax(); + } while (*addr != 0xfe000008); + + addr = ixp2000_pci_config_addr(0, IXDP2X00_SLAVE_NPU_DEVFN, + PCI_BASE_ADDRESS_2); + do { + *addr = 0xffffffff; + cpu_relax(); + } while (*addr != 0xc0000008); + + /* + * Configure the slave's SDRAM BAR by hand. + */ + *addr = 0x40000008; +} + +static void __init ixdp2800_slave_wait_for_master_enable(void) +{ + printk(KERN_INFO "IXDP2800: waiting for master NPU to enable us\n"); + + while ((*IXP2000_PCI_CMDSTAT & PCI_COMMAND_MASTER) == 0) + cpu_relax(); +} + +void __init ixdp2800_pci_preinit(void) +{ + printk("ixdp2x00_pci_preinit called\n"); + + *IXP2000_PCI_ADDR_EXT = 0x0001e000; + + if (!ixdp2x00_master_npu()) + ixdp2800_slave_disable_pci_master(); + + *IXP2000_PCI_SRAM_BASE_ADDR_MASK = (0x2000000 - 1) & ~0x3ffff; + *IXP2000_PCI_DRAM_BASE_ADDR_MASK = (0x40000000 - 1) & ~0xfffff; + + ixp2000_pci_preinit(); + + if (ixdp2x00_master_npu()) { + /* + * Wait until the slave set its SRAM/SDRAM BAR sizes + * correctly before we proceed to scan and enumerate + * the bus. + */ + ixdp2800_master_wait_for_slave(); + + /* + * We configure the SDRAM BARs by hand because they + * are 1G and fall outside of the regular allocated + * PCI address space. + */ + *IXP2000_PCI_SDRAM_BAR = 0x00000008; + } else { + /* + * Wait for the master to complete scanning the bus + * and assigning resources before we proceed to scan + * the bus ourselves. Set pci=firmware to honor the + * master's resource assignment. + */ + ixdp2800_slave_wait_for_master_enable(); + pcibios_setup("firmware"); + } +} + +/* + * We assign the SDRAM BARs for the two IXP2800 CPUs by hand, outside + * of the regular PCI window, because there's only 512M of outbound PCI + * memory window on each IXP, while we need 1G for each of the BARs. + */ +static void __devinit ixp2800_pci_fixup(struct pci_dev *dev) +{ + if (machine_is_ixdp2800()) { + dev->resource[2].start = 0; + dev->resource[2].end = 0; + dev->resource[2].flags = 0; + } +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP2800, ixp2800_pci_fixup); + +static int __init ixdp2800_pci_setup(int nr, struct pci_sys_data *sys) +{ + sys->mem_offset = 0x00000000; + + ixp2000_pci_setup(nr, sys); + + return 1; +} + +static int __init ixdp2800_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) +{ + if (ixdp2x00_master_npu()) { + + /* + * Root bus devices. Slave NPU is only one with interrupt. + * Everything else, we just return -1 which is invalid. + */ + if(!dev->bus->self) { + if(dev->devfn == IXDP2X00_SLAVE_NPU_DEVFN ) + return IRQ_IXDP2800_INGRESS_NPU; + + return -1; + } + + /* + * Bridge behind the PMC slot. + */ + if(dev->bus->self->devfn == IXDP2X00_PMC_DEVFN && + dev->bus->parent->self->devfn == IXDP2X00_P2P_DEVFN && + !dev->bus->parent->self->bus->parent) + return IRQ_IXDP2800_PMC; + + /* + * Device behind the first bridge + */ + if(dev->bus->self->devfn == IXDP2X00_P2P_DEVFN) { + switch(dev->devfn) { + case IXDP2X00_PMC_DEVFN: + return IRQ_IXDP2800_PMC; + + case IXDP2800_MASTER_ENET_DEVFN: + return IRQ_IXDP2800_EGRESS_ENET; + + case IXDP2800_SWITCH_FABRIC_DEVFN: + return IRQ_IXDP2800_FABRIC; + } + } + + return -1; + } else return IRQ_IXP2000_PCIB; /* Slave NIC interrupt */ +} + +static void __init ixdp2800_master_enable_slave(void) +{ + volatile u32 *addr; + + printk(KERN_INFO "IXDP2800: enabling slave NPU\n"); + + addr = (volatile u32 *)ixp2000_pci_config_addr(0, + IXDP2X00_SLAVE_NPU_DEVFN, + PCI_COMMAND); + + *addr |= PCI_COMMAND_MASTER; +} + +static void __init ixdp2800_master_wait_for_slave_bus_scan(void) +{ + volatile u32 *addr; + + printk(KERN_INFO "IXDP2800: waiting for slave to finish bus scan\n"); + + addr = (volatile u32 *)ixp2000_pci_config_addr(0, + IXDP2X00_SLAVE_NPU_DEVFN, + PCI_COMMAND); + while ((*addr & PCI_COMMAND_MEMORY) == 0) + cpu_relax(); +} + +static void __init ixdp2800_slave_signal_bus_scan_completion(void) +{ + printk(KERN_INFO "IXDP2800: bus scan done, signaling master\n"); + *IXP2000_PCI_CMDSTAT |= PCI_COMMAND_MEMORY; +} + +static void __init ixdp2800_pci_postinit(void) +{ + if (!ixdp2x00_master_npu()) { + ixdp2x00_slave_pci_postinit(); + ixdp2800_slave_signal_bus_scan_completion(); + } +} + +struct __initdata hw_pci ixdp2800_pci __initdata = { + .nr_controllers = 1, + .setup = ixdp2800_pci_setup, + .preinit = ixdp2800_pci_preinit, + .postinit = ixdp2800_pci_postinit, + .scan = ixp2000_pci_scan_bus, + .map_irq = ixdp2800_pci_map_irq, +}; + +int __init ixdp2800_pci_init(void) +{ + if (machine_is_ixdp2800()) { + struct pci_dev *dev; + + pci_common_init(&ixdp2800_pci); + if (ixdp2x00_master_npu()) { + dev = pci_get_bus_and_slot(1, IXDP2800_SLAVE_ENET_DEVFN); + pci_stop_and_remove_bus_device(dev); + pci_dev_put(dev); + + ixdp2800_master_enable_slave(); + ixdp2800_master_wait_for_slave_bus_scan(); + } else { + dev = pci_get_bus_and_slot(1, IXDP2800_MASTER_ENET_DEVFN); + pci_stop_and_remove_bus_device(dev); + pci_dev_put(dev); + } + } + + return 0; +} + +subsys_initcall(ixdp2800_pci_init); + +void __init ixdp2800_init_irq(void) +{ + ixdp2x00_init_irq(IXDP2800_CPLD_INT_STAT, IXDP2800_CPLD_INT_MASK, IXDP2800_NR_IRQS); +} + +MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform") + /* Maintainer: MontaVista Software, Inc. */ + .atag_offset = 0x100, + .map_io = ixdp2x00_map_io, + .init_irq = ixdp2800_init_irq, + .timer = &ixdp2800_timer, + .init_machine = ixdp2x00_init_machine, + .restart = ixp2000_restart, +MACHINE_END + diff --git a/trunk/arch/arm/mach-ixp2000/ixdp2x00.c b/trunk/arch/arm/mach-ixp2000/ixdp2x00.c new file mode 100644 index 000000000000..421e38dc0fac --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/ixdp2x00.c @@ -0,0 +1,306 @@ +/* + * arch/arm/mach-ixp2000/ixdp2x00.c + * + * Code common to IXDP2400 and IXDP2800 platforms. + * + * Original Author: Naeem Afzal + * Maintainer: Deepak Saxena + * + * Copyright (C) 2002 Intel Corp. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +/************************************************************************* + * IXDP2x00 IRQ Initialization + *************************************************************************/ +static volatile unsigned long *board_irq_mask; +static volatile unsigned long *board_irq_stat; +static unsigned long board_irq_count; + +#ifdef CONFIG_ARCH_IXDP2400 +/* + * Slowport configuration for accessing CPLD registers on IXDP2x00 + */ +static struct slowport_cfg slowport_cpld_cfg = { + .CCR = SLOWPORT_CCR_DIV_2, + .WTC = 0x00000070, + .RTC = 0x00000070, + .PCR = SLOWPORT_MODE_FLASH, + .ADC = SLOWPORT_ADDR_WIDTH_24 | SLOWPORT_DATA_WIDTH_8 +}; +#endif + +static void ixdp2x00_irq_mask(struct irq_data *d) +{ + unsigned long dummy; + static struct slowport_cfg old_cfg; + + /* + * This is ugly in common code but really don't know + * of a better way to handle it. :( + */ +#ifdef CONFIG_ARCH_IXDP2400 + if (machine_is_ixdp2400()) + ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg); +#endif + + dummy = *board_irq_mask; + dummy |= IXP2000_BOARD_IRQ_MASK(d->irq); + ixp2000_reg_wrb(board_irq_mask, dummy); + +#ifdef CONFIG_ARCH_IXDP2400 + if (machine_is_ixdp2400()) + ixp2000_release_slowport(&old_cfg); +#endif +} + +static void ixdp2x00_irq_unmask(struct irq_data *d) +{ + unsigned long dummy; + static struct slowport_cfg old_cfg; + +#ifdef CONFIG_ARCH_IXDP2400 + if (machine_is_ixdp2400()) + ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg); +#endif + + dummy = *board_irq_mask; + dummy &= ~IXP2000_BOARD_IRQ_MASK(d->irq); + ixp2000_reg_wrb(board_irq_mask, dummy); + + if (machine_is_ixdp2400()) + ixp2000_release_slowport(&old_cfg); +} + +static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc) +{ + volatile u32 ex_interrupt = 0; + static struct slowport_cfg old_cfg; + int i; + + desc->irq_data.chip->irq_mask(&desc->irq_data); + +#ifdef CONFIG_ARCH_IXDP2400 + if (machine_is_ixdp2400()) + ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg); +#endif + ex_interrupt = *board_irq_stat & 0xff; + if (machine_is_ixdp2400()) + ixp2000_release_slowport(&old_cfg); + + if(!ex_interrupt) { + printk(KERN_ERR "Spurious IXDP2x00 CPLD interrupt!\n"); + return; + } + + for(i = 0; i < board_irq_count; i++) { + if(ex_interrupt & (1 << i)) { + int cpld_irq = IXP2000_BOARD_IRQ(0) + i; + generic_handle_irq(cpld_irq); + } + } + + desc->irq_data.chip->irq_unmask(&desc->irq_data); +} + +static struct irq_chip ixdp2x00_cpld_irq_chip = { + .irq_ack = ixdp2x00_irq_mask, + .irq_mask = ixdp2x00_irq_mask, + .irq_unmask = ixdp2x00_irq_unmask +}; + +void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_of_irqs) +{ + unsigned int irq; + + ixp2000_init_irq(); + + if (!ixdp2x00_master_npu()) + return; + + board_irq_stat = stat_reg; + board_irq_mask = mask_reg; + board_irq_count = nr_of_irqs; + + *board_irq_mask = 0xffffffff; + + for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) { + irq_set_chip_and_handler(irq, &ixdp2x00_cpld_irq_chip, + handle_level_irq); + set_irq_flags(irq, IRQF_VALID); + } + + /* Hook into PCI interrupt */ + irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler); +} + +/************************************************************************* + * IXDP2x00 memory map + *************************************************************************/ +static struct map_desc ixdp2x00_io_desc __initdata = { + .virtual = IXDP2X00_VIRT_CPLD_BASE, + .pfn = __phys_to_pfn(IXDP2X00_PHYS_CPLD_BASE), + .length = IXDP2X00_CPLD_SIZE, + .type = MT_DEVICE +}; + +void __init ixdp2x00_map_io(void) +{ + ixp2000_map_io(); + + iotable_init(&ixdp2x00_io_desc, 1); +} + +/************************************************************************* + * IXDP2x00-common PCI init + * + * The IXDP2[48]00 has a horrid PCI bus layout. Basically the board + * contains two NPUs (ingress and egress) connected over PCI, both running + * instances of the kernel. So far so good. Peers on the PCI bus running + * Linux is a common design in telecom systems. The problem is that instead + * of all the devices being controlled by a single host, different + * devices are controlled by different NPUs on the same bus, leading to + * multiple hosts on the bus. The exact bus layout looks like: + * + * Bus 0 + * Master NPU <-------------------+-------------------> Slave NPU + * | + * | + * P2P + * | + * + * Bus 1 | + * <--+------+---------+---------+------+--> + * | | | | | + * | | | | | + * ... Dev PMC Media Eth0 Eth1 ... + * + * The master controls all but Eth1, which is controlled by the + * slave. What this means is that the both the master and the slave + * have to scan the bus, but only one of them can enumerate the bus. + * In addition, after the bus is scanned, each kernel must remove + * the device(s) it does not control from the PCI dev list otherwise + * a driver on each NPU will try to manage it and we will have horrible + * conflicts. Oh..and the slave NPU needs to see the master NPU + * for Intel's drivers to work properly. Closed source drivers... + * + * The way we deal with this is fairly simple but ugly: + * + * 1) Let master scan and enumerate the bus completely. + * 2) Master deletes Eth1 from device list. + * 3) Slave scans bus and then deletes all but Eth1 (Eth0 on slave) + * from device list. + * 4) Find HW designers and LART them. + * + * The boards also do not do normal PCI IRQ routing, or any sort of + * sensical swizzling, so we just need to check where on the bus a + * device sits and figure out to which CPLD pin the interrupt is routed. + * See ixdp2[48]00.c files. + * + *************************************************************************/ +void ixdp2x00_slave_pci_postinit(void) +{ + struct pci_dev *dev; + + /* + * Remove PMC device is there is one + */ + if((dev = pci_get_bus_and_slot(1, IXDP2X00_PMC_DEVFN))) { + pci_stop_and_remove_bus_device(dev); + pci_dev_put(dev); + } + + dev = pci_get_bus_and_slot(0, IXDP2X00_21555_DEVFN); + pci_stop_and_remove_bus_device(dev); + pci_dev_put(dev); +} + +/************************************************************************** + * IXDP2x00 Machine Setup + *************************************************************************/ +static struct flash_platform_data ixdp2x00_platform_data = { + .map_name = "cfi_probe", + .width = 1, +}; + +static struct ixp2000_flash_data ixdp2x00_flash_data = { + .platform_data = &ixdp2x00_platform_data, + .nr_banks = 1 +}; + +static struct resource ixdp2x00_flash_resource = { + .start = 0xc4000000, + .end = 0xc4000000 + 0x00ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device ixdp2x00_flash = { + .name = "IXP2000-Flash", + .id = 0, + .dev = { + .platform_data = &ixdp2x00_flash_data, + }, + .num_resources = 1, + .resource = &ixdp2x00_flash_resource, +}; + +static struct ixp2000_i2c_pins ixdp2x00_i2c_gpio_pins = { + .sda_pin = IXDP2X00_GPIO_SDA, + .scl_pin = IXDP2X00_GPIO_SCL, +}; + +static struct platform_device ixdp2x00_i2c_controller = { + .name = "IXP2000-I2C", + .id = 0, + .dev = { + .platform_data = &ixdp2x00_i2c_gpio_pins, + }, + .num_resources = 0 +}; + +static struct platform_device *ixdp2x00_devices[] __initdata = { + &ixdp2x00_flash, + &ixdp2x00_i2c_controller +}; + +void __init ixdp2x00_init_machine(void) +{ + gpio_line_set(IXDP2X00_GPIO_I2C_ENABLE, 1); + gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT); + + platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices)); + ixp2000_uart_init(); +} + diff --git a/trunk/arch/arm/mach-ixp2000/ixdp2x01.c b/trunk/arch/arm/mach-ixp2000/ixdp2x01.c new file mode 100644 index 000000000000..5196c39cdba4 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/ixdp2x01.c @@ -0,0 +1,483 @@ +/* + * arch/arm/mach-ixp2000/ixdp2x01.c + * + * Code common to Intel IXDP2401 and IXDP2801 platforms + * + * Original Author: Andrzej Mialkowski + * Maintainer: Deepak Saxena + * + * Copyright (C) 2002-2003 Intel Corp. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +/************************************************************************* + * IXDP2x01 IRQ Handling + *************************************************************************/ +static void ixdp2x01_irq_mask(struct irq_data *d) +{ + ixp2000_reg_wrb(IXDP2X01_INT_MASK_SET_REG, + IXP2000_BOARD_IRQ_MASK(d->irq)); +} + +static void ixdp2x01_irq_unmask(struct irq_data *d) +{ + ixp2000_reg_write(IXDP2X01_INT_MASK_CLR_REG, + IXP2000_BOARD_IRQ_MASK(d->irq)); +} + +static u32 valid_irq_mask; + +static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc) +{ + u32 ex_interrupt; + int i; + + desc->irq_data.chip->irq_mask(&desc->irq_data); + + ex_interrupt = *IXDP2X01_INT_STAT_REG & valid_irq_mask; + + if (!ex_interrupt) { + printk(KERN_ERR "Spurious IXDP2X01 CPLD interrupt!\n"); + return; + } + + for (i = 0; i < IXP2000_BOARD_IRQS; i++) { + if (ex_interrupt & (1 << i)) { + int cpld_irq = IXP2000_BOARD_IRQ(0) + i; + generic_handle_irq(cpld_irq); + } + } + + desc->irq_data.chip->irq_unmask(&desc->irq_data); +} + +static struct irq_chip ixdp2x01_irq_chip = { + .irq_mask = ixdp2x01_irq_mask, + .irq_ack = ixdp2x01_irq_mask, + .irq_unmask = ixdp2x01_irq_unmask +}; + +/* + * We only do anything if we are the master NPU on the board. + * The slave NPU only has the ethernet chip going directly to + * the PCIB interrupt input. + */ +void __init ixdp2x01_init_irq(void) +{ + int irq = 0; + + /* initialize chip specific interrupts */ + ixp2000_init_irq(); + + if (machine_is_ixdp2401()) + valid_irq_mask = IXDP2401_VALID_IRQ_MASK; + else + valid_irq_mask = IXDP2801_VALID_IRQ_MASK; + + /* Mask all interrupts from CPLD, disable simulation */ + ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG, 0xffffffff); + ixp2000_reg_wrb(IXDP2X01_INT_SIM_REG, 0); + + for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) { + if (irq & valid_irq_mask) { + irq_set_chip_and_handler(irq, &ixdp2x01_irq_chip, + handle_level_irq); + set_irq_flags(irq, IRQF_VALID); + } else { + set_irq_flags(irq, 0); + } + } + + /* Hook into PCI interrupts */ + irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler); +} + + +/************************************************************************* + * IXDP2x01 memory map + *************************************************************************/ +static struct map_desc ixdp2x01_io_desc __initdata = { + .virtual = IXDP2X01_VIRT_CPLD_BASE, + .pfn = __phys_to_pfn(IXDP2X01_PHYS_CPLD_BASE), + .length = IXDP2X01_CPLD_REGION_SIZE, + .type = MT_DEVICE +}; + +static void __init ixdp2x01_map_io(void) +{ + ixp2000_map_io(); + iotable_init(&ixdp2x01_io_desc, 1); +} + + +/************************************************************************* + * IXDP2x01 serial ports + *************************************************************************/ +static struct plat_serial8250_port ixdp2x01_serial_port1[] = { + { + .mapbase = (unsigned long)IXDP2X01_UART1_PHYS_BASE, + .membase = (char *)IXDP2X01_UART1_VIRT_BASE, + .irq = IRQ_IXDP2X01_UART1, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM32, + .regshift = 2, + .uartclk = IXDP2X01_UART_CLK, + }, + { } +}; + +static struct resource ixdp2x01_uart_resource1 = { + .start = IXDP2X01_UART1_PHYS_BASE, + .end = IXDP2X01_UART1_PHYS_BASE + 0xffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device ixdp2x01_serial_device1 = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM1, + .dev = { + .platform_data = ixdp2x01_serial_port1, + }, + .num_resources = 1, + .resource = &ixdp2x01_uart_resource1, +}; + +static struct plat_serial8250_port ixdp2x01_serial_port2[] = { + { + .mapbase = (unsigned long)IXDP2X01_UART2_PHYS_BASE, + .membase = (char *)IXDP2X01_UART2_VIRT_BASE, + .irq = IRQ_IXDP2X01_UART2, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM32, + .regshift = 2, + .uartclk = IXDP2X01_UART_CLK, + }, + { } +}; + +static struct resource ixdp2x01_uart_resource2 = { + .start = IXDP2X01_UART2_PHYS_BASE, + .end = IXDP2X01_UART2_PHYS_BASE + 0xffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device ixdp2x01_serial_device2 = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM2, + .dev = { + .platform_data = ixdp2x01_serial_port2, + }, + .num_resources = 1, + .resource = &ixdp2x01_uart_resource2, +}; + +static void ixdp2x01_uart_init(void) +{ + platform_device_register(&ixdp2x01_serial_device1); + platform_device_register(&ixdp2x01_serial_device2); +} + + +/************************************************************************* + * IXDP2x01 timer tick configuration + *************************************************************************/ +static unsigned int ixdp2x01_clock; + +static int __init ixdp2x01_clock_setup(char *str) +{ + ixdp2x01_clock = simple_strtoul(str, NULL, 10); + + return 1; +} + +__setup("ixdp2x01_clock=", ixdp2x01_clock_setup); + +static void __init ixdp2x01_timer_init(void) +{ + if (!ixdp2x01_clock) + ixdp2x01_clock = 50000000; + + ixp2000_init_time(ixdp2x01_clock); +} + +static struct sys_timer ixdp2x01_timer = { + .init = ixdp2x01_timer_init, + .offset = ixp2000_gettimeoffset, +}; + +/************************************************************************* + * IXDP2x01 PCI + *************************************************************************/ +void __init ixdp2x01_pci_preinit(void) +{ + ixp2000_reg_write(IXP2000_PCI_ADDR_EXT, 0x00000000); + ixp2000_pci_preinit(); + pcibios_setup("firmware"); +} + +#define DEVPIN(dev, pin) ((pin) | ((dev) << 3)) + +static int __init ixdp2x01_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) +{ + u8 bus = dev->bus->number; + u32 devpin = DEVPIN(PCI_SLOT(dev->devfn), pin); + struct pci_bus *tmp_bus = dev->bus; + + /* Primary bus, no interrupts here */ + if (bus == 0) { + return -1; + } + + /* Lookup first leaf in bus tree */ + while ((tmp_bus->parent != NULL) && (tmp_bus->parent->parent != NULL)) { + tmp_bus = tmp_bus->parent; + } + + /* Select between known bridges */ + switch (tmp_bus->self->devfn | (tmp_bus->self->bus->number << 8)) { + /* Device is located after first MB bridge */ + case 0x0008: + if (tmp_bus == dev->bus) { + /* Device is located directly after first MB bridge */ + switch (devpin) { + case DEVPIN(1, 1): /* Onboard 82546 ch 0 */ + if (machine_is_ixdp2401()) + return IRQ_IXDP2401_INTA_82546; + return -1; + case DEVPIN(1, 2): /* Onboard 82546 ch 1 */ + if (machine_is_ixdp2401()) + return IRQ_IXDP2401_INTB_82546; + return -1; + case DEVPIN(0, 1): /* PMC INTA# */ + return IRQ_IXDP2X01_SPCI_PMC_INTA; + case DEVPIN(0, 2): /* PMC INTB# */ + return IRQ_IXDP2X01_SPCI_PMC_INTB; + case DEVPIN(0, 3): /* PMC INTC# */ + return IRQ_IXDP2X01_SPCI_PMC_INTC; + case DEVPIN(0, 4): /* PMC INTD# */ + return IRQ_IXDP2X01_SPCI_PMC_INTD; + } + } + break; + case 0x0010: + if (tmp_bus == dev->bus) { + /* Device is located directly after second MB bridge */ + /* Secondary bus of second bridge */ + switch (devpin) { + case DEVPIN(0, 1): /* DB#0 */ + return IRQ_IXDP2X01_SPCI_DB_0; + case DEVPIN(1, 1): /* DB#1 */ + return IRQ_IXDP2X01_SPCI_DB_1; + } + } else { + /* Device is located indirectly after second MB bridge */ + /* Not supported now */ + } + break; + } + + return -1; +} + + +static int ixdp2x01_pci_setup(int nr, struct pci_sys_data *sys) +{ + sys->mem_offset = 0xe0000000; + + if (machine_is_ixdp2801() || machine_is_ixdp28x5()) + sys->mem_offset -= ((*IXP2000_PCI_ADDR_EXT & 0xE000) << 16); + + return ixp2000_pci_setup(nr, sys); +} + +struct hw_pci ixdp2x01_pci __initdata = { + .nr_controllers = 1, + .setup = ixdp2x01_pci_setup, + .preinit = ixdp2x01_pci_preinit, + .scan = ixp2000_pci_scan_bus, + .map_irq = ixdp2x01_pci_map_irq, +}; + +int __init ixdp2x01_pci_init(void) +{ + if (machine_is_ixdp2401() || machine_is_ixdp2801() ||\ + machine_is_ixdp28x5()) + pci_common_init(&ixdp2x01_pci); + + return 0; +} + +subsys_initcall(ixdp2x01_pci_init); + +/************************************************************************* + * IXDP2x01 Machine Initialization + *************************************************************************/ +static struct flash_platform_data ixdp2x01_flash_platform_data = { + .map_name = "cfi_probe", + .width = 1, +}; + +static unsigned long ixdp2x01_flash_bank_setup(unsigned long ofs) +{ + ixp2000_reg_wrb(IXDP2X01_CPLD_FLASH_REG, + ((ofs >> IXDP2X01_FLASH_WINDOW_BITS) | IXDP2X01_CPLD_FLASH_INTERN)); + return (ofs & IXDP2X01_FLASH_WINDOW_MASK); +} + +static struct ixp2000_flash_data ixdp2x01_flash_data = { + .platform_data = &ixdp2x01_flash_platform_data, + .bank_setup = ixdp2x01_flash_bank_setup +}; + +static struct resource ixdp2x01_flash_resource = { + .start = 0xc4000000, + .end = 0xc4000000 + 0x01ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device ixdp2x01_flash = { + .name = "IXP2000-Flash", + .id = 0, + .dev = { + .platform_data = &ixdp2x01_flash_data, + }, + .num_resources = 1, + .resource = &ixdp2x01_flash_resource, +}; + +static struct ixp2000_i2c_pins ixdp2x01_i2c_gpio_pins = { + .sda_pin = IXDP2X01_GPIO_SDA, + .scl_pin = IXDP2X01_GPIO_SCL, +}; + +static struct platform_device ixdp2x01_i2c_controller = { + .name = "IXP2000-I2C", + .id = 0, + .dev = { + .platform_data = &ixdp2x01_i2c_gpio_pins, + }, + .num_resources = 0 +}; + +static struct platform_device *ixdp2x01_devices[] __initdata = { + &ixdp2x01_flash, + &ixdp2x01_i2c_controller +}; + +static void __init ixdp2x01_init_machine(void) +{ + ixp2000_reg_wrb(IXDP2X01_CPLD_FLASH_REG, + (IXDP2X01_CPLD_FLASH_BANK_MASK | IXDP2X01_CPLD_FLASH_INTERN)); + + ixdp2x01_flash_data.nr_banks = + ((*IXDP2X01_CPLD_FLASH_REG & IXDP2X01_CPLD_FLASH_BANK_MASK) + 1); + + platform_add_devices(ixdp2x01_devices, ARRAY_SIZE(ixdp2x01_devices)); + ixp2000_uart_init(); + ixdp2x01_uart_init(); +} + +static void ixdp2401_restart(char mode, const char *cmd) +{ + /* + * Reset flash banking register so that we are pointing at + * RedBoot bank. + */ + ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG, + ((0 >> IXDP2X01_FLASH_WINDOW_BITS) + | IXDP2X01_CPLD_FLASH_INTERN)); + ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff); + + ixp2000_restart(mode, cmd); +} + +static void ixdp280x_restart(char mode, const char *cmd) +{ + /* + * On IXDP2801 we need to write this magic sequence to the CPLD + * to cause a complete reset of the CPU and all external devices + * and move the flash bank register back to 0. + */ + unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG; + + reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF); + ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg); + ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000); + + ixp2000_restart(mode, cmd); +} + +#ifdef CONFIG_ARCH_IXDP2401 +MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform") + /* Maintainer: MontaVista Software, Inc. */ + .atag_offset = 0x100, + .map_io = ixdp2x01_map_io, + .init_irq = ixdp2x01_init_irq, + .timer = &ixdp2x01_timer, + .init_machine = ixdp2x01_init_machine, + .restart = ixdp2401_restart, +MACHINE_END +#endif + +#ifdef CONFIG_ARCH_IXDP2801 +MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform") + /* Maintainer: MontaVista Software, Inc. */ + .atag_offset = 0x100, + .map_io = ixdp2x01_map_io, + .init_irq = ixdp2x01_init_irq, + .timer = &ixdp2x01_timer, + .init_machine = ixdp2x01_init_machine, + .restart = ixdp280x_restart, +MACHINE_END + +/* + * IXDP28x5 is basically an IXDP2801 with a different CPU but Intel + * changed the machine ID in the bootloader + */ +MACHINE_START(IXDP28X5, "Intel IXDP2805/2855 Development Platform") + /* Maintainer: MontaVista Software, Inc. */ + .atag_offset = 0x100, + .map_io = ixdp2x01_map_io, + .init_irq = ixdp2x01_init_irq, + .timer = &ixdp2x01_timer, + .init_machine = ixdp2x01_init_machine, + .restart = ixdp280x_restart, +MACHINE_END +#endif + + diff --git a/trunk/arch/arm/mach-ixp2000/pci.c b/trunk/arch/arm/mach-ixp2000/pci.c new file mode 100644 index 000000000000..9c02de932fac --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/pci.c @@ -0,0 +1,252 @@ +/* + * arch/arm/mach-ixp2000/pci.c + * + * PCI routines for IXDP2400/IXDP2800 boards + * + * Original Author: Naeem Afzal + * Maintained by: Deepak Saxena + * + * Copyright 2002 Intel Corp. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +static volatile int pci_master_aborts = 0; + +static int clear_master_aborts(void); + +u32 * +ixp2000_pci_config_addr(unsigned int bus_nr, unsigned int devfn, int where) +{ + u32 *paddress; + + if (PCI_SLOT(devfn) > 7) + return 0; + + /* Must be dword aligned */ + where &= ~3; + + /* + * For top bus, generate type 0, else type 1 + */ + if (!bus_nr) { + /* only bits[23:16] are used for IDSEL */ + paddress = (u32 *) (IXP2000_PCI_CFG0_VIRT_BASE + | (1 << (PCI_SLOT(devfn) + 16)) + | (PCI_FUNC(devfn) << 8) | where); + } else { + paddress = (u32 *) (IXP2000_PCI_CFG1_VIRT_BASE + | (bus_nr << 16) + | (PCI_SLOT(devfn) << 11) + | (PCI_FUNC(devfn) << 8) | where); + } + + return paddress; +} + +/* + * Mask table, bits to mask for quantity of size 1, 2 or 4 bytes. + * 0 and 3 are not valid indexes... + */ +static u32 bytemask[] = { + /*0*/ 0, + /*1*/ 0xff, + /*2*/ 0xffff, + /*3*/ 0, + /*4*/ 0xffffffff, +}; + + +int ixp2000_pci_read_config(struct pci_bus *bus, unsigned int devfn, int where, + int size, u32 *value) +{ + u32 n; + u32 *addr; + + n = where % 4; + + addr = ixp2000_pci_config_addr(bus->number, devfn, where); + if (!addr) + return PCIBIOS_DEVICE_NOT_FOUND; + + pci_master_aborts = 0; + *value = (*addr >> (8*n)) & bytemask[size]; + if (pci_master_aborts) { + pci_master_aborts = 0; + *value = 0xffffffff; + return PCIBIOS_DEVICE_NOT_FOUND; + } + + return PCIBIOS_SUCCESSFUL; +} + +/* + * We don't do error checks by calling clear_master_aborts() b/c the + * assumption is that the caller did a read first to make sure a device + * exists. + */ +int ixp2000_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where, + int size, u32 value) +{ + u32 mask; + u32 *addr; + u32 temp; + + mask = ~(bytemask[size] << ((where % 0x4) * 8)); + addr = ixp2000_pci_config_addr(bus->number, devfn, where); + if (!addr) + return PCIBIOS_DEVICE_NOT_FOUND; + temp = (u32) (value) << ((where % 0x4) * 8); + *addr = (*addr & mask) | temp; + + clear_master_aborts(); + + return PCIBIOS_SUCCESSFUL; +} + + +static struct pci_ops ixp2000_pci_ops = { + .read = ixp2000_pci_read_config, + .write = ixp2000_pci_write_config +}; + +struct pci_bus *ixp2000_pci_scan_bus(int nr, struct pci_sys_data *sysdata) +{ + return pci_scan_root_bus(NULL, sysdata->busnr, &ixp2000_pci_ops, + sysdata, &sysdata->resources); +} + + +int ixp2000_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs) +{ + + volatile u32 temp; + unsigned long flags; + + pci_master_aborts = 1; + + local_irq_save(flags); + temp = *(IXP2000_PCI_CONTROL); + if (temp & ((1 << 8) | (1 << 5))) { + ixp2000_reg_wrb(IXP2000_PCI_CONTROL, temp); + } + + temp = *(IXP2000_PCI_CMDSTAT); + if (temp & (1 << 29)) { + while (temp & (1 << 29)) { + ixp2000_reg_write(IXP2000_PCI_CMDSTAT, temp); + temp = *(IXP2000_PCI_CMDSTAT); + } + } + local_irq_restore(flags); + + /* + * If it was an imprecise abort, then we need to correct the + * return address to be _after_ the instruction. + */ + if (fsr & (1 << 10)) + regs->ARM_pc += 4; + + return 0; +} + +int +clear_master_aborts(void) +{ + volatile u32 temp; + unsigned long flags; + + local_irq_save(flags); + temp = *(IXP2000_PCI_CONTROL); + if (temp & ((1 << 8) | (1 << 5))) { + ixp2000_reg_wrb(IXP2000_PCI_CONTROL, temp); + } + + temp = *(IXP2000_PCI_CMDSTAT); + if (temp & (1 << 29)) { + while (temp & (1 << 29)) { + ixp2000_reg_write(IXP2000_PCI_CMDSTAT, temp); + temp = *(IXP2000_PCI_CMDSTAT); + } + } + local_irq_restore(flags); + + return 0; +} + +void __init +ixp2000_pci_preinit(void) +{ + pci_set_flags(0); + + pcibios_min_io = 0; + pcibios_min_mem = 0; + +#ifndef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO + /* + * Configure the PCI unit to properly byteswap I/O transactions, + * and verify that it worked. + */ + ixp2000_reg_write(IXP2000_PCI_CONTROL, + (*IXP2000_PCI_CONTROL | PCI_CONTROL_IEE)); + + if ((*IXP2000_PCI_CONTROL & PCI_CONTROL_IEE) == 0) + panic("IXP2000: PCI I/O is broken on this ixp model, and " + "the needed workaround has not been configured in"); +#endif + + hook_fault_code(16+6, ixp2000_pci_abort_handler, SIGBUS, 0, + "PCI config cycle to non-existent device"); +} + + +/* + * IXP2000 systems often have large resource requirements, so we just + * use our own resource space. + */ +static struct resource ixp2000_pci_mem_space = { + .start = 0xe0000000, + .end = 0xffffffff, + .flags = IORESOURCE_MEM, + .name = "PCI Mem Space" +}; + +static struct resource ixp2000_pci_io_space = { + .start = 0x00010000, + .end = 0x0001ffff, + .flags = IORESOURCE_IO, + .name = "PCI I/O Space" +}; + +int ixp2000_pci_setup(int nr, struct pci_sys_data *sys) +{ + if (nr >= 1) + return 0; + + pci_add_resource_offset(&sys->resources, + &ixp2000_pci_io_space, sys->io_offset); + pci_add_resource_offset(&sys->resources, + &ixp2000_pci_mem_space, sys->mem_offset); + + return 1; +} + diff --git a/trunk/arch/arm/mach-ixp23xx/Kconfig b/trunk/arch/arm/mach-ixp23xx/Kconfig new file mode 100644 index 000000000000..982670ec3866 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/Kconfig @@ -0,0 +1,25 @@ +if ARCH_IXP23XX + +config ARCH_SUPPORTS_BIG_ENDIAN + bool + default y + +menu "Intel IXP23xx Implementation Options" + +comment "IXP23xx Platforms" + +config MACH_ESPRESSO + bool "Support IP Fabrics Double Espresso platform" + help + +config MACH_IXDP2351 + bool "Support Intel IXDP2351 platform" + help + +config MACH_ROADRUNNER + bool "Support ADI RoadRunner platform" + help + +endmenu + +endif diff --git a/trunk/arch/arm/mach-ixp23xx/Makefile b/trunk/arch/arm/mach-ixp23xx/Makefile new file mode 100644 index 000000000000..288b371b6d03 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/Makefile @@ -0,0 +1,11 @@ +# +# Makefile for the linux kernel. +# +obj-y := core.o pci.o +obj-m := +obj-n := +obj- := + +obj-$(CONFIG_MACH_ESPRESSO) += espresso.o +obj-$(CONFIG_MACH_IXDP2351) += ixdp2351.o +obj-$(CONFIG_MACH_ROADRUNNER) += roadrunner.o diff --git a/trunk/arch/arm/mach-ixp23xx/Makefile.boot b/trunk/arch/arm/mach-ixp23xx/Makefile.boot new file mode 100644 index 000000000000..44fb4a717c3f --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/Makefile.boot @@ -0,0 +1,2 @@ + zreladdr-y += 0x00008000 +params_phys-y := 0x00000100 diff --git a/trunk/arch/arm/mach-ixp23xx/core.c b/trunk/arch/arm/mach-ixp23xx/core.c new file mode 100644 index 000000000000..d34542425990 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/core.c @@ -0,0 +1,455 @@ +/* + * arch/arm/mach-ixp23xx/core.c + * + * Core routines for IXP23xx chips + * + * Author: Deepak Saxena + * + * Copyright 2005 (c) MontaVista Software, Inc. + * + * Based on 2.4 code Copyright 2004 (c) Intel Corporation + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + + +/************************************************************************* + * Chip specific mappings shared by all IXP23xx systems + *************************************************************************/ +static struct map_desc ixp23xx_io_desc[] __initdata = { + { /* XSI-CPP CSRs */ + .virtual = IXP23XX_XSI2CPP_CSR_VIRT, + .pfn = __phys_to_pfn(IXP23XX_XSI2CPP_CSR_PHYS), + .length = IXP23XX_XSI2CPP_CSR_SIZE, + .type = MT_DEVICE, + }, { /* Expansion Bus Config */ + .virtual = IXP23XX_EXP_CFG_VIRT, + .pfn = __phys_to_pfn(IXP23XX_EXP_CFG_PHYS), + .length = IXP23XX_EXP_CFG_SIZE, + .type = MT_DEVICE, + }, { /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACS,.... */ + .virtual = IXP23XX_PERIPHERAL_VIRT, + .pfn = __phys_to_pfn(IXP23XX_PERIPHERAL_PHYS), + .length = IXP23XX_PERIPHERAL_SIZE, + .type = MT_DEVICE, + }, { /* CAP CSRs */ + .virtual = IXP23XX_CAP_CSR_VIRT, + .pfn = __phys_to_pfn(IXP23XX_CAP_CSR_PHYS), + .length = IXP23XX_CAP_CSR_SIZE, + .type = MT_DEVICE, + }, { /* MSF CSRs */ + .virtual = IXP23XX_MSF_CSR_VIRT, + .pfn = __phys_to_pfn(IXP23XX_MSF_CSR_PHYS), + .length = IXP23XX_MSF_CSR_SIZE, + .type = MT_DEVICE, + }, { /* PCI I/O Space */ + .virtual = IXP23XX_PCI_IO_VIRT, + .pfn = __phys_to_pfn(IXP23XX_PCI_IO_PHYS), + .length = IXP23XX_PCI_IO_SIZE, + .type = MT_DEVICE, + }, { /* PCI Config Space */ + .virtual = IXP23XX_PCI_CFG_VIRT, + .pfn = __phys_to_pfn(IXP23XX_PCI_CFG_PHYS), + .length = IXP23XX_PCI_CFG_SIZE, + .type = MT_DEVICE, + }, { /* PCI local CFG CSRs */ + .virtual = IXP23XX_PCI_CREG_VIRT, + .pfn = __phys_to_pfn(IXP23XX_PCI_CREG_PHYS), + .length = IXP23XX_PCI_CREG_SIZE, + .type = MT_DEVICE, + }, { /* PCI MEM Space */ + .virtual = IXP23XX_PCI_MEM_VIRT, + .pfn = __phys_to_pfn(IXP23XX_PCI_MEM_PHYS), + .length = IXP23XX_PCI_MEM_SIZE, + .type = MT_DEVICE, + } +}; + +void __init ixp23xx_map_io(void) +{ + iotable_init(ixp23xx_io_desc, ARRAY_SIZE(ixp23xx_io_desc)); +} + + +/*************************************************************************** + * IXP23xx Interrupt Handling + ***************************************************************************/ +enum ixp23xx_irq_type { + IXP23XX_IRQ_LEVEL, IXP23XX_IRQ_EDGE +}; + +static void ixp23xx_config_irq(unsigned int, enum ixp23xx_irq_type); + +static int ixp23xx_irq_set_type(struct irq_data *d, unsigned int type) +{ + int line = d->irq - IRQ_IXP23XX_GPIO6 + 6; + u32 int_style; + enum ixp23xx_irq_type irq_type; + volatile u32 *int_reg; + + /* + * Only GPIOs 6-15 are wired to interrupts on IXP23xx + */ + if (line < 6 || line > 15) + return -EINVAL; + + switch (type) { + case IRQ_TYPE_EDGE_BOTH: + int_style = IXP23XX_GPIO_STYLE_TRANSITIONAL; + irq_type = IXP23XX_IRQ_EDGE; + break; + case IRQ_TYPE_EDGE_RISING: + int_style = IXP23XX_GPIO_STYLE_RISING_EDGE; + irq_type = IXP23XX_IRQ_EDGE; + break; + case IRQ_TYPE_EDGE_FALLING: + int_style = IXP23XX_GPIO_STYLE_FALLING_EDGE; + irq_type = IXP23XX_IRQ_EDGE; + break; + case IRQ_TYPE_LEVEL_HIGH: + int_style = IXP23XX_GPIO_STYLE_ACTIVE_HIGH; + irq_type = IXP23XX_IRQ_LEVEL; + break; + case IRQ_TYPE_LEVEL_LOW: + int_style = IXP23XX_GPIO_STYLE_ACTIVE_LOW; + irq_type = IXP23XX_IRQ_LEVEL; + break; + default: + return -EINVAL; + } + + ixp23xx_config_irq(d->irq, irq_type); + + if (line >= 8) { /* pins 8-15 */ + line -= 8; + int_reg = (volatile u32 *)IXP23XX_GPIO_GPIT2R; + } else { /* pins 0-7 */ + int_reg = (volatile u32 *)IXP23XX_GPIO_GPIT1R; + } + + /* + * Clear pending interrupts + */ + *IXP23XX_GPIO_GPISR = (1 << line); + + /* Clear the style for the appropriate pin */ + *int_reg &= ~(IXP23XX_GPIO_STYLE_MASK << + (line * IXP23XX_GPIO_STYLE_SIZE)); + + /* Set the new style */ + *int_reg |= (int_style << (line * IXP23XX_GPIO_STYLE_SIZE)); + + return 0; +} + +static void ixp23xx_irq_mask(struct irq_data *d) +{ + volatile unsigned long *intr_reg; + unsigned int irq = d->irq; + + if (irq >= 56) + irq += 8; + + intr_reg = IXP23XX_INTR_EN1 + (irq / 32); + *intr_reg &= ~(1 << (irq % 32)); +} + +static void ixp23xx_irq_ack(struct irq_data *d) +{ + int line = d->irq - IRQ_IXP23XX_GPIO6 + 6; + + if ((line < 6) || (line > 15)) + return; + + *IXP23XX_GPIO_GPISR = (1 << line); +} + +/* + * Level triggered interrupts on GPIO lines can only be cleared when the + * interrupt condition disappears. + */ +static void ixp23xx_irq_level_unmask(struct irq_data *d) +{ + volatile unsigned long *intr_reg; + unsigned int irq = d->irq; + + ixp23xx_irq_ack(d); + + if (irq >= 56) + irq += 8; + + intr_reg = IXP23XX_INTR_EN1 + (irq / 32); + *intr_reg |= (1 << (irq % 32)); +} + +static void ixp23xx_irq_edge_unmask(struct irq_data *d) +{ + volatile unsigned long *intr_reg; + unsigned int irq = d->irq; + + if (irq >= 56) + irq += 8; + + intr_reg = IXP23XX_INTR_EN1 + (irq / 32); + *intr_reg |= (1 << (irq % 32)); +} + +static struct irq_chip ixp23xx_irq_level_chip = { + .irq_ack = ixp23xx_irq_mask, + .irq_mask = ixp23xx_irq_mask, + .irq_unmask = ixp23xx_irq_level_unmask, + .irq_set_type = ixp23xx_irq_set_type +}; + +static struct irq_chip ixp23xx_irq_edge_chip = { + .irq_ack = ixp23xx_irq_ack, + .irq_mask = ixp23xx_irq_mask, + .irq_unmask = ixp23xx_irq_edge_unmask, + .irq_set_type = ixp23xx_irq_set_type +}; + +static void ixp23xx_pci_irq_mask(struct irq_data *d) +{ + unsigned int irq = d->irq; + + *IXP23XX_PCI_XSCALE_INT_ENABLE &= ~(1 << (IRQ_IXP23XX_INTA + 27 - irq)); +} + +static void ixp23xx_pci_irq_unmask(struct irq_data *d) +{ + unsigned int irq = d->irq; + + *IXP23XX_PCI_XSCALE_INT_ENABLE |= (1 << (IRQ_IXP23XX_INTA + 27 - irq)); +} + +/* + * TODO: Should this just be done at ASM level? + */ +static void pci_handler(unsigned int irq, struct irq_desc *desc) +{ + u32 pci_interrupt; + unsigned int irqno; + + pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS; + + desc->irq_data.chip->irq_ack(&desc->irq_data); + + /* See which PCI_INTA, or PCI_INTB interrupted */ + if (pci_interrupt & (1 << 26)) { + irqno = IRQ_IXP23XX_INTB; + } else if (pci_interrupt & (1 << 27)) { + irqno = IRQ_IXP23XX_INTA; + } else { + BUG(); + } + + generic_handle_irq(irqno); + + desc->irq_data.chip->irq_unmask(&desc->irq_data); +} + +static struct irq_chip ixp23xx_pci_irq_chip = { + .irq_ack = ixp23xx_pci_irq_mask, + .irq_mask = ixp23xx_pci_irq_mask, + .irq_unmask = ixp23xx_pci_irq_unmask +}; + +static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type) +{ + switch (type) { + case IXP23XX_IRQ_LEVEL: + irq_set_chip_and_handler(irq, &ixp23xx_irq_level_chip, + handle_level_irq); + break; + case IXP23XX_IRQ_EDGE: + irq_set_chip_and_handler(irq, &ixp23xx_irq_edge_chip, + handle_edge_irq); + break; + } + set_irq_flags(irq, IRQF_VALID); +} + +void __init ixp23xx_init_irq(void) +{ + int irq; + + /* Route everything to IRQ */ + *IXP23XX_INTR_SEL1 = 0x0; + *IXP23XX_INTR_SEL2 = 0x0; + *IXP23XX_INTR_SEL3 = 0x0; + *IXP23XX_INTR_SEL4 = 0x0; + + /* Mask all sources */ + *IXP23XX_INTR_EN1 = 0x0; + *IXP23XX_INTR_EN2 = 0x0; + *IXP23XX_INTR_EN3 = 0x0; + *IXP23XX_INTR_EN4 = 0x0; + + /* + * Configure all IRQs for level-sensitive operation + */ + for (irq = 0; irq <= NUM_IXP23XX_RAW_IRQS; irq++) { + ixp23xx_config_irq(irq, IXP23XX_IRQ_LEVEL); + } + + for (irq = IRQ_IXP23XX_INTA; irq <= IRQ_IXP23XX_INTB; irq++) { + irq_set_chip_and_handler(irq, &ixp23xx_pci_irq_chip, + handle_level_irq); + set_irq_flags(irq, IRQF_VALID); + } + + irq_set_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler); +} + + +/************************************************************************* + * Timer-tick functions for IXP23xx + *************************************************************************/ +#define CLOCK_TICKS_PER_USEC (CLOCK_TICK_RATE / USEC_PER_SEC) + +static unsigned long next_jiffy_time; + +static unsigned long +ixp23xx_gettimeoffset(void) +{ + unsigned long elapsed; + + elapsed = *IXP23XX_TIMER_CONT - (next_jiffy_time - LATCH); + + return elapsed / CLOCK_TICKS_PER_USEC; +} + +static irqreturn_t +ixp23xx_timer_interrupt(int irq, void *dev_id) +{ + /* Clear Pending Interrupt by writing '1' to it */ + *IXP23XX_TIMER_STATUS = IXP23XX_TIMER1_INT_PEND; + while ((signed long)(*IXP23XX_TIMER_CONT - next_jiffy_time) >= LATCH) { + timer_tick(); + next_jiffy_time += LATCH; + } + + return IRQ_HANDLED; +} + +static struct irqaction ixp23xx_timer_irq = { + .name = "IXP23xx Timer Tick", + .handler = ixp23xx_timer_interrupt, + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, +}; + +void __init ixp23xx_init_timer(void) +{ + /* Clear Pending Interrupt by writing '1' to it */ + *IXP23XX_TIMER_STATUS = IXP23XX_TIMER1_INT_PEND; + + /* Setup the Timer counter value */ + *IXP23XX_TIMER1_RELOAD = + (LATCH & ~IXP23XX_TIMER_RELOAD_MASK) | IXP23XX_TIMER_ENABLE; + + *IXP23XX_TIMER_CONT = 0; + next_jiffy_time = LATCH; + + /* Connect the interrupt handler and enable the interrupt */ + setup_irq(IRQ_IXP23XX_TIMER1, &ixp23xx_timer_irq); +} + +struct sys_timer ixp23xx_timer = { + .init = ixp23xx_init_timer, + .offset = ixp23xx_gettimeoffset, +}; + + +/************************************************************************* + * IXP23xx Platform Initialization + *************************************************************************/ +static struct resource ixp23xx_uart_resources[] = { + { + .start = IXP23XX_UART1_PHYS, + .end = IXP23XX_UART1_PHYS + 0x0fff, + .flags = IORESOURCE_MEM + }, { + .start = IXP23XX_UART2_PHYS, + .end = IXP23XX_UART2_PHYS + 0x0fff, + .flags = IORESOURCE_MEM + } +}; + +static struct plat_serial8250_port ixp23xx_uart_data[] = { + { + .mapbase = IXP23XX_UART1_PHYS, + .membase = (char *)(IXP23XX_UART1_VIRT + 3), + .irq = IRQ_IXP23XX_UART1, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = IXP23XX_UART_XTAL, + }, { + .mapbase = IXP23XX_UART2_PHYS, + .membase = (char *)(IXP23XX_UART2_VIRT + 3), + .irq = IRQ_IXP23XX_UART2, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = IXP23XX_UART_XTAL, + }, + { }, +}; + +static struct platform_device ixp23xx_uart = { + .name = "serial8250", + .id = 0, + .dev.platform_data = ixp23xx_uart_data, + .num_resources = 2, + .resource = ixp23xx_uart_resources, +}; + +static struct platform_device *ixp23xx_devices[] __initdata = { + &ixp23xx_uart, +}; + +void __init ixp23xx_sys_init(void) +{ + /* by default, the idle code is disabled */ + disable_hlt(); + + *IXP23XX_EXP_UNIT_FUSE |= 0xf; + platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); +} + +void ixp23xx_restart(char mode, const char *cmd) +{ + /* Use on-chip reset capability */ + *IXP23XX_RESET0 |= IXP23XX_RST_ALL; +} diff --git a/trunk/arch/arm/mach-ixp23xx/espresso.c b/trunk/arch/arm/mach-ixp23xx/espresso.c new file mode 100644 index 000000000000..d142d45dea12 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/espresso.c @@ -0,0 +1,93 @@ +/* + * arch/arm/mach-ixp23xx/espresso.c + * + * Double Espresso-specific routines + * + * Author: Lennert Buytenhek + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +static int __init espresso_pci_init(void) +{ + if (machine_is_espresso()) + ixp23xx_pci_slave_init(); + + return 0; +}; +subsys_initcall(espresso_pci_init); + +static struct physmap_flash_data espresso_flash_data = { + .width = 2, +}; + +static struct resource espresso_flash_resource = { + .start = 0x90000000, + .end = 0x91ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device espresso_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &espresso_flash_data, + }, + .num_resources = 1, + .resource = &espresso_flash_resource, +}; + +static void __init espresso_init(void) +{ + platform_device_register(&espresso_flash); + + /* + * Mark flash as writeable. + */ + IXP23XX_EXP_CS0[0] |= IXP23XX_FLASH_WRITABLE; + IXP23XX_EXP_CS0[1] |= IXP23XX_FLASH_WRITABLE; + + ixp23xx_sys_init(); +} + +MACHINE_START(ESPRESSO, "IP Fabrics Double Espresso") + /* Maintainer: Lennert Buytenhek */ + .map_io = ixp23xx_map_io, + .init_irq = ixp23xx_init_irq, + .timer = &ixp23xx_timer, + .atag_offset = 0x100, + .init_machine = espresso_init, + .restart = ixp23xx_restart, +MACHINE_END diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/debug-macro.S b/trunk/arch/arm/mach-ixp23xx/include/mach/debug-macro.S new file mode 100644 index 000000000000..5ff524c13744 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/debug-macro.S @@ -0,0 +1,25 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include + + .macro addruart, rp, rv, tmp + ldr \rp, =IXP23XX_PERIPHERAL_PHYS @ physical + ldr \rv, =IXP23XX_PERIPHERAL_VIRT @ virtual +#ifdef __ARMEB__ + orr \rp, \rp, #0x00000003 + orr \rv, \rv, #0x00000003 +#endif + .endm + +#define UART_SHIFT 2 +#include diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/entry-macro.S b/trunk/arch/arm/mach-ixp23xx/include/mach/entry-macro.S new file mode 100644 index 000000000000..3fd2cb984e42 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/entry-macro.S @@ -0,0 +1,31 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/entry-macro.S + */ + + .macro get_irqnr_preamble, base, tmp + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) + ldr \irqnr, [\irqnr] @ get interrupt number + cmp \irqnr, #0x0 @ spurious interrupt ? + movne \irqnr, \irqnr, lsr #2 @ skip unwanted low order bits + subne \irqnr, \irqnr, #1 @ convert to 0 based + +#if 0 + cmp \irqnr, #IRQ_IXP23XX_PCI_INT_RPH + bne 1001f + mov \irqnr, #IRQ_IXP23XX_INTA + + ldr \irqnr, =0xf5000030 + + mov \tmp, #(1<<26) + tst \irqnr, \tmp + movne \irqnr, #IRQ_IXP23XX_INTB + + mov \tmp, #(1<<27) + tst \irqnr, \tmp + movne \irqnr, #IRQ_IXP23XX_INTA +1001: +#endif + .endm diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/hardware.h b/trunk/arch/arm/mach-ixp23xx/include/mach/hardware.h new file mode 100644 index 000000000000..60e55fa10238 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/hardware.h @@ -0,0 +1,32 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/hardware.h + * + * Copyright (C) 2002-2004 Intel Corporation. + * Copyricht (C) 2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Hardware definitions for IXP23XX based systems + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +/* PCI IO info */ + +#include "ixp23xx.h" + +/* + * Platform helper functions + */ +#include "platform.h" + +/* + * Platform-specific headers + */ +#include "ixdp2351.h" + + +#endif diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/io.h b/trunk/arch/arm/mach-ixp23xx/include/mach/io.h new file mode 100644 index 000000000000..a7aceb55c130 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/io.h @@ -0,0 +1,22 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/io.h + * + * Original Author: Naeem M Afzal + * Maintainer: Deepak Saxena + * + * Copyright (C) 2003-2005 Intel Corp. + * Copyright (C) 2005 MontaVista Software, Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_IO_H +#define __ASM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffffffff + +#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT)) + +#endif diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/irqs.h b/trunk/arch/arm/mach-ixp23xx/include/mach/irqs.h new file mode 100644 index 000000000000..3af33a04b8a2 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/irqs.h @@ -0,0 +1,223 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/irqs.h + * + * IRQ definitions for IXP23XX based systems + * + * Author: Naeem Afzal + * + * Copyright (C) 2003-2004 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H + +#define NR_IXP23XX_IRQS IRQ_IXP23XX_INTB+1 +#define IRQ_IXP23XX_EXTIRQS NR_IXP23XX_IRQS + + +#define IRQ_IXP23XX_DBG0 0 /* Debug/Execution/MBox */ +#define IRQ_IXP23XX_DBG1 1 /* Debug/Execution/MBox */ +#define IRQ_IXP23XX_NPE_TRG 2 /* npe_trigger */ +#define IRQ_IXP23XX_TIMER1 3 /* Timer[0] */ +#define IRQ_IXP23XX_TIMER2 4 /* Timer[1] */ +#define IRQ_IXP23XX_TIMESTAMP 5 /* Timer[2], Time-stamp */ +#define IRQ_IXP23XX_WDOG 6 /* Time[3], Watchdog Timer */ +#define IRQ_IXP23XX_PCI_DBELL 7 /* PCI Doorbell */ +#define IRQ_IXP23XX_PCI_DMA1 8 /* PCI DMA Channel 1 */ +#define IRQ_IXP23XX_PCI_DMA2 9 /* PCI DMA Channel 2 */ +#define IRQ_IXP23XX_PCI_DMA3 10 /* PCI DMA Channel 3 */ +#define IRQ_IXP23XX_PCI_INT_RPH 11 /* pcxg_pci_int_rph */ +#define IRQ_IXP23XX_CPP_PMU 12 /* xpxg_pm_int_rpl */ +#define IRQ_IXP23XX_SWINT0 13 /* S/W Interrupt0 */ +#define IRQ_IXP23XX_SWINT1 14 /* S/W Interrupt1 */ +#define IRQ_IXP23XX_UART2 15 /* UART1 Interrupt */ +#define IRQ_IXP23XX_UART1 16 /* UART0 Interrupt */ +#define IRQ_IXP23XX_XSI_PMU_ROLLOVER 17 /* AHB Performance M. Unit counter rollover */ +#define IRQ_IXP23XX_XSI_AHB_PM0 18 /* intr_pm_o */ +#define IRQ_IXP23XX_XSI_AHB_ECE0 19 /* intr_ece_o */ +#define IRQ_IXP23XX_XSI_AHB_GASKET 20 /* gas_intr_o */ +#define IRQ_IXP23XX_XSI_CPP 21 /* xsi2cpp_int */ +#define IRQ_IXP23XX_CPP_XSI 22 /* cpp2xsi_int */ +#define IRQ_IXP23XX_ME_ATTN0 23 /* ME_ATTN */ +#define IRQ_IXP23XX_ME_ATTN1 24 /* ME_ATTN */ +#define IRQ_IXP23XX_ME_ATTN2 25 /* ME_ATTN */ +#define IRQ_IXP23XX_ME_ATTN3 26 /* ME_ATTN */ +#define IRQ_IXP23XX_PCI_ERR_RPH 27 /* PCXG_PCI_ERR_RPH */ +#define IRQ_IXP23XX_D0XG_ECC_CORR 28 /* D0XG_DRAM_ECC_CORR */ +#define IRQ_IXP23XX_D0XG_ECC_UNCORR 29 /* D0XG_DRAM_ECC_UNCORR */ +#define IRQ_IXP23XX_SRAM_ERR1 30 /* SRAM1_ERR */ +#define IRQ_IXP23XX_SRAM_ERR0 31 /* SRAM0_ERR */ +#define IRQ_IXP23XX_MEDIA_ERR 32 /* MEDIA_ERR */ +#define IRQ_IXP23XX_STH_DRAM_ECC_MAJ 33 /* STH_DRAM0_ECC_MAJ */ +#define IRQ_IXP23XX_GPIO6 34 /* GPIO0 interrupts */ +#define IRQ_IXP23XX_GPIO7 35 /* GPIO1 interrupts */ +#define IRQ_IXP23XX_GPIO8 36 /* GPIO2 interrupts */ +#define IRQ_IXP23XX_GPIO9 37 /* GPIO3 interrupts */ +#define IRQ_IXP23XX_GPIO10 38 /* GPIO4 interrupts */ +#define IRQ_IXP23XX_GPIO11 39 /* GPIO5 interrupts */ +#define IRQ_IXP23XX_GPIO12 40 /* GPIO6 interrupts */ +#define IRQ_IXP23XX_GPIO13 41 /* GPIO7 interrupts */ +#define IRQ_IXP23XX_GPIO14 42 /* GPIO8 interrupts */ +#define IRQ_IXP23XX_GPIO15 43 /* GPIO9 interrupts */ +#define IRQ_IXP23XX_SHAC_RING0 44 /* SHAC Ring Full */ +#define IRQ_IXP23XX_SHAC_RING1 45 /* SHAC Ring Full */ +#define IRQ_IXP23XX_SHAC_RING2 46 /* SHAC Ring Full */ +#define IRQ_IXP23XX_SHAC_RING3 47 /* SHAC Ring Full */ +#define IRQ_IXP23XX_SHAC_RING4 48 /* SHAC Ring Full */ +#define IRQ_IXP23XX_SHAC_RING5 49 /* SHAC Ring Full */ +#define IRQ_IXP23XX_SHAC_RING6 50 /* SHAC RING Full */ +#define IRQ_IXP23XX_SHAC_RING7 51 /* SHAC Ring Full */ +#define IRQ_IXP23XX_SHAC_RING8 52 /* SHAC Ring Full */ +#define IRQ_IXP23XX_SHAC_RING9 53 /* SHAC Ring Full */ +#define IRQ_IXP23XX_SHAC_RING10 54 /* SHAC Ring Full */ +#define IRQ_IXP23XX_SHAC_RING11 55 /* SHAC Ring Full */ +#define IRQ_IXP23XX_ME_THREAD_A0_ME0 56 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A1_ME0 57 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A2_ME0 58 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A3_ME0 59 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A4_ME0 60 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A5_ME0 61 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A6_ME0 62 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A7_ME0 63 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A8_ME1 64 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A9_ME1 65 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A10_ME1 66 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A11_ME1 67 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A12_ME1 68 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A13_ME1 69 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A14_ME1 70 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A15_ME1 71 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A16_ME2 72 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A17_ME2 73 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A18_ME2 74 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A19_ME2 75 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A20_ME2 76 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A21_ME2 77 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A22_ME2 78 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A23_ME2 79 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A24_ME3 80 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A25_ME3 81 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A26_ME3 82 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A27_ME3 83 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A28_ME3 84 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A29_ME3 85 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A30_ME3 86 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_A31_ME3 87 /* ME_THREAD_A */ +#define IRQ_IXP23XX_ME_THREAD_B0_ME0 88 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B1_ME0 89 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B2_ME0 90 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B3_ME0 91 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B4_ME0 92 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B5_ME0 93 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B6_ME0 94 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B7_ME0 95 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B8_ME1 96 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B9_ME1 97 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B10_ME1 98 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B11_ME1 99 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B12_ME1 100 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B13_ME1 101 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B14_ME1 102 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B15_ME1 103 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B16_ME2 104 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B17_ME2 105 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B18_ME2 106 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B19_ME2 107 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B20_ME2 108 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B21_ME2 109 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B22_ME2 110 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B23_ME2 111 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B24_ME3 112 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B25_ME3 113 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B26_ME3 114 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B27_ME3 115 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B28_ME3 116 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B29_ME3 117 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B30_ME3 118 /* ME_THREAD_B */ +#define IRQ_IXP23XX_ME_THREAD_B31_ME3 119 /* ME_THREAD_B */ + +#define NUM_IXP23XX_RAW_IRQS 120 + +#define IRQ_IXP23XX_INTA 120 /* Indirect pcxg_pci_int_rph */ +#define IRQ_IXP23XX_INTB 121 /* Indirect pcxg_pci_int_rph */ + +#define NR_IXP23XX_IRQ (IRQ_IXP23XX_INTB + 1) + +/* + * We default to 32 per-board IRQs. Increase this number if you need + * more, but keep it realistic. + */ +#define NR_IXP23XX_MACH_IRQS 32 + +#define NR_IRQS (NR_IXP23XX_IRQS + NR_IXP23XX_MACH_IRQS) + +#define IXP23XX_MACH_IRQ(irq) (NR_IXP23XX_IRQ + (irq)) + + +/* + * IXDP2351-specific interrupts + */ + +/* + * External PCI interrupts signaled through INTB + * + */ +#define IXDP2351_INTB_IRQ_BASE 0 +#define IRQ_IXDP2351_INTA_82546 IXP23XX_MACH_IRQ(0) +#define IRQ_IXDP2351_INTB_82546 IXP23XX_MACH_IRQ(1) +#define IRQ_IXDP2351_SPCI_DB_0 IXP23XX_MACH_IRQ(2) +#define IRQ_IXDP2351_SPCI_DB_1 IXP23XX_MACH_IRQ(3) +#define IRQ_IXDP2351_SPCI_PMC_INTA IXP23XX_MACH_IRQ(4) +#define IRQ_IXDP2351_SPCI_PMC_INTB IXP23XX_MACH_IRQ(5) +#define IRQ_IXDP2351_SPCI_PMC_INTC IXP23XX_MACH_IRQ(6) +#define IRQ_IXDP2351_SPCI_PMC_INTD IXP23XX_MACH_IRQ(7) +#define IRQ_IXDP2351_SPCI_FIC IXP23XX_MACH_IRQ(8) + +#define IXDP2351_INTB_IRQ_BIT(irq) (irq - IXP23XX_MACH_IRQ(0)) +#define IXDP2351_INTB_IRQ_MASK(irq) (1 << IXDP2351_INTB_IRQ_BIT(irq)) +#define IXDP2351_INTB_IRQ_VALID 0x01FF +#define IXDP2351_INTB_IRQ_NUM 16 + +/* + * Other external interrupts signaled through INTA + */ +#define IXDP2351_INTA_IRQ_BASE 16 +#define IRQ_IXDP2351_IPMI_FROM IXP23XX_MACH_IRQ(16) +#define IRQ_IXDP2351_125US IXP23XX_MACH_IRQ(17) +#define IRQ_IXDP2351_DB_0_ADD IXP23XX_MACH_IRQ(18) +#define IRQ_IXDP2351_DB_1_ADD IXP23XX_MACH_IRQ(19) +#define IRQ_IXDP2351_DEBUG1 IXP23XX_MACH_IRQ(20) +#define IRQ_IXDP2351_ADD_UART IXP23XX_MACH_IRQ(21) +#define IRQ_IXDP2351_FIC_ADD IXP23XX_MACH_IRQ(24) +#define IRQ_IXDP2351_CS8900 IXP23XX_MACH_IRQ(25) +#define IRQ_IXDP2351_BBSRAM IXP23XX_MACH_IRQ(26) +#define IRQ_IXDP2351_CONFIG_MEDIA IXP23XX_MACH_IRQ(27) +#define IRQ_IXDP2351_CLOCK_REF IXP23XX_MACH_IRQ(28) +#define IRQ_IXDP2351_A10_NP IXP23XX_MACH_IRQ(29) +#define IRQ_IXDP2351_A11_NP IXP23XX_MACH_IRQ(30) +#define IRQ_IXDP2351_DEBUG_NP IXP23XX_MACH_IRQ(31) + +#define IXDP2351_INTA_IRQ_BIT(irq) (irq - IXP23XX_MACH_IRQ(16)) +#define IXDP2351_INTA_IRQ_MASK(irq) (1 << IXDP2351_INTA_IRQ_BIT(irq)) +#define IXDP2351_INTA_IRQ_VALID 0xFF3F +#define IXDP2351_INTA_IRQ_NUM 16 + + +/* + * ADI RoadRunner IRQs + */ +#define IRQ_ROADRUNNER_PCI_INTA IRQ_IXP23XX_INTA +#define IRQ_ROADRUNNER_PCI_INTB IRQ_IXP23XX_INTB +#define IRQ_ROADRUNNER_PCI_INTC IRQ_IXP23XX_GPIO11 +#define IRQ_ROADRUNNER_PCI_INTD IRQ_IXP23XX_GPIO12 + +/* + * Put new board definitions here + */ + + +#endif diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/ixdp2351.h b/trunk/arch/arm/mach-ixp23xx/include/mach/ixdp2351.h new file mode 100644 index 000000000000..663951027de5 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/ixdp2351.h @@ -0,0 +1,89 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/ixdp2351.h + * + * Register and other defines for IXDP2351 + * + * Copyright (c) 2002-2004 Intel Corp. + * Copytight (c) 2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __ASM_ARCH_IXDP2351_H +#define __ASM_ARCH_IXDP2351_H + +/* + * NP module memory map + */ +#define IXDP2351_NP_PHYS_BASE (IXP23XX_EXP_BUS_CS4_BASE) +#define IXDP2351_NP_PHYS_SIZE 0x00100000 +#define IXDP2351_NP_VIRT_BASE 0xeff00000 + +#define IXDP2351_VIRT_CS8900_BASE (IXDP2351_NP_VIRT_BASE) +#define IXDP2351_VIRT_CS8900_END (IXDP2351_VIRT_CS8900_BASE + 16) + +#define IXDP2351_VIRT_NP_CPLD_BASE (IXP23XX_EXP_BUS_CS4_BASE_VIRT + 0x00010000) + +#define IXDP2351_NP_CPLD_REG(reg) ((volatile u16 *)(IXDP2351_VIRT_NP_CPLD_BASE + reg)) + +#define IXDP2351_NP_CPLD_RESET1_REG IXDP2351_NP_CPLD_REG(0x00) +#define IXDP2351_NP_CPLD_LED_REG IXDP2351_NP_CPLD_REG(0x02) +#define IXDP2351_NP_CPLD_VERSION_REG IXDP2351_NP_CPLD_REG(0x04) + +/* + * Base board module memory map + */ + +#define IXDP2351_BB_BASE_PHYS (IXP23XX_EXP_BUS_CS5_BASE) +#define IXDP2351_BB_SIZE 0x01000000 +#define IXDP2351_BB_BASE_VIRT (0xee000000) + +#define IXDP2351_BB_AREA_BASE(offset) (IXDP2351_BB_BASE_VIRT + offset) + +#define IXDP2351_VIRT_NVRAM_BASE IXDP2351_BB_AREA_BASE(0x0) +#define IXDP2351_NVRAM_SIZE (0x20000) + +#define IXDP2351_VIRT_MB_IXF1104_BASE IXDP2351_BB_AREA_BASE(0x00020000) +#define IXDP2351_VIRT_ADD_UART_BASE IXDP2351_BB_AREA_BASE(0x000240C0) +#define IXDP2351_VIRT_FIC_BASE IXDP2351_BB_AREA_BASE(0x00200000) +#define IXDP2351_VIRT_DB0_BASE IXDP2351_BB_AREA_BASE(0x00400000) +#define IXDP2351_VIRT_DB1_BASE IXDP2351_BB_AREA_BASE(0x00600000) +#define IXDP2351_VIRT_CPLD_BASE IXDP2351_BB_AREA_BASE(0x00024000) + +/* + * On board CPLD registers + */ +#define IXDP2351_CPLD_BB_REG(reg) ((volatile u16 *)(IXDP2351_VIRT_CPLD_BASE + reg)) + +#define IXDP2351_CPLD_RESET0_REG IXDP2351_CPLD_BB_REG(0x00) +#define IXDP2351_CPLD_RESET1_REG IXDP2351_CPLD_BB_REG(0x04) + +#define IXDP2351_CPLD_RESET1_MAGIC 0x55AA +#define IXDP2351_CPLD_RESET1_ENABLE 0x8000 + +#define IXDP2351_CPLD_FPGA_CONFIG_REG IXDP2351_CPLD_BB_REG(0x08) +#define IXDP2351_CPLD_INTB_MASK_SET_REG IXDP2351_CPLD_BB_REG(0x10) +#define IXDP2351_CPLD_INTA_MASK_SET_REG IXDP2351_CPLD_BB_REG(0x14) +#define IXDP2351_CPLD_INTB_STAT_REG IXDP2351_CPLD_BB_REG(0x18) +#define IXDP2351_CPLD_INTA_STAT_REG IXDP2351_CPLD_BB_REG(0x1C) +#define IXDP2351_CPLD_INTB_RAW_REG IXDP2351_CPLD_BB_REG(0x20) /* read */ +#define IXDP2351_CPLD_INTA_RAW_REG IXDP2351_CPLD_BB_REG(0x24) /* read */ +#define IXDP2351_CPLD_INTB_MASK_CLR_REG IXDP2351_CPLD_INTB_RAW_REG /* write */ +#define IXDP2351_CPLD_INTA_MASK_CLR_REG IXDP2351_CPLD_INTA_RAW_REG /* write */ +#define IXDP2351_CPLD_INTB_SIM_REG IXDP2351_CPLD_BB_REG(0x28) +#define IXDP2351_CPLD_INTA_SIM_REG IXDP2351_CPLD_BB_REG(0x2C) + /* Interrupt bits are defined in irqs.h */ +#define IXDP2351_CPLD_BB_GBE0_REG IXDP2351_CPLD_BB_REG(0x30) +#define IXDP2351_CPLD_BB_GBE1_REG IXDP2351_CPLD_BB_REG(0x34) + +/* #define IXDP2351_CPLD_BB_MISC_REG IXDP2351_CPLD_REG(0x1C) */ +/* #define IXDP2351_CPLD_BB_MISC_REV_MASK 0xFF */ +/* #define IXDP2351_CPLD_BB_GDXCS0_REG IXDP2351_CPLD_REG(0x24) */ +/* #define IXDP2351_CPLD_BB_GDXCS1_REG IXDP2351_CPLD_REG(0x28) */ +/* #define IXDP2351_CPLD_BB_CLOCK_REG IXDP2351_CPLD_REG(0x04) */ + + +#endif diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/ixp23xx.h b/trunk/arch/arm/mach-ixp23xx/include/mach/ixp23xx.h new file mode 100644 index 000000000000..6d02481b1d6d --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/ixp23xx.h @@ -0,0 +1,298 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/ixp23xx.h + * + * Register definitions for IXP23XX + * + * Copyright (C) 2003-2005 Intel Corporation. + * Copyright (C) 2005 MontaVista Software, Inc. + * + * Maintainer: Deepak Saxena + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_IXP23XX_H +#define __ASM_ARCH_IXP23XX_H + +/* + * IXP2300 linux memory map: + * + * virt phys size + * fffd0000 a0000000 64K XSI2CPP_CSR + * fffc0000 c4000000 4K EXP_CFG + * fff00000 c8000000 64K PERIPHERAL + * fe000000 1c0000000 16M CAP_CSR + * fd000000 1c8000000 16M MSF_CSR + * fb000000 16M --- + * fa000000 1d8000000 32M PCI_IO + * f8000000 1da000000 32M PCI_CFG + * f6000000 1de000000 32M PCI_CREG + * f4000000 32M --- + * f0000000 1e0000000 64M PCI_MEM + * e[c-f]000000 per-platform mappings + */ + + +/**************************************************************************** + * Static mappings. + ****************************************************************************/ +#define IXP23XX_XSI2CPP_CSR_PHYS 0xa0000000 +#define IXP23XX_XSI2CPP_CSR_VIRT 0xfffd0000 +#define IXP23XX_XSI2CPP_CSR_SIZE 0x00010000 + +#define IXP23XX_EXP_CFG_PHYS 0xc4000000 +#define IXP23XX_EXP_CFG_VIRT 0xfffc0000 +#define IXP23XX_EXP_CFG_SIZE 0x00001000 + +#define IXP23XX_PERIPHERAL_PHYS 0xc8000000 +#define IXP23XX_PERIPHERAL_VIRT 0xfff00000 +#define IXP23XX_PERIPHERAL_SIZE 0x00010000 + +#define IXP23XX_CAP_CSR_PHYS 0x1c0000000ULL +#define IXP23XX_CAP_CSR_VIRT 0xfe000000 +#define IXP23XX_CAP_CSR_SIZE 0x01000000 + +#define IXP23XX_MSF_CSR_PHYS 0x1c8000000ULL +#define IXP23XX_MSF_CSR_VIRT 0xfd000000 +#define IXP23XX_MSF_CSR_SIZE 0x01000000 + +#define IXP23XX_PCI_IO_PHYS 0x1d8000000ULL +#define IXP23XX_PCI_IO_VIRT 0xfa000000 +#define IXP23XX_PCI_IO_SIZE 0x02000000 + +#define IXP23XX_PCI_CFG_PHYS 0x1da000000ULL +#define IXP23XX_PCI_CFG_VIRT 0xf8000000 +#define IXP23XX_PCI_CFG_SIZE 0x02000000 +#define IXP23XX_PCI_CFG0_VIRT IXP23XX_PCI_CFG_VIRT +#define IXP23XX_PCI_CFG1_VIRT (IXP23XX_PCI_CFG_VIRT + 0x01000000) + +#define IXP23XX_PCI_CREG_PHYS 0x1de000000ULL +#define IXP23XX_PCI_CREG_VIRT 0xf6000000 +#define IXP23XX_PCI_CREG_SIZE 0x02000000 +#define IXP23XX_PCI_CSR_VIRT (IXP23XX_PCI_CREG_VIRT + 0x01000000) + +#define IXP23XX_PCI_MEM_START 0xe0000000 +#define IXP23XX_PCI_MEM_PHYS 0x1e0000000ULL +#define IXP23XX_PCI_MEM_VIRT 0xf0000000 +#define IXP23XX_PCI_MEM_SIZE 0x04000000 + + +/**************************************************************************** + * XSI2CPP CSRs. + ****************************************************************************/ +#define IXP23XX_XSI2CPP_REG(x) ((volatile unsigned long *)(IXP23XX_XSI2CPP_CSR_VIRT + (x))) +#define IXP23XX_CPP2XSI_CURR_XFER_REG3 IXP23XX_XSI2CPP_REG(0xf8) +#define IXP23XX_CPP2XSI_ADDR_31 (1 << 19) +#define IXP23XX_CPP2XSI_PSH_OFF (1 << 20) +#define IXP23XX_CPP2XSI_COH_OFF (1 << 21) + + +/**************************************************************************** + * Expansion Bus Config. + ****************************************************************************/ +#define IXP23XX_EXP_CFG_REG(x) ((volatile unsigned long *)(IXP23XX_EXP_CFG_VIRT + (x))) +#define IXP23XX_EXP_CS0 IXP23XX_EXP_CFG_REG(0x00) +#define IXP23XX_EXP_CS1 IXP23XX_EXP_CFG_REG(0x04) +#define IXP23XX_EXP_CS2 IXP23XX_EXP_CFG_REG(0x08) +#define IXP23XX_EXP_CS3 IXP23XX_EXP_CFG_REG(0x0c) +#define IXP23XX_EXP_CS4 IXP23XX_EXP_CFG_REG(0x10) +#define IXP23XX_EXP_CS5 IXP23XX_EXP_CFG_REG(0x14) +#define IXP23XX_EXP_CS6 IXP23XX_EXP_CFG_REG(0x18) +#define IXP23XX_EXP_CS7 IXP23XX_EXP_CFG_REG(0x1c) +#define IXP23XX_FLASH_WRITABLE (0x2) +#define IXP23XX_FLASH_BUS8 (0x1) + +#define IXP23XX_EXP_CFG0 IXP23XX_EXP_CFG_REG(0x20) +#define IXP23XX_EXP_CFG1 IXP23XX_EXP_CFG_REG(0x24) +#define IXP23XX_EXP_CFG0_MEM_MAP (1 << 31) +#define IXP23XX_EXP_CFG0_XSCALE_SPEED_SEL (3 << 22) +#define IXP23XX_EXP_CFG0_XSCALE_SPEED_EN (1 << 21) +#define IXP23XX_EXP_CFG0_CPP_SPEED_SEL (3 << 19) +#define IXP23XX_EXP_CFG0_CPP_SPEED_EN (1 << 18) +#define IXP23XX_EXP_CFG0_PCI_SWIN (3 << 16) +#define IXP23XX_EXP_CFG0_PCI_DWIN (3 << 14) +#define IXP23XX_EXP_CFG0_PCI33_MODE (1 << 13) +#define IXP23XX_EXP_CFG0_QDR_SPEED_SEL (1 << 12) +#define IXP23XX_EXP_CFG0_CPP_DIV_SEL (1 << 5) +#define IXP23XX_EXP_CFG0_XSI_NOT_PRES (1 << 4) +#define IXP23XX_EXP_CFG0_PROM_BOOT (1 << 3) +#define IXP23XX_EXP_CFG0_PCI_ARB (1 << 2) +#define IXP23XX_EXP_CFG0_PCI_HOST (1 << 1) +#define IXP23XX_EXP_CFG0_FLASH_WIDTH (1 << 0) + +#define IXP23XX_EXP_UNIT_FUSE IXP23XX_EXP_CFG_REG(0x28) +#define IXP23XX_EXP_MSF_MUX IXP23XX_EXP_CFG_REG(0x30) +#define IXP23XX_EXP_CFG_FUSE IXP23XX_EXP_CFG_REG(0x34) + +#define IXP23XX_EXP_BUS_PHYS 0x90000000 +#define IXP23XX_EXP_BUS_WINDOW_SIZE 0x01000000 + +#define IXP23XX_EXP_BUS_CS0_BASE (IXP23XX_EXP_BUS_PHYS + 0x00000000) +#define IXP23XX_EXP_BUS_CS1_BASE (IXP23XX_EXP_BUS_PHYS + 0x01000000) +#define IXP23XX_EXP_BUS_CS2_BASE (IXP23XX_EXP_BUS_PHYS + 0x02000000) +#define IXP23XX_EXP_BUS_CS3_BASE (IXP23XX_EXP_BUS_PHYS + 0x03000000) +#define IXP23XX_EXP_BUS_CS4_BASE (IXP23XX_EXP_BUS_PHYS + 0x04000000) +#define IXP23XX_EXP_BUS_CS5_BASE (IXP23XX_EXP_BUS_PHYS + 0x05000000) +#define IXP23XX_EXP_BUS_CS6_BASE (IXP23XX_EXP_BUS_PHYS + 0x06000000) +#define IXP23XX_EXP_BUS_CS7_BASE (IXP23XX_EXP_BUS_PHYS + 0x07000000) + + +/**************************************************************************** + * Peripherals. + ****************************************************************************/ +#define IXP23XX_UART1_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x0000) +#define IXP23XX_UART2_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x1000) +#define IXP23XX_PMU_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x2000) +#define IXP23XX_INTC_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x3000) +#define IXP23XX_GPIO_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x4000) +#define IXP23XX_TIMER_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x5000) +#define IXP23XX_NPE0_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x6000) +#define IXP23XX_DSR_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x7000) +#define IXP23XX_NPE1_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x8000) +#define IXP23XX_ETH0_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x9000) +#define IXP23XX_ETH1_VIRT (IXP23XX_PERIPHERAL_VIRT + 0xA000) +#define IXP23XX_GIG0_VIRT (IXP23XX_PERIPHERAL_VIRT + 0xB000) +#define IXP23XX_GIG1_VIRT (IXP23XX_PERIPHERAL_VIRT + 0xC000) +#define IXP23XX_DDRS_VIRT (IXP23XX_PERIPHERAL_VIRT + 0xD000) + +#define IXP23XX_UART1_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x0000) +#define IXP23XX_UART2_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x1000) +#define IXP23XX_PMU_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x2000) +#define IXP23XX_INTC_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x3000) +#define IXP23XX_GPIO_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x4000) +#define IXP23XX_TIMER_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x5000) +#define IXP23XX_NPE0_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x6000) +#define IXP23XX_DSR_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x7000) +#define IXP23XX_NPE1_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x8000) +#define IXP23XX_ETH0_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x9000) +#define IXP23XX_ETH1_PHYS (IXP23XX_PERIPHERAL_PHYS + 0xA000) +#define IXP23XX_GIG0_PHYS (IXP23XX_PERIPHERAL_PHYS + 0xB000) +#define IXP23XX_GIG1_PHYS (IXP23XX_PERIPHERAL_PHYS + 0xC000) +#define IXP23XX_DDRS_PHYS (IXP23XX_PERIPHERAL_PHYS + 0xD000) + + +/**************************************************************************** + * Interrupt controller. + ****************************************************************************/ +#define IXP23XX_INTC_REG(x) ((volatile unsigned long *)(IXP23XX_INTC_VIRT + (x))) +#define IXP23XX_INTR_ST1 IXP23XX_INTC_REG(0x00) +#define IXP23XX_INTR_ST2 IXP23XX_INTC_REG(0x04) +#define IXP23XX_INTR_ST3 IXP23XX_INTC_REG(0x08) +#define IXP23XX_INTR_ST4 IXP23XX_INTC_REG(0x0c) +#define IXP23XX_INTR_EN1 IXP23XX_INTC_REG(0x10) +#define IXP23XX_INTR_EN2 IXP23XX_INTC_REG(0x14) +#define IXP23XX_INTR_EN3 IXP23XX_INTC_REG(0x18) +#define IXP23XX_INTR_EN4 IXP23XX_INTC_REG(0x1c) +#define IXP23XX_INTR_SEL1 IXP23XX_INTC_REG(0x20) +#define IXP23XX_INTR_SEL2 IXP23XX_INTC_REG(0x24) +#define IXP23XX_INTR_SEL3 IXP23XX_INTC_REG(0x28) +#define IXP23XX_INTR_SEL4 IXP23XX_INTC_REG(0x2c) +#define IXP23XX_INTR_IRQ_ST1 IXP23XX_INTC_REG(0x30) +#define IXP23XX_INTR_IRQ_ST2 IXP23XX_INTC_REG(0x34) +#define IXP23XX_INTR_IRQ_ST3 IXP23XX_INTC_REG(0x38) +#define IXP23XX_INTR_IRQ_ST4 IXP23XX_INTC_REG(0x3c) +#define IXP23XX_INTR_IRQ_ENC_ST_OFFSET 0x54 + + +/**************************************************************************** + * GPIO. + ****************************************************************************/ +#define IXP23XX_GPIO_REG(x) ((volatile unsigned long *)(IXP23XX_GPIO_VIRT + (x))) +#define IXP23XX_GPIO_GPOUTR IXP23XX_GPIO_REG(0x00) +#define IXP23XX_GPIO_GPOER IXP23XX_GPIO_REG(0x04) +#define IXP23XX_GPIO_GPINR IXP23XX_GPIO_REG(0x08) +#define IXP23XX_GPIO_GPISR IXP23XX_GPIO_REG(0x0c) +#define IXP23XX_GPIO_GPIT1R IXP23XX_GPIO_REG(0x10) +#define IXP23XX_GPIO_GPIT2R IXP23XX_GPIO_REG(0x14) +#define IXP23XX_GPIO_GPCLKR IXP23XX_GPIO_REG(0x18) +#define IXP23XX_GPIO_GPDBSELR IXP23XX_GPIO_REG(0x1c) + +#define IXP23XX_GPIO_STYLE_MASK 0x7 +#define IXP23XX_GPIO_STYLE_ACTIVE_HIGH 0x0 +#define IXP23XX_GPIO_STYLE_ACTIVE_LOW 0x1 +#define IXP23XX_GPIO_STYLE_RISING_EDGE 0x2 +#define IXP23XX_GPIO_STYLE_FALLING_EDGE 0x3 +#define IXP23XX_GPIO_STYLE_TRANSITIONAL 0x4 + +#define IXP23XX_GPIO_STYLE_SIZE 3 + + +/**************************************************************************** + * Timer. + ****************************************************************************/ +#define IXP23XX_TIMER_REG(x) ((volatile unsigned long *)(IXP23XX_TIMER_VIRT + (x))) +#define IXP23XX_TIMER_CONT IXP23XX_TIMER_REG(0x00) +#define IXP23XX_TIMER1_TIMESTAMP IXP23XX_TIMER_REG(0x04) +#define IXP23XX_TIMER1_RELOAD IXP23XX_TIMER_REG(0x08) +#define IXP23XX_TIMER2_TIMESTAMP IXP23XX_TIMER_REG(0x0c) +#define IXP23XX_TIMER2_RELOAD IXP23XX_TIMER_REG(0x10) +#define IXP23XX_TIMER_WDOG IXP23XX_TIMER_REG(0x14) +#define IXP23XX_TIMER_WDOG_EN IXP23XX_TIMER_REG(0x18) +#define IXP23XX_TIMER_WDOG_KEY IXP23XX_TIMER_REG(0x1c) +#define IXP23XX_TIMER_WDOG_KEY_MAGIC 0x482e +#define IXP23XX_TIMER_STATUS IXP23XX_TIMER_REG(0x20) +#define IXP23XX_TIMER_SOFT_RESET IXP23XX_TIMER_REG(0x24) +#define IXP23XX_TIMER_SOFT_RESET_EN IXP23XX_TIMER_REG(0x28) + +#define IXP23XX_TIMER_ENABLE (1 << 0) +#define IXP23XX_TIMER_ONE_SHOT (1 << 1) +/* Low order bits of reload value ignored */ +#define IXP23XX_TIMER_RELOAD_MASK (0x3) +#define IXP23XX_TIMER_DISABLED (0x0) +#define IXP23XX_TIMER1_INT_PEND (1 << 0) +#define IXP23XX_TIMER2_INT_PEND (1 << 1) +#define IXP23XX_TIMER_STATUS_TS_PEND (1 << 2) +#define IXP23XX_TIMER_STATUS_WDOG_PEND (1 << 3) +#define IXP23XX_TIMER_STATUS_WARM_RESET (1 << 4) + + +/**************************************************************************** + * CAP CSRs. + ****************************************************************************/ +#define IXP23XX_GLOBAL_REG(x) ((volatile unsigned long *)(IXP23XX_CAP_CSR_VIRT + 0x4a00 + (x))) +#define IXP23XX_PRODUCT_ID IXP23XX_GLOBAL_REG(0x00) +#define IXP23XX_MISC_CONTROL IXP23XX_GLOBAL_REG(0x04) +#define IXP23XX_MSF_CLK_CNTRL IXP23XX_GLOBAL_REG(0x08) +#define IXP23XX_RESET0 IXP23XX_GLOBAL_REG(0x0c) +#define IXP23XX_RESET1 IXP23XX_GLOBAL_REG(0x10) +#define IXP23XX_STRAP_OPTIONS IXP23XX_GLOBAL_REG(0x18) + +#define IXP23XX_ENABLE_WATCHDOG (1 << 24) +#define IXP23XX_SHPC_INIT_COMP (1 << 21) +#define IXP23XX_RST_ALL (1 << 16) +#define IXP23XX_RESET_PCI (1 << 2) +#define IXP23XX_PCI_UNIT_RESET (1 << 1) +#define IXP23XX_XSCALE_RESET (1 << 0) + +#define IXP23XX_UENGINE_CSR_VIRT_BASE (IXP23XX_CAP_CSR_VIRT + 0x18000) + + +/**************************************************************************** + * PCI CSRs. + ****************************************************************************/ +#define IXP23XX_PCI_CREG(x) ((volatile unsigned long *)(IXP23XX_PCI_CREG_VIRT + (x))) +#define IXP23XX_PCI_CMDSTAT IXP23XX_PCI_CREG(0x04) +#define IXP23XX_PCI_SRAM_BAR IXP23XX_PCI_CREG(0x14) +#define IXP23XX_PCI_SDRAM_BAR IXP23XX_PCI_CREG(0x18) + + +#define IXP23XX_PCI_CSR(x) ((volatile unsigned long *)(IXP23XX_PCI_CREG_VIRT + 0x01000000 + (x))) +#define IXP23XX_PCI_OUT_INT_STATUS IXP23XX_PCI_CSR(0x0030) +#define IXP23XX_PCI_OUT_INT_MASK IXP23XX_PCI_CSR(0x0034) +#define IXP23XX_PCI_SRAM_BASE_ADDR_MASK IXP23XX_PCI_CSR(0x00fc) +#define IXP23XX_PCI_DRAM_BASE_ADDR_MASK IXP23XX_PCI_CSR(0x0100) +#define IXP23XX_PCI_CONTROL IXP23XX_PCI_CSR(0x013c) +#define IXP23XX_PCI_ADDR_EXT IXP23XX_PCI_CSR(0x0140) +#define IXP23XX_PCI_ME_PUSH_STATUS IXP23XX_PCI_CSR(0x0148) +#define IXP23XX_PCI_ME_PUSH_EN IXP23XX_PCI_CSR(0x014c) +#define IXP23XX_PCI_ERR_STATUS IXP23XX_PCI_CSR(0x0150) +#define IXP23XX_PCI_ERROR_STATUS IXP23XX_PCI_CSR(0x0150) +#define IXP23XX_PCI_ERR_ENABLE IXP23XX_PCI_CSR(0x0154) +#define IXP23XX_PCI_XSCALE_INT_STATUS IXP23XX_PCI_CSR(0x0158) +#define IXP23XX_PCI_XSCALE_INT_ENABLE IXP23XX_PCI_CSR(0x015c) +#define IXP23XX_PCI_CPP_ADDR_BITS IXP23XX_PCI_CSR(0x0160) + + +#endif diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/memory.h b/trunk/arch/arm/mach-ixp23xx/include/mach/memory.h new file mode 100644 index 000000000000..6cf0704e946a --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/memory.h @@ -0,0 +1,34 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/memory.h + * + * Copyright (c) 2003-2004 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#include + +/* + * Physical DRAM offset. + */ +#define PLAT_PHYS_OFFSET (0x00000000) + +#define IXP23XX_PCI_SDRAM_OFFSET (*((volatile int *)IXP23XX_PCI_SDRAM_BAR) & 0xfffffff0) + +#define __phys_to_bus(x) ((x) + (IXP23XX_PCI_SDRAM_OFFSET - PHYS_OFFSET)) +#define __bus_to_phys(x) ((x) - (IXP23XX_PCI_SDRAM_OFFSET - PHYS_OFFSET)) + +#define __virt_to_bus(v) __phys_to_bus(__virt_to_phys(v)) +#define __bus_to_virt(b) __phys_to_virt(__bus_to_phys(b)) +#define __pfn_to_bus(p) __phys_to_bus(__pfn_to_phys(p)) +#define __bus_to_pfn(b) __phys_to_pfn(__bus_to_phys(b)) + +#define arch_is_coherent() 1 + +#endif diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/platform.h b/trunk/arch/arm/mach-ixp23xx/include/mach/platform.h new file mode 100644 index 000000000000..50de558e722e --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/platform.h @@ -0,0 +1,58 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/platform.h + * + * Various bits of code used by platform-level code. + * + * Author: Deepak Saxena + * + * Copyright 2005 (c) MontaVista Software, Inc. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASSEMBLY__ + +static inline unsigned long ixp2000_reg_read(volatile void *reg) +{ + return *((volatile unsigned long *)reg); +} + +static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) +{ + *((volatile unsigned long *)reg) = val; +} + +static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) +{ + *((volatile unsigned long *)reg) = val; +} + +struct pci_sys_data; + +void ixp23xx_map_io(void); +void ixp23xx_init_irq(void); +void ixp23xx_sys_init(void); +void ixp23xx_restart(char, const char *); +int ixp23xx_pci_setup(int, struct pci_sys_data *); +void ixp23xx_pci_preinit(void); +struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*); +void ixp23xx_pci_slave_init(void); + +extern struct sys_timer ixp23xx_timer; + +#define IXP23XX_UART_XTAL 14745600 + +#ifndef __ASSEMBLY__ +/* + * Is system memory on the XSI or CPP bus? + */ +static inline unsigned ixp23xx_cpp_boot(void) +{ + return (*IXP23XX_EXP_CFG0 & IXP23XX_EXP_CFG0_XSI_NOT_PRES); +} +#endif + + +#endif diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/time.h b/trunk/arch/arm/mach-ixp23xx/include/mach/time.h new file mode 100644 index 000000000000..b61dafc884ac --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/time.h @@ -0,0 +1,3 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/time.h + */ diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/timex.h b/trunk/arch/arm/mach-ixp23xx/include/mach/timex.h new file mode 100644 index 000000000000..e341e9cf9c37 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/timex.h @@ -0,0 +1,7 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/timex.h + * + * XScale architecture timex specifications + */ + +#define CLOCK_TICK_RATE 75000000 diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/uncompress.h b/trunk/arch/arm/mach-ixp23xx/include/mach/uncompress.h new file mode 100644 index 000000000000..8b4c358d2c04 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/uncompress.h @@ -0,0 +1,40 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/uncompress.h + * + * Copyright (C) 2002-2004 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_UNCOMPRESS_H +#define __ASM_ARCH_UNCOMPRESS_H + +#include +#include + +#define UART_BASE ((volatile u32 *)IXP23XX_UART1_PHYS) + +static inline void putc(char c) +{ + int j; + + for (j = 0; j < 0x1000; j++) { + if (UART_BASE[UART_LSR] & UART_LSR_THRE) + break; + barrier(); + } + + UART_BASE[UART_TX] = c; +} + +static inline void flush(void) +{ +} + +#define arch_decomp_setup() +#define arch_decomp_wdog() + + +#endif diff --git a/trunk/arch/arm/mach-ixp23xx/ixdp2351.c b/trunk/arch/arm/mach-ixp23xx/ixdp2351.c new file mode 100644 index 000000000000..b0e07db5ceaf --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/ixdp2351.c @@ -0,0 +1,347 @@ +/* + * arch/arm/mach-ixp23xx/ixdp2351.c + * + * IXDP2351 board-specific routines + * + * Author: Deepak Saxena + * + * Copyright 2005 (c) MontaVista Software, Inc. + * + * Based on 2.4 code Copyright 2004 (c) Intel Corporation + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/* + * IXDP2351 Interrupt Handling + */ +static void ixdp2351_inta_mask(struct irq_data *d) +{ + *IXDP2351_CPLD_INTA_MASK_SET_REG = IXDP2351_INTA_IRQ_MASK(d->irq); +} + +static void ixdp2351_inta_unmask(struct irq_data *d) +{ + *IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(d->irq); +} + +static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc) +{ + u16 ex_interrupt = + *IXDP2351_CPLD_INTA_STAT_REG & IXDP2351_INTA_IRQ_VALID; + int i; + + desc->irq_data.chip->irq_mask(&desc->irq_data); + + for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) { + if (ex_interrupt & (1 << i)) { + int cpld_irq = + IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i); + generic_handle_irq(cpld_irq); + } + } + + desc->irq_data.chip->irq_unmask(&desc->irq_data); +} + +static struct irq_chip ixdp2351_inta_chip = { + .irq_ack = ixdp2351_inta_mask, + .irq_mask = ixdp2351_inta_mask, + .irq_unmask = ixdp2351_inta_unmask +}; + +static void ixdp2351_intb_mask(struct irq_data *d) +{ + *IXDP2351_CPLD_INTB_MASK_SET_REG = IXDP2351_INTB_IRQ_MASK(d->irq); +} + +static void ixdp2351_intb_unmask(struct irq_data *d) +{ + *IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(d->irq); +} + +static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc) +{ + u16 ex_interrupt = + *IXDP2351_CPLD_INTB_STAT_REG & IXDP2351_INTB_IRQ_VALID; + int i; + + desc->irq_data.chip->irq_ack(&desc->irq_data); + + for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) { + if (ex_interrupt & (1 << i)) { + int cpld_irq = + IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i); + generic_handle_irq(cpld_irq); + } + } + + desc->irq_data.chip->irq_unmask(&desc->irq_data); +} + +static struct irq_chip ixdp2351_intb_chip = { + .irq_ack = ixdp2351_intb_mask, + .irq_mask = ixdp2351_intb_mask, + .irq_unmask = ixdp2351_intb_unmask +}; + +void __init ixdp2351_init_irq(void) +{ + int irq; + + /* Mask all interrupts from CPLD, disable simulation */ + *IXDP2351_CPLD_INTA_MASK_SET_REG = (u16) -1; + *IXDP2351_CPLD_INTB_MASK_SET_REG = (u16) -1; + *IXDP2351_CPLD_INTA_SIM_REG = 0; + *IXDP2351_CPLD_INTB_SIM_REG = 0; + + ixp23xx_init_irq(); + + for (irq = IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE); + irq < + IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + IXDP2351_INTA_IRQ_NUM); + irq++) { + if (IXDP2351_INTA_IRQ_MASK(irq) & IXDP2351_INTA_IRQ_VALID) { + set_irq_flags(irq, IRQF_VALID); + irq_set_chip_and_handler(irq, &ixdp2351_inta_chip, + handle_level_irq); + } + } + + for (irq = IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE); + irq < + IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + IXDP2351_INTB_IRQ_NUM); + irq++) { + if (IXDP2351_INTB_IRQ_MASK(irq) & IXDP2351_INTB_IRQ_VALID) { + set_irq_flags(irq, IRQF_VALID); + irq_set_chip_and_handler(irq, &ixdp2351_intb_chip, + handle_level_irq); + } + } + + irq_set_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler); + irq_set_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler); +} + +/* + * IXDP2351 PCI + */ + +/* + * This board does not do normal PCI IRQ routing, or any + * sort of swizzling, so we just need to check where on the + * bus the device is and figure out what CPLD pin it is + * being routed to. + */ +#define DEVPIN(dev, pin) ((pin) | ((dev) << 3)) + +static int __init ixdp2351_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) +{ + u8 bus = dev->bus->number; + u32 devpin = DEVPIN(PCI_SLOT(dev->devfn), pin); + struct pci_bus *tmp_bus = dev->bus; + + /* Primary bus, no interrupts here */ + if (!bus) + return -1; + + /* Lookup first leaf in bus tree */ + while ((tmp_bus->parent != NULL) && (tmp_bus->parent->parent != NULL)) + tmp_bus = tmp_bus->parent; + + /* Select between known bridges */ + switch (tmp_bus->self->devfn | (tmp_bus->self->bus->number << 8)) { + /* Device is located after first bridge */ + case 0x0008: + if (tmp_bus == dev->bus) { + /* Device is located directy after first bridge */ + switch (devpin) { + /* Onboard 82546 */ + case DEVPIN(1, 1): /* Onboard 82546 ch 0 */ + return IRQ_IXDP2351_INTA_82546; + case DEVPIN(1, 2): /* Onboard 82546 ch 1 */ + return IRQ_IXDP2351_INTB_82546; + /* PMC SLOT */ + case DEVPIN(0, 1): /* PMCP INTA# */ + case DEVPIN(2, 4): /* PMCS INTD# */ + return IRQ_IXDP2351_SPCI_PMC_INTA; + case DEVPIN(0, 2): /* PMCP INTB# */ + case DEVPIN(2, 1): /* PMCS INTA# */ + return IRQ_IXDP2351_SPCI_PMC_INTB; + case DEVPIN(0, 3): /* PMCP INTC# */ + case DEVPIN(2, 2): /* PMCS INTB# */ + return IRQ_IXDP2351_SPCI_PMC_INTC; + case DEVPIN(0, 4): /* PMCP INTD# */ + case DEVPIN(2, 3): /* PMCS INTC# */ + return IRQ_IXDP2351_SPCI_PMC_INTD; + } + } else { + /* Device is located indirectly after first bridge */ + /* Not supported now */ + return -1; + } + break; + case 0x0010: + if (tmp_bus == dev->bus) { + /* Device is located directy after second bridge */ + /* Secondary bus of second bridge */ + switch (devpin) { + case DEVPIN(0, 1): /* DB#0 */ + case DEVPIN(0, 2): + case DEVPIN(0, 3): + case DEVPIN(0, 4): + return IRQ_IXDP2351_SPCI_DB_0; + case DEVPIN(1, 1): /* DB#1 */ + case DEVPIN(1, 2): + case DEVPIN(1, 3): + case DEVPIN(1, 4): + return IRQ_IXDP2351_SPCI_DB_1; + case DEVPIN(2, 1): /* FIC1 */ + case DEVPIN(2, 2): + case DEVPIN(2, 3): + case DEVPIN(2, 4): + case DEVPIN(3, 1): /* FIC2 */ + case DEVPIN(3, 2): + case DEVPIN(3, 3): + case DEVPIN(3, 4): + return IRQ_IXDP2351_SPCI_FIC; + } + } else { + /* Device is located indirectly after second bridge */ + /* Not supported now */ + return -1; + } + break; + } + + return -1; +} + +struct hw_pci ixdp2351_pci __initdata = { + .nr_controllers = 1, + .preinit = ixp23xx_pci_preinit, + .setup = ixp23xx_pci_setup, + .scan = ixp23xx_pci_scan_bus, + .map_irq = ixdp2351_map_irq, +}; + +int __init ixdp2351_pci_init(void) +{ + if (machine_is_ixdp2351()) + pci_common_init(&ixdp2351_pci); + + return 0; +} + +subsys_initcall(ixdp2351_pci_init); + +/* + * IXDP2351 Static Mapped I/O + */ +static struct map_desc ixdp2351_io_desc[] __initdata = { + { + .virtual = IXDP2351_NP_VIRT_BASE, + .pfn = __phys_to_pfn((u64)IXDP2351_NP_PHYS_BASE), + .length = IXDP2351_NP_PHYS_SIZE, + .type = MT_DEVICE + }, { + .virtual = IXDP2351_BB_BASE_VIRT, + .pfn = __phys_to_pfn((u64)IXDP2351_BB_BASE_PHYS), + .length = IXDP2351_BB_SIZE, + .type = MT_DEVICE + } +}; + +static void __init ixdp2351_map_io(void) +{ + ixp23xx_map_io(); + iotable_init(ixdp2351_io_desc, ARRAY_SIZE(ixdp2351_io_desc)); +} + +static struct physmap_flash_data ixdp2351_flash_data = { + .width = 1, +}; + +static struct resource ixdp2351_flash_resource = { + .start = 0x90000000, + .end = 0x93ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device ixdp2351_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &ixdp2351_flash_data, + }, + .num_resources = 1, + .resource = &ixdp2351_flash_resource, +}; + +static void __init ixdp2351_init(void) +{ + platform_device_register(&ixdp2351_flash); + + /* + * Mark flash as writeable + */ + IXP23XX_EXP_CS0[0] |= IXP23XX_FLASH_WRITABLE; + IXP23XX_EXP_CS0[1] |= IXP23XX_FLASH_WRITABLE; + IXP23XX_EXP_CS0[2] |= IXP23XX_FLASH_WRITABLE; + IXP23XX_EXP_CS0[3] |= IXP23XX_FLASH_WRITABLE; + + ixp23xx_sys_init(); +} + +static void ixdp2351_restart(char mode, const char *cmd) +{ + /* First try machine specific support */ + + *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC; + (void) *IXDP2351_CPLD_RESET1_REG; + *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE; + + ixp23xx_restart(mode, cmd); +} + +MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform") + /* Maintainer: MontaVista Software, Inc. */ + .map_io = ixdp2351_map_io, + .init_irq = ixdp2351_init_irq, + .timer = &ixp23xx_timer, + .atag_offset = 0x100, + .init_machine = ixdp2351_init, + .restart = ixdp2351_restart, +MACHINE_END diff --git a/trunk/arch/arm/mach-ixp23xx/pci.c b/trunk/arch/arm/mach-ixp23xx/pci.c new file mode 100644 index 000000000000..911f5a58e006 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/pci.c @@ -0,0 +1,294 @@ +/* + * arch/arm/mach-ixp23xx/pci.c + * + * PCI routines for IXP23XX based systems + * + * Copyright (c) 2005 MontaVista Software, Inc. + * + * based on original code: + * + * Author: Naeem Afzal + * Copyright 2002-2005 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +extern int (*external_fault) (unsigned long, struct pt_regs *); + +static volatile int pci_master_aborts = 0; + +#ifdef DEBUG +#define DBG(x...) printk(x) +#else +#define DBG(x...) +#endif + +int clear_master_aborts(void); + +static u32 +*ixp23xx_pci_config_addr(unsigned int bus_nr, unsigned int devfn, int where) +{ + u32 *paddress; + + /* + * Must be dword aligned + */ + where &= ~3; + + /* + * For top bus, generate type 0, else type 1 + */ + if (!bus_nr) { + if (PCI_SLOT(devfn) >= 8) + return 0; + + paddress = (u32 *) (IXP23XX_PCI_CFG0_VIRT + | (1 << (PCI_SLOT(devfn) + 16)) + | (PCI_FUNC(devfn) << 8) | where); + } else { + paddress = (u32 *) (IXP23XX_PCI_CFG1_VIRT + | (bus_nr << 16) + | (PCI_SLOT(devfn) << 11) + | (PCI_FUNC(devfn) << 8) | where); + } + + return paddress; +} + +/* + * Mask table, bits to mask for quantity of size 1, 2 or 4 bytes. + * 0 and 3 are not valid indexes... + */ +static u32 bytemask[] = { + /*0*/ 0, + /*1*/ 0xff, + /*2*/ 0xffff, + /*3*/ 0, + /*4*/ 0xffffffff, +}; + +static int ixp23xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 *value) +{ + u32 n; + u32 *addr; + + n = where % 4; + + DBG("In config_read(%d) %d from dev %d:%d:%d\n", size, where, + bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn)); + + addr = ixp23xx_pci_config_addr(bus->number, devfn, where); + if (!addr) + return PCIBIOS_DEVICE_NOT_FOUND; + + pci_master_aborts = 0; + *value = (*addr >> (8*n)) & bytemask[size]; + if (pci_master_aborts) { + pci_master_aborts = 0; + *value = 0xffffffff; + return PCIBIOS_DEVICE_NOT_FOUND; + } + + return PCIBIOS_SUCCESSFUL; +} + +/* + * We don't do error checking on the address for writes. + * It's assumed that the user checked for the device existing first + * by doing a read first. + */ +static int ixp23xx_pci_write_config(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 value) +{ + u32 mask; + u32 *addr; + u32 temp; + + mask = ~(bytemask[size] << ((where % 0x4) * 8)); + addr = ixp23xx_pci_config_addr(bus->number, devfn, where); + if (!addr) + return PCIBIOS_DEVICE_NOT_FOUND; + temp = (u32) (value) << ((where % 0x4) * 8); + *addr = (*addr & mask) | temp; + + clear_master_aborts(); + + return PCIBIOS_SUCCESSFUL; +} + +struct pci_ops ixp23xx_pci_ops = { + .read = ixp23xx_pci_read_config, + .write = ixp23xx_pci_write_config, +}; + +struct pci_bus *ixp23xx_pci_scan_bus(int nr, struct pci_sys_data *sysdata) +{ + return pci_scan_root_bus(NULL, sysdata->busnr, &ixp23xx_pci_ops, + sysdata, &sysdata->resources); +} + +int ixp23xx_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs) +{ + volatile unsigned long temp; + unsigned long flags; + + pci_master_aborts = 1; + + local_irq_save(flags); + temp = *IXP23XX_PCI_CONTROL; + + /* + * master abort and cmd tgt err + */ + if (temp & ((1 << 8) | (1 << 5))) + *IXP23XX_PCI_CONTROL = temp; + + temp = *IXP23XX_PCI_CMDSTAT; + + if (temp & (1 << 29)) + *IXP23XX_PCI_CMDSTAT = temp; + local_irq_restore(flags); + + /* + * If it was an imprecise abort, then we need to correct the + * return address to be _after_ the instruction. + */ + if (fsr & (1 << 10)) + regs->ARM_pc += 4; + + return 0; +} + +int clear_master_aborts(void) +{ + volatile u32 temp; + + temp = *IXP23XX_PCI_CONTROL; + + /* + * master abort and cmd tgt err + */ + if (temp & ((1 << 8) | (1 << 5))) + *IXP23XX_PCI_CONTROL = temp; + + temp = *IXP23XX_PCI_CMDSTAT; + + if (temp & (1 << 29)) + *IXP23XX_PCI_CMDSTAT = temp; + + return 0; +} + +static void __init ixp23xx_pci_common_init(void) +{ +#ifdef __ARMEB__ + *IXP23XX_PCI_CONTROL |= 0x20000; /* set I/O swapping */ +#endif + /* + * ADDR_31 needs to be clear for PCI memory access to CPP memory + */ + *IXP23XX_CPP2XSI_CURR_XFER_REG3 &= ~IXP23XX_CPP2XSI_ADDR_31; + *IXP23XX_CPP2XSI_CURR_XFER_REG3 |= IXP23XX_CPP2XSI_PSH_OFF; + + /* + * Select correct memory for PCI inbound transactions + */ + if (ixp23xx_cpp_boot()) { + *IXP23XX_PCI_CPP_ADDR_BITS &= ~(1 << 1); + } else { + *IXP23XX_PCI_CPP_ADDR_BITS |= (1 << 1); + + /* + * Enable coherency on A2 silicon. + */ + if (arch_is_coherent()) + *IXP23XX_CPP2XSI_CURR_XFER_REG3 &= ~IXP23XX_CPP2XSI_COH_OFF; + } +} + +void __init ixp23xx_pci_preinit(void) +{ + pcibios_min_io = 0; + pcibios_min_mem = 0xe0000000; + + pci_set_flags(0); + + ixp23xx_pci_common_init(); + + hook_fault_code(16+6, ixp23xx_pci_abort_handler, SIGBUS, 0, + "PCI config cycle to non-existent device"); + + *IXP23XX_PCI_ADDR_EXT = 0x0000e000; +} + +/* + * Prevent PCI layer from seeing the inbound host-bridge resources + */ +static void __devinit pci_fixup_ixp23xx(struct pci_dev *dev) +{ + int i; + + dev->class &= 0xff; + dev->class |= PCI_CLASS_BRIDGE_HOST << 8; + for (i = 0; i < PCI_NUM_RESOURCES; i++) { + dev->resource[i].start = 0; + dev->resource[i].end = 0; + dev->resource[i].flags = 0; + } +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9002, pci_fixup_ixp23xx); + +/* + * IXP2300 systems often have large resource requirements, so we just + * use our own resource space. + */ +static struct resource ixp23xx_pci_mem_space = { + .start = IXP23XX_PCI_MEM_START, + .end = IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, + .name = "PCI Mem Space" +}; + +static struct resource ixp23xx_pci_io_space = { + .start = 0x00000100, + .end = 0x01ffffff, + .flags = IORESOURCE_IO, + .name = "PCI I/O Space" +}; + +int ixp23xx_pci_setup(int nr, struct pci_sys_data *sys) +{ + if (nr >= 1) + return 0; + + pci_add_resource_offset(&sys->resources, + &ixp23xx_pci_io_space, sys->io_offset); + pci_add_resource_offset(&sys->resources, + &ixp23xx_pci_mem_space, sys->mem_offset); + + return 1; +} + +void __init ixp23xx_pci_slave_init(void) +{ + ixp23xx_pci_common_init(); +} diff --git a/trunk/arch/arm/mach-ixp23xx/roadrunner.c b/trunk/arch/arm/mach-ixp23xx/roadrunner.c new file mode 100644 index 000000000000..eaaa3fa9fd05 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/roadrunner.c @@ -0,0 +1,180 @@ +/* + * arch/arm/mach-ixp23xx/roadrunner.c + * + * RoadRunner board-specific routines + * + * Author: Deepak Saxena + * + * Copyright 2005 (c) MontaVista Software, Inc. + * + * Based on 2.4 code Copyright 2005 (c) ADI Engineering Corporation + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/* + * Interrupt mapping + */ +#define INTA IRQ_ROADRUNNER_PCI_INTA +#define INTB IRQ_ROADRUNNER_PCI_INTB +#define INTC IRQ_ROADRUNNER_PCI_INTC +#define INTD IRQ_ROADRUNNER_PCI_INTD + +#define INTC_PIN IXP23XX_GPIO_PIN_11 +#define INTD_PIN IXP23XX_GPIO_PIN_12 + +static int __init roadrunner_map_irq(const struct pci_dev *dev, u8 idsel, + u8 pin) +{ + static int pci_card_slot_irq[] = {INTB, INTC, INTD, INTA}; + static int pmc_card_slot_irq[] = {INTA, INTB, INTC, INTD}; + static int usb_irq[] = {INTB, INTC, INTD, -1}; + static int mini_pci_1_irq[] = {INTB, INTC, -1, -1}; + static int mini_pci_2_irq[] = {INTC, INTD, -1, -1}; + + switch(dev->bus->number) { + case 0: + switch(dev->devfn) { + case 0x0: // PCI-PCI bridge + break; + case 0x8: // PCI Card Slot + return pci_card_slot_irq[pin - 1]; + case 0x10: // PMC Slot + return pmc_card_slot_irq[pin - 1]; + case 0x18: // PMC Slot Secondary Agent + break; + case 0x20: // IXP Processor + break; + default: + return NO_IRQ; + } + break; + + case 1: + switch(dev->devfn) { + case 0x0: // IDE Controller + return (pin == 1) ? INTC : -1; + case 0x8: // USB fun 0 + case 0x9: // USB fun 1 + case 0xa: // USB fun 2 + return usb_irq[pin - 1]; + case 0x10: // Mini PCI 1 + return mini_pci_1_irq[pin-1]; + case 0x18: // Mini PCI 2 + return mini_pci_2_irq[pin-1]; + case 0x20: // MEM slot + return (pin == 1) ? INTA : -1; + default: + return NO_IRQ; + } + break; + + default: + return NO_IRQ; + } + + return NO_IRQ; +} + +static void __init roadrunner_pci_preinit(void) +{ + irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW); + + ixp23xx_pci_preinit(); +} + +static struct hw_pci roadrunner_pci __initdata = { + .nr_controllers = 1, + .preinit = roadrunner_pci_preinit, + .setup = ixp23xx_pci_setup, + .scan = ixp23xx_pci_scan_bus, + .map_irq = roadrunner_map_irq, +}; + +static int __init roadrunner_pci_init(void) +{ + if (machine_is_roadrunner()) + pci_common_init(&roadrunner_pci); + + return 0; +}; + +subsys_initcall(roadrunner_pci_init); + +static struct physmap_flash_data roadrunner_flash_data = { + .width = 2, +}; + +static struct resource roadrunner_flash_resource = { + .start = 0x90000000, + .end = 0x93ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device roadrunner_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &roadrunner_flash_data, + }, + .num_resources = 1, + .resource = &roadrunner_flash_resource, +}; + +static void __init roadrunner_init(void) +{ + platform_device_register(&roadrunner_flash); + + /* + * Mark flash as writeable + */ + IXP23XX_EXP_CS0[0] |= IXP23XX_FLASH_WRITABLE; + IXP23XX_EXP_CS0[1] |= IXP23XX_FLASH_WRITABLE; + IXP23XX_EXP_CS0[2] |= IXP23XX_FLASH_WRITABLE; + IXP23XX_EXP_CS0[3] |= IXP23XX_FLASH_WRITABLE; + + ixp23xx_sys_init(); +} + +MACHINE_START(ROADRUNNER, "ADI Engineering RoadRunner Development Platform") + /* Maintainer: Deepak Saxena */ + .map_io = ixp23xx_map_io, + .init_irq = ixp23xx_init_irq, + .timer = &ixp23xx_timer, + .atag_offset = 0x100, + .init_machine = roadrunner_init, + .restart = ixp23xx_restart, +MACHINE_END diff --git a/trunk/arch/arm/mach-omap1/mux.c b/trunk/arch/arm/mach-omap1/mux.c index 087dba0df47e..e9cc52d4cb28 100644 --- a/trunk/arch/arm/mach-omap1/mux.c +++ b/trunk/arch/arm/mach-omap1/mux.c @@ -27,6 +27,7 @@ #include #include +#include #include diff --git a/trunk/arch/arm/mach-omap1/timer.c b/trunk/arch/arm/mach-omap1/timer.c index 6e90665a7c47..fb202af01d0d 100644 --- a/trunk/arch/arm/mach-omap1/timer.c +++ b/trunk/arch/arm/mach-omap1/timer.c @@ -47,9 +47,9 @@ static int omap1_dm_timer_set_src(struct platform_device *pdev, int n = (pdev->id - 1) << 1; u32 l; - l = __raw_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); + l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); l |= source << n; - __raw_writel(l, MOD_CONF_CTRL_1); + omap_writel(l, MOD_CONF_CTRL_1); return 0; } diff --git a/trunk/arch/arm/mach-omap2/board-4430sdp.c b/trunk/arch/arm/mach-omap2/board-4430sdp.c index a39fc4bbd2b8..130ab00c09a2 100644 --- a/trunk/arch/arm/mach-omap2/board-4430sdp.c +++ b/trunk/arch/arm/mach-omap2/board-4430sdp.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -560,7 +561,7 @@ static struct regulator_init_data sdp4430_vusim = { }, }; -static struct twl4030_codec_data twl6040_codec = { +static struct twl6040_codec_data twl6040_codec = { /* single-step ramp for headset and handsfree */ .hs_left_step = 0x0f, .hs_right_step = 0x0f, @@ -568,7 +569,7 @@ static struct twl4030_codec_data twl6040_codec = { .hf_right_step = 0x1d, }; -static struct twl4030_vibra_data twl6040_vibra = { +static struct twl6040_vibra_data twl6040_vibra = { .vibldrv_res = 8, .vibrdrv_res = 3, .viblmotor_res = 10, @@ -577,16 +578,14 @@ static struct twl4030_vibra_data twl6040_vibra = { .vddvibr_uV = 0, /* fixed volt supply - VBAT */ }; -static struct twl4030_audio_data twl6040_audio = { +static struct twl6040_platform_data twl6040_data = { .codec = &twl6040_codec, .vibra = &twl6040_vibra, .audpwron_gpio = 127, - .naudint_irq = OMAP44XX_IRQ_SYS_2N, .irq_base = TWL6040_CODEC_IRQ_BASE, }; static struct twl4030_platform_data sdp4430_twldata = { - .audio = &twl6040_audio, /* Regulators */ .vusim = &sdp4430_vusim, .vaux1 = &sdp4430_vaux1, @@ -617,7 +616,8 @@ static int __init omap4_i2c_init(void) TWL_COMMON_REGULATOR_VCXIO | TWL_COMMON_REGULATOR_VUSB | TWL_COMMON_REGULATOR_CLK32KG); - omap4_pmic_init("twl6030", &sdp4430_twldata); + omap4_pmic_init("twl6030", &sdp4430_twldata, + &twl6040_data, OMAP44XX_IRQ_SYS_2N); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); diff --git a/trunk/arch/arm/mach-omap2/board-generic.c b/trunk/arch/arm/mach-omap2/board-generic.c index 74e1687b5170..098d183a0086 100644 --- a/trunk/arch/arm/mach-omap2/board-generic.c +++ b/trunk/arch/arm/mach-omap2/board-generic.c @@ -137,7 +137,7 @@ static struct twl4030_platform_data sdp4430_twldata = { static void __init omap4_i2c_init(void) { - omap4_pmic_init("twl6030", &sdp4430_twldata); + omap4_pmic_init("twl6030", &sdp4430_twldata, NULL, 0); } static void __init omap4_init(void) diff --git a/trunk/arch/arm/mach-omap2/board-omap4panda.c b/trunk/arch/arm/mach-omap2/board-omap4panda.c index d8c0e89f0126..1b782ba53433 100644 --- a/trunk/arch/arm/mach-omap2/board-omap4panda.c +++ b/trunk/arch/arm/mach-omap2/board-omap4panda.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -284,7 +285,7 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) return 0; } -static struct twl4030_codec_data twl6040_codec = { +static struct twl6040_codec_data twl6040_codec = { /* single-step ramp for headset and handsfree */ .hs_left_step = 0x0f, .hs_right_step = 0x0f, @@ -292,17 +293,14 @@ static struct twl4030_codec_data twl6040_codec = { .hf_right_step = 0x1d, }; -static struct twl4030_audio_data twl6040_audio = { +static struct twl6040_platform_data twl6040_data = { .codec = &twl6040_codec, .audpwron_gpio = 127, - .naudint_irq = OMAP44XX_IRQ_SYS_2N, .irq_base = TWL6040_CODEC_IRQ_BASE, }; /* Panda board uses the common PMIC configuration */ -static struct twl4030_platform_data omap4_panda_twldata = { - .audio = &twl6040_audio, -}; +static struct twl4030_platform_data omap4_panda_twldata; /* * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM @@ -326,7 +324,8 @@ static int __init omap4_panda_i2c_init(void) TWL_COMMON_REGULATOR_VCXIO | TWL_COMMON_REGULATOR_VUSB | TWL_COMMON_REGULATOR_CLK32KG); - omap4_pmic_init("twl6030", &omap4_panda_twldata); + omap4_pmic_init("twl6030", &omap4_panda_twldata, + &twl6040_data, OMAP44XX_IRQ_SYS_2N); omap_register_i2c_bus(2, 400, NULL, 0); /* * Bus 3 is attached to the DVI port where devices like the pico DLP diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod.c b/trunk/arch/arm/mach-omap2/omap_hwmod.c index 2c27fdb61e66..7144ae651d3d 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod.c @@ -1422,6 +1422,9 @@ static int _ocp_softreset(struct omap_hwmod *oh) goto dis_opt_clks; _write_sysconfig(v, oh); + if (oh->class->sysc->srst_udelay) + udelay(oh->class->sysc->srst_udelay); + if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs) @@ -1903,10 +1906,20 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) */ int omap_hwmod_softreset(struct omap_hwmod *oh) { - if (!oh) + u32 v; + int ret; + + if (!oh || !(oh->_sysc_cache)) return -EINVAL; - return _ocp_softreset(oh); + v = oh->_sysc_cache; + ret = _set_softreset(oh, &v); + if (ret) + goto error; + _write_sysconfig(v, oh); + +error: + return ret; } /** diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c index a5409ce3f323..a6bde34e443a 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1000,7 +1000,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { .flags = OMAP_FIREWALL_L4, } }, - .flags = OCPIF_SWSUP_IDLE, .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c index c4f56cb60d7d..04a3885f4475 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1049,7 +1049,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { .slave = &omap2430_dss_venc_hwmod, .clk = "dss_ick", .addr = omap2_dss_venc_addrs, - .flags = OCPIF_SWSUP_IDLE, .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 34b9766d1d23..db86ce90c69f 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1676,7 +1676,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { .flags = OMAP_FIREWALL_L4, } }, - .flags = OCPIF_SWSUP_IDLE, .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index cc9bd106a854..6abc75753e42 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -2594,6 +2594,15 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, + /* + * ISS needs 100 OCP clk cycles delay after a softreset before + * accessing sysconfig again. + * The lowest frequency at the moment for L3 bus is 100 MHz, so + * 1usec delay is needed. Add an x2 margin to be safe (2 usecs). + * + * TODO: Indicate errata when available. + */ + .srst_udelay = 2, .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | diff --git a/trunk/arch/arm/mach-omap2/serial.c b/trunk/arch/arm/mach-omap2/serial.c index 0cdd359a128e..9fc2f44188cb 100644 --- a/trunk/arch/arm/mach-omap2/serial.c +++ b/trunk/arch/arm/mach-omap2/serial.c @@ -108,8 +108,14 @@ static void omap_uart_set_noidle(struct platform_device *pdev) static void omap_uart_set_smartidle(struct platform_device *pdev) { struct omap_device *od = to_omap_device(pdev); + u8 idlemode; - omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART); + if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP) + idlemode = HWMOD_IDLEMODE_SMART_WKUP; + else + idlemode = HWMOD_IDLEMODE_SMART; + + omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode); } #else @@ -120,124 +126,8 @@ static void omap_uart_set_smartidle(struct platform_device *pdev) {} #endif /* CONFIG_PM */ #ifdef CONFIG_OMAP_MUX -static struct omap_device_pad default_uart1_pads[] __initdata = { - { - .name = "uart1_cts.uart1_cts", - .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, - }, - { - .name = "uart1_rts.uart1_rts", - .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, - }, - { - .name = "uart1_tx.uart1_tx", - .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, - }, - { - .name = "uart1_rx.uart1_rx", - .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, - .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, - .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, - }, -}; - -static struct omap_device_pad default_uart2_pads[] __initdata = { - { - .name = "uart2_cts.uart2_cts", - .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, - }, - { - .name = "uart2_rts.uart2_rts", - .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, - }, - { - .name = "uart2_tx.uart2_tx", - .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, - }, - { - .name = "uart2_rx.uart2_rx", - .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, - .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, - .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, - }, -}; - -static struct omap_device_pad default_uart3_pads[] __initdata = { - { - .name = "uart3_cts_rctx.uart3_cts_rctx", - .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, - }, - { - .name = "uart3_rts_sd.uart3_rts_sd", - .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, - }, - { - .name = "uart3_tx_irtx.uart3_tx_irtx", - .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, - }, - { - .name = "uart3_rx_irrx.uart3_rx_irrx", - .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, - .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0, - .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0, - }, -}; - -static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = { - { - .name = "gpmc_wait2.uart4_tx", - .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, - }, - { - .name = "gpmc_wait3.uart4_rx", - .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, - .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2, - .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2, - }, -}; - -static struct omap_device_pad default_omap4_uart4_pads[] __initdata = { - { - .name = "uart4_tx.uart4_tx", - .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, - }, - { - .name = "uart4_rx.uart4_rx", - .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, - .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0, - .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0, - }, -}; - static void omap_serial_fill_default_pads(struct omap_board_data *bdata) { - switch (bdata->id) { - case 0: - bdata->pads = default_uart1_pads; - bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads); - break; - case 1: - bdata->pads = default_uart2_pads; - bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads); - break; - case 2: - bdata->pads = default_uart3_pads; - bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads); - break; - case 3: - if (cpu_is_omap44xx()) { - bdata->pads = default_omap4_uart4_pads; - bdata->pads_cnt = - ARRAY_SIZE(default_omap4_uart4_pads); - } else if (cpu_is_omap3630()) { - bdata->pads = default_omap36xx_uart4_pads; - bdata->pads_cnt = - ARRAY_SIZE(default_omap36xx_uart4_pads); - } - break; - default: - break; - } } #else static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {} diff --git a/trunk/arch/arm/mach-omap2/twl-common.c b/trunk/arch/arm/mach-omap2/twl-common.c index 4b57757bf9d1..7a7b89304c48 100644 --- a/trunk/arch/arm/mach-omap2/twl-common.c +++ b/trunk/arch/arm/mach-omap2/twl-common.c @@ -37,6 +37,16 @@ static struct i2c_board_info __initdata pmic_i2c_board_info = { .flags = I2C_CLIENT_WAKE, }; +static struct i2c_board_info __initdata omap4_i2c1_board_info[] = { + { + .addr = 0x48, + .flags = I2C_CLIENT_WAKE, + }, + { + I2C_BOARD_INFO("twl6040", 0x4b), + }, +}; + void __init omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, struct twl4030_platform_data *pmic_data) @@ -49,14 +59,31 @@ void __init omap_pmic_init(int bus, u32 clkrate, omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); } +void __init omap4_pmic_init(const char *pmic_type, + struct twl4030_platform_data *pmic_data, + struct twl6040_platform_data *twl6040_data, int twl6040_irq) +{ + /* PMIC part*/ + strncpy(omap4_i2c1_board_info[0].type, pmic_type, + sizeof(omap4_i2c1_board_info[0].type)); + omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N; + omap4_i2c1_board_info[0].platform_data = pmic_data; + + /* TWL6040 audio IC part */ + omap4_i2c1_board_info[1].irq = twl6040_irq; + omap4_i2c1_board_info[1].platform_data = twl6040_data; + + omap_register_i2c_bus(1, 400, omap4_i2c1_board_info, 2); + +} + void __init omap_pmic_late_init(void) { /* Init the OMAP TWL parameters (if PMIC has been registerd) */ - if (!pmic_i2c_board_info.irq) - return; - - omap3_twl_init(); - omap4_twl_init(); + if (pmic_i2c_board_info.irq) + omap3_twl_init(); + if (omap4_i2c1_board_info[0].irq) + omap4_twl_init(); } #if defined(CONFIG_ARCH_OMAP3) diff --git a/trunk/arch/arm/mach-omap2/twl-common.h b/trunk/arch/arm/mach-omap2/twl-common.h index 275dde8cb27a..09627483a57f 100644 --- a/trunk/arch/arm/mach-omap2/twl-common.h +++ b/trunk/arch/arm/mach-omap2/twl-common.h @@ -29,6 +29,7 @@ struct twl4030_platform_data; +struct twl6040_platform_data; void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, struct twl4030_platform_data *pmic_data); @@ -46,12 +47,9 @@ static inline void omap3_pmic_init(const char *pmic_type, omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); } -static inline void omap4_pmic_init(const char *pmic_type, - struct twl4030_platform_data *pmic_data) -{ - /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */ - omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); -} +void omap4_pmic_init(const char *pmic_type, + struct twl4030_platform_data *pmic_data, + struct twl6040_platform_data *audio_data, int twl6040_irq); void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, u32 pdata_flags, u32 regulators_flags); diff --git a/trunk/arch/arm/mach-ux500/Kconfig b/trunk/arch/arm/mach-ux500/Kconfig index 880d02ec89d4..ef7099eea0f2 100644 --- a/trunk/arch/arm/mach-ux500/Kconfig +++ b/trunk/arch/arm/mach-ux500/Kconfig @@ -17,6 +17,7 @@ config UX500_SOC_DB5500 config UX500_SOC_DB8500 bool select MFD_DB8500_PRCMU + select REGULATOR select REGULATOR_DB8500_PRCMU select CPU_FREQ_TABLE if CPU_FREQ diff --git a/trunk/arch/arm/mach-ux500/platsmp.c b/trunk/arch/arm/mach-ux500/platsmp.c index d2058ef8345f..eff5842f6232 100644 --- a/trunk/arch/arm/mach-ux500/platsmp.c +++ b/trunk/arch/arm/mach-ux500/platsmp.c @@ -99,7 +99,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) */ write_pen_release(cpu_logical_map(cpu)); - gic_raise_softirq(cpumask_of(cpu), 1); + smp_send_reschedule(cpu); timeout = jiffies + (1 * HZ); while (time_before(jiffies, timeout)) { diff --git a/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h b/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h index 8070145ccb98..3f26db4ee8e6 100644 --- a/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -305,6 +305,7 @@ struct omap_hwmod_sysc_fields { * @rev_offs: IP block revision register offset (from module base addr) * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr) * @syss_offs: OCP_SYSSTATUS register offset (from module base addr) + * @srst_udelay: Delay needed after doing a softreset in usecs * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART} * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported * @clockact: the default value of the module CLOCKACTIVITY bits @@ -330,9 +331,10 @@ struct omap_hwmod_class_sysconfig { u16 sysc_offs; u16 syss_offs; u16 sysc_flags; + struct omap_hwmod_sysc_fields *sysc_fields; + u8 srst_udelay; u8 idlemodes; u8 clockact; - struct omap_hwmod_sysc_fields *sysc_fields; }; /** diff --git a/trunk/arch/arm/plat-omap/sram.c b/trunk/arch/arm/plat-omap/sram.c index eec98afa0f83..f9a8c5341ee9 100644 --- a/trunk/arch/arm/plat-omap/sram.c +++ b/trunk/arch/arm/plat-omap/sram.c @@ -348,7 +348,6 @@ u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc, sdrc_actim_ctrl_b_1, sdrc_mr_1); } -#ifdef CONFIG_PM void omap3_sram_restore_context(void) { omap_sram_ceil = omap_sram_base + omap_sram_size; @@ -358,17 +357,18 @@ void omap3_sram_restore_context(void) omap3_sram_configure_core_dpll_sz); omap_push_sram_idle(); } -#endif /* CONFIG_PM */ - -#endif /* CONFIG_ARCH_OMAP3 */ static inline int omap34xx_sram_init(void) { -#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) omap3_sram_restore_context(); -#endif return 0; } +#else +static inline int omap34xx_sram_init(void) +{ + return 0; +} +#endif /* CONFIG_ARCH_OMAP3 */ static inline int am33xx_sram_init(void) { diff --git a/trunk/arch/ia64/include/asm/futex.h b/trunk/arch/ia64/include/asm/futex.h index 0ab82cc2dc8f..d2bf1fd5e44f 100644 --- a/trunk/arch/ia64/include/asm/futex.h +++ b/trunk/arch/ia64/include/asm/futex.h @@ -106,15 +106,16 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, return -EFAULT; { - register unsigned long r8 __asm ("r8") = 0; + register unsigned long r8 __asm ("r8"); unsigned long prev; __asm__ __volatile__( " mf;; \n" - " mov ar.ccv=%3;; \n" - "[1:] cmpxchg4.acq %0=[%1],%2,ar.ccv \n" + " mov %0=r0 \n" + " mov ar.ccv=%4;; \n" + "[1:] cmpxchg4.acq %1=[%2],%3,ar.ccv \n" " .xdata4 \"__ex_table\", 1b-., 2f-. \n" "[2:]" - : "=r" (prev) + : "=r" (r8), "=r" (prev) : "r" (uaddr), "r" (newval), "rO" ((long) (unsigned) oldval) : "memory"); diff --git a/trunk/arch/ia64/kernel/perfmon.c b/trunk/arch/ia64/kernel/perfmon.c index 9d0fd7d5bb82..f00ba025375d 100644 --- a/trunk/arch/ia64/kernel/perfmon.c +++ b/trunk/arch/ia64/kernel/perfmon.c @@ -604,12 +604,6 @@ pfm_unprotect_ctx_ctxsw(pfm_context_t *x, unsigned long f) spin_unlock(&(x)->ctx_lock); } -static inline unsigned int -pfm_do_munmap(struct mm_struct *mm, unsigned long addr, size_t len, int acct) -{ - return do_munmap(mm, addr, len); -} - static inline unsigned long pfm_get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags, unsigned long exec) { @@ -1458,8 +1452,9 @@ pfm_unreserve_session(pfm_context_t *ctx, int is_syswide, unsigned int cpu) * a PROTECT_CTX() section. */ static int -pfm_remove_smpl_mapping(struct task_struct *task, void *vaddr, unsigned long size) +pfm_remove_smpl_mapping(void *vaddr, unsigned long size) { + struct task_struct *task = current; int r; /* sanity checks */ @@ -1473,13 +1468,8 @@ pfm_remove_smpl_mapping(struct task_struct *task, void *vaddr, unsigned long siz /* * does the actual unmapping */ - down_write(&task->mm->mmap_sem); + r = vm_munmap((unsigned long)vaddr, size); - DPRINT(("down_write done smpl_vaddr=%p size=%lu\n", vaddr, size)); - - r = pfm_do_munmap(task->mm, (unsigned long)vaddr, size, 0); - - up_write(&task->mm->mmap_sem); if (r !=0) { printk(KERN_ERR "perfmon: [%d] unable to unmap sampling buffer @%p size=%lu\n", task_pid_nr(task), vaddr, size); } @@ -1945,7 +1935,7 @@ pfm_flush(struct file *filp, fl_owner_t id) * because some VM function reenables interrupts. * */ - if (smpl_buf_vaddr) pfm_remove_smpl_mapping(current, smpl_buf_vaddr, smpl_buf_size); + if (smpl_buf_vaddr) pfm_remove_smpl_mapping(smpl_buf_vaddr, smpl_buf_size); return 0; } diff --git a/trunk/arch/m68k/configs/m5275evb_defconfig b/trunk/arch/m68k/configs/m5275evb_defconfig index 33c32aeca12b..a1230e82bb1e 100644 --- a/trunk/arch/m68k/configs/m5275evb_defconfig +++ b/trunk/arch/m68k/configs/m5275evb_defconfig @@ -49,7 +49,6 @@ CONFIG_BLK_DEV_RAM=y CONFIG_NETDEVICES=y CONFIG_NET_ETHERNET=y CONFIG_FEC=y -CONFIG_FEC2=y # CONFIG_NETDEV_1000 is not set # CONFIG_NETDEV_10000 is not set CONFIG_PPP=y diff --git a/trunk/arch/m68k/platform/527x/config.c b/trunk/arch/m68k/platform/527x/config.c index 7ed848c3b848..f91a53294c35 100644 --- a/trunk/arch/m68k/platform/527x/config.c +++ b/trunk/arch/m68k/platform/527x/config.c @@ -74,9 +74,7 @@ static void __init m527x_fec_init(void) writew(par | 0xf00, MCF_IPSBAR + 0x100082); v = readb(MCF_IPSBAR + 0x100078); writeb(v | 0xc0, MCF_IPSBAR + 0x100078); -#endif -#ifdef CONFIG_FEC2 /* Set multi-function pins to ethernet mode for fec1 */ par = readw(MCF_IPSBAR + 0x100082); writew(par | 0xa0, MCF_IPSBAR + 0x100082); diff --git a/trunk/arch/m68k/platform/68EZ328/Makefile b/trunk/arch/m68k/platform/68EZ328/Makefile index ee97735a242c..b44d799b1115 100644 --- a/trunk/arch/m68k/platform/68EZ328/Makefile +++ b/trunk/arch/m68k/platform/68EZ328/Makefile @@ -3,9 +3,3 @@ # obj-y := config.o - -extra-y := bootlogo.rh - -$(obj)/bootlogo.rh: $(src)/bootlogo.h - perl $(src)/../68328/bootlogo.pl < $(src)/bootlogo.h \ - > $(obj)/bootlogo.rh diff --git a/trunk/arch/m68k/platform/68VZ328/Makefile b/trunk/arch/m68k/platform/68VZ328/Makefile index 447ffa0fd7c7..a49d75e65489 100644 --- a/trunk/arch/m68k/platform/68VZ328/Makefile +++ b/trunk/arch/m68k/platform/68VZ328/Makefile @@ -3,14 +3,9 @@ # obj-y := config.o -logo-$(UCDIMM) := bootlogo.rh -logo-$(DRAGEN2) := screen.h -extra-y := $(logo-y) - -$(obj)/bootlogo.rh: $(src)/../68EZ328/bootlogo.h - perl $(src)/bootlogo.pl < $(src)/../68328/bootlogo.h > $(obj)/bootlogo.rh +extra-$(DRAGEN2):= screen.h $(obj)/screen.h: $(src)/screen.xbm $(src)/xbm2lcd.pl perl $(src)/xbm2lcd.pl < $(src)/screen.xbm > $(obj)/screen.h -clean-files := $(obj)/screen.h $(obj)/bootlogo.rh +clean-files := $(obj)/screen.h diff --git a/trunk/arch/m68k/platform/68EZ328/bootlogo.h b/trunk/arch/m68k/platform/68VZ328/bootlogo.h similarity index 99% rename from trunk/arch/m68k/platform/68EZ328/bootlogo.h rename to trunk/arch/m68k/platform/68VZ328/bootlogo.h index e842bdae5839..b38e2b255142 100644 --- a/trunk/arch/m68k/platform/68EZ328/bootlogo.h +++ b/trunk/arch/m68k/platform/68VZ328/bootlogo.h @@ -1,6 +1,6 @@ #define splash_width 640 #define splash_height 480 -static unsigned char splash_bits[] = { +unsigned char __attribute__ ((aligned(16))) bootlogo_bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, diff --git a/trunk/arch/m68k/platform/coldfire/device.c b/trunk/arch/m68k/platform/coldfire/device.c index fa50c48292ff..7af97362b95c 100644 --- a/trunk/arch/m68k/platform/coldfire/device.c +++ b/trunk/arch/m68k/platform/coldfire/device.c @@ -114,7 +114,7 @@ static struct resource mcf_fec1_resources[] = { static struct platform_device mcf_fec1 = { .name = "fec", - .id = 0, + .id = 1, .num_resources = ARRAY_SIZE(mcf_fec1_resources), .resource = mcf_fec1_resources, }; diff --git a/trunk/arch/s390/Kconfig b/trunk/arch/s390/Kconfig index 2b7c0fbe578e..9015060919a0 100644 --- a/trunk/arch/s390/Kconfig +++ b/trunk/arch/s390/Kconfig @@ -90,7 +90,6 @@ config S390 select HAVE_KERNEL_XZ select HAVE_ARCH_MUTEX_CPU_RELAX select HAVE_ARCH_JUMP_LABEL if !MARCH_G5 - select HAVE_RCU_TABLE_FREE if SMP select ARCH_SAVE_PAGE_KEYS if HIBERNATION select HAVE_MEMBLOCK select HAVE_MEMBLOCK_NODE_MAP diff --git a/trunk/arch/s390/defconfig b/trunk/arch/s390/defconfig index 6cf8e26b3137..1957a9dd256d 100644 --- a/trunk/arch/s390/defconfig +++ b/trunk/arch/s390/defconfig @@ -1,8 +1,12 @@ CONFIG_EXPERIMENTAL=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_FHANDLE=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y CONFIG_AUDIT=y -CONFIG_RCU_TRACE=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_CGROUPS=y @@ -14,16 +18,22 @@ CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y CONFIG_CGROUP_SCHED=y CONFIG_RT_GROUP_SCHED=y CONFIG_BLK_CGROUP=y +CONFIG_NAMESPACES=y CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_EXPERT=y # CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y CONFIG_PROFILING=y CONFIG_OPROFILE=y CONFIG_KPROBES=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_IBM_PARTITION=y CONFIG_DEFAULT_DEADLINE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y @@ -34,18 +44,15 @@ CONFIG_KSM=y CONFIG_BINFMT_MISC=m CONFIG_CMM=m CONFIG_HZ_100=y -CONFIG_KEXEC=y -CONFIG_PM=y +CONFIG_CRASH_DUMP=y CONFIG_HIBERNATION=y CONFIG_PACKET=y CONFIG_UNIX=y CONFIG_NET_KEY=y -CONFIG_AFIUCV=m CONFIG_INET=y CONFIG_IP_MULTICAST=y # CONFIG_INET_LRO is not set CONFIG_IPV6=y -CONFIG_NET_SCTPPROBE=m CONFIG_L2TP=m CONFIG_L2TP_DEBUGFS=m CONFIG_VLAN_8021Q=y @@ -84,15 +91,14 @@ CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y CONFIG_ZFCP=y -CONFIG_ZFCP_DIF=y CONFIG_NETDEVICES=y -CONFIG_DUMMY=m CONFIG_BONDING=m +CONFIG_DUMMY=m CONFIG_EQUALIZER=m CONFIG_TUN=m -CONFIG_NET_ETHERNET=y CONFIG_VIRTIO_NET=y CONFIG_RAW_DRIVER=m +CONFIG_VIRTIO_BALLOON=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set @@ -103,27 +109,21 @@ CONFIG_PROC_KCORE=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y # CONFIG_NETWORK_FILESYSTEMS is not set -CONFIG_PARTITION_ADVANCED=y -CONFIG_IBM_PARTITION=y -CONFIG_DLM=m CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y CONFIG_TIMER_STATS=y CONFIG_PROVE_LOCKING=y CONFIG_PROVE_RCU=y CONFIG_LOCK_STAT=y CONFIG_DEBUG_LOCKDEP=y -CONFIG_DEBUG_SPINLOCK_SLEEP=y CONFIG_DEBUG_LIST=y CONFIG_DEBUG_NOTIFIERS=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set +CONFIG_RCU_TRACE=y CONFIG_KPROBES_SANITY_TEST=y CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y CONFIG_CPU_NOTIFIER_ERROR_INJECT=m CONFIG_LATENCYTOP=y -CONFIG_SYSCTL_SYSCALL_CHECK=y CONFIG_DEBUG_PAGEALLOC=y -# CONFIG_FTRACE is not set +CONFIG_BLK_DEV_IO_TRACE=y # CONFIG_STRICT_DEVMEM is not set CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_CRYPTD=m @@ -173,4 +173,3 @@ CONFIG_CRYPTO_SHA512_S390=m CONFIG_CRYPTO_DES_S390=m CONFIG_CRYPTO_AES_S390=m CONFIG_CRC7=m -CONFIG_VIRTIO_BALLOON=y diff --git a/trunk/arch/s390/include/asm/facility.h b/trunk/arch/s390/include/asm/facility.h index 1e5b27edc0c9..2ee66a65f2d4 100644 --- a/trunk/arch/s390/include/asm/facility.h +++ b/trunk/arch/s390/include/asm/facility.h @@ -38,12 +38,11 @@ static inline void stfle(u64 *stfle_fac_list, int size) unsigned long nr; preempt_disable(); - S390_lowcore.stfl_fac_list = 0; asm volatile( " .insn s,0xb2b10000,0(0)\n" /* stfl */ "0:\n" EX_TABLE(0b, 0b) - : "=m" (S390_lowcore.stfl_fac_list)); + : "+m" (S390_lowcore.stfl_fac_list)); nr = 4; /* bytes stored by stfl */ memcpy(stfle_fac_list, &S390_lowcore.stfl_fac_list, 4); if (S390_lowcore.stfl_fac_list & 0x01000000) { diff --git a/trunk/arch/s390/include/asm/pgalloc.h b/trunk/arch/s390/include/asm/pgalloc.h index 8eef9b5b3cf4..78e3041919de 100644 --- a/trunk/arch/s390/include/asm/pgalloc.h +++ b/trunk/arch/s390/include/asm/pgalloc.h @@ -22,10 +22,7 @@ void crst_table_free(struct mm_struct *, unsigned long *); unsigned long *page_table_alloc(struct mm_struct *, unsigned long); void page_table_free(struct mm_struct *, unsigned long *); -#ifdef CONFIG_HAVE_RCU_TABLE_FREE void page_table_free_rcu(struct mmu_gather *, unsigned long *); -void __tlb_remove_table(void *_table); -#endif static inline void clear_table(unsigned long *s, unsigned long val, size_t n) { diff --git a/trunk/arch/s390/include/asm/swab.h b/trunk/arch/s390/include/asm/swab.h index 6bdee21c077e..a3e4ebb32090 100644 --- a/trunk/arch/s390/include/asm/swab.h +++ b/trunk/arch/s390/include/asm/swab.h @@ -77,7 +77,7 @@ static inline __u16 __arch_swab16p(const __u16 *x) asm volatile( #ifndef __s390x__ - " icm %0,2,%O+1(%R1)\n" + " icm %0,2,%O1+1(%R1)\n" " ic %0,%1\n" : "=&d" (result) : "Q" (*x) : "cc"); #else /* __s390x__ */ diff --git a/trunk/arch/s390/include/asm/tlb.h b/trunk/arch/s390/include/asm/tlb.h index c687a2c83462..775a5eea8f9e 100644 --- a/trunk/arch/s390/include/asm/tlb.h +++ b/trunk/arch/s390/include/asm/tlb.h @@ -30,14 +30,10 @@ struct mmu_gather { struct mm_struct *mm; -#ifdef CONFIG_HAVE_RCU_TABLE_FREE struct mmu_table_batch *batch; -#endif unsigned int fullmm; - unsigned int need_flush; }; -#ifdef CONFIG_HAVE_RCU_TABLE_FREE struct mmu_table_batch { struct rcu_head rcu; unsigned int nr; @@ -49,7 +45,6 @@ struct mmu_table_batch { extern void tlb_table_flush(struct mmu_gather *tlb); extern void tlb_remove_table(struct mmu_gather *tlb, void *table); -#endif static inline void tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, @@ -57,29 +52,20 @@ static inline void tlb_gather_mmu(struct mmu_gather *tlb, { tlb->mm = mm; tlb->fullmm = full_mm_flush; - tlb->need_flush = 0; -#ifdef CONFIG_HAVE_RCU_TABLE_FREE tlb->batch = NULL; -#endif if (tlb->fullmm) __tlb_flush_mm(mm); } static inline void tlb_flush_mmu(struct mmu_gather *tlb) { - if (!tlb->need_flush) - return; - tlb->need_flush = 0; - __tlb_flush_mm(tlb->mm); -#ifdef CONFIG_HAVE_RCU_TABLE_FREE tlb_table_flush(tlb); -#endif } static inline void tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) { - tlb_flush_mmu(tlb); + tlb_table_flush(tlb); } /* @@ -105,10 +91,8 @@ static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page) static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, unsigned long address) { -#ifdef CONFIG_HAVE_RCU_TABLE_FREE if (!tlb->fullmm) return page_table_free_rcu(tlb, (unsigned long *) pte); -#endif page_table_free(tlb->mm, (unsigned long *) pte); } @@ -125,10 +109,8 @@ static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd, #ifdef __s390x__ if (tlb->mm->context.asce_limit <= (1UL << 31)) return; -#ifdef CONFIG_HAVE_RCU_TABLE_FREE if (!tlb->fullmm) return tlb_remove_table(tlb, pmd); -#endif crst_table_free(tlb->mm, (unsigned long *) pmd); #endif } @@ -146,10 +128,8 @@ static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud, #ifdef __s390x__ if (tlb->mm->context.asce_limit <= (1UL << 42)) return; -#ifdef CONFIG_HAVE_RCU_TABLE_FREE if (!tlb->fullmm) return tlb_remove_table(tlb, pud); -#endif crst_table_free(tlb->mm, (unsigned long *) pud); #endif } diff --git a/trunk/arch/s390/kernel/head.S b/trunk/arch/s390/kernel/head.S index c27a0727f930..adccd908ebc7 100644 --- a/trunk/arch/s390/kernel/head.S +++ b/trunk/arch/s390/kernel/head.S @@ -474,9 +474,9 @@ ENTRY(startup_kdump) stck __LC_LAST_UPDATE_CLOCK spt 5f-.LPG0(%r13) mvc __LC_LAST_UPDATE_TIMER(8),5f-.LPG0(%r13) + xc __LC_STFL_FAC_LIST(8),__LC_STFL_FAC_LIST #ifndef CONFIG_MARCH_G5 # check capabilities against MARCH_{G5,Z900,Z990,Z9_109,Z10} - xc __LC_STFL_FAC_LIST(8),__LC_STFL_FAC_LIST .insn s,0xb2b10000,__LC_STFL_FAC_LIST # store facility list tm __LC_STFL_FAC_LIST,0x01 # stfle available ? jz 0f diff --git a/trunk/arch/s390/kernel/irq.c b/trunk/arch/s390/kernel/irq.c index 1c2cdd59ccd0..8a22c27219dd 100644 --- a/trunk/arch/s390/kernel/irq.c +++ b/trunk/arch/s390/kernel/irq.c @@ -118,9 +118,10 @@ asmlinkage void do_softirq(void) "a" (__do_softirq) : "0", "1", "2", "3", "4", "5", "14", "cc", "memory" ); - } else + } else { /* We are already on the async stack. */ __do_softirq(); + } } local_irq_restore(flags); @@ -192,11 +193,12 @@ int unregister_external_interrupt(u16 code, ext_int_handler_t handler) int index = ext_hash(code); spin_lock_irqsave(&ext_int_hash_lock, flags); - list_for_each_entry_rcu(p, &ext_int_hash[index], entry) + list_for_each_entry_rcu(p, &ext_int_hash[index], entry) { if (p->code == code && p->handler == handler) { list_del_rcu(&p->entry); kfree_rcu(p, rcu); } + } spin_unlock_irqrestore(&ext_int_hash_lock, flags); return 0; } @@ -211,9 +213,10 @@ void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code, old_regs = set_irq_regs(regs); irq_enter(); - if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) + if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) { /* Serve timer interrupts first. */ clock_comparator_work(); + } kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++; if (ext_code.code != 0x1004) __get_cpu_var(s390_idle).nohz_delay = 1; diff --git a/trunk/arch/s390/kernel/perf_cpum_cf.c b/trunk/arch/s390/kernel/perf_cpum_cf.c index 46405086479c..cb019f429e88 100644 --- a/trunk/arch/s390/kernel/perf_cpum_cf.c +++ b/trunk/arch/s390/kernel/perf_cpum_cf.c @@ -178,7 +178,7 @@ static void cpumf_pmu_enable(struct pmu *pmu) err = lcctl(cpuhw->state); if (err) { pr_err("Enabling the performance measuring unit " - "failed with rc=%lx\n", err); + "failed with rc=%x\n", err); return; } @@ -203,7 +203,7 @@ static void cpumf_pmu_disable(struct pmu *pmu) err = lcctl(inactive); if (err) { pr_err("Disabling the performance measuring unit " - "failed with rc=%lx\n", err); + "failed with rc=%x\n", err); return; } diff --git a/trunk/arch/s390/mm/maccess.c b/trunk/arch/s390/mm/maccess.c index 7bb15fcca75e..e1335dc2b1b7 100644 --- a/trunk/arch/s390/mm/maccess.c +++ b/trunk/arch/s390/mm/maccess.c @@ -61,21 +61,14 @@ long probe_kernel_write(void *dst, const void *src, size_t size) return copied < 0 ? -EFAULT : 0; } -/* - * Copy memory in real mode (kernel to kernel) - */ -int memcpy_real(void *dest, void *src, size_t count) +static int __memcpy_real(void *dest, void *src, size_t count) { register unsigned long _dest asm("2") = (unsigned long) dest; register unsigned long _len1 asm("3") = (unsigned long) count; register unsigned long _src asm("4") = (unsigned long) src; register unsigned long _len2 asm("5") = (unsigned long) count; - unsigned long flags; int rc = -EFAULT; - if (!count) - return 0; - flags = __arch_local_irq_stnsm(0xf8UL); asm volatile ( "0: mvcle %1,%2,0x0\n" "1: jo 0b\n" @@ -86,7 +79,23 @@ int memcpy_real(void *dest, void *src, size_t count) "+d" (_len2), "=m" (*((long *) dest)) : "m" (*((long *) src)) : "cc", "memory"); - arch_local_irq_restore(flags); + return rc; +} + +/* + * Copy memory in real mode (kernel to kernel) + */ +int memcpy_real(void *dest, void *src, size_t count) +{ + unsigned long flags; + int rc; + + if (!count) + return 0; + local_irq_save(flags); + __arch_local_irq_stnsm(0xfbUL); + rc = __memcpy_real(dest, src, count); + local_irq_restore(flags); return rc; } diff --git a/trunk/arch/s390/mm/pgtable.c b/trunk/arch/s390/mm/pgtable.c index 373adf69b01c..6e765bf00670 100644 --- a/trunk/arch/s390/mm/pgtable.c +++ b/trunk/arch/s390/mm/pgtable.c @@ -678,8 +678,6 @@ void page_table_free(struct mm_struct *mm, unsigned long *table) } } -#ifdef CONFIG_HAVE_RCU_TABLE_FREE - static void __page_table_free_rcu(void *table, unsigned bit) { struct page *page; @@ -733,7 +731,66 @@ void __tlb_remove_table(void *_table) free_pages((unsigned long) table, ALLOC_ORDER); } -#endif +static void tlb_remove_table_smp_sync(void *arg) +{ + /* Simply deliver the interrupt */ +} + +static void tlb_remove_table_one(void *table) +{ + /* + * This isn't an RCU grace period and hence the page-tables cannot be + * assumed to be actually RCU-freed. + * + * It is however sufficient for software page-table walkers that rely + * on IRQ disabling. See the comment near struct mmu_table_batch. + */ + smp_call_function(tlb_remove_table_smp_sync, NULL, 1); + __tlb_remove_table(table); +} + +static void tlb_remove_table_rcu(struct rcu_head *head) +{ + struct mmu_table_batch *batch; + int i; + + batch = container_of(head, struct mmu_table_batch, rcu); + + for (i = 0; i < batch->nr; i++) + __tlb_remove_table(batch->tables[i]); + + free_page((unsigned long)batch); +} + +void tlb_table_flush(struct mmu_gather *tlb) +{ + struct mmu_table_batch **batch = &tlb->batch; + + if (*batch) { + __tlb_flush_mm(tlb->mm); + call_rcu_sched(&(*batch)->rcu, tlb_remove_table_rcu); + *batch = NULL; + } +} + +void tlb_remove_table(struct mmu_gather *tlb, void *table) +{ + struct mmu_table_batch **batch = &tlb->batch; + + if (*batch == NULL) { + *batch = (struct mmu_table_batch *) + __get_free_page(GFP_NOWAIT | __GFP_NOWARN); + if (*batch == NULL) { + __tlb_flush_mm(tlb->mm); + tlb_remove_table_one(table); + return; + } + (*batch)->nr = 0; + } + (*batch)->tables[(*batch)->nr++] = table; + if ((*batch)->nr == MAX_TABLE_BATCH) + tlb_table_flush(tlb); +} /* * switch on pgstes for its userspace process (for kvm) diff --git a/trunk/arch/sparc/kernel/leon_smp.c b/trunk/arch/sparc/kernel/leon_smp.c index 1210fde18740..160cac9c4036 100644 --- a/trunk/arch/sparc/kernel/leon_smp.c +++ b/trunk/arch/sparc/kernel/leon_smp.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -78,6 +79,8 @@ void __cpuinit leon_callin(void) local_flush_tlb_all(); leon_configure_cache_smp(); + notify_cpu_starting(cpuid); + /* Get our local ticker going. */ smp_setup_percpu_timer(); diff --git a/trunk/arch/sparc/kernel/sys_sparc_64.c b/trunk/arch/sparc/kernel/sys_sparc_64.c index 232df9949530..3ee51f189a55 100644 --- a/trunk/arch/sparc/kernel/sys_sparc_64.c +++ b/trunk/arch/sparc/kernel/sys_sparc_64.c @@ -566,15 +566,10 @@ SYSCALL_DEFINE6(mmap, unsigned long, addr, unsigned long, len, SYSCALL_DEFINE2(64_munmap, unsigned long, addr, size_t, len) { - long ret; - if (invalid_64bit_range(addr, len)) return -EINVAL; - down_write(¤t->mm->mmap_sem); - ret = do_munmap(current->mm, addr, len); - up_write(¤t->mm->mmap_sem); - return ret; + return vm_munmap(addr, len); } extern unsigned long do_mremap(unsigned long addr, diff --git a/trunk/arch/tile/kernel/single_step.c b/trunk/arch/tile/kernel/single_step.c index 9efbc1391b3c..89529c9f0605 100644 --- a/trunk/arch/tile/kernel/single_step.c +++ b/trunk/arch/tile/kernel/single_step.c @@ -346,12 +346,10 @@ void single_step_once(struct pt_regs *regs) } /* allocate a cache line of writable, executable memory */ - down_write(¤t->mm->mmap_sem); - buffer = (void __user *) do_mmap(NULL, 0, 64, + buffer = (void __user *) vm_mmap(NULL, 0, 64, PROT_EXEC | PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, 0); - up_write(¤t->mm->mmap_sem); if (IS_ERR((void __force *)buffer)) { kfree(state); diff --git a/trunk/arch/x86/ia32/ia32_aout.c b/trunk/arch/x86/ia32/ia32_aout.c index d511d951a052..4824fb45560f 100644 --- a/trunk/arch/x86/ia32/ia32_aout.c +++ b/trunk/arch/x86/ia32/ia32_aout.c @@ -119,9 +119,7 @@ static void set_brk(unsigned long start, unsigned long end) end = PAGE_ALIGN(end); if (end <= start) return; - down_write(¤t->mm->mmap_sem); - do_brk(start, end - start); - up_write(¤t->mm->mmap_sem); + vm_brk(start, end - start); } #ifdef CORE_DUMP @@ -332,9 +330,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs) pos = 32; map_size = ex.a_text+ex.a_data; - down_write(¤t->mm->mmap_sem); - error = do_brk(text_addr & PAGE_MASK, map_size); - up_write(¤t->mm->mmap_sem); + error = vm_brk(text_addr & PAGE_MASK, map_size); if (error != (text_addr & PAGE_MASK)) { send_sig(SIGKILL, current, 0); @@ -373,9 +369,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs) if (!bprm->file->f_op->mmap || (fd_offset & ~PAGE_MASK) != 0) { loff_t pos = fd_offset; - down_write(¤t->mm->mmap_sem); - do_brk(N_TXTADDR(ex), ex.a_text+ex.a_data); - up_write(¤t->mm->mmap_sem); + vm_brk(N_TXTADDR(ex), ex.a_text+ex.a_data); bprm->file->f_op->read(bprm->file, (char __user *)N_TXTADDR(ex), ex.a_text+ex.a_data, &pos); @@ -385,26 +379,22 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs) goto beyond_if; } - down_write(¤t->mm->mmap_sem); - error = do_mmap(bprm->file, N_TXTADDR(ex), ex.a_text, + error = vm_mmap(bprm->file, N_TXTADDR(ex), ex.a_text, PROT_READ | PROT_EXEC, MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_EXECUTABLE | MAP_32BIT, fd_offset); - up_write(¤t->mm->mmap_sem); if (error != N_TXTADDR(ex)) { send_sig(SIGKILL, current, 0); return error; } - down_write(¤t->mm->mmap_sem); - error = do_mmap(bprm->file, N_DATADDR(ex), ex.a_data, + error = vm_mmap(bprm->file, N_DATADDR(ex), ex.a_data, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_EXECUTABLE | MAP_32BIT, fd_offset + ex.a_text); - up_write(¤t->mm->mmap_sem); if (error != N_DATADDR(ex)) { send_sig(SIGKILL, current, 0); return error; @@ -476,9 +466,7 @@ static int load_aout_library(struct file *file) error_time = jiffies; } #endif - down_write(¤t->mm->mmap_sem); - do_brk(start_addr, ex.a_text + ex.a_data + ex.a_bss); - up_write(¤t->mm->mmap_sem); + vm_brk(start_addr, ex.a_text + ex.a_data + ex.a_bss); file->f_op->read(file, (char __user *)start_addr, ex.a_text + ex.a_data, &pos); @@ -490,12 +478,10 @@ static int load_aout_library(struct file *file) goto out; } /* Now use mmap to map the library into memory. */ - down_write(¤t->mm->mmap_sem); - error = do_mmap(file, start_addr, ex.a_text + ex.a_data, + error = vm_mmap(file, start_addr, ex.a_text + ex.a_data, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_32BIT, N_TXTOFF(ex)); - up_write(¤t->mm->mmap_sem); retval = error; if (error != start_addr) goto out; @@ -503,9 +489,7 @@ static int load_aout_library(struct file *file) len = PAGE_ALIGN(ex.a_text + ex.a_data); bss = ex.a_text + ex.a_data + ex.a_bss; if (bss > len) { - down_write(¤t->mm->mmap_sem); - error = do_brk(start_addr + len, bss - len); - up_write(¤t->mm->mmap_sem); + error = vm_brk(start_addr + len, bss - len); retval = error; if (error != start_addr + len) goto out; diff --git a/trunk/arch/x86/kvm/pmu.c b/trunk/arch/x86/kvm/pmu.c index 173df38dbda5..2e88438ffd83 100644 --- a/trunk/arch/x86/kvm/pmu.c +++ b/trunk/arch/x86/kvm/pmu.c @@ -459,17 +459,17 @@ void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu) pmu->available_event_types = ~entry->ebx & ((1ull << bitmap_len) - 1); if (pmu->version == 1) { - pmu->global_ctrl = (1 << pmu->nr_arch_gp_counters) - 1; - return; + pmu->nr_arch_fixed_counters = 0; + } else { + pmu->nr_arch_fixed_counters = min((int)(entry->edx & 0x1f), + X86_PMC_MAX_FIXED); + pmu->counter_bitmask[KVM_PMC_FIXED] = + ((u64)1 << ((entry->edx >> 5) & 0xff)) - 1; } - pmu->nr_arch_fixed_counters = min((int)(entry->edx & 0x1f), - X86_PMC_MAX_FIXED); - pmu->counter_bitmask[KVM_PMC_FIXED] = - ((u64)1 << ((entry->edx >> 5) & 0xff)) - 1; - pmu->global_ctrl_mask = ~(((1 << pmu->nr_arch_gp_counters) - 1) - | (((1ull << pmu->nr_arch_fixed_counters) - 1) - << X86_PMC_IDX_FIXED)); + pmu->global_ctrl = ((1 << pmu->nr_arch_gp_counters) - 1) | + (((1ull << pmu->nr_arch_fixed_counters) - 1) << X86_PMC_IDX_FIXED); + pmu->global_ctrl_mask = ~pmu->global_ctrl; } void kvm_pmu_init(struct kvm_vcpu *vcpu) diff --git a/trunk/arch/x86/kvm/vmx.c b/trunk/arch/x86/kvm/vmx.c index ad85adfef843..4ff0ab9bc3c8 100644 --- a/trunk/arch/x86/kvm/vmx.c +++ b/trunk/arch/x86/kvm/vmx.c @@ -2210,9 +2210,12 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data) msr = find_msr_entry(vmx, msr_index); if (msr) { msr->data = data; - if (msr - vmx->guest_msrs < vmx->save_nmsrs) + if (msr - vmx->guest_msrs < vmx->save_nmsrs) { + preempt_disable(); kvm_set_shared_msr(msr->index, msr->data, msr->mask); + preempt_enable(); + } break; } ret = kvm_set_msr_common(vcpu, msr_index, data); diff --git a/trunk/arch/x86/kvm/x86.c b/trunk/arch/x86/kvm/x86.c index 4044ce0bf7c1..91a5e989abcf 100644 --- a/trunk/arch/x86/kvm/x86.c +++ b/trunk/arch/x86/kvm/x86.c @@ -6336,13 +6336,11 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm, if (npages && !old.rmap) { unsigned long userspace_addr; - down_write(¤t->mm->mmap_sem); - userspace_addr = do_mmap(NULL, 0, + userspace_addr = vm_mmap(NULL, 0, npages * PAGE_SIZE, PROT_READ | PROT_WRITE, map_flags, 0); - up_write(¤t->mm->mmap_sem); if (IS_ERR((void *)userspace_addr)) return PTR_ERR((void *)userspace_addr); @@ -6366,10 +6364,8 @@ void kvm_arch_commit_memory_region(struct kvm *kvm, if (!user_alloc && !old.user_alloc && old.rmap && !npages) { int ret; - down_write(¤t->mm->mmap_sem); - ret = do_munmap(current->mm, old.userspace_addr, + ret = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE); - up_write(¤t->mm->mmap_sem); if (ret < 0) printk(KERN_WARNING "kvm_vm_ioctl_set_memory_region: " diff --git a/trunk/arch/x86/lib/insn.c b/trunk/arch/x86/lib/insn.c index 25feb1ae71c5..b1e6c4b2e8eb 100644 --- a/trunk/arch/x86/lib/insn.c +++ b/trunk/arch/x86/lib/insn.c @@ -379,8 +379,8 @@ void insn_get_displacement(struct insn *insn) return; } -/* Decode moffset16/32/64 */ -static void __get_moffset(struct insn *insn) +/* Decode moffset16/32/64. Return 0 if failed */ +static int __get_moffset(struct insn *insn) { switch (insn->addr_bytes) { case 2: @@ -397,15 +397,19 @@ static void __get_moffset(struct insn *insn) insn->moffset2.value = get_next(int, insn); insn->moffset2.nbytes = 4; break; + default: /* opnd_bytes must be modified manually */ + goto err_out; } insn->moffset1.got = insn->moffset2.got = 1; + return 1; + err_out: - return; + return 0; } -/* Decode imm v32(Iz) */ -static void __get_immv32(struct insn *insn) +/* Decode imm v32(Iz). Return 0 if failed */ +static int __get_immv32(struct insn *insn) { switch (insn->opnd_bytes) { case 2: @@ -417,14 +421,18 @@ static void __get_immv32(struct insn *insn) insn->immediate.value = get_next(int, insn); insn->immediate.nbytes = 4; break; + default: /* opnd_bytes must be modified manually */ + goto err_out; } + return 1; + err_out: - return; + return 0; } -/* Decode imm v64(Iv/Ov) */ -static void __get_immv(struct insn *insn) +/* Decode imm v64(Iv/Ov), Return 0 if failed */ +static int __get_immv(struct insn *insn) { switch (insn->opnd_bytes) { case 2: @@ -441,15 +449,18 @@ static void __get_immv(struct insn *insn) insn->immediate2.value = get_next(int, insn); insn->immediate2.nbytes = 4; break; + default: /* opnd_bytes must be modified manually */ + goto err_out; } insn->immediate1.got = insn->immediate2.got = 1; + return 1; err_out: - return; + return 0; } /* Decode ptr16:16/32(Ap) */ -static void __get_immptr(struct insn *insn) +static int __get_immptr(struct insn *insn) { switch (insn->opnd_bytes) { case 2: @@ -462,14 +473,17 @@ static void __get_immptr(struct insn *insn) break; case 8: /* ptr16:64 is not exist (no segment) */ - return; + return 0; + default: /* opnd_bytes must be modified manually */ + goto err_out; } insn->immediate2.value = get_next(unsigned short, insn); insn->immediate2.nbytes = 2; insn->immediate1.got = insn->immediate2.got = 1; + return 1; err_out: - return; + return 0; } /** @@ -489,7 +503,8 @@ void insn_get_immediate(struct insn *insn) insn_get_displacement(insn); if (inat_has_moffset(insn->attr)) { - __get_moffset(insn); + if (!__get_moffset(insn)) + goto err_out; goto done; } @@ -517,16 +532,20 @@ void insn_get_immediate(struct insn *insn) insn->immediate2.nbytes = 4; break; case INAT_IMM_PTR: - __get_immptr(insn); + if (!__get_immptr(insn)) + goto err_out; break; case INAT_IMM_VWORD32: - __get_immv32(insn); + if (!__get_immv32(insn)) + goto err_out; break; case INAT_IMM_VWORD: - __get_immv(insn); + if (!__get_immv(insn)) + goto err_out; break; default: - break; + /* Here, insn must have an immediate, but failed */ + goto err_out; } if (inat_has_second_immediate(insn->attr)) { insn->immediate2.value = get_next(char, insn); diff --git a/trunk/crypto/sha512_generic.c b/trunk/crypto/sha512_generic.c index 107f6f7be5e1..dd30f40af9f5 100644 --- a/trunk/crypto/sha512_generic.c +++ b/trunk/crypto/sha512_generic.c @@ -174,7 +174,7 @@ sha512_update(struct shash_desc *desc, const u8 *data, unsigned int len) index = sctx->count[0] & 0x7f; /* Update number of bytes */ - if (!(sctx->count[0] += len)) + if ((sctx->count[0] += len) < len) sctx->count[1]++; part_len = 128 - index; diff --git a/trunk/drivers/acpi/acpica/hwxface.c b/trunk/drivers/acpi/acpica/hwxface.c index ab513a972c95..a716fede4f25 100644 --- a/trunk/drivers/acpi/acpica/hwxface.c +++ b/trunk/drivers/acpi/acpica/hwxface.c @@ -74,7 +74,8 @@ acpi_status acpi_reset(void) /* Check if the reset register is supported */ - if (!reset_reg->address) { + if (!(acpi_gbl_FADT.flags & ACPI_FADT_RESET_REGISTER) || + !reset_reg->address) { return_ACPI_STATUS(AE_NOT_EXIST); } diff --git a/trunk/drivers/acpi/osl.c b/trunk/drivers/acpi/osl.c index ba14fb93c929..c3881b2eb8b2 100644 --- a/trunk/drivers/acpi/osl.c +++ b/trunk/drivers/acpi/osl.c @@ -607,8 +607,7 @@ acpi_os_install_interrupt_handler(u32 gsi, acpi_osd_handler handler, acpi_irq_handler = handler; acpi_irq_context = context; - if (request_threaded_irq(irq, NULL, acpi_irq, IRQF_SHARED, "acpi", - acpi_irq)) { + if (request_irq(irq, acpi_irq, IRQF_SHARED, "acpi", acpi_irq)) { printk(KERN_ERR PREFIX "SCI (IRQ%d) allocation failed\n", irq); acpi_irq_handler = NULL; return AE_NOT_ACQUIRED; diff --git a/trunk/drivers/acpi/reboot.c b/trunk/drivers/acpi/reboot.c index c1d612435939..a6c77e8b37bd 100644 --- a/trunk/drivers/acpi/reboot.c +++ b/trunk/drivers/acpi/reboot.c @@ -23,7 +23,8 @@ void acpi_reboot(void) /* Is the reset register supported? The spec says we should be * checking the bit width and bit offset, but Windows ignores * these fields */ - /* Ignore also acpi_gbl_FADT.flags.ACPI_FADT_RESET_REGISTER */ + if (!(acpi_gbl_FADT.flags & ACPI_FADT_RESET_REGISTER)) + return; reset_value = acpi_gbl_FADT.reset_value; diff --git a/trunk/drivers/ata/ata_piix.c b/trunk/drivers/ata/ata_piix.c index 68013f96729f..7857e8fd0a3e 100644 --- a/trunk/drivers/ata/ata_piix.c +++ b/trunk/drivers/ata/ata_piix.c @@ -329,6 +329,8 @@ static const struct pci_device_id piix_pci_tbl[] = { { 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, /* SATA Controller IDE (Lynx Point) */ { 0x8086, 0x8c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, + /* SATA Controller IDE (DH89xxCC) */ + { 0x8086, 0x2326, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, { } /* terminate list */ }; diff --git a/trunk/drivers/ata/libata-core.c b/trunk/drivers/ata/libata-core.c index e0bda9ff89cd..28db50b57b91 100644 --- a/trunk/drivers/ata/libata-core.c +++ b/trunk/drivers/ata/libata-core.c @@ -95,7 +95,7 @@ static unsigned int ata_dev_set_xfermode(struct ata_device *dev); static void ata_dev_xfermask(struct ata_device *dev); static unsigned long ata_dev_blacklisted(const struct ata_device *dev); -unsigned int ata_print_id = 1; +atomic_t ata_print_id = ATOMIC_INIT(1); struct ata_force_param { const char *name; @@ -6029,7 +6029,7 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) /* give ports names and add SCSI hosts */ for (i = 0; i < host->n_ports; i++) - host->ports[i]->print_id = ata_print_id++; + host->ports[i]->print_id = atomic_inc_return(&ata_print_id); /* Create associated sysfs transport objects */ diff --git a/trunk/drivers/ata/libata-scsi.c b/trunk/drivers/ata/libata-scsi.c index 1ee00c8b5b04..93dabdcd2cbe 100644 --- a/trunk/drivers/ata/libata-scsi.c +++ b/trunk/drivers/ata/libata-scsi.c @@ -3843,7 +3843,7 @@ int ata_sas_async_port_init(struct ata_port *ap) int rc = ap->ops->port_start(ap); if (!rc) { - ap->print_id = ata_print_id++; + ap->print_id = atomic_inc_return(&ata_print_id); __ata_port_probe(ap); } @@ -3867,7 +3867,7 @@ int ata_sas_port_init(struct ata_port *ap) int rc = ap->ops->port_start(ap); if (!rc) { - ap->print_id = ata_print_id++; + ap->print_id = atomic_inc_return(&ata_print_id); rc = ata_port_probe(ap); } diff --git a/trunk/drivers/ata/libata-transport.c b/trunk/drivers/ata/libata-transport.c index 74aaee30e264..c34190485377 100644 --- a/trunk/drivers/ata/libata-transport.c +++ b/trunk/drivers/ata/libata-transport.c @@ -294,6 +294,7 @@ int ata_tport_add(struct device *parent, device_enable_async_suspend(dev); pm_runtime_set_active(dev); pm_runtime_enable(dev); + pm_runtime_forbid(dev); transport_add_device(dev); transport_configure_device(dev); diff --git a/trunk/drivers/ata/libata.h b/trunk/drivers/ata/libata.h index 2e26fcaf635b..9d0fd0b71852 100644 --- a/trunk/drivers/ata/libata.h +++ b/trunk/drivers/ata/libata.h @@ -53,7 +53,7 @@ enum { ATA_DNXFER_QUIET = (1 << 31), }; -extern unsigned int ata_print_id; +extern atomic_t ata_print_id; extern int atapi_passthru16; extern int libata_fua; extern int libata_noacpi; diff --git a/trunk/drivers/ata/sata_mv.c b/trunk/drivers/ata/sata_mv.c index 38950ea8398a..7336d4a7ab31 100644 --- a/trunk/drivers/ata/sata_mv.c +++ b/trunk/drivers/ata/sata_mv.c @@ -4025,7 +4025,8 @@ static int mv_platform_probe(struct platform_device *pdev) struct ata_host *host; struct mv_host_priv *hpriv; struct resource *res; - int n_ports, rc; + int n_ports = 0; + int rc; ata_print_version_once(&pdev->dev, DRV_VERSION); diff --git a/trunk/drivers/block/virtio_blk.c b/trunk/drivers/block/virtio_blk.c index 0e4ef3de9d5d..0d39f2f4294a 100644 --- a/trunk/drivers/block/virtio_blk.c +++ b/trunk/drivers/block/virtio_blk.c @@ -375,6 +375,34 @@ static int init_vq(struct virtio_blk *vblk) return err; } +/* + * Legacy naming scheme used for virtio devices. We are stuck with it for + * virtio blk but don't ever use it for any new driver. + */ +static int virtblk_name_format(char *prefix, int index, char *buf, int buflen) +{ + const int base = 'z' - 'a' + 1; + char *begin = buf + strlen(prefix); + char *end = buf + buflen; + char *p; + int unit; + + p = end - 1; + *p = '\0'; + unit = base; + do { + if (p == begin) + return -EINVAL; + *--p = 'a' + (index % unit); + index = (index / unit) - 1; + } while (index >= 0); + + memmove(begin, p, end - p); + memcpy(buf, prefix, strlen(prefix)); + + return 0; +} + static int __devinit virtblk_probe(struct virtio_device *vdev) { struct virtio_blk *vblk; @@ -443,18 +471,7 @@ static int __devinit virtblk_probe(struct virtio_device *vdev) q->queuedata = vblk; - if (index < 26) { - sprintf(vblk->disk->disk_name, "vd%c", 'a' + index % 26); - } else if (index < (26 + 1) * 26) { - sprintf(vblk->disk->disk_name, "vd%c%c", - 'a' + index / 26 - 1, 'a' + index % 26); - } else { - const unsigned int m1 = (index / 26 - 1) / 26 - 1; - const unsigned int m2 = (index / 26 - 1) % 26; - const unsigned int m3 = index % 26; - sprintf(vblk->disk->disk_name, "vd%c%c%c", - 'a' + m1, 'a' + m2, 'a' + m3); - } + virtblk_name_format("vd", index, vblk->disk->disk_name, DISK_NAME_LEN); vblk->disk->major = major; vblk->disk->first_minor = index_to_minor(index); diff --git a/trunk/drivers/block/xen-blkback/xenbus.c b/trunk/drivers/block/xen-blkback/xenbus.c index 89860f34a7ec..4f66171c6683 100644 --- a/trunk/drivers/block/xen-blkback/xenbus.c +++ b/trunk/drivers/block/xen-blkback/xenbus.c @@ -416,7 +416,7 @@ static void xen_blkbk_discard(struct xenbus_transaction xbt, struct backend_info "discard-secure", "%d", blkif->vbd.discard_secure); if (err) { - dev_warn(dev-dev, "writing discard-secure (%d)", err); + dev_warn(&dev->dev, "writing discard-secure (%d)", err); return; } } diff --git a/trunk/drivers/char/hw_random/Kconfig b/trunk/drivers/char/hw_random/Kconfig index b2402eb076c7..0689bf6b0183 100644 --- a/trunk/drivers/char/hw_random/Kconfig +++ b/trunk/drivers/char/hw_random/Kconfig @@ -62,7 +62,7 @@ config HW_RANDOM_AMD config HW_RANDOM_ATMEL tristate "Atmel Random Number Generator support" - depends on HW_RANDOM && HAVE_CLK + depends on HW_RANDOM && ARCH_AT91SAM9G45 default HW_RANDOM ---help--- This driver provides kernel-side support for the Random Number diff --git a/trunk/drivers/crypto/ixp4xx_crypto.c b/trunk/drivers/crypto/ixp4xx_crypto.c index 0053d7ebb5ca..8f3f74ce8c7f 100644 --- a/trunk/drivers/crypto/ixp4xx_crypto.c +++ b/trunk/drivers/crypto/ixp4xx_crypto.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include diff --git a/trunk/drivers/crypto/talitos.c b/trunk/drivers/crypto/talitos.c index dc641c796526..921039e56f87 100644 --- a/trunk/drivers/crypto/talitos.c +++ b/trunk/drivers/crypto/talitos.c @@ -124,6 +124,9 @@ struct talitos_private { void __iomem *reg; int irq[2]; + /* SEC global registers lock */ + spinlock_t reg_lock ____cacheline_aligned; + /* SEC version geometry (from device tree node) */ unsigned int num_channels; unsigned int chfifo_len; @@ -412,6 +415,7 @@ static void talitos_done_##name(unsigned long data) \ { \ struct device *dev = (struct device *)data; \ struct talitos_private *priv = dev_get_drvdata(dev); \ + unsigned long flags; \ \ if (ch_done_mask & 1) \ flush_channel(dev, 0, 0, 0); \ @@ -427,8 +431,10 @@ static void talitos_done_##name(unsigned long data) \ out: \ /* At this point, all completed channels have been processed */ \ /* Unmask done interrupts for channels completed later on. */ \ + spin_lock_irqsave(&priv->reg_lock, flags); \ setbits32(priv->reg + TALITOS_IMR, ch_done_mask); \ setbits32(priv->reg + TALITOS_IMR_LO, TALITOS_IMR_LO_INIT); \ + spin_unlock_irqrestore(&priv->reg_lock, flags); \ } DEF_TALITOS_DONE(4ch, TALITOS_ISR_4CHDONE) DEF_TALITOS_DONE(ch0_2, TALITOS_ISR_CH_0_2_DONE) @@ -619,22 +625,28 @@ static irqreturn_t talitos_interrupt_##name(int irq, void *data) \ struct device *dev = data; \ struct talitos_private *priv = dev_get_drvdata(dev); \ u32 isr, isr_lo; \ + unsigned long flags; \ \ + spin_lock_irqsave(&priv->reg_lock, flags); \ isr = in_be32(priv->reg + TALITOS_ISR); \ isr_lo = in_be32(priv->reg + TALITOS_ISR_LO); \ /* Acknowledge interrupt */ \ out_be32(priv->reg + TALITOS_ICR, isr & (ch_done_mask | ch_err_mask)); \ out_be32(priv->reg + TALITOS_ICR_LO, isr_lo); \ \ - if (unlikely((isr & ~TALITOS_ISR_4CHDONE) & ch_err_mask || isr_lo)) \ - talitos_error(dev, isr, isr_lo); \ - else \ + if (unlikely(isr & ch_err_mask || isr_lo)) { \ + spin_unlock_irqrestore(&priv->reg_lock, flags); \ + talitos_error(dev, isr & ch_err_mask, isr_lo); \ + } \ + else { \ if (likely(isr & ch_done_mask)) { \ /* mask further done interrupts. */ \ clrbits32(priv->reg + TALITOS_IMR, ch_done_mask); \ /* done_task will unmask done interrupts at exit */ \ tasklet_schedule(&priv->done_task[tlet]); \ } \ + spin_unlock_irqrestore(&priv->reg_lock, flags); \ + } \ \ return (isr & (ch_done_mask | ch_err_mask) || isr_lo) ? IRQ_HANDLED : \ IRQ_NONE; \ @@ -2719,6 +2731,8 @@ static int talitos_probe(struct platform_device *ofdev) priv->ofdev = ofdev; + spin_lock_init(&priv->reg_lock); + err = talitos_probe_irq(ofdev); if (err) goto err_out; diff --git a/trunk/drivers/dma/Kconfig b/trunk/drivers/dma/Kconfig index cf9da362d64f..ef378b5b17e4 100644 --- a/trunk/drivers/dma/Kconfig +++ b/trunk/drivers/dma/Kconfig @@ -91,11 +91,10 @@ config DW_DMAC config AT_HDMAC tristate "Atmel AHB DMA support" - depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45 + depends on ARCH_AT91 select DMA_ENGINE help - Support the Atmel AHB DMA controller. This can be integrated in - chips such as the Atmel AT91SAM9RL. + Support the Atmel AHB DMA controller. config FSL_DMA tristate "Freescale Elo and Elo Plus DMA support" diff --git a/trunk/drivers/gpu/drm/drm_bufs.c b/trunk/drivers/gpu/drm/drm_bufs.c index 30372f7b2d45..348b367debeb 100644 --- a/trunk/drivers/gpu/drm/drm_bufs.c +++ b/trunk/drivers/gpu/drm/drm_bufs.c @@ -1510,8 +1510,8 @@ int drm_freebufs(struct drm_device *dev, void *data, * \param arg pointer to a drm_buf_map structure. * \return zero on success or a negative number on failure. * - * Maps the AGP, SG or PCI buffer region with do_mmap(), and copies information - * about each buffer into user space. For PCI buffers, it calls do_mmap() with + * Maps the AGP, SG or PCI buffer region with vm_mmap(), and copies information + * about each buffer into user space. For PCI buffers, it calls vm_mmap() with * offset equal to 0, which drm_mmap() interpretes as PCI buffers and calls * drm_mmap_dma(). */ @@ -1553,18 +1553,14 @@ int drm_mapbufs(struct drm_device *dev, void *data, retcode = -EINVAL; goto done; } - down_write(¤t->mm->mmap_sem); - virtual = do_mmap(file_priv->filp, 0, map->size, + virtual = vm_mmap(file_priv->filp, 0, map->size, PROT_READ | PROT_WRITE, MAP_SHARED, token); - up_write(¤t->mm->mmap_sem); } else { - down_write(¤t->mm->mmap_sem); - virtual = do_mmap(file_priv->filp, 0, dma->byte_count, + virtual = vm_mmap(file_priv->filp, 0, dma->byte_count, PROT_READ | PROT_WRITE, MAP_SHARED, 0); - up_write(¤t->mm->mmap_sem); } if (virtual > -1024UL) { /* Real error */ diff --git a/trunk/drivers/gpu/drm/drm_crtc.c b/trunk/drivers/gpu/drm/drm_crtc.c index d3aaeb6ae236..c79870a75c2f 100644 --- a/trunk/drivers/gpu/drm/drm_crtc.c +++ b/trunk/drivers/gpu/drm/drm_crtc.c @@ -3335,10 +3335,12 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev, ret = crtc->funcs->page_flip(crtc, fb, e); if (ret) { - spin_lock_irqsave(&dev->event_lock, flags); - file_priv->event_space += sizeof e->event; - spin_unlock_irqrestore(&dev->event_lock, flags); - kfree(e); + if (page_flip->flags & DRM_MODE_PAGE_FLIP_EVENT) { + spin_lock_irqsave(&dev->event_lock, flags); + file_priv->event_space += sizeof e->event; + spin_unlock_irqrestore(&dev->event_lock, flags); + kfree(e); + } } out: diff --git a/trunk/drivers/gpu/drm/drm_fops.c b/trunk/drivers/gpu/drm/drm_fops.c index cdfbf27b2b3c..123de28f94ef 100644 --- a/trunk/drivers/gpu/drm/drm_fops.c +++ b/trunk/drivers/gpu/drm/drm_fops.c @@ -507,12 +507,12 @@ int drm_release(struct inode *inode, struct file *filp) drm_events_release(file_priv); - if (dev->driver->driver_features & DRIVER_GEM) - drm_gem_release(dev, file_priv); - if (dev->driver->driver_features & DRIVER_MODESET) drm_fb_release(file_priv); + if (dev->driver->driver_features & DRIVER_GEM) + drm_gem_release(dev, file_priv); + mutex_lock(&dev->ctxlist_mutex); if (!list_empty(&dev->ctxlist)) { struct drm_ctx_list *pos, *n; diff --git a/trunk/drivers/gpu/drm/drm_usb.c b/trunk/drivers/gpu/drm/drm_usb.c index c8c83dad2ce1..37c9a523dd1c 100644 --- a/trunk/drivers/gpu/drm/drm_usb.c +++ b/trunk/drivers/gpu/drm/drm_usb.c @@ -1,6 +1,6 @@ #include "drmP.h" #include -#include +#include int drm_get_usb_dev(struct usb_interface *interface, const struct usb_device_id *id, @@ -114,3 +114,7 @@ void drm_usb_exit(struct drm_driver *driver, usb_deregister(udriver); } EXPORT_SYMBOL(drm_usb_exit); + +MODULE_AUTHOR("David Airlie"); +MODULE_DESCRIPTION("USB DRM support"); +MODULE_LICENSE("GPL and additional rights"); diff --git a/trunk/drivers/gpu/drm/exynos/exynos_drm_gem.c b/trunk/drivers/gpu/drm/exynos/exynos_drm_gem.c index 26d51979116b..392ce71ed6a1 100644 --- a/trunk/drivers/gpu/drm/exynos/exynos_drm_gem.c +++ b/trunk/drivers/gpu/drm/exynos/exynos_drm_gem.c @@ -581,10 +581,8 @@ int exynos_drm_gem_mmap_ioctl(struct drm_device *dev, void *data, obj->filp->f_op = &exynos_drm_gem_fops; obj->filp->private_data = obj; - down_write(¤t->mm->mmap_sem); - addr = do_mmap(obj->filp, 0, args->size, + addr = vm_mmap(obj->filp, 0, args->size, PROT_READ | PROT_WRITE, MAP_SHARED, 0); - up_write(¤t->mm->mmap_sem); drm_gem_object_unreference_unlocked(obj); diff --git a/trunk/drivers/gpu/drm/gma500/mdfld_dsi_output.h b/trunk/drivers/gpu/drm/gma500/mdfld_dsi_output.h index 21071cef92a4..36eb0744841c 100644 --- a/trunk/drivers/gpu/drm/gma500/mdfld_dsi_output.h +++ b/trunk/drivers/gpu/drm/gma500/mdfld_dsi_output.h @@ -29,7 +29,6 @@ #define __MDFLD_DSI_OUTPUT_H__ #include -#include #include #include #include diff --git a/trunk/drivers/gpu/drm/i810/i810_dma.c b/trunk/drivers/gpu/drm/i810/i810_dma.c index 2c8a60c3b98e..f920fb5e42b6 100644 --- a/trunk/drivers/gpu/drm/i810/i810_dma.c +++ b/trunk/drivers/gpu/drm/i810/i810_dma.c @@ -129,6 +129,7 @@ static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv) if (buf_priv->currently_mapped == I810_BUF_MAPPED) return -EINVAL; + /* This is all entirely broken */ down_write(¤t->mm->mmap_sem); old_fops = file_priv->filp->f_op; file_priv->filp->f_op = &i810_buffer_fops; @@ -157,11 +158,8 @@ static int i810_unmap_buffer(struct drm_buf *buf) if (buf_priv->currently_mapped != I810_BUF_MAPPED) return -EINVAL; - down_write(¤t->mm->mmap_sem); - retcode = do_munmap(current->mm, - (unsigned long)buf_priv->virtual, + retcode = vm_munmap((unsigned long)buf_priv->virtual, (size_t) buf->total); - up_write(¤t->mm->mmap_sem); buf_priv->currently_mapped = I810_BUF_UNMAPPED; buf_priv->virtual = NULL; diff --git a/trunk/drivers/gpu/drm/i915/i915_gem.c b/trunk/drivers/gpu/drm/i915/i915_gem.c index 0e3c6acde955..0d1e4b7b4b99 100644 --- a/trunk/drivers/gpu/drm/i915/i915_gem.c +++ b/trunk/drivers/gpu/drm/i915/i915_gem.c @@ -1087,11 +1087,9 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data, if (obj == NULL) return -ENOENT; - down_write(¤t->mm->mmap_sem); - addr = do_mmap(obj->filp, 0, args->size, + addr = vm_mmap(obj->filp, 0, args->size, PROT_READ | PROT_WRITE, MAP_SHARED, args->offset); - up_write(¤t->mm->mmap_sem); drm_gem_object_unreference_unlocked(obj); if (IS_ERR((void *)addr)) return addr; diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index bae38acf44dc..5908cd563400 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -3478,8 +3478,11 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc, return false; } - /* All interlaced capable intel hw wants timings in frames. */ - drm_mode_set_crtcinfo(adjusted_mode, 0); + /* All interlaced capable intel hw wants timings in frames. Note though + * that intel_lvds_mode_fixup does some funny tricks with the crtc + * timings, so we need to be careful not to clobber these.*/ + if (!(adjusted_mode->private_flags & INTEL_MODE_CRTC_TIMINGS_SET)) + drm_mode_set_crtcinfo(adjusted_mode, 0); return true; } @@ -7465,7 +7468,13 @@ static int intel_gen6_queue_flip(struct drm_device *dev, OUT_RING(fb->pitches[0] | obj->tiling_mode); OUT_RING(obj->gtt_offset); - pf = I915_READ(PF_CTL(intel_crtc->pipe)) & PF_ENABLE; + /* Contrary to the suggestions in the documentation, + * "Enable Panel Fitter" does not seem to be required when page + * flipping with a non-native mode, and worse causes a normal + * modeset to fail. + * pf = I915_READ(PF_CTL(intel_crtc->pipe)) & PF_ENABLE; + */ + pf = 0; pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff; OUT_RING(pf | pipesrc); ADVANCE_LP_RING(); diff --git a/trunk/drivers/gpu/drm/i915/intel_drv.h b/trunk/drivers/gpu/drm/i915/intel_drv.h index 5a14149b3794..715afa153025 100644 --- a/trunk/drivers/gpu/drm/i915/intel_drv.h +++ b/trunk/drivers/gpu/drm/i915/intel_drv.h @@ -105,6 +105,10 @@ #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0) #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT) #define INTEL_MODE_DP_FORCE_6BPC (0x10) +/* This flag must be set by the encoder's mode_fixup if it changes the crtc + * timings in the mode to prevent the crtc fixup from overwriting them. + * Currently only lvds needs that. */ +#define INTEL_MODE_CRTC_TIMINGS_SET (0x20) static inline void intel_mode_set_pixel_multiplier(struct drm_display_mode *mode, diff --git a/trunk/drivers/gpu/drm/i915/intel_fb.c b/trunk/drivers/gpu/drm/i915/intel_fb.c index 19ecd78b8a2c..6e9ee33fd412 100644 --- a/trunk/drivers/gpu/drm/i915/intel_fb.c +++ b/trunk/drivers/gpu/drm/i915/intel_fb.c @@ -279,6 +279,8 @@ void intel_fb_restore_mode(struct drm_device *dev) struct drm_mode_config *config = &dev->mode_config; struct drm_plane *plane; + mutex_lock(&dev->mode_config.mutex); + ret = drm_fb_helper_restore_fbdev_mode(&dev_priv->fbdev->helper); if (ret) DRM_DEBUG("failed to restore crtc mode\n"); @@ -286,4 +288,6 @@ void intel_fb_restore_mode(struct drm_device *dev) /* Be sure to shut off any planes that may be active */ list_for_each_entry(plane, &config->plane_list, head) plane->funcs->disable_plane(plane); + + mutex_unlock(&dev->mode_config.mutex); } diff --git a/trunk/drivers/gpu/drm/i915/intel_lvds.c b/trunk/drivers/gpu/drm/i915/intel_lvds.c index 95db2e988227..30e2c82101de 100644 --- a/trunk/drivers/gpu/drm/i915/intel_lvds.c +++ b/trunk/drivers/gpu/drm/i915/intel_lvds.c @@ -187,6 +187,8 @@ centre_horizontally(struct drm_display_mode *mode, mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; + + mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET; } static void @@ -208,6 +210,8 @@ centre_vertically(struct drm_display_mode *mode, mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; + + mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET; } static inline u32 panel_fitter_scaling(u32 source, u32 target) @@ -283,6 +287,8 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, for_each_pipe(pipe) I915_WRITE(BCLRPAT(pipe), 0); + drm_mode_set_crtcinfo(adjusted_mode, 0); + switch (intel_lvds->fitting_mode) { case DRM_MODE_SCALE_CENTER: /* diff --git a/trunk/drivers/gpu/drm/i915/intel_panel.c b/trunk/drivers/gpu/drm/i915/intel_panel.c index 230a141dbea3..48177ec4720e 100644 --- a/trunk/drivers/gpu/drm/i915/intel_panel.c +++ b/trunk/drivers/gpu/drm/i915/intel_panel.c @@ -47,8 +47,6 @@ intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, adjusted_mode->vtotal = fixed_mode->vtotal; adjusted_mode->clock = fixed_mode->clock; - - drm_mode_set_crtcinfo(adjusted_mode, 0); } /* adjusted_mode has been preset to be the panel's fixed mode */ diff --git a/trunk/drivers/gpu/drm/nouveau/nouveau_pm.c b/trunk/drivers/gpu/drm/nouveau/nouveau_pm.c index 34d591b7d4ef..da3e7c3abab7 100644 --- a/trunk/drivers/gpu/drm/nouveau/nouveau_pm.c +++ b/trunk/drivers/gpu/drm/nouveau/nouveau_pm.c @@ -235,6 +235,7 @@ nouveau_pm_profile_set(struct drm_device *dev, const char *profile) return -EPERM; strncpy(string, profile, sizeof(string)); + string[sizeof(string) - 1] = 0; if ((ptr = strchr(string, '\n'))) *ptr = '\0'; diff --git a/trunk/drivers/gpu/drm/nouveau/nv50_sor.c b/trunk/drivers/gpu/drm/nouveau/nv50_sor.c index a7844ab6a50c..274640212475 100644 --- a/trunk/drivers/gpu/drm/nouveau/nv50_sor.c +++ b/trunk/drivers/gpu/drm/nouveau/nv50_sor.c @@ -42,7 +42,7 @@ nv50_sor_dp_lane_map(struct drm_device *dev, struct dcb_entry *dcb, u8 lane) struct drm_nouveau_private *dev_priv = dev->dev_private; static const u8 nvaf[] = { 24, 16, 8, 0 }; /* thanks, apple.. */ static const u8 nv50[] = { 16, 8, 0, 24 }; - if (dev_priv->card_type == 0xaf) + if (dev_priv->chipset == 0xaf) return nvaf[lane]; return nv50[lane]; } diff --git a/trunk/drivers/gpu/drm/radeon/r600.c b/trunk/drivers/gpu/drm/radeon/r600.c index de71243b591f..c8187c4b6ae8 100644 --- a/trunk/drivers/gpu/drm/radeon/r600.c +++ b/trunk/drivers/gpu/drm/radeon/r600.c @@ -1135,7 +1135,7 @@ static void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc } if (rdev->flags & RADEON_IS_AGP) { size_bf = mc->gtt_start; - size_af = 0xFFFFFFFF - mc->gtt_end + 1; + size_af = 0xFFFFFFFF - mc->gtt_end; if (size_bf > size_af) { if (mc->mc_vram_size > size_bf) { dev_warn(rdev->dev, "limiting VRAM\n"); @@ -1149,7 +1149,7 @@ static void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc mc->real_vram_size = size_af; mc->mc_vram_size = size_af; } - mc->vram_start = mc->gtt_end; + mc->vram_start = mc->gtt_end + 1; } mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; dev_info(rdev->dev, "VRAM: %lluM 0x%08llX - 0x%08llX (%lluM used)\n", diff --git a/trunk/drivers/gpu/drm/radeon/radeon_connectors.c b/trunk/drivers/gpu/drm/radeon/radeon_connectors.c index bd05156edbdb..3c2e7a000a2a 100644 --- a/trunk/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/trunk/drivers/gpu/drm/radeon/radeon_connectors.c @@ -970,7 +970,7 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) encoder = obj_to_encoder(obj); - if (encoder->encoder_type != DRM_MODE_ENCODER_DAC || + if (encoder->encoder_type != DRM_MODE_ENCODER_DAC && encoder->encoder_type != DRM_MODE_ENCODER_TVDAC) continue; @@ -1000,6 +1000,7 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) * cases the DVI port is actually a virtual KVM port connected to the service * processor. */ +out: if ((!rdev->is_atom_bios) && (ret == connector_status_disconnected) && rdev->mode_info.bios_hardcoded_edid_size) { @@ -1007,7 +1008,6 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) ret = connector_status_connected; } -out: /* updated in get modes as well since we need to know if it's analog or digital */ radeon_connector_update_scratch_regs(connector, ret); return ret; diff --git a/trunk/drivers/gpu/drm/radeon/radeon_irq_kms.c b/trunk/drivers/gpu/drm/radeon/radeon_irq_kms.c index 66d5fe1c8174..65060b77c805 100644 --- a/trunk/drivers/gpu/drm/radeon/radeon_irq_kms.c +++ b/trunk/drivers/gpu/drm/radeon/radeon_irq_kms.c @@ -147,6 +147,12 @@ static bool radeon_msi_ok(struct radeon_device *rdev) (rdev->pdev->subsystem_device == 0x01fd)) return true; + /* RV515 seems to have MSI issues where it loses + * MSI rearms occasionally. This leads to lockups and freezes. + * disable it by default. + */ + if (rdev->family == CHIP_RV515) + return false; if (rdev->flags & RADEON_IS_IGP) { /* APUs work fine with MSIs */ if (rdev->family >= CHIP_PALM) diff --git a/trunk/drivers/gpu/drm/radeon/rv770.c b/trunk/drivers/gpu/drm/radeon/rv770.c index c62ae4be3845..cdab1aeaed6e 100644 --- a/trunk/drivers/gpu/drm/radeon/rv770.c +++ b/trunk/drivers/gpu/drm/radeon/rv770.c @@ -969,7 +969,7 @@ void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc) } if (rdev->flags & RADEON_IS_AGP) { size_bf = mc->gtt_start; - size_af = 0xFFFFFFFF - mc->gtt_end + 1; + size_af = 0xFFFFFFFF - mc->gtt_end; if (size_bf > size_af) { if (mc->mc_vram_size > size_bf) { dev_warn(rdev->dev, "limiting VRAM\n"); @@ -983,7 +983,7 @@ void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc) mc->real_vram_size = size_af; mc->mc_vram_size = size_af; } - mc->vram_start = mc->gtt_end; + mc->vram_start = mc->gtt_end + 1; } mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; dev_info(rdev->dev, "VRAM: %lluM 0x%08llX - 0x%08llX (%lluM used)\n", diff --git a/trunk/drivers/gpu/drm/radeon/si.c b/trunk/drivers/gpu/drm/radeon/si.c index ac7a199ffece..27bda986fc2b 100644 --- a/trunk/drivers/gpu/drm/radeon/si.c +++ b/trunk/drivers/gpu/drm/radeon/si.c @@ -2999,8 +2999,8 @@ int si_rlc_init(struct radeon_device *rdev) } r = radeon_bo_pin(rdev->rlc.save_restore_obj, RADEON_GEM_DOMAIN_VRAM, &rdev->rlc.save_restore_gpu_addr); + radeon_bo_unreserve(rdev->rlc.save_restore_obj); if (r) { - radeon_bo_unreserve(rdev->rlc.save_restore_obj); dev_warn(rdev->dev, "(%d) pin RLC sr bo failed\n", r); si_rlc_fini(rdev); return r; @@ -3023,9 +3023,8 @@ int si_rlc_init(struct radeon_device *rdev) } r = radeon_bo_pin(rdev->rlc.clear_state_obj, RADEON_GEM_DOMAIN_VRAM, &rdev->rlc.clear_state_gpu_addr); + radeon_bo_unreserve(rdev->rlc.clear_state_obj); if (r) { - - radeon_bo_unreserve(rdev->rlc.clear_state_obj); dev_warn(rdev->dev, "(%d) pin RLC c bo failed\n", r); si_rlc_fini(rdev); return r; diff --git a/trunk/drivers/hid/Kconfig b/trunk/drivers/hid/Kconfig index a3d033252995..ffddcba32af6 100644 --- a/trunk/drivers/hid/Kconfig +++ b/trunk/drivers/hid/Kconfig @@ -34,7 +34,7 @@ config HID config HID_BATTERY_STRENGTH bool depends on HID && POWER_SUPPLY && HID = POWER_SUPPLY - default y + default n config HIDRAW bool "/dev/hidraw raw HID device support" diff --git a/trunk/drivers/hid/hid-tivo.c b/trunk/drivers/hid/hid-tivo.c index de47039c708c..9f85f827607f 100644 --- a/trunk/drivers/hid/hid-tivo.c +++ b/trunk/drivers/hid/hid-tivo.c @@ -62,7 +62,7 @@ static int tivo_input_mapping(struct hid_device *hdev, struct hid_input *hi, static const struct hid_device_id tivo_devices[] = { /* TiVo Slide Bluetooth remote, pairs with a Broadcom dongle */ - { HID_USB_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE_BT) }, + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE_BT) }, { HID_USB_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE) }, { } }; diff --git a/trunk/drivers/hwmon/ads1015.c b/trunk/drivers/hwmon/ads1015.c index 7765e4f74ec5..1958f03efd7a 100644 --- a/trunk/drivers/hwmon/ads1015.c +++ b/trunk/drivers/hwmon/ads1015.c @@ -59,14 +59,11 @@ struct ads1015_data { struct ads1015_channel_data channel_data[ADS1015_CHANNELS]; }; -static int ads1015_read_value(struct i2c_client *client, unsigned int channel, - int *value) +static int ads1015_read_adc(struct i2c_client *client, unsigned int channel) { u16 config; - s16 conversion; struct ads1015_data *data = i2c_get_clientdata(client); unsigned int pga = data->channel_data[channel].pga; - int fullscale; unsigned int data_rate = data->channel_data[channel].data_rate; unsigned int conversion_time_ms; int res; @@ -78,7 +75,6 @@ static int ads1015_read_value(struct i2c_client *client, unsigned int channel, if (res < 0) goto err_unlock; config = res; - fullscale = fullscale_table[pga]; conversion_time_ms = DIV_ROUND_UP(1000, data_rate_table[data_rate]); /* setup and start single conversion */ @@ -105,33 +101,36 @@ static int ads1015_read_value(struct i2c_client *client, unsigned int channel, } res = i2c_smbus_read_word_swapped(client, ADS1015_CONVERSION); - if (res < 0) - goto err_unlock; - conversion = res; - - mutex_unlock(&data->update_lock); - - *value = DIV_ROUND_CLOSEST(conversion * fullscale, 0x7ff0); - - return 0; err_unlock: mutex_unlock(&data->update_lock); return res; } +static int ads1015_reg_to_mv(struct i2c_client *client, unsigned int channel, + s16 reg) +{ + struct ads1015_data *data = i2c_get_clientdata(client); + unsigned int pga = data->channel_data[channel].pga; + int fullscale = fullscale_table[pga]; + + return DIV_ROUND_CLOSEST(reg * fullscale, 0x7ff0); +} + /* sysfs callback function */ static ssize_t show_in(struct device *dev, struct device_attribute *da, char *buf) { struct sensor_device_attribute *attr = to_sensor_dev_attr(da); struct i2c_client *client = to_i2c_client(dev); - int in; int res; + int index = attr->index; - res = ads1015_read_value(client, attr->index, &in); + res = ads1015_read_adc(client, index); + if (res < 0) + return res; - return (res < 0) ? res : sprintf(buf, "%d\n", in); + return sprintf(buf, "%d\n", ads1015_reg_to_mv(client, index, res)); } static const struct sensor_device_attribute ads1015_in[] = { diff --git a/trunk/drivers/hwmon/fam15h_power.c b/trunk/drivers/hwmon/fam15h_power.c index b7494af1e4a9..37a8fc92b44a 100644 --- a/trunk/drivers/hwmon/fam15h_power.c +++ b/trunk/drivers/hwmon/fam15h_power.c @@ -122,6 +122,38 @@ static bool __devinit fam15h_power_is_internal_node0(struct pci_dev *f4) return true; } +/* + * Newer BKDG versions have an updated recommendation on how to properly + * initialize the running average range (was: 0xE, now: 0x9). This avoids + * counter saturations resulting in bogus power readings. + * We correct this value ourselves to cope with older BIOSes. + */ +static void __devinit tweak_runavg_range(struct pci_dev *pdev) +{ + u32 val; + const struct pci_device_id affected_device = { + PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) }; + + /* + * let this quirk apply only to the current version of the + * northbridge, since future versions may change the behavior + */ + if (!pci_match_id(&affected_device, pdev)) + return; + + pci_bus_read_config_dword(pdev->bus, + PCI_DEVFN(PCI_SLOT(pdev->devfn), 5), + REG_TDP_RUNNING_AVERAGE, &val); + if ((val & 0xf) != 0xe) + return; + + val &= ~0xf; + val |= 0x9; + pci_bus_write_config_dword(pdev->bus, + PCI_DEVFN(PCI_SLOT(pdev->devfn), 5), + REG_TDP_RUNNING_AVERAGE, val); +} + static void __devinit fam15h_power_init_data(struct pci_dev *f4, struct fam15h_power_data *data) { @@ -155,6 +187,13 @@ static int __devinit fam15h_power_probe(struct pci_dev *pdev, struct device *dev; int err; + /* + * though we ignore every other northbridge, we still have to + * do the tweaking on _each_ node in MCM processors as the counters + * are working hand-in-hand + */ + tweak_runavg_range(pdev); + if (!fam15h_power_is_internal_node0(pdev)) { err = -ENODEV; goto exit; diff --git a/trunk/drivers/input/misc/Kconfig b/trunk/drivers/input/misc/Kconfig index 2d787796bf50..7faf4a7fcaa9 100644 --- a/trunk/drivers/input/misc/Kconfig +++ b/trunk/drivers/input/misc/Kconfig @@ -380,8 +380,7 @@ config INPUT_TWL4030_VIBRA config INPUT_TWL6040_VIBRA tristate "Support for TWL6040 Vibrator" - depends on TWL4030_CORE - select TWL6040_CORE + depends on TWL6040_CORE select INPUT_FF_MEMLESS help This option enables support for TWL6040 Vibrator Driver. diff --git a/trunk/drivers/input/misc/twl6040-vibra.c b/trunk/drivers/input/misc/twl6040-vibra.c index 45874fed523a..14e94f56cb7d 100644 --- a/trunk/drivers/input/misc/twl6040-vibra.c +++ b/trunk/drivers/input/misc/twl6040-vibra.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include #include @@ -257,7 +257,7 @@ static SIMPLE_DEV_PM_OPS(twl6040_vibra_pm_ops, twl6040_vibra_suspend, NULL); static int __devinit twl6040_vibra_probe(struct platform_device *pdev) { - struct twl4030_vibra_data *pdata = pdev->dev.platform_data; + struct twl6040_vibra_data *pdata = pdev->dev.platform_data; struct vibra_info *info; int ret; diff --git a/trunk/drivers/input/touchscreen/Kconfig b/trunk/drivers/input/touchscreen/Kconfig index 75838d7710ce..2a2141915aa0 100644 --- a/trunk/drivers/input/touchscreen/Kconfig +++ b/trunk/drivers/input/touchscreen/Kconfig @@ -489,10 +489,10 @@ config TOUCHSCREEN_TI_TSCADC config TOUCHSCREEN_ATMEL_TSADCC tristate "Atmel Touchscreen Interface" - depends on ARCH_AT91 + depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45 help Say Y here if you have a 4-wire touchscreen connected to the - ADC Controller on your Atmel SoC. + ADC Controller on your Atmel SoC (such as the AT91SAM9RL). If unsure, say N. diff --git a/trunk/drivers/leds/leds-atmel-pwm.c b/trunk/drivers/leds/leds-atmel-pwm.c index 800243b6037e..64ad702a2ecc 100644 --- a/trunk/drivers/leds/leds-atmel-pwm.c +++ b/trunk/drivers/leds/leds-atmel-pwm.c @@ -35,7 +35,7 @@ static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b) * NOTE: we reuse the platform_data structure of GPIO leds, * but repurpose its "gpio" number as a PWM channel number. */ -static int __init pwmled_probe(struct platform_device *pdev) +static int __devinit pwmled_probe(struct platform_device *pdev) { const struct gpio_led_platform_data *pdata; struct pwmled *leds; diff --git a/trunk/drivers/media/common/tuners/xc5000.c b/trunk/drivers/media/common/tuners/xc5000.c index 7f98984e4fad..eab2ea424200 100644 --- a/trunk/drivers/media/common/tuners/xc5000.c +++ b/trunk/drivers/media/common/tuners/xc5000.c @@ -54,6 +54,7 @@ struct xc5000_priv { struct list_head hybrid_tuner_instance_list; u32 if_khz; + u32 xtal_khz; u32 freq_hz; u32 bandwidth; u8 video_standard; @@ -214,9 +215,9 @@ static const struct xc5000_fw_cfg xc5000a_1_6_114 = { .size = 12401, }; -static const struct xc5000_fw_cfg xc5000c_41_024_5_31875 = { - .name = "dvb-fe-xc5000c-41.024.5-31875.fw", - .size = 16503, +static const struct xc5000_fw_cfg xc5000c_41_024_5 = { + .name = "dvb-fe-xc5000c-41.024.5.fw", + .size = 16497, }; static inline const struct xc5000_fw_cfg *xc5000_assign_firmware(int chip_id) @@ -226,7 +227,7 @@ static inline const struct xc5000_fw_cfg *xc5000_assign_firmware(int chip_id) case XC5000A: return &xc5000a_1_6_114; case XC5000C: - return &xc5000c_41_024_5_31875; + return &xc5000c_41_024_5; } } @@ -572,6 +573,31 @@ static int xc_tune_channel(struct xc5000_priv *priv, u32 freq_hz, int mode) return found; } +static int xc_set_xtal(struct dvb_frontend *fe) +{ + struct xc5000_priv *priv = fe->tuner_priv; + int ret = XC_RESULT_SUCCESS; + + switch (priv->chip_id) { + default: + case XC5000A: + /* 32.000 MHz xtal is default */ + break; + case XC5000C: + switch (priv->xtal_khz) { + default: + case 32000: + /* 32.000 MHz xtal is default */ + break; + case 31875: + /* 31.875 MHz xtal configuration */ + ret = xc_write_reg(priv, 0x000f, 0x8081); + break; + } + break; + } + return ret; +} static int xc5000_fwupload(struct dvb_frontend *fe) { @@ -603,6 +629,8 @@ static int xc5000_fwupload(struct dvb_frontend *fe) } else { printk(KERN_INFO "xc5000: firmware uploading...\n"); ret = xc_load_i2c_sequence(fe, fw->data); + if (XC_RESULT_SUCCESS == ret) + ret = xc_set_xtal(fe); printk(KERN_INFO "xc5000: firmware upload complete...\n"); } @@ -1164,6 +1192,9 @@ struct dvb_frontend *xc5000_attach(struct dvb_frontend *fe, priv->if_khz = cfg->if_khz; } + if (priv->xtal_khz == 0) + priv->xtal_khz = cfg->xtal_khz; + if (priv->radio_input == 0) priv->radio_input = cfg->radio_input; diff --git a/trunk/drivers/media/common/tuners/xc5000.h b/trunk/drivers/media/common/tuners/xc5000.h index 3396f8e02b40..39a73bf01406 100644 --- a/trunk/drivers/media/common/tuners/xc5000.h +++ b/trunk/drivers/media/common/tuners/xc5000.h @@ -34,6 +34,7 @@ struct xc5000_config { u8 i2c_address; u32 if_khz; u8 radio_input; + u32 xtal_khz; int chip_id; }; diff --git a/trunk/drivers/media/dvb/dvb-core/dvb_frontend.c b/trunk/drivers/media/dvb/dvb-core/dvb_frontend.c index 39696c6a4ed7..0f64d7182657 100644 --- a/trunk/drivers/media/dvb/dvb-core/dvb_frontend.c +++ b/trunk/drivers/media/dvb/dvb-core/dvb_frontend.c @@ -1446,6 +1446,28 @@ static int set_delivery_system(struct dvb_frontend *fe, u32 desired_system) __func__); return -EINVAL; } + /* + * Get a delivery system that is compatible with DVBv3 + * NOTE: in order for this to work with softwares like Kaffeine that + * uses a DVBv5 call for DVB-S2 and a DVBv3 call to go back to + * DVB-S, drivers that support both should put the SYS_DVBS entry + * before the SYS_DVBS2, otherwise it won't switch back to DVB-S. + * The real fix is that userspace applications should not use DVBv3 + * and not trust on calling FE_SET_FRONTEND to switch the delivery + * system. + */ + ncaps = 0; + while (fe->ops.delsys[ncaps] && ncaps < MAX_DELSYS) { + if (fe->ops.delsys[ncaps] == desired_system) { + delsys = desired_system; + break; + } + ncaps++; + } + if (delsys == SYS_UNDEFINED) { + dprintk("%s() Couldn't find a delivery system that matches %d\n", + __func__, desired_system); + } } else { /* * This is a DVBv5 call. So, it likely knows the supported @@ -1494,9 +1516,10 @@ static int set_delivery_system(struct dvb_frontend *fe, u32 desired_system) __func__); return -EINVAL; } - c->delivery_system = delsys; } + c->delivery_system = delsys; + /* * The DVBv3 or DVBv5 call is requesting a different system. So, * emulation is needed. diff --git a/trunk/drivers/media/dvb/frontends/drxk_hard.c b/trunk/drivers/media/dvb/frontends/drxk_hard.c index 36d11756492f..a414b1f2b6a5 100644 --- a/trunk/drivers/media/dvb/frontends/drxk_hard.c +++ b/trunk/drivers/media/dvb/frontends/drxk_hard.c @@ -1520,8 +1520,10 @@ static int scu_command(struct drxk_state *state, dprintk(1, "\n"); if ((cmd == 0) || ((parameterLen > 0) && (parameter == NULL)) || - ((resultLen > 0) && (result == NULL))) - goto error; + ((resultLen > 0) && (result == NULL))) { + printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); + return status; + } mutex_lock(&state->mutex); diff --git a/trunk/drivers/media/rc/winbond-cir.c b/trunk/drivers/media/rc/winbond-cir.c index b09c5fae489b..af526586fa26 100644 --- a/trunk/drivers/media/rc/winbond-cir.c +++ b/trunk/drivers/media/rc/winbond-cir.c @@ -1046,6 +1046,7 @@ wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id) goto exit_unregister_led; } + data->dev->driver_type = RC_DRIVER_IR_RAW; data->dev->driver_name = WBCIR_NAME; data->dev->input_name = WBCIR_NAME; data->dev->input_phys = "wbcir/cir0"; diff --git a/trunk/drivers/media/video/Kconfig b/trunk/drivers/media/video/Kconfig index f2479c5c0eb2..ce1e7ba940f6 100644 --- a/trunk/drivers/media/video/Kconfig +++ b/trunk/drivers/media/video/Kconfig @@ -492,7 +492,7 @@ config VIDEO_VS6624 config VIDEO_MT9M032 tristate "MT9M032 camera sensor support" - depends on I2C && VIDEO_V4L2 + depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API select VIDEO_APTINA_PLL ---help--- This driver supports MT9M032 camera sensors from Aptina, monochrome diff --git a/trunk/drivers/media/video/mt9m032.c b/trunk/drivers/media/video/mt9m032.c index 7636672c3548..645973c5feb0 100644 --- a/trunk/drivers/media/video/mt9m032.c +++ b/trunk/drivers/media/video/mt9m032.c @@ -392,10 +392,11 @@ static int mt9m032_set_pad_format(struct v4l2_subdev *subdev, } /* Scaling is not supported, the format is thus fixed. */ - ret = mt9m032_get_pad_format(subdev, fh, fmt); + fmt->format = *__mt9m032_get_pad_format(sensor, fh, fmt->which); + ret = 0; done: - mutex_lock(&sensor->lock); + mutex_unlock(&sensor->lock); return ret; } diff --git a/trunk/drivers/mfd/Kconfig b/trunk/drivers/mfd/Kconfig index 29f463cc09cb..11e44386fa9b 100644 --- a/trunk/drivers/mfd/Kconfig +++ b/trunk/drivers/mfd/Kconfig @@ -268,10 +268,17 @@ config TWL6030_PWM This is used to control charging LED brightness. config TWL6040_CORE - bool - depends on TWL4030_CORE && GENERIC_HARDIRQS + bool "Support for TWL6040 audio codec" + depends on I2C=y && GENERIC_HARDIRQS select MFD_CORE + select REGMAP_I2C default n + help + Say yes here if you want support for Texas Instruments TWL6040 audio + codec. + This driver provides common support for accessing the device, + additional drivers must be enabled in order to use the + functionality of the device (audio, vibra). config MFD_STMPE bool "Support STMicroelectronics STMPE" diff --git a/trunk/drivers/mfd/asic3.c b/trunk/drivers/mfd/asic3.c index 1895cf9fab8c..1582c3d95257 100644 --- a/trunk/drivers/mfd/asic3.c +++ b/trunk/drivers/mfd/asic3.c @@ -527,7 +527,9 @@ static void asic3_gpio_set(struct gpio_chip *chip, static int asic3_gpio_to_irq(struct gpio_chip *chip, unsigned offset) { - return (offset < ASIC3_NUM_GPIOS) ? IRQ_BOARD_START + offset : -ENXIO; + struct asic3 *asic = container_of(chip, struct asic3, gpio); + + return (offset < ASIC3_NUM_GPIOS) ? asic->irq_base + offset : -ENXIO; } static __init int asic3_gpio_probe(struct platform_device *pdev, diff --git a/trunk/drivers/mfd/omap-usb-host.c b/trunk/drivers/mfd/omap-usb-host.c index 95a2e546a489..c8aae6640e64 100644 --- a/trunk/drivers/mfd/omap-usb-host.c +++ b/trunk/drivers/mfd/omap-usb-host.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include @@ -502,19 +501,6 @@ static void omap_usbhs_init(struct device *dev) pm_runtime_get_sync(dev); spin_lock_irqsave(&omap->lock, flags); - if (pdata->ehci_data->phy_reset) { - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) - gpio_request_one(pdata->ehci_data->reset_gpio_port[0], - GPIOF_OUT_INIT_LOW, "USB1 PHY reset"); - - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) - gpio_request_one(pdata->ehci_data->reset_gpio_port[1], - GPIOF_OUT_INIT_LOW, "USB2 PHY reset"); - - /* Hold the PHY in RESET for enough time till DIR is high */ - udelay(10); - } - omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION); dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev); @@ -593,39 +579,10 @@ static void omap_usbhs_init(struct device *dev) usbhs_omap_tll_init(dev, OMAP_TLL_CHANNEL_COUNT); } - if (pdata->ehci_data->phy_reset) { - /* Hold the PHY in RESET for enough time till - * PHY is settled and ready - */ - udelay(10); - - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) - gpio_set_value - (pdata->ehci_data->reset_gpio_port[0], 1); - - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) - gpio_set_value - (pdata->ehci_data->reset_gpio_port[1], 1); - } - spin_unlock_irqrestore(&omap->lock, flags); pm_runtime_put_sync(dev); } -static void omap_usbhs_deinit(struct device *dev) -{ - struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); - struct usbhs_omap_platform_data *pdata = &omap->platdata; - - if (pdata->ehci_data->phy_reset) { - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) - gpio_free(pdata->ehci_data->reset_gpio_port[0]); - - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) - gpio_free(pdata->ehci_data->reset_gpio_port[1]); - } -} - /** * usbhs_omap_probe - initialize TI-based HCDs @@ -860,7 +817,6 @@ static int __devexit usbhs_omap_remove(struct platform_device *pdev) { struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev); - omap_usbhs_deinit(&pdev->dev); iounmap(omap->tll_base); iounmap(omap->uhh_base); clk_put(omap->init_60m_fclk); diff --git a/trunk/drivers/mfd/rc5t583.c b/trunk/drivers/mfd/rc5t583.c index 99ef944c621d..44afae0a69ce 100644 --- a/trunk/drivers/mfd/rc5t583.c +++ b/trunk/drivers/mfd/rc5t583.c @@ -80,44 +80,6 @@ static struct mfd_cell rc5t583_subdevs[] = { {.name = "rc5t583-key", } }; -int rc5t583_write(struct device *dev, uint8_t reg, uint8_t val) -{ - struct rc5t583 *rc5t583 = dev_get_drvdata(dev); - return regmap_write(rc5t583->regmap, reg, val); -} - -int rc5t583_read(struct device *dev, uint8_t reg, uint8_t *val) -{ - struct rc5t583 *rc5t583 = dev_get_drvdata(dev); - unsigned int ival; - int ret; - ret = regmap_read(rc5t583->regmap, reg, &ival); - if (!ret) - *val = (uint8_t)ival; - return ret; -} - -int rc5t583_set_bits(struct device *dev, unsigned int reg, - unsigned int bit_mask) -{ - struct rc5t583 *rc5t583 = dev_get_drvdata(dev); - return regmap_update_bits(rc5t583->regmap, reg, bit_mask, bit_mask); -} - -int rc5t583_clear_bits(struct device *dev, unsigned int reg, - unsigned int bit_mask) -{ - struct rc5t583 *rc5t583 = dev_get_drvdata(dev); - return regmap_update_bits(rc5t583->regmap, reg, bit_mask, 0); -} - -int rc5t583_update(struct device *dev, unsigned int reg, - unsigned int val, unsigned int mask) -{ - struct rc5t583 *rc5t583 = dev_get_drvdata(dev); - return regmap_update_bits(rc5t583->regmap, reg, mask, val); -} - static int __rc5t583_set_ext_pwrreq1_control(struct device *dev, int id, int ext_pwr, int slots) { @@ -197,6 +159,7 @@ int rc5t583_ext_power_req_config(struct device *dev, int ds_id, ds_id, ext_pwr_req); return 0; } +EXPORT_SYMBOL(rc5t583_ext_power_req_config); static int rc5t583_clear_ext_power_req(struct rc5t583 *rc5t583, struct rc5t583_platform_data *pdata) diff --git a/trunk/drivers/mfd/twl6040-core.c b/trunk/drivers/mfd/twl6040-core.c index b2d8e512d3cb..2d6bedadca09 100644 --- a/trunk/drivers/mfd/twl6040-core.c +++ b/trunk/drivers/mfd/twl6040-core.c @@ -30,7 +30,9 @@ #include #include #include -#include +#include +#include +#include #include #include @@ -39,7 +41,7 @@ int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg) { int ret; - u8 val = 0; + unsigned int val; mutex_lock(&twl6040->io_mutex); /* Vibra control registers from cache */ @@ -47,7 +49,7 @@ int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg) reg == TWL6040_REG_VIBCTLR)) { val = twl6040->vibra_ctrl_cache[VIBRACTRL_MEMBER(reg)]; } else { - ret = twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &val, reg); + ret = regmap_read(twl6040->regmap, reg, &val); if (ret < 0) { mutex_unlock(&twl6040->io_mutex); return ret; @@ -64,7 +66,7 @@ int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val) int ret; mutex_lock(&twl6040->io_mutex); - ret = twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, val, reg); + ret = regmap_write(twl6040->regmap, reg, val); /* Cache the vibra control registers */ if (reg == TWL6040_REG_VIBCTLL || reg == TWL6040_REG_VIBCTLR) twl6040->vibra_ctrl_cache[VIBRACTRL_MEMBER(reg)] = val; @@ -77,16 +79,9 @@ EXPORT_SYMBOL(twl6040_reg_write); int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask) { int ret; - u8 val; mutex_lock(&twl6040->io_mutex); - ret = twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &val, reg); - if (ret) - goto out; - - val |= mask; - ret = twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, val, reg); -out: + ret = regmap_update_bits(twl6040->regmap, reg, mask, mask); mutex_unlock(&twl6040->io_mutex); return ret; } @@ -95,16 +90,9 @@ EXPORT_SYMBOL(twl6040_set_bits); int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask) { int ret; - u8 val; mutex_lock(&twl6040->io_mutex); - ret = twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &val, reg); - if (ret) - goto out; - - val &= ~mask; - ret = twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, val, reg); -out: + ret = regmap_update_bits(twl6040->regmap, reg, mask, 0); mutex_unlock(&twl6040->io_mutex); return ret; } @@ -494,32 +482,58 @@ static struct resource twl6040_codec_rsrc[] = { }, }; -static int __devinit twl6040_probe(struct platform_device *pdev) +static bool twl6040_readable_reg(struct device *dev, unsigned int reg) { - struct twl4030_audio_data *pdata = pdev->dev.platform_data; + /* Register 0 is not readable */ + if (!reg) + return false; + return true; +} + +static struct regmap_config twl6040_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = TWL6040_REG_STATUS, /* 0x2e */ + + .readable_reg = twl6040_readable_reg, +}; + +static int __devinit twl6040_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct twl6040_platform_data *pdata = client->dev.platform_data; struct twl6040 *twl6040; struct mfd_cell *cell = NULL; int ret, children = 0; if (!pdata) { - dev_err(&pdev->dev, "Platform data is missing\n"); + dev_err(&client->dev, "Platform data is missing\n"); return -EINVAL; } /* In order to operate correctly we need valid interrupt config */ - if (!pdata->naudint_irq || !pdata->irq_base) { - dev_err(&pdev->dev, "Invalid IRQ configuration\n"); + if (!client->irq || !pdata->irq_base) { + dev_err(&client->dev, "Invalid IRQ configuration\n"); return -EINVAL; } - twl6040 = kzalloc(sizeof(struct twl6040), GFP_KERNEL); - if (!twl6040) - return -ENOMEM; + twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040), + GFP_KERNEL); + if (!twl6040) { + ret = -ENOMEM; + goto err; + } + + twl6040->regmap = regmap_init_i2c(client, &twl6040_regmap_config); + if (IS_ERR(twl6040->regmap)) { + ret = PTR_ERR(twl6040->regmap); + goto err; + } - platform_set_drvdata(pdev, twl6040); + i2c_set_clientdata(client, twl6040); - twl6040->dev = &pdev->dev; - twl6040->irq = pdata->naudint_irq; + twl6040->dev = &client->dev; + twl6040->irq = client->irq; twl6040->irq_base = pdata->irq_base; mutex_init(&twl6040->mutex); @@ -588,12 +602,12 @@ static int __devinit twl6040_probe(struct platform_device *pdev) } if (children) { - ret = mfd_add_devices(&pdev->dev, pdev->id, twl6040->cells, + ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children, NULL, 0); if (ret) goto mfd_err; } else { - dev_err(&pdev->dev, "No platform data found for children\n"); + dev_err(&client->dev, "No platform data found for children\n"); ret = -ENODEV; goto mfd_err; } @@ -608,14 +622,15 @@ static int __devinit twl6040_probe(struct platform_device *pdev) if (gpio_is_valid(twl6040->audpwron)) gpio_free(twl6040->audpwron); gpio1_err: - platform_set_drvdata(pdev, NULL); - kfree(twl6040); + i2c_set_clientdata(client, NULL); + regmap_exit(twl6040->regmap); +err: return ret; } -static int __devexit twl6040_remove(struct platform_device *pdev) +static int __devexit twl6040_remove(struct i2c_client *client) { - struct twl6040 *twl6040 = platform_get_drvdata(pdev); + struct twl6040 *twl6040 = i2c_get_clientdata(client); if (twl6040->power_count) twl6040_power(twl6040, 0); @@ -626,23 +641,30 @@ static int __devexit twl6040_remove(struct platform_device *pdev) free_irq(twl6040->irq_base + TWL6040_IRQ_READY, twl6040); twl6040_irq_exit(twl6040); - mfd_remove_devices(&pdev->dev); - platform_set_drvdata(pdev, NULL); - kfree(twl6040); + mfd_remove_devices(&client->dev); + i2c_set_clientdata(client, NULL); + regmap_exit(twl6040->regmap); return 0; } -static struct platform_driver twl6040_driver = { +static const struct i2c_device_id twl6040_i2c_id[] = { + { "twl6040", 0, }, + { }, +}; +MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id); + +static struct i2c_driver twl6040_driver = { + .driver = { + .name = "twl6040", + .owner = THIS_MODULE, + }, .probe = twl6040_probe, .remove = __devexit_p(twl6040_remove), - .driver = { - .owner = THIS_MODULE, - .name = "twl6040", - }, + .id_table = twl6040_i2c_id, }; -module_platform_driver(twl6040_driver); +module_i2c_driver(twl6040_driver); MODULE_DESCRIPTION("TWL6040 MFD"); MODULE_AUTHOR("Misael Lopez Cruz "); diff --git a/trunk/drivers/mmc/card/block.c b/trunk/drivers/mmc/card/block.c index b1809650b7aa..dabec556ebb8 100644 --- a/trunk/drivers/mmc/card/block.c +++ b/trunk/drivers/mmc/card/block.c @@ -873,7 +873,7 @@ static int mmc_blk_issue_secdiscard_rq(struct mmc_queue *mq, { struct mmc_blk_data *md = mq->data; struct mmc_card *card = md->queue.card; - unsigned int from, nr, arg; + unsigned int from, nr, arg, trim_arg, erase_arg; int err = 0, type = MMC_BLK_SECDISCARD; if (!(mmc_can_secure_erase_trim(card) || mmc_can_sanitize(card))) { @@ -881,20 +881,26 @@ static int mmc_blk_issue_secdiscard_rq(struct mmc_queue *mq, goto out; } + from = blk_rq_pos(req); + nr = blk_rq_sectors(req); + /* The sanitize operation is supported at v4.5 only */ if (mmc_can_sanitize(card)) { - err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, - EXT_CSD_SANITIZE_START, 1, 0); - goto out; + erase_arg = MMC_ERASE_ARG; + trim_arg = MMC_TRIM_ARG; + } else { + erase_arg = MMC_SECURE_ERASE_ARG; + trim_arg = MMC_SECURE_TRIM1_ARG; } - from = blk_rq_pos(req); - nr = blk_rq_sectors(req); - - if (mmc_can_trim(card) && !mmc_erase_group_aligned(card, from, nr)) - arg = MMC_SECURE_TRIM1_ARG; - else - arg = MMC_SECURE_ERASE_ARG; + if (mmc_erase_group_aligned(card, from, nr)) + arg = erase_arg; + else if (mmc_can_trim(card)) + arg = trim_arg; + else { + err = -EINVAL; + goto out; + } retry: if (card->quirks & MMC_QUIRK_INAND_CMD38) { err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, @@ -904,25 +910,41 @@ static int mmc_blk_issue_secdiscard_rq(struct mmc_queue *mq, INAND_CMD38_ARG_SECERASE, 0); if (err) - goto out; + goto out_retry; } + err = mmc_erase(card, from, nr, arg); - if (!err && arg == MMC_SECURE_TRIM1_ARG) { + if (err == -EIO) + goto out_retry; + if (err) + goto out; + + if (arg == MMC_SECURE_TRIM1_ARG) { if (card->quirks & MMC_QUIRK_INAND_CMD38) { err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, INAND_CMD38_ARG_EXT_CSD, INAND_CMD38_ARG_SECTRIM2, 0); if (err) - goto out; + goto out_retry; } + err = mmc_erase(card, from, nr, MMC_SECURE_TRIM2_ARG); + if (err == -EIO) + goto out_retry; + if (err) + goto out; } -out: - if (err == -EIO && !mmc_blk_reset(md, card->host, type)) + + if (mmc_can_sanitize(card)) + err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_SANITIZE_START, 1, 0); +out_retry: + if (err && !mmc_blk_reset(md, card->host, type)) goto retry; if (!err) mmc_blk_reset_success(md, type); +out: spin_lock_irq(&md->lock); __blk_end_request(req, err, blk_rq_bytes(req)); spin_unlock_irq(&md->lock); @@ -1802,7 +1824,7 @@ static void mmc_blk_remove(struct mmc_card *card) } #ifdef CONFIG_PM -static int mmc_blk_suspend(struct mmc_card *card, pm_message_t state) +static int mmc_blk_suspend(struct mmc_card *card) { struct mmc_blk_data *part_md; struct mmc_blk_data *md = mmc_get_drvdata(card); diff --git a/trunk/drivers/mmc/card/queue.c b/trunk/drivers/mmc/card/queue.c index 2517547b4366..996f8e36e23d 100644 --- a/trunk/drivers/mmc/card/queue.c +++ b/trunk/drivers/mmc/card/queue.c @@ -139,7 +139,7 @@ static void mmc_queue_setup_discard(struct request_queue *q, queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, q); q->limits.max_discard_sectors = max_discard; - if (card->erased_byte == 0) + if (card->erased_byte == 0 && !mmc_can_discard(card)) q->limits.discard_zeroes_data = 1; q->limits.discard_granularity = card->pref_erase << 9; /* granularity must not be greater than max. discard */ diff --git a/trunk/drivers/mmc/core/bus.c b/trunk/drivers/mmc/core/bus.c index 3f606068d552..c60cee92a2b2 100644 --- a/trunk/drivers/mmc/core/bus.c +++ b/trunk/drivers/mmc/core/bus.c @@ -122,14 +122,14 @@ static int mmc_bus_remove(struct device *dev) return 0; } -static int mmc_bus_suspend(struct device *dev, pm_message_t state) +static int mmc_bus_suspend(struct device *dev) { struct mmc_driver *drv = to_mmc_driver(dev->driver); struct mmc_card *card = mmc_dev_to_card(dev); int ret = 0; if (dev->driver && drv->suspend) - ret = drv->suspend(card, state); + ret = drv->suspend(card); return ret; } @@ -165,20 +165,14 @@ static int mmc_runtime_idle(struct device *dev) return pm_runtime_suspend(dev); } +#endif /* !CONFIG_PM_RUNTIME */ + static const struct dev_pm_ops mmc_bus_pm_ops = { - .runtime_suspend = mmc_runtime_suspend, - .runtime_resume = mmc_runtime_resume, - .runtime_idle = mmc_runtime_idle, + SET_RUNTIME_PM_OPS(mmc_runtime_suspend, mmc_runtime_resume, + mmc_runtime_idle) + SET_SYSTEM_SLEEP_PM_OPS(mmc_bus_suspend, mmc_bus_resume) }; -#define MMC_PM_OPS_PTR (&mmc_bus_pm_ops) - -#else /* !CONFIG_PM_RUNTIME */ - -#define MMC_PM_OPS_PTR NULL - -#endif /* !CONFIG_PM_RUNTIME */ - static struct bus_type mmc_bus_type = { .name = "mmc", .dev_attrs = mmc_dev_attrs, @@ -186,9 +180,7 @@ static struct bus_type mmc_bus_type = { .uevent = mmc_bus_uevent, .probe = mmc_bus_probe, .remove = mmc_bus_remove, - .suspend = mmc_bus_suspend, - .resume = mmc_bus_resume, - .pm = MMC_PM_OPS_PTR, + .pm = &mmc_bus_pm_ops, }; int mmc_register_bus(void) diff --git a/trunk/drivers/mmc/core/cd-gpio.c b/trunk/drivers/mmc/core/cd-gpio.c index 29de31e260dd..2c14be73254c 100644 --- a/trunk/drivers/mmc/core/cd-gpio.c +++ b/trunk/drivers/mmc/core/cd-gpio.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include diff --git a/trunk/drivers/mmc/core/core.c b/trunk/drivers/mmc/core/core.c index 7474c47b9c08..ba821fe70bca 100644 --- a/trunk/drivers/mmc/core/core.c +++ b/trunk/drivers/mmc/core/core.c @@ -1409,7 +1409,10 @@ static unsigned int mmc_mmc_erase_timeout(struct mmc_card *card, { unsigned int erase_timeout; - if (card->ext_csd.erase_group_def & 1) { + if (arg == MMC_DISCARD_ARG || + (arg == MMC_TRIM_ARG && card->ext_csd.rev >= 6)) { + erase_timeout = card->ext_csd.trim_timeout; + } else if (card->ext_csd.erase_group_def & 1) { /* High Capacity Erase Group Size uses HC timeouts */ if (arg == MMC_TRIM_ARG) erase_timeout = card->ext_csd.trim_timeout; @@ -1681,8 +1684,6 @@ int mmc_can_trim(struct mmc_card *card) { if (card->ext_csd.sec_feature_support & EXT_CSD_SEC_GB_CL_EN) return 1; - if (mmc_can_discard(card)) - return 1; return 0; } EXPORT_SYMBOL(mmc_can_trim); @@ -1701,6 +1702,8 @@ EXPORT_SYMBOL(mmc_can_discard); int mmc_can_sanitize(struct mmc_card *card) { + if (!mmc_can_trim(card) && !mmc_can_erase(card)) + return 0; if (card->ext_csd.sec_feature_support & EXT_CSD_SEC_SANITIZE) return 1; return 0; @@ -2235,6 +2238,7 @@ int mmc_cache_ctrl(struct mmc_host *host, u8 enable) mmc_card_is_removable(host)) return err; + mmc_claim_host(host); if (card && mmc_card_mmc(card) && (card->ext_csd.cache_size > 0)) { enable = !!enable; @@ -2252,6 +2256,7 @@ int mmc_cache_ctrl(struct mmc_host *host, u8 enable) card->ext_csd.cache_ctrl = enable; } } + mmc_release_host(host); return err; } @@ -2269,49 +2274,32 @@ int mmc_suspend_host(struct mmc_host *host) cancel_delayed_work(&host->detect); mmc_flush_scheduled_work(); - if (mmc_try_claim_host(host)) { - err = mmc_cache_ctrl(host, 0); - mmc_release_host(host); - } else { - err = -EBUSY; - } + err = mmc_cache_ctrl(host, 0); if (err) goto out; mmc_bus_get(host); if (host->bus_ops && !host->bus_dead) { - /* - * A long response time is not acceptable for device drivers - * when doing suspend. Prevent mmc_claim_host in the suspend - * sequence, to potentially wait "forever" by trying to - * pre-claim the host. - */ - if (mmc_try_claim_host(host)) { - if (host->bus_ops->suspend) { - err = host->bus_ops->suspend(host); - } - mmc_release_host(host); + if (host->bus_ops->suspend) + err = host->bus_ops->suspend(host); - if (err == -ENOSYS || !host->bus_ops->resume) { - /* - * We simply "remove" the card in this case. - * It will be redetected on resume. (Calling - * bus_ops->remove() with a claimed host can - * deadlock.) - */ - if (host->bus_ops->remove) - host->bus_ops->remove(host); - mmc_claim_host(host); - mmc_detach_bus(host); - mmc_power_off(host); - mmc_release_host(host); - host->pm_flags = 0; - err = 0; - } - } else { - err = -EBUSY; + if (err == -ENOSYS || !host->bus_ops->resume) { + /* + * We simply "remove" the card in this case. + * It will be redetected on resume. (Calling + * bus_ops->remove() with a claimed host can + * deadlock.) + */ + if (host->bus_ops->remove) + host->bus_ops->remove(host); + mmc_claim_host(host); + mmc_detach_bus(host); + mmc_power_off(host); + mmc_release_host(host); + host->pm_flags = 0; + err = 0; } } mmc_bus_put(host); diff --git a/trunk/drivers/mmc/host/dw_mmc.c b/trunk/drivers/mmc/host/dw_mmc.c index bf3c9b456aaf..ab3fc4617107 100644 --- a/trunk/drivers/mmc/host/dw_mmc.c +++ b/trunk/drivers/mmc/host/dw_mmc.c @@ -526,8 +526,10 @@ static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) return -ENODEV; sg_len = dw_mci_pre_dma_transfer(host, data, 0); - if (sg_len < 0) + if (sg_len < 0) { + host->dma_ops->stop(host); return sg_len; + } host->using_dma = 1; @@ -1879,7 +1881,8 @@ static void dw_mci_init_dma(struct dw_mci *host) if (!host->dma_ops) goto no_dma; - if (host->dma_ops->init) { + if (host->dma_ops->init && host->dma_ops->start && + host->dma_ops->stop && host->dma_ops->cleanup) { if (host->dma_ops->init(host)) { dev_err(&host->dev, "%s: Unable to initialize " "DMA Controller.\n", __func__); diff --git a/trunk/drivers/mmc/host/omap_hsmmc.c b/trunk/drivers/mmc/host/omap_hsmmc.c index 5c2b1c10af9c..56d4499d4388 100644 --- a/trunk/drivers/mmc/host/omap_hsmmc.c +++ b/trunk/drivers/mmc/host/omap_hsmmc.c @@ -249,7 +249,7 @@ static int omap_hsmmc_set_power(struct device *dev, int slot, int power_on, * the pbias cell programming support is still missing when * booting with Device tree */ - if (of_have_populated_dt() && !vdd) + if (dev->of_node && !vdd) return 0; if (mmc_slot(host).before_set_reg) @@ -1549,7 +1549,7 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) * can't be allowed when booting with device * tree. */ - (!of_have_populated_dt())) { + !host->dev->of_node) { /* * The mmc_select_voltage fn of the core does * not seem to set the power_mode to @@ -1741,7 +1741,7 @@ static const struct of_device_id omap_mmc_of_match[] = { .data = &omap4_reg_offset, }, {}, -} +}; MODULE_DEVICE_TABLE(of, omap_mmc_of_match); static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev) diff --git a/trunk/drivers/mmc/host/sdhci-esdhc-imx.c b/trunk/drivers/mmc/host/sdhci-esdhc-imx.c index 6193a0d7bde5..8abdaf6697a8 100644 --- a/trunk/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/trunk/drivers/mmc/host/sdhci-esdhc-imx.c @@ -467,8 +467,7 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev) clk_prepare_enable(clk); pltfm_host->clk = clk; - if (!is_imx25_esdhc(imx_data)) - host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; + host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; if (is_imx25_esdhc(imx_data) || is_imx35_esdhc(imx_data)) /* Fix errata ENGcm07207 present on i.MX25 and i.MX35 */ diff --git a/trunk/drivers/mmc/host/sdhci.c b/trunk/drivers/mmc/host/sdhci.c index 9aa77f3f04a8..ccefdebeff14 100644 --- a/trunk/drivers/mmc/host/sdhci.c +++ b/trunk/drivers/mmc/host/sdhci.c @@ -147,7 +147,7 @@ static void sdhci_set_card_detection(struct sdhci_host *host, bool enable) u32 present, irqs; if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) || - !mmc_card_is_removable(host->mmc)) + (host->mmc->caps & MMC_CAP_NONREMOVABLE)) return; present = sdhci_readl(host, SDHCI_PRESENT_STATE) & diff --git a/trunk/drivers/pci/pci.c b/trunk/drivers/pci/pci.c index d20f1334792b..111569ccab43 100644 --- a/trunk/drivers/pci/pci.c +++ b/trunk/drivers/pci/pci.c @@ -991,8 +991,8 @@ static void pci_restore_config_dword(struct pci_dev *pdev, int offset, } } -static void pci_restore_config_space(struct pci_dev *pdev, int start, int end, - int retry) +static void pci_restore_config_space_range(struct pci_dev *pdev, + int start, int end, int retry) { int index; @@ -1002,6 +1002,18 @@ static void pci_restore_config_space(struct pci_dev *pdev, int start, int end, retry); } +static void pci_restore_config_space(struct pci_dev *pdev) +{ + if (pdev->hdr_type == PCI_HEADER_TYPE_NORMAL) { + pci_restore_config_space_range(pdev, 10, 15, 0); + /* Restore BARs before the command register. */ + pci_restore_config_space_range(pdev, 4, 9, 10); + pci_restore_config_space_range(pdev, 0, 3, 0); + } else { + pci_restore_config_space_range(pdev, 0, 15, 0); + } +} + /** * pci_restore_state - Restore the saved state of a PCI device * @dev: - PCI device that we're dealing with @@ -1015,13 +1027,7 @@ void pci_restore_state(struct pci_dev *dev) pci_restore_pcie_state(dev); pci_restore_ats_state(dev); - pci_restore_config_space(dev, 10, 15, 0); - /* - * The Base Address register should be programmed before the command - * register(s) - */ - pci_restore_config_space(dev, 4, 9, 10); - pci_restore_config_space(dev, 0, 3, 0); + pci_restore_config_space(dev); pci_restore_pcix_state(dev); pci_restore_msi_state(dev); diff --git a/trunk/drivers/pinctrl/core.c b/trunk/drivers/pinctrl/core.c index ec3b8cc188af..df6296c5f47b 100644 --- a/trunk/drivers/pinctrl/core.c +++ b/trunk/drivers/pinctrl/core.c @@ -908,10 +908,6 @@ static int pinctrl_groups_show(struct seq_file *s, void *what) const struct pinctrl_ops *ops = pctldev->desc->pctlops; unsigned selector = 0; - /* No grouping */ - if (!ops) - return 0; - mutex_lock(&pinctrl_mutex); seq_puts(s, "registered pin groups:\n"); @@ -1225,6 +1221,19 @@ static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) #endif +static int pinctrl_check_ops(struct pinctrl_dev *pctldev) +{ + const struct pinctrl_ops *ops = pctldev->desc->pctlops; + + if (!ops || + !ops->list_groups || + !ops->get_group_name || + !ops->get_group_pins) + return -EINVAL; + + return 0; +} + /** * pinctrl_register() - register a pin controller device * @pctldesc: descriptor for this pin controller @@ -1256,6 +1265,14 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, INIT_LIST_HEAD(&pctldev->gpio_ranges); pctldev->dev = dev; + /* check core ops for sanity */ + ret = pinctrl_check_ops(pctldev); + if (ret) { + pr_err("%s pinctrl ops lacks necessary functions\n", + pctldesc->name); + goto out_err; + } + /* If we're implementing pinmuxing, check the ops for sanity */ if (pctldesc->pmxops) { ret = pinmux_check_ops(pctldev); diff --git a/trunk/drivers/rtc/Kconfig b/trunk/drivers/rtc/Kconfig index 4161bfe462cd..8c8377d50c4c 100644 --- a/trunk/drivers/rtc/Kconfig +++ b/trunk/drivers/rtc/Kconfig @@ -838,7 +838,7 @@ config RTC_DRV_AT32AP700X config RTC_DRV_AT91RM9200 tristate "AT91RM9200 or some AT91SAM9 RTC" - depends on ARCH_AT91 + depends on ARCH_AT91RM9200 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45 help Driver for the internal RTC (Realtime Clock) module found on Atmel AT91RM9200's and some AT91SAM9 chips. On AT91SAM9 chips diff --git a/trunk/drivers/s390/block/dasd_eckd.c b/trunk/drivers/s390/block/dasd_eckd.c index c21871a4e73d..bc2e8a7c265b 100644 --- a/trunk/drivers/s390/block/dasd_eckd.c +++ b/trunk/drivers/s390/block/dasd_eckd.c @@ -2844,6 +2844,7 @@ static struct dasd_ccw_req *dasd_eckd_build_cp_tpm_track( sector_t recid, trkid; unsigned int offs; unsigned int count, count_to_trk_end; + int ret; basedev = block->base; if (rq_data_dir(req) == READ) { @@ -2884,8 +2885,8 @@ static struct dasd_ccw_req *dasd_eckd_build_cp_tpm_track( itcw = itcw_init(cqr->data, itcw_size, itcw_op, 0, ctidaw, 0); if (IS_ERR(itcw)) { - dasd_sfree_request(cqr, startdev); - return ERR_PTR(-EINVAL); + ret = -EINVAL; + goto out_error; } cqr->cpaddr = itcw_get_tcw(itcw); if (prepare_itcw(itcw, first_trk, last_trk, @@ -2897,8 +2898,8 @@ static struct dasd_ccw_req *dasd_eckd_build_cp_tpm_track( /* Clock not in sync and XRC is enabled. * Try again later. */ - dasd_sfree_request(cqr, startdev); - return ERR_PTR(-EAGAIN); + ret = -EAGAIN; + goto out_error; } len_to_track_end = 0; /* @@ -2937,8 +2938,10 @@ static struct dasd_ccw_req *dasd_eckd_build_cp_tpm_track( tidaw_flags = 0; last_tidaw = itcw_add_tidaw(itcw, tidaw_flags, dst, part_len); - if (IS_ERR(last_tidaw)) - return ERR_PTR(-EINVAL); + if (IS_ERR(last_tidaw)) { + ret = -EINVAL; + goto out_error; + } dst += part_len; } } @@ -2947,8 +2950,10 @@ static struct dasd_ccw_req *dasd_eckd_build_cp_tpm_track( dst = page_address(bv->bv_page) + bv->bv_offset; last_tidaw = itcw_add_tidaw(itcw, 0x00, dst, bv->bv_len); - if (IS_ERR(last_tidaw)) - return ERR_PTR(-EINVAL); + if (IS_ERR(last_tidaw)) { + ret = -EINVAL; + goto out_error; + } } } last_tidaw->flags |= TIDAW_FLAGS_LAST; @@ -2968,6 +2973,9 @@ static struct dasd_ccw_req *dasd_eckd_build_cp_tpm_track( cqr->buildclk = get_clock(); cqr->status = DASD_CQR_FILLED; return cqr; +out_error: + dasd_sfree_request(cqr, startdev); + return ERR_PTR(ret); } static struct dasd_ccw_req *dasd_eckd_build_cp(struct dasd_device *startdev, diff --git a/trunk/drivers/s390/char/vmur.c b/trunk/drivers/s390/char/vmur.c index 85f4a9a5d12e..73bef0bd394c 100644 --- a/trunk/drivers/s390/char/vmur.c +++ b/trunk/drivers/s390/char/vmur.c @@ -903,7 +903,7 @@ static int ur_set_online(struct ccw_device *cdev) goto fail_urdev_put; } - cdev_init(urd->char_device, &ur_fops); + urd->char_device->ops = &ur_fops; urd->char_device->dev = MKDEV(major, minor); urd->char_device->owner = ur_fops.owner; diff --git a/trunk/drivers/tty/amiserial.c b/trunk/drivers/tty/amiserial.c index 24145c30c9b0..6cc4358f68c1 100644 --- a/trunk/drivers/tty/amiserial.c +++ b/trunk/drivers/tty/amiserial.c @@ -1073,8 +1073,10 @@ static int set_serial_info(struct tty_struct *tty, struct serial_state *state, (new_serial.close_delay != port->close_delay) || (new_serial.xmit_fifo_size != state->xmit_fifo_size) || ((new_serial.flags & ~ASYNC_USR_MASK) != - (port->flags & ~ASYNC_USR_MASK))) + (port->flags & ~ASYNC_USR_MASK))) { + tty_unlock(); return -EPERM; + } port->flags = ((port->flags & ~ASYNC_USR_MASK) | (new_serial.flags & ASYNC_USR_MASK)); state->custom_divisor = new_serial.custom_divisor; diff --git a/trunk/drivers/tty/serial/clps711x.c b/trunk/drivers/tty/serial/clps711x.c index e6c3dbd781d6..836fe2731234 100644 --- a/trunk/drivers/tty/serial/clps711x.c +++ b/trunk/drivers/tty/serial/clps711x.c @@ -154,10 +154,9 @@ static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id) port->x_char = 0; return IRQ_HANDLED; } - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { - clps711xuart_stop_tx(port); - return IRQ_HANDLED; - } + + if (uart_circ_empty(xmit) || uart_tx_stopped(port)) + goto disable_tx_irq; count = port->fifosize >> 1; do { @@ -171,8 +170,11 @@ static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id) if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) uart_write_wakeup(port); - if (uart_circ_empty(xmit)) - clps711xuart_stop_tx(port); + if (uart_circ_empty(xmit)) { + disable_tx_irq: + disable_irq_nosync(TX_IRQ(port)); + tx_enabled(port) = 0; + } return IRQ_HANDLED; } diff --git a/trunk/drivers/tty/serial/pch_uart.c b/trunk/drivers/tty/serial/pch_uart.c index bbbec4a74cfb..c2816f494807 100644 --- a/trunk/drivers/tty/serial/pch_uart.c +++ b/trunk/drivers/tty/serial/pch_uart.c @@ -1447,9 +1447,11 @@ static int pch_uart_verify_port(struct uart_port *port, __func__); return -EOPNOTSUPP; #endif - priv->use_dma = 1; priv->use_dma_flag = 1; dev_info(priv->port.dev, "PCH UART : Use DMA Mode\n"); + if (!priv->use_dma) + pch_request_dma(port); + priv->use_dma = 1; } return 0; diff --git a/trunk/drivers/usb/core/hub.c b/trunk/drivers/usb/core/hub.c index a2aa9d652c67..ec6c97dadbe4 100644 --- a/trunk/drivers/usb/core/hub.c +++ b/trunk/drivers/usb/core/hub.c @@ -1667,7 +1667,6 @@ void usb_disconnect(struct usb_device **pdev) { struct usb_device *udev = *pdev; int i; - struct usb_hcd *hcd = bus_to_hcd(udev->bus); /* mark the device as inactive, so any further urb submissions for * this device (and any of its children) will fail immediately. @@ -1690,9 +1689,7 @@ void usb_disconnect(struct usb_device **pdev) * so that the hardware is now fully quiesced. */ dev_dbg (&udev->dev, "unregistering device\n"); - mutex_lock(hcd->bandwidth_mutex); usb_disable_device(udev, 0); - mutex_unlock(hcd->bandwidth_mutex); usb_hcd_synchronize_unlinks(udev); usb_remove_ep_devs(&udev->ep0); diff --git a/trunk/drivers/usb/core/message.c b/trunk/drivers/usb/core/message.c index aed3e07942d4..ca717da3be95 100644 --- a/trunk/drivers/usb/core/message.c +++ b/trunk/drivers/usb/core/message.c @@ -1136,8 +1136,6 @@ void usb_disable_interface(struct usb_device *dev, struct usb_interface *intf, * Deallocates hcd/hardware state for the endpoints (nuking all or most * pending urbs) and usbcore state for the interfaces, so that usbcore * must usb_set_configuration() before any interfaces could be used. - * - * Must be called with hcd->bandwidth_mutex held. */ void usb_disable_device(struct usb_device *dev, int skip_ep0) { @@ -1190,7 +1188,9 @@ void usb_disable_device(struct usb_device *dev, int skip_ep0) usb_disable_endpoint(dev, i + USB_DIR_IN, false); } /* Remove endpoints from the host controller internal state */ + mutex_lock(hcd->bandwidth_mutex); usb_hcd_alloc_bandwidth(dev, NULL, NULL, NULL); + mutex_unlock(hcd->bandwidth_mutex); /* Second pass: remove endpoint pointers */ } for (i = skip_ep0; i < 16; ++i) { @@ -1750,7 +1750,6 @@ int usb_set_configuration(struct usb_device *dev, int configuration) /* if it's already configured, clear out old state first. * getting rid of old interfaces means unbinding their drivers. */ - mutex_lock(hcd->bandwidth_mutex); if (dev->state != USB_STATE_ADDRESS) usb_disable_device(dev, 1); /* Skip ep0 */ @@ -1763,6 +1762,7 @@ int usb_set_configuration(struct usb_device *dev, int configuration) * host controller will not allow submissions to dropped endpoints. If * this call fails, the device state is unchanged. */ + mutex_lock(hcd->bandwidth_mutex); ret = usb_hcd_alloc_bandwidth(dev, cp, NULL, NULL); if (ret < 0) { mutex_unlock(hcd->bandwidth_mutex); diff --git a/trunk/drivers/usb/dwc3/core.c b/trunk/drivers/usb/dwc3/core.c index 7bd815a507e8..99b58d84553a 100644 --- a/trunk/drivers/usb/dwc3/core.c +++ b/trunk/drivers/usb/dwc3/core.c @@ -206,11 +206,11 @@ static void dwc3_free_event_buffers(struct dwc3 *dwc) for (i = 0; i < dwc->num_event_buffers; i++) { evt = dwc->ev_buffs[i]; - if (evt) { + if (evt) dwc3_free_one_event_buffer(dwc, evt); - dwc->ev_buffs[i] = NULL; - } } + + kfree(dwc->ev_buffs); } /** diff --git a/trunk/drivers/usb/dwc3/ep0.c b/trunk/drivers/usb/dwc3/ep0.c index 25910e251c04..3584a169886f 100644 --- a/trunk/drivers/usb/dwc3/ep0.c +++ b/trunk/drivers/usb/dwc3/ep0.c @@ -353,6 +353,9 @@ static int dwc3_ep0_handle_feature(struct dwc3 *dwc, dwc->test_mode_nr = wIndex >> 8; dwc->test_mode = true; + break; + default: + return -EINVAL; } break; @@ -559,15 +562,20 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc, length = trb->size & DWC3_TRB_SIZE_MASK; if (dwc->ep0_bounced) { + unsigned transfer_size = ur->length; + unsigned maxp = ep0->endpoint.maxpacket; + + transfer_size += (maxp - (transfer_size % maxp)); transferred = min_t(u32, ur->length, - ep0->endpoint.maxpacket - length); + transfer_size - length); memcpy(ur->buf, dwc->ep0_bounce, transferred); dwc->ep0_bounced = false; } else { transferred = ur->length - length; - ur->actual += transferred; } + ur->actual += transferred; + if ((epnum & 1) && ur->actual < ur->length) { /* for some reason we did not get everything out */ diff --git a/trunk/drivers/usb/gadget/at91_udc.c b/trunk/drivers/usb/gadget/at91_udc.c index 0c935d7c65bd..9d7bcd910074 100644 --- a/trunk/drivers/usb/gadget/at91_udc.c +++ b/trunk/drivers/usb/gadget/at91_udc.c @@ -1863,8 +1863,8 @@ static int __devinit at91udc_probe(struct platform_device *pdev) mod_timer(&udc->vbus_timer, jiffies + VBUS_POLL_TIMEOUT); } else { - if (request_irq(udc->board.vbus_pin, at91_vbus_irq, - 0, driver_name, udc)) { + if (request_irq(gpio_to_irq(udc->board.vbus_pin), + at91_vbus_irq, 0, driver_name, udc)) { DBG("request vbus irq %d failed\n", udc->board.vbus_pin); retval = -EBUSY; @@ -1886,7 +1886,7 @@ static int __devinit at91udc_probe(struct platform_device *pdev) return 0; fail4: if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled) - free_irq(udc->board.vbus_pin, udc); + free_irq(gpio_to_irq(udc->board.vbus_pin), udc); fail3: if (gpio_is_valid(udc->board.vbus_pin)) gpio_free(udc->board.vbus_pin); @@ -1924,7 +1924,7 @@ static int __exit at91udc_remove(struct platform_device *pdev) device_init_wakeup(&pdev->dev, 0); remove_debug_file(udc); if (gpio_is_valid(udc->board.vbus_pin)) { - free_irq(udc->board.vbus_pin, udc); + free_irq(gpio_to_irq(udc->board.vbus_pin), udc); gpio_free(udc->board.vbus_pin); } free_irq(udc->udp_irq, udc); diff --git a/trunk/drivers/usb/gadget/f_fs.c b/trunk/drivers/usb/gadget/f_fs.c index 1cbba70836bc..f52cb1ae45d9 100644 --- a/trunk/drivers/usb/gadget/f_fs.c +++ b/trunk/drivers/usb/gadget/f_fs.c @@ -712,7 +712,7 @@ static long ffs_ep0_ioctl(struct file *file, unsigned code, unsigned long value) if (code == FUNCTIONFS_INTERFACE_REVMAP) { struct ffs_function *func = ffs->func; ret = func ? ffs_func_revmap_intf(func, value) : -ENODEV; - } else if (gadget->ops->ioctl) { + } else if (gadget && gadget->ops->ioctl) { ret = gadget->ops->ioctl(gadget, code, value); } else { ret = -ENOTTY; @@ -1382,6 +1382,7 @@ static void functionfs_unbind(struct ffs_data *ffs) ffs->ep0req = NULL; ffs->gadget = NULL; ffs_data_put(ffs); + clear_bit(FFS_FL_BOUND, &ffs->flags); } } diff --git a/trunk/drivers/usb/gadget/f_rndis.c b/trunk/drivers/usb/gadget/f_rndis.c index 7b1cf18df5e3..52343654f5df 100644 --- a/trunk/drivers/usb/gadget/f_rndis.c +++ b/trunk/drivers/usb/gadget/f_rndis.c @@ -500,6 +500,7 @@ rndis_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl) if (buf) { memcpy(req->buf, buf, n); req->complete = rndis_response_complete; + req->context = rndis; rndis_free_response(rndis->config, buf); value = n; } diff --git a/trunk/drivers/usb/gadget/fsl_udc_core.c b/trunk/drivers/usb/gadget/fsl_udc_core.c index 5f94e79cd6b9..55abfb6bd612 100644 --- a/trunk/drivers/usb/gadget/fsl_udc_core.c +++ b/trunk/drivers/usb/gadget/fsl_udc_core.c @@ -730,7 +730,7 @@ static void fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req) : (1 << (ep_index(ep))); /* check if the pipe is empty */ - if (!(list_empty(&ep->queue))) { + if (!(list_empty(&ep->queue)) && !(ep_index(ep) == 0)) { /* Add td to the end */ struct fsl_req *lastreq; lastreq = list_entry(ep->queue.prev, struct fsl_req, queue); @@ -918,10 +918,6 @@ fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) return -ENOMEM; } - /* Update ep0 state */ - if ((ep_index(ep) == 0)) - udc->ep0_state = DATA_STATE_XMIT; - /* irq handler advances the queue */ if (req != NULL) list_add_tail(&req->queue, &ep->queue); @@ -1279,7 +1275,8 @@ static int ep0_prime_status(struct fsl_udc *udc, int direction) udc->ep0_dir = USB_DIR_OUT; ep = &udc->eps[0]; - udc->ep0_state = WAIT_FOR_OUT_STATUS; + if (udc->ep0_state != DATA_STATE_XMIT) + udc->ep0_state = WAIT_FOR_OUT_STATUS; req->ep = ep; req->req.length = 0; @@ -1384,6 +1381,9 @@ static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value, list_add_tail(&req->queue, &ep->queue); udc->ep0_state = DATA_STATE_XMIT; + if (ep0_prime_status(udc, EP_DIR_OUT)) + ep0stall(udc); + return; stall: ep0stall(udc); @@ -1492,6 +1492,14 @@ static void setup_received_irq(struct fsl_udc *udc, spin_lock(&udc->lock); udc->ep0_state = (setup->bRequestType & USB_DIR_IN) ? DATA_STATE_XMIT : DATA_STATE_RECV; + /* + * If the data stage is IN, send status prime immediately. + * See 2.0 Spec chapter 8.5.3.3 for detail. + */ + if (udc->ep0_state == DATA_STATE_XMIT) + if (ep0_prime_status(udc, EP_DIR_OUT)) + ep0stall(udc); + } else { /* No data phase, IN status from gadget */ udc->ep0_dir = USB_DIR_IN; @@ -1520,9 +1528,8 @@ static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0, switch (udc->ep0_state) { case DATA_STATE_XMIT: - /* receive status phase */ - if (ep0_prime_status(udc, EP_DIR_OUT)) - ep0stall(udc); + /* already primed at setup_received_irq */ + udc->ep0_state = WAIT_FOR_OUT_STATUS; break; case DATA_STATE_RECV: /* send status phase */ diff --git a/trunk/drivers/usb/gadget/g_ffs.c b/trunk/drivers/usb/gadget/g_ffs.c index 331cd6729d3c..a85eaf40b948 100644 --- a/trunk/drivers/usb/gadget/g_ffs.c +++ b/trunk/drivers/usb/gadget/g_ffs.c @@ -161,7 +161,7 @@ static struct usb_composite_driver gfs_driver = { static struct ffs_data *gfs_ffs_data; static unsigned long gfs_registered; -static int gfs_init(void) +static int __init gfs_init(void) { ENTER(); @@ -169,7 +169,7 @@ static int gfs_init(void) } module_init(gfs_init); -static void gfs_exit(void) +static void __exit gfs_exit(void) { ENTER(); diff --git a/trunk/drivers/usb/gadget/s3c-hsotg.c b/trunk/drivers/usb/gadget/s3c-hsotg.c index 69295ba9d99a..105b206cd844 100644 --- a/trunk/drivers/usb/gadget/s3c-hsotg.c +++ b/trunk/drivers/usb/gadget/s3c-hsotg.c @@ -340,7 +340,7 @@ static void s3c_hsotg_init_fifo(struct s3c_hsotg *hsotg) /* currently we allocate TX FIFOs for all possible endpoints, * and assume that they are all the same size. */ - for (ep = 0; ep <= 15; ep++) { + for (ep = 1; ep <= 15; ep++) { val = addr; val |= size << S3C_DPTXFSIZn_DPTxFSize_SHIFT; addr += size; @@ -741,7 +741,7 @@ static void s3c_hsotg_start_req(struct s3c_hsotg *hsotg, /* write size / packets */ writel(epsize, hsotg->regs + epsize_reg); - if (using_dma(hsotg)) { + if (using_dma(hsotg) && !continuing) { unsigned int dma_reg; /* write DMA address to control register, buffer already @@ -1696,10 +1696,12 @@ static void s3c_hsotg_set_ep_maxpacket(struct s3c_hsotg *hsotg, reg |= mpsval; writel(reg, regs + S3C_DIEPCTL(ep)); - reg = readl(regs + S3C_DOEPCTL(ep)); - reg &= ~S3C_DxEPCTL_MPS_MASK; - reg |= mpsval; - writel(reg, regs + S3C_DOEPCTL(ep)); + if (ep) { + reg = readl(regs + S3C_DOEPCTL(ep)); + reg &= ~S3C_DxEPCTL_MPS_MASK; + reg |= mpsval; + writel(reg, regs + S3C_DOEPCTL(ep)); + } return; @@ -1919,7 +1921,8 @@ static void s3c_hsotg_epint(struct s3c_hsotg *hsotg, unsigned int idx, ints & S3C_DIEPMSK_TxFIFOEmpty) { dev_dbg(hsotg->dev, "%s: ep%d: TxFIFOEmpty\n", __func__, idx); - s3c_hsotg_trytx(hsotg, hs_ep); + if (!using_dma(hsotg)) + s3c_hsotg_trytx(hsotg, hs_ep); } } } diff --git a/trunk/drivers/usb/gadget/udc-core.c b/trunk/drivers/usb/gadget/udc-core.c index 56da49f31d6c..2fa9865babed 100644 --- a/trunk/drivers/usb/gadget/udc-core.c +++ b/trunk/drivers/usb/gadget/udc-core.c @@ -264,8 +264,8 @@ static void usb_gadget_remove_driver(struct usb_udc *udc) if (udc_is_newstyle(udc)) { udc->driver->disconnect(udc->gadget); udc->driver->unbind(udc->gadget); - usb_gadget_udc_stop(udc->gadget, udc->driver); usb_gadget_disconnect(udc->gadget); + usb_gadget_udc_stop(udc->gadget, udc->driver); } else { usb_gadget_stop(udc->gadget, udc->driver); } @@ -411,8 +411,12 @@ static ssize_t usb_udc_softconn_store(struct device *dev, struct usb_udc *udc = container_of(dev, struct usb_udc, dev); if (sysfs_streq(buf, "connect")) { + if (udc_is_newstyle(udc)) + usb_gadget_udc_start(udc->gadget, udc->driver); usb_gadget_connect(udc->gadget); } else if (sysfs_streq(buf, "disconnect")) { + if (udc_is_newstyle(udc)) + usb_gadget_udc_stop(udc->gadget, udc->driver); usb_gadget_disconnect(udc->gadget); } else { dev_err(dev, "unsupported command '%s'\n", buf); diff --git a/trunk/drivers/usb/gadget/uvc_queue.c b/trunk/drivers/usb/gadget/uvc_queue.c index d776adb2da67..0cdf89d32a15 100644 --- a/trunk/drivers/usb/gadget/uvc_queue.c +++ b/trunk/drivers/usb/gadget/uvc_queue.c @@ -543,11 +543,11 @@ static int uvc_queue_enable(struct uvc_video_queue *queue, int enable) return ret; } +/* called with queue->irqlock held.. */ static struct uvc_buffer * uvc_queue_next_buffer(struct uvc_video_queue *queue, struct uvc_buffer *buf) { struct uvc_buffer *nextbuf; - unsigned long flags; if ((queue->flags & UVC_QUEUE_DROP_INCOMPLETE) && buf->buf.length != buf->buf.bytesused) { @@ -556,14 +556,12 @@ uvc_queue_next_buffer(struct uvc_video_queue *queue, struct uvc_buffer *buf) return buf; } - spin_lock_irqsave(&queue->irqlock, flags); list_del(&buf->queue); if (!list_empty(&queue->irqqueue)) nextbuf = list_first_entry(&queue->irqqueue, struct uvc_buffer, queue); else nextbuf = NULL; - spin_unlock_irqrestore(&queue->irqlock, flags); buf->buf.sequence = queue->sequence++; do_gettimeofday(&buf->buf.timestamp); diff --git a/trunk/drivers/usb/host/ehci-fsl.c b/trunk/drivers/usb/host/ehci-fsl.c index 3e7345172e03..d0a84bd3f3eb 100644 --- a/trunk/drivers/usb/host/ehci-fsl.c +++ b/trunk/drivers/usb/host/ehci-fsl.c @@ -218,6 +218,9 @@ static void ehci_fsl_setup_phy(struct ehci_hcd *ehci, u32 portsc; struct usb_hcd *hcd = ehci_to_hcd(ehci); void __iomem *non_ehci = hcd->regs; + struct fsl_usb2_platform_data *pdata; + + pdata = hcd->self.controller->platform_data; portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]); portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW); @@ -234,7 +237,9 @@ static void ehci_fsl_setup_phy(struct ehci_hcd *ehci, /* fall through */ case FSL_USB2_PHY_UTMI: /* enable UTMI PHY */ - setbits32(non_ehci + FSL_SOC_USB_CTRL, CTRL_UTMI_PHY_EN); + if (pdata->have_sysif_regs) + setbits32(non_ehci + FSL_SOC_USB_CTRL, + CTRL_UTMI_PHY_EN); portsc |= PORT_PTS_UTMI; break; case FSL_USB2_PHY_NONE: diff --git a/trunk/drivers/usb/host/ehci-hcd.c b/trunk/drivers/usb/host/ehci-hcd.c index 806cc95317aa..4a3bc5b7a06f 100644 --- a/trunk/drivers/usb/host/ehci-hcd.c +++ b/trunk/drivers/usb/host/ehci-hcd.c @@ -858,8 +858,13 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd) goto dead; } + /* + * We don't use STS_FLR, but some controllers don't like it to + * remain on, so mask it out along with the other status bits. + */ + masked_status = status & (INTR_MASK | STS_FLR); + /* Shared IRQ? */ - masked_status = status & INTR_MASK; if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) { spin_unlock(&ehci->lock); return IRQ_NONE; @@ -910,7 +915,7 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd) pcd_status = status; /* resume root hub? */ - if (!(cmd & CMD_RUN)) + if (ehci->rh_state == EHCI_RH_SUSPENDED) usb_hcd_resume_root_hub(hcd); /* get per-port change detect bits */ diff --git a/trunk/drivers/usb/host/ehci-omap.c b/trunk/drivers/usb/host/ehci-omap.c index bba9850f32f0..5c78f9e71466 100644 --- a/trunk/drivers/usb/host/ehci-omap.c +++ b/trunk/drivers/usb/host/ehci-omap.c @@ -42,6 +42,7 @@ #include #include #include +#include /* EHCI Register Set */ #define EHCI_INSNREG04 (0xA0) @@ -191,6 +192,19 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev) } } + if (pdata->phy_reset) { + if (gpio_is_valid(pdata->reset_gpio_port[0])) + gpio_request_one(pdata->reset_gpio_port[0], + GPIOF_OUT_INIT_LOW, "USB1 PHY reset"); + + if (gpio_is_valid(pdata->reset_gpio_port[1])) + gpio_request_one(pdata->reset_gpio_port[1], + GPIOF_OUT_INIT_LOW, "USB2 PHY reset"); + + /* Hold the PHY in RESET for enough time till DIR is high */ + udelay(10); + } + pm_runtime_enable(dev); pm_runtime_get_sync(dev); @@ -237,6 +251,19 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev) /* root ports should always stay powered */ ehci_port_power(omap_ehci, 1); + if (pdata->phy_reset) { + /* Hold the PHY in RESET for enough time till + * PHY is settled and ready + */ + udelay(10); + + if (gpio_is_valid(pdata->reset_gpio_port[0])) + gpio_set_value(pdata->reset_gpio_port[0], 1); + + if (gpio_is_valid(pdata->reset_gpio_port[1])) + gpio_set_value(pdata->reset_gpio_port[1], 1); + } + return 0; err_add_hcd: @@ -259,8 +286,9 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev) */ static int ehci_hcd_omap_remove(struct platform_device *pdev) { - struct device *dev = &pdev->dev; - struct usb_hcd *hcd = dev_get_drvdata(dev); + struct device *dev = &pdev->dev; + struct usb_hcd *hcd = dev_get_drvdata(dev); + struct ehci_hcd_omap_platform_data *pdata = dev->platform_data; usb_remove_hcd(hcd); disable_put_regulator(dev->platform_data); @@ -269,6 +297,13 @@ static int ehci_hcd_omap_remove(struct platform_device *pdev) pm_runtime_put_sync(dev); pm_runtime_disable(dev); + if (pdata->phy_reset) { + if (gpio_is_valid(pdata->reset_gpio_port[0])) + gpio_free(pdata->reset_gpio_port[0]); + + if (gpio_is_valid(pdata->reset_gpio_port[1])) + gpio_free(pdata->reset_gpio_port[1]); + } return 0; } diff --git a/trunk/drivers/usb/host/ehci-tegra.c b/trunk/drivers/usb/host/ehci-tegra.c index 73544bd440bd..86183366647f 100644 --- a/trunk/drivers/usb/host/ehci-tegra.c +++ b/trunk/drivers/usb/host/ehci-tegra.c @@ -731,7 +731,6 @@ static int tegra_ehci_probe(struct platform_device *pdev) err = -ENODEV; goto fail; } - set_irq_flags(irq, IRQF_VALID); #ifdef CONFIG_USB_OTG_UTILS if (pdata->operating_mode == TEGRA_USB_OTG) { diff --git a/trunk/drivers/usb/host/ohci-at91.c b/trunk/drivers/usb/host/ohci-at91.c index 09f597ad6e00..13ebeca8e73e 100644 --- a/trunk/drivers/usb/host/ohci-at91.c +++ b/trunk/drivers/usb/host/ohci-at91.c @@ -94,7 +94,7 @@ static void at91_stop_hc(struct platform_device *pdev) /*-------------------------------------------------------------------------*/ -static void usb_hcd_at91_remove (struct usb_hcd *, struct platform_device *); +static void __devexit usb_hcd_at91_remove (struct usb_hcd *, struct platform_device *); /* configure so an HC device and id are always provided */ /* always called with process context; sleeping is OK */ @@ -108,7 +108,7 @@ static void usb_hcd_at91_remove (struct usb_hcd *, struct platform_device *); * then invokes the start() method for the HCD associated with it * through the hotplug entry's driver_data. */ -static int usb_hcd_at91_probe(const struct hc_driver *driver, +static int __devinit usb_hcd_at91_probe(const struct hc_driver *driver, struct platform_device *pdev) { int retval; @@ -203,7 +203,7 @@ static int usb_hcd_at91_probe(const struct hc_driver *driver, * context, "rmmod" or something similar. * */ -static void usb_hcd_at91_remove(struct usb_hcd *hcd, +static void __devexit usb_hcd_at91_remove(struct usb_hcd *hcd, struct platform_device *pdev) { usb_remove_hcd(hcd); @@ -545,7 +545,7 @@ static int __devinit ohci_at91_of_init(struct platform_device *pdev) /*-------------------------------------------------------------------------*/ -static int ohci_hcd_at91_drv_probe(struct platform_device *pdev) +static int __devinit ohci_hcd_at91_drv_probe(struct platform_device *pdev) { struct at91_usbh_data *pdata; int i; @@ -620,7 +620,7 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev) return usb_hcd_at91_probe(&ohci_at91_hc_driver, pdev); } -static int ohci_hcd_at91_drv_remove(struct platform_device *pdev) +static int __devexit ohci_hcd_at91_drv_remove(struct platform_device *pdev) { struct at91_usbh_data *pdata = pdev->dev.platform_data; int i; @@ -696,7 +696,7 @@ MODULE_ALIAS("platform:at91_ohci"); static struct platform_driver ohci_hcd_at91_driver = { .probe = ohci_hcd_at91_drv_probe, - .remove = ohci_hcd_at91_drv_remove, + .remove = __devexit_p(ohci_hcd_at91_drv_remove), .shutdown = usb_hcd_platform_shutdown, .suspend = ohci_hcd_at91_drv_suspend, .resume = ohci_hcd_at91_drv_resume, diff --git a/trunk/drivers/usb/misc/usbtest.c b/trunk/drivers/usb/misc/usbtest.c index 959145baf3cf..9dcb68f04f03 100644 --- a/trunk/drivers/usb/misc/usbtest.c +++ b/trunk/drivers/usb/misc/usbtest.c @@ -423,7 +423,7 @@ alloc_sglist(int nents, int max, int vary) unsigned i; unsigned size = max; - sg = kmalloc(nents * sizeof *sg, GFP_KERNEL); + sg = kmalloc_array(nents, sizeof *sg, GFP_KERNEL); if (!sg) return NULL; sg_init_table(sg, nents); @@ -904,6 +904,9 @@ test_ctrl_queue(struct usbtest_dev *dev, struct usbtest_param *param) struct ctrl_ctx context; int i; + if (param->sglen == 0 || param->iterations > UINT_MAX / param->sglen) + return -EOPNOTSUPP; + spin_lock_init(&context.lock); context.dev = dev; init_completion(&context.complete); @@ -1981,8 +1984,6 @@ usbtest_ioctl(struct usb_interface *intf, unsigned int code, void *buf) /* queued control messaging */ case 10: - if (param->sglen == 0) - break; retval = 0; dev_info(&intf->dev, "TEST 10: queue %d control calls, %d times\n", @@ -2276,6 +2277,8 @@ usbtest_probe(struct usb_interface *intf, const struct usb_device_id *id) if (status < 0) { WARNING(dev, "couldn't get endpoints, %d\n", status); + kfree(dev->buf); + kfree(dev); return status; } /* may find bulk or ISO pipes */ diff --git a/trunk/drivers/usb/misc/yurex.c b/trunk/drivers/usb/misc/yurex.c index 897edda42270..70201462e19c 100644 --- a/trunk/drivers/usb/misc/yurex.c +++ b/trunk/drivers/usb/misc/yurex.c @@ -99,9 +99,7 @@ static void yurex_delete(struct kref *kref) usb_put_dev(dev->udev); if (dev->cntl_urb) { usb_kill_urb(dev->cntl_urb); - if (dev->cntl_req) - usb_free_coherent(dev->udev, YUREX_BUF_SIZE, - dev->cntl_req, dev->cntl_urb->setup_dma); + kfree(dev->cntl_req); if (dev->cntl_buffer) usb_free_coherent(dev->udev, YUREX_BUF_SIZE, dev->cntl_buffer, dev->cntl_urb->transfer_dma); @@ -234,9 +232,7 @@ static int yurex_probe(struct usb_interface *interface, const struct usb_device_ } /* allocate buffer for control req */ - dev->cntl_req = usb_alloc_coherent(dev->udev, YUREX_BUF_SIZE, - GFP_KERNEL, - &dev->cntl_urb->setup_dma); + dev->cntl_req = kmalloc(YUREX_BUF_SIZE, GFP_KERNEL); if (!dev->cntl_req) { err("Could not allocate cntl_req"); goto error; @@ -286,7 +282,7 @@ static int yurex_probe(struct usb_interface *interface, const struct usb_device_ usb_rcvintpipe(dev->udev, dev->int_in_endpointAddr), dev->int_buffer, YUREX_BUF_SIZE, yurex_interrupt, dev, 1); - dev->cntl_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; + dev->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; if (usb_submit_urb(dev->urb, GFP_KERNEL)) { retval = -EIO; err("Could not submitting URB"); diff --git a/trunk/drivers/usb/musb/musb_core.c b/trunk/drivers/usb/musb/musb_core.c index 0f8b82918a40..66aaccf04490 100644 --- a/trunk/drivers/usb/musb/musb_core.c +++ b/trunk/drivers/usb/musb/musb_core.c @@ -137,6 +137,9 @@ static int musb_ulpi_read(struct usb_phy *phy, u32 offset) int i = 0; u8 r; u8 power; + int ret; + + pm_runtime_get_sync(phy->io_dev); /* Make sure the transceiver is not in low power mode */ power = musb_readb(addr, MUSB_POWER); @@ -154,15 +157,22 @@ static int musb_ulpi_read(struct usb_phy *phy, u32 offset) while (!(musb_readb(addr, MUSB_ULPI_REG_CONTROL) & MUSB_ULPI_REG_CMPLT)) { i++; - if (i == 10000) - return -ETIMEDOUT; + if (i == 10000) { + ret = -ETIMEDOUT; + goto out; + } } r = musb_readb(addr, MUSB_ULPI_REG_CONTROL); r &= ~MUSB_ULPI_REG_CMPLT; musb_writeb(addr, MUSB_ULPI_REG_CONTROL, r); - return musb_readb(addr, MUSB_ULPI_REG_DATA); + ret = musb_readb(addr, MUSB_ULPI_REG_DATA); + +out: + pm_runtime_put(phy->io_dev); + + return ret; } static int musb_ulpi_write(struct usb_phy *phy, u32 offset, u32 data) @@ -171,6 +181,9 @@ static int musb_ulpi_write(struct usb_phy *phy, u32 offset, u32 data) int i = 0; u8 r = 0; u8 power; + int ret = 0; + + pm_runtime_get_sync(phy->io_dev); /* Make sure the transceiver is not in low power mode */ power = musb_readb(addr, MUSB_POWER); @@ -184,15 +197,20 @@ static int musb_ulpi_write(struct usb_phy *phy, u32 offset, u32 data) while (!(musb_readb(addr, MUSB_ULPI_REG_CONTROL) & MUSB_ULPI_REG_CMPLT)) { i++; - if (i == 10000) - return -ETIMEDOUT; + if (i == 10000) { + ret = -ETIMEDOUT; + goto out; + } } r = musb_readb(addr, MUSB_ULPI_REG_CONTROL); r &= ~MUSB_ULPI_REG_CMPLT; musb_writeb(addr, MUSB_ULPI_REG_CONTROL, r); - return 0; +out: + pm_runtime_put(phy->io_dev); + + return ret; } #else #define musb_ulpi_read NULL @@ -1904,14 +1922,17 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl) if (!musb->isr) { status = -ENODEV; - goto fail3; + goto fail2; } if (!musb->xceiv->io_ops) { + musb->xceiv->io_dev = musb->controller; musb->xceiv->io_priv = musb->mregs; musb->xceiv->io_ops = &musb_ulpi_access; } + pm_runtime_get_sync(musb->controller); + #ifndef CONFIG_MUSB_PIO_ONLY if (use_dma && dev->dma_mask) { struct dma_controller *c; @@ -2023,6 +2044,8 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl) goto fail5; #endif + pm_runtime_put(musb->controller); + dev_info(dev, "USB %s mode controller at %p using %s, IRQ %d\n", ({char *s; switch (musb->board_mode) { @@ -2047,6 +2070,9 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl) musb_gadget_cleanup(musb); fail3: + pm_runtime_put_sync(musb->controller); + +fail2: if (musb->irq_wake) device_init_wakeup(dev, 0); musb_platform_exit(musb); diff --git a/trunk/drivers/usb/musb/musb_host.c b/trunk/drivers/usb/musb/musb_host.c index 79cb0af779fa..ef8d744800ac 100644 --- a/trunk/drivers/usb/musb/musb_host.c +++ b/trunk/drivers/usb/musb/musb_host.c @@ -2098,7 +2098,7 @@ static int musb_cleanup_urb(struct urb *urb, struct musb_qh *qh) } /* turn off DMA requests, discard state, stop polling ... */ - if (is_in) { + if (ep->epnum && is_in) { /* giveback saves bulk toggle */ csr = musb_h_flush_rxfifo(ep, 0); diff --git a/trunk/drivers/usb/musb/omap2430.c b/trunk/drivers/usb/musb/omap2430.c index 2ae0bb309994..c7785e81254c 100644 --- a/trunk/drivers/usb/musb/omap2430.c +++ b/trunk/drivers/usb/musb/omap2430.c @@ -282,7 +282,8 @@ static void musb_otg_notifier_work(struct work_struct *data_notifier_work) static int omap2430_musb_init(struct musb *musb) { - u32 l, status = 0; + u32 l; + int status = 0; struct device *dev = musb->controller; struct musb_hdrc_platform_data *plat = dev->platform_data; struct omap_musb_board_data *data = plat->board_data; @@ -301,7 +302,7 @@ static int omap2430_musb_init(struct musb *musb) status = pm_runtime_get_sync(dev); if (status < 0) { - dev_err(dev, "pm_runtime_get_sync FAILED"); + dev_err(dev, "pm_runtime_get_sync FAILED %d\n", status); goto err1; } @@ -333,6 +334,7 @@ static int omap2430_musb_init(struct musb *musb) setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb); + pm_runtime_put_noidle(musb->controller); return 0; err1: @@ -452,14 +454,14 @@ static int __devinit omap2430_probe(struct platform_device *pdev) goto err2; } + pm_runtime_enable(&pdev->dev); + ret = platform_device_add(musb); if (ret) { dev_err(&pdev->dev, "failed to register musb device\n"); goto err2; } - pm_runtime_enable(&pdev->dev); - return 0; err2: @@ -478,7 +480,6 @@ static int __devexit omap2430_remove(struct platform_device *pdev) platform_device_del(glue->musb); platform_device_put(glue->musb); - pm_runtime_put(&pdev->dev); kfree(glue); return 0; @@ -491,11 +492,13 @@ static int omap2430_runtime_suspend(struct device *dev) struct omap2430_glue *glue = dev_get_drvdata(dev); struct musb *musb = glue_to_musb(glue); - musb->context.otg_interfsel = musb_readl(musb->mregs, - OTG_INTERFSEL); + if (musb) { + musb->context.otg_interfsel = musb_readl(musb->mregs, + OTG_INTERFSEL); - omap2430_low_level_exit(musb); - usb_phy_set_suspend(musb->xceiv, 1); + omap2430_low_level_exit(musb); + usb_phy_set_suspend(musb->xceiv, 1); + } return 0; } @@ -505,11 +508,13 @@ static int omap2430_runtime_resume(struct device *dev) struct omap2430_glue *glue = dev_get_drvdata(dev); struct musb *musb = glue_to_musb(glue); - omap2430_low_level_init(musb); - musb_writel(musb->mregs, OTG_INTERFSEL, - musb->context.otg_interfsel); + if (musb) { + omap2430_low_level_init(musb); + musb_writel(musb->mregs, OTG_INTERFSEL, + musb->context.otg_interfsel); - usb_phy_set_suspend(musb->xceiv, 0); + usb_phy_set_suspend(musb->xceiv, 0); + } return 0; } diff --git a/trunk/drivers/usb/serial/cp210x.c b/trunk/drivers/usb/serial/cp210x.c index 0310e2df59f5..ec30f95ef399 100644 --- a/trunk/drivers/usb/serial/cp210x.c +++ b/trunk/drivers/usb/serial/cp210x.c @@ -287,7 +287,8 @@ static int cp210x_get_config(struct usb_serial_port *port, u8 request, /* Issue the request, attempting to read 'size' bytes */ result = usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0), request, REQTYPE_DEVICE_TO_HOST, 0x0000, - port_priv->bInterfaceNumber, buf, size, 300); + port_priv->bInterfaceNumber, buf, size, + USB_CTRL_GET_TIMEOUT); /* Convert data into an array of integers */ for (i = 0; i < length; i++) @@ -340,12 +341,14 @@ static int cp210x_set_config(struct usb_serial_port *port, u8 request, result = usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0), request, REQTYPE_HOST_TO_DEVICE, 0x0000, - port_priv->bInterfaceNumber, buf, size, 300); + port_priv->bInterfaceNumber, buf, size, + USB_CTRL_SET_TIMEOUT); } else { result = usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0), request, REQTYPE_HOST_TO_DEVICE, data[0], - port_priv->bInterfaceNumber, NULL, 0, 300); + port_priv->bInterfaceNumber, NULL, 0, + USB_CTRL_SET_TIMEOUT); } kfree(buf); diff --git a/trunk/drivers/usb/serial/sierra.c b/trunk/drivers/usb/serial/sierra.c index fdd5aa2c8d82..8c8bf806f6fa 100644 --- a/trunk/drivers/usb/serial/sierra.c +++ b/trunk/drivers/usb/serial/sierra.c @@ -221,7 +221,7 @@ static const struct sierra_iface_info typeB_interface_list = { }; /* 'blacklist' of interfaces not served by this driver */ -static const u8 direct_ip_non_serial_ifaces[] = { 7, 8, 9, 10, 11 }; +static const u8 direct_ip_non_serial_ifaces[] = { 7, 8, 9, 10, 11, 19, 20 }; static const struct sierra_iface_info direct_ip_interface_blacklist = { .infolen = ARRAY_SIZE(direct_ip_non_serial_ifaces), .ifaceinfo = direct_ip_non_serial_ifaces, @@ -289,7 +289,6 @@ static const struct usb_device_id id_table[] = { { USB_DEVICE(0x1199, 0x6856) }, /* Sierra Wireless AirCard 881 U */ { USB_DEVICE(0x1199, 0x6859) }, /* Sierra Wireless AirCard 885 E */ { USB_DEVICE(0x1199, 0x685A) }, /* Sierra Wireless AirCard 885 E */ - { USB_DEVICE(0x1199, 0x68A2) }, /* Sierra Wireless MC7710 */ /* Sierra Wireless C885 */ { USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x6880, 0xFF, 0xFF, 0xFF)}, /* Sierra Wireless C888, Air Card 501, USB 303, USB 304 */ @@ -299,6 +298,9 @@ static const struct usb_device_id id_table[] = { /* Sierra Wireless HSPA Non-Composite Device */ { USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x6892, 0xFF, 0xFF, 0xFF)}, { USB_DEVICE(0x1199, 0x6893) }, /* Sierra Wireless Device */ + { USB_DEVICE(0x1199, 0x68A2), /* Sierra Wireless MC77xx in QMI mode */ + .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist + }, { USB_DEVICE(0x1199, 0x68A3), /* Sierra Wireless Direct IP modems */ .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist }, diff --git a/trunk/drivers/uwb/hwa-rc.c b/trunk/drivers/uwb/hwa-rc.c index 66797e9c5010..810c90ae2c55 100644 --- a/trunk/drivers/uwb/hwa-rc.c +++ b/trunk/drivers/uwb/hwa-rc.c @@ -645,7 +645,8 @@ void hwarc_neep_cb(struct urb *urb) dev_err(dev, "NEEP: URB error %d\n", urb->status); } result = usb_submit_urb(urb, GFP_ATOMIC); - if (result < 0) { + if (result < 0 && result != -ENODEV && result != -EPERM) { + /* ignoring unrecoverable errors */ dev_err(dev, "NEEP: Can't resubmit URB (%d) resetting device\n", result); goto error; diff --git a/trunk/drivers/uwb/neh.c b/trunk/drivers/uwb/neh.c index a269937be1b8..8cb71bb333c2 100644 --- a/trunk/drivers/uwb/neh.c +++ b/trunk/drivers/uwb/neh.c @@ -107,6 +107,7 @@ struct uwb_rc_neh { u8 evt_type; __le16 evt; u8 context; + u8 completed; uwb_rc_cmd_cb_f cb; void *arg; @@ -409,6 +410,7 @@ static void uwb_rc_neh_grok_event(struct uwb_rc *rc, struct uwb_rceb *rceb, size struct device *dev = &rc->uwb_dev.dev; struct uwb_rc_neh *neh; struct uwb_rceb *notif; + unsigned long flags; if (rceb->bEventContext == 0) { notif = kmalloc(size, GFP_ATOMIC); @@ -422,7 +424,11 @@ static void uwb_rc_neh_grok_event(struct uwb_rc *rc, struct uwb_rceb *rceb, size } else { neh = uwb_rc_neh_lookup(rc, rceb); if (neh) { - del_timer_sync(&neh->timer); + spin_lock_irqsave(&rc->neh_lock, flags); + /* to guard against a timeout */ + neh->completed = 1; + del_timer(&neh->timer); + spin_unlock_irqrestore(&rc->neh_lock, flags); uwb_rc_neh_cb(neh, rceb, size); } else dev_warn(dev, "event 0x%02x/%04x/%02x (%zu bytes): nobody cared\n", @@ -568,6 +574,10 @@ static void uwb_rc_neh_timer(unsigned long arg) unsigned long flags; spin_lock_irqsave(&rc->neh_lock, flags); + if (neh->completed) { + spin_unlock_irqrestore(&rc->neh_lock, flags); + return; + } if (neh->context) __uwb_rc_neh_rm(rc, neh); else diff --git a/trunk/drivers/vhost/test.c b/trunk/drivers/vhost/test.c index fc9a1d75281f..3de00d9fae2e 100644 --- a/trunk/drivers/vhost/test.c +++ b/trunk/drivers/vhost/test.c @@ -155,7 +155,7 @@ static int vhost_test_release(struct inode *inode, struct file *f) vhost_test_stop(n, &private); vhost_test_flush(n); - vhost_dev_cleanup(&n->dev); + vhost_dev_cleanup(&n->dev, false); /* We do an extra flush before freeing memory, * since jobs can re-queue themselves. */ vhost_test_flush(n); diff --git a/trunk/drivers/virtio/virtio_balloon.c b/trunk/drivers/virtio/virtio_balloon.c index 05f0a80818a2..c2d05a8279fd 100644 --- a/trunk/drivers/virtio/virtio_balloon.c +++ b/trunk/drivers/virtio/virtio_balloon.c @@ -28,6 +28,13 @@ #include #include +/* + * Balloon device works in 4K page units. So each page is pointed to by + * multiple balloon pages. All memory counters in this driver are in balloon + * page units. + */ +#define VIRTIO_BALLOON_PAGES_PER_PAGE (PAGE_SIZE >> VIRTIO_BALLOON_PFN_SHIFT) + struct virtio_balloon { struct virtio_device *vdev; @@ -42,8 +49,13 @@ struct virtio_balloon /* Waiting for host to ack the pages we released. */ struct completion acked; - /* The pages we've told the Host we're not using. */ + /* Number of balloon pages we've told the Host we're not using. */ unsigned int num_pages; + /* + * The pages we've told the Host we're not using. + * Each page on this list adds VIRTIO_BALLOON_PAGES_PER_PAGE + * to num_pages above. + */ struct list_head pages; /* The array of pfns we tell the Host about. */ @@ -66,7 +78,13 @@ static u32 page_to_balloon_pfn(struct page *page) BUILD_BUG_ON(PAGE_SHIFT < VIRTIO_BALLOON_PFN_SHIFT); /* Convert pfn from Linux page size to balloon page size. */ - return pfn >> (PAGE_SHIFT - VIRTIO_BALLOON_PFN_SHIFT); + return pfn * VIRTIO_BALLOON_PAGES_PER_PAGE; +} + +static struct page *balloon_pfn_to_page(u32 pfn) +{ + BUG_ON(pfn % VIRTIO_BALLOON_PAGES_PER_PAGE); + return pfn_to_page(pfn / VIRTIO_BALLOON_PAGES_PER_PAGE); } static void balloon_ack(struct virtqueue *vq) @@ -96,12 +114,23 @@ static void tell_host(struct virtio_balloon *vb, struct virtqueue *vq) wait_for_completion(&vb->acked); } +static void set_page_pfns(u32 pfns[], struct page *page) +{ + unsigned int i; + + /* Set balloon pfns pointing at this page. + * Note that the first pfn points at start of the page. */ + for (i = 0; i < VIRTIO_BALLOON_PAGES_PER_PAGE; i++) + pfns[i] = page_to_balloon_pfn(page) + i; +} + static void fill_balloon(struct virtio_balloon *vb, size_t num) { /* We can only do one array worth at a time. */ num = min(num, ARRAY_SIZE(vb->pfns)); - for (vb->num_pfns = 0; vb->num_pfns < num; vb->num_pfns++) { + for (vb->num_pfns = 0; vb->num_pfns < num; + vb->num_pfns += VIRTIO_BALLOON_PAGES_PER_PAGE) { struct page *page = alloc_page(GFP_HIGHUSER | __GFP_NORETRY | __GFP_NOMEMALLOC | __GFP_NOWARN); if (!page) { @@ -113,9 +142,9 @@ static void fill_balloon(struct virtio_balloon *vb, size_t num) msleep(200); break; } - vb->pfns[vb->num_pfns] = page_to_balloon_pfn(page); + set_page_pfns(vb->pfns + vb->num_pfns, page); + vb->num_pages += VIRTIO_BALLOON_PAGES_PER_PAGE; totalram_pages--; - vb->num_pages++; list_add(&page->lru, &vb->pages); } @@ -130,8 +159,9 @@ static void release_pages_by_pfn(const u32 pfns[], unsigned int num) { unsigned int i; - for (i = 0; i < num; i++) { - __free_page(pfn_to_page(pfns[i])); + /* Find pfns pointing at start of each page, get pages and free them. */ + for (i = 0; i < num; i += VIRTIO_BALLOON_PAGES_PER_PAGE) { + __free_page(balloon_pfn_to_page(pfns[i])); totalram_pages++; } } @@ -143,11 +173,12 @@ static void leak_balloon(struct virtio_balloon *vb, size_t num) /* We can only do one array worth at a time. */ num = min(num, ARRAY_SIZE(vb->pfns)); - for (vb->num_pfns = 0; vb->num_pfns < num; vb->num_pfns++) { + for (vb->num_pfns = 0; vb->num_pfns < num; + vb->num_pfns += VIRTIO_BALLOON_PAGES_PER_PAGE) { page = list_first_entry(&vb->pages, struct page, lru); list_del(&page->lru); - vb->pfns[vb->num_pfns] = page_to_balloon_pfn(page); - vb->num_pages--; + set_page_pfns(vb->pfns + vb->num_pfns, page); + vb->num_pages -= VIRTIO_BALLOON_PAGES_PER_PAGE; } /* @@ -234,11 +265,14 @@ static void virtballoon_changed(struct virtio_device *vdev) static inline s64 towards_target(struct virtio_balloon *vb) { - u32 v; + __le32 v; + s64 target; + vb->vdev->config->get(vb->vdev, offsetof(struct virtio_balloon_config, num_pages), &v, sizeof(v)); - return (s64)v - vb->num_pages; + target = le32_to_cpu(v); + return target - vb->num_pages; } static void update_balloon_size(struct virtio_balloon *vb) diff --git a/trunk/drivers/xen/gntdev.c b/trunk/drivers/xen/gntdev.c index 99d8151c824a..1ffd03bf8e10 100644 --- a/trunk/drivers/xen/gntdev.c +++ b/trunk/drivers/xen/gntdev.c @@ -722,7 +722,7 @@ static int gntdev_mmap(struct file *flip, struct vm_area_struct *vma) vma->vm_flags |= VM_RESERVED|VM_DONTEXPAND; if (use_ptemod) - vma->vm_flags |= VM_DONTCOPY|VM_PFNMAP; + vma->vm_flags |= VM_DONTCOPY; vma->vm_private_data = map; diff --git a/trunk/drivers/xen/grant-table.c b/trunk/drivers/xen/grant-table.c index b4d4eac761db..f100ce20b16b 100644 --- a/trunk/drivers/xen/grant-table.c +++ b/trunk/drivers/xen/grant-table.c @@ -1029,6 +1029,7 @@ int gnttab_init(void) int i; unsigned int max_nr_glist_frames, nr_glist_frames; unsigned int nr_init_grefs; + int ret; nr_grant_frames = 1; boot_max_nr_grant_frames = __max_nr_grant_frames(); @@ -1047,12 +1048,16 @@ int gnttab_init(void) nr_glist_frames = (nr_grant_frames * GREFS_PER_GRANT_FRAME + RPP - 1) / RPP; for (i = 0; i < nr_glist_frames; i++) { gnttab_list[i] = (grant_ref_t *)__get_free_page(GFP_KERNEL); - if (gnttab_list[i] == NULL) + if (gnttab_list[i] == NULL) { + ret = -ENOMEM; goto ini_nomem; + } } - if (gnttab_resume() < 0) - return -ENODEV; + if (gnttab_resume() < 0) { + ret = -ENODEV; + goto ini_nomem; + } nr_init_grefs = nr_grant_frames * GREFS_PER_GRANT_FRAME; @@ -1070,7 +1075,7 @@ int gnttab_init(void) for (i--; i >= 0; i--) free_page((unsigned long)gnttab_list[i]); kfree(gnttab_list); - return -ENOMEM; + return ret; } EXPORT_SYMBOL_GPL(gnttab_init); diff --git a/trunk/drivers/xen/manage.c b/trunk/drivers/xen/manage.c index 9e14ae6cd49c..412b96cc5305 100644 --- a/trunk/drivers/xen/manage.c +++ b/trunk/drivers/xen/manage.c @@ -132,6 +132,7 @@ static void do_suspend(void) err = dpm_suspend_end(PMSG_FREEZE); if (err) { printk(KERN_ERR "dpm_suspend_end failed: %d\n", err); + si.cancelled = 0; goto out_resume; } diff --git a/trunk/drivers/xen/xenbus/xenbus_probe_frontend.c b/trunk/drivers/xen/xenbus/xenbus_probe_frontend.c index f20c5f178b40..a31b54d48839 100644 --- a/trunk/drivers/xen/xenbus/xenbus_probe_frontend.c +++ b/trunk/drivers/xen/xenbus/xenbus_probe_frontend.c @@ -135,7 +135,7 @@ static int read_backend_details(struct xenbus_device *xendev) return xenbus_read_otherend_details(xendev, "backend-id", "backend"); } -static int is_device_connecting(struct device *dev, void *data) +static int is_device_connecting(struct device *dev, void *data, bool ignore_nonessential) { struct xenbus_device *xendev = to_xenbus_device(dev); struct device_driver *drv = data; @@ -152,16 +152,41 @@ static int is_device_connecting(struct device *dev, void *data) if (drv && (dev->driver != drv)) return 0; + if (ignore_nonessential) { + /* With older QEMU, for PVonHVM guests the guest config files + * could contain: vfb = [ 'vnc=1, vnclisten=0.0.0.0'] + * which is nonsensical as there is no PV FB (there can be + * a PVKB) running as HVM guest. */ + + if ((strncmp(xendev->nodename, "device/vkbd", 11) == 0)) + return 0; + + if ((strncmp(xendev->nodename, "device/vfb", 10) == 0)) + return 0; + } xendrv = to_xenbus_driver(dev->driver); return (xendev->state < XenbusStateConnected || (xendev->state == XenbusStateConnected && xendrv->is_ready && !xendrv->is_ready(xendev))); } +static int essential_device_connecting(struct device *dev, void *data) +{ + return is_device_connecting(dev, data, true /* ignore PV[KBB+FB] */); +} +static int non_essential_device_connecting(struct device *dev, void *data) +{ + return is_device_connecting(dev, data, false); +} -static int exists_connecting_device(struct device_driver *drv) +static int exists_essential_connecting_device(struct device_driver *drv) { return bus_for_each_dev(&xenbus_frontend.bus, NULL, drv, - is_device_connecting); + essential_device_connecting); +} +static int exists_non_essential_connecting_device(struct device_driver *drv) +{ + return bus_for_each_dev(&xenbus_frontend.bus, NULL, drv, + non_essential_device_connecting); } static int print_device_status(struct device *dev, void *data) @@ -192,6 +217,23 @@ static int print_device_status(struct device *dev, void *data) /* We only wait for device setup after most initcalls have run. */ static int ready_to_wait_for_devices; +static bool wait_loop(unsigned long start, unsigned int max_delay, + unsigned int *seconds_waited) +{ + if (time_after(jiffies, start + (*seconds_waited+5)*HZ)) { + if (!*seconds_waited) + printk(KERN_WARNING "XENBUS: Waiting for " + "devices to initialise: "); + *seconds_waited += 5; + printk("%us...", max_delay - *seconds_waited); + if (*seconds_waited == max_delay) + return true; + } + + schedule_timeout_interruptible(HZ/10); + + return false; +} /* * On a 5-minute timeout, wait for all devices currently configured. We need * to do this to guarantee that the filesystems and / or network devices @@ -215,19 +257,14 @@ static void wait_for_devices(struct xenbus_driver *xendrv) if (!ready_to_wait_for_devices || !xen_domain()) return; - while (exists_connecting_device(drv)) { - if (time_after(jiffies, start + (seconds_waited+5)*HZ)) { - if (!seconds_waited) - printk(KERN_WARNING "XENBUS: Waiting for " - "devices to initialise: "); - seconds_waited += 5; - printk("%us...", 300 - seconds_waited); - if (seconds_waited == 300) - break; - } - - schedule_timeout_interruptible(HZ/10); - } + while (exists_non_essential_connecting_device(drv)) + if (wait_loop(start, 30, &seconds_waited)) + break; + + /* Skips PVKB and PVFB check.*/ + while (exists_essential_connecting_device(drv)) + if (wait_loop(start, 270, &seconds_waited)) + break; if (seconds_waited) printk("\n"); diff --git a/trunk/fs/aio.c b/trunk/fs/aio.c index da887604dfc5..67a6db3e1b6f 100644 --- a/trunk/fs/aio.c +++ b/trunk/fs/aio.c @@ -93,9 +93,8 @@ static void aio_free_ring(struct kioctx *ctx) put_page(info->ring_pages[i]); if (info->mmap_size) { - down_write(&ctx->mm->mmap_sem); - do_munmap(ctx->mm, info->mmap_base, info->mmap_size); - up_write(&ctx->mm->mmap_sem); + BUG_ON(ctx->mm != current->mm); + vm_munmap(info->mmap_base, info->mmap_size); } if (info->ring_pages && info->ring_pages != info->internal_pages) @@ -389,6 +388,17 @@ void exit_aio(struct mm_struct *mm) "exit_aio:ioctx still alive: %d %d %d\n", atomic_read(&ctx->users), ctx->dead, ctx->reqs_active); + /* + * We don't need to bother with munmap() here - + * exit_mmap(mm) is coming and it'll unmap everything. + * Since aio_free_ring() uses non-zero ->mmap_size + * as indicator that it needs to unmap the area, + * just set it to 0; aio_free_ring() is the only + * place that uses ->mmap_size, so it's safe. + * That way we get all munmap done to current->mm - + * all other callers have ctx->mm == current->mm. + */ + ctx->ring_info.mmap_size = 0; put_ioctx(ctx); } } diff --git a/trunk/fs/binfmt_aout.c b/trunk/fs/binfmt_aout.c index 2eb12f13593d..d146e181d10d 100644 --- a/trunk/fs/binfmt_aout.c +++ b/trunk/fs/binfmt_aout.c @@ -50,9 +50,7 @@ static int set_brk(unsigned long start, unsigned long end) end = PAGE_ALIGN(end); if (end > start) { unsigned long addr; - down_write(¤t->mm->mmap_sem); - addr = do_brk(start, end - start); - up_write(¤t->mm->mmap_sem); + addr = vm_brk(start, end - start); if (BAD_ADDR(addr)) return addr; } @@ -280,9 +278,7 @@ static int load_aout_binary(struct linux_binprm * bprm, struct pt_regs * regs) pos = 32; map_size = ex.a_text+ex.a_data; #endif - down_write(¤t->mm->mmap_sem); - error = do_brk(text_addr & PAGE_MASK, map_size); - up_write(¤t->mm->mmap_sem); + error = vm_brk(text_addr & PAGE_MASK, map_size); if (error != (text_addr & PAGE_MASK)) { send_sig(SIGKILL, current, 0); return error; @@ -313,9 +309,7 @@ static int load_aout_binary(struct linux_binprm * bprm, struct pt_regs * regs) if (!bprm->file->f_op->mmap||((fd_offset & ~PAGE_MASK) != 0)) { loff_t pos = fd_offset; - down_write(¤t->mm->mmap_sem); - do_brk(N_TXTADDR(ex), ex.a_text+ex.a_data); - up_write(¤t->mm->mmap_sem); + vm_brk(N_TXTADDR(ex), ex.a_text+ex.a_data); bprm->file->f_op->read(bprm->file, (char __user *)N_TXTADDR(ex), ex.a_text+ex.a_data, &pos); @@ -325,24 +319,20 @@ static int load_aout_binary(struct linux_binprm * bprm, struct pt_regs * regs) goto beyond_if; } - down_write(¤t->mm->mmap_sem); - error = do_mmap(bprm->file, N_TXTADDR(ex), ex.a_text, + error = vm_mmap(bprm->file, N_TXTADDR(ex), ex.a_text, PROT_READ | PROT_EXEC, MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_EXECUTABLE, fd_offset); - up_write(¤t->mm->mmap_sem); if (error != N_TXTADDR(ex)) { send_sig(SIGKILL, current, 0); return error; } - down_write(¤t->mm->mmap_sem); - error = do_mmap(bprm->file, N_DATADDR(ex), ex.a_data, + error = vm_mmap(bprm->file, N_DATADDR(ex), ex.a_data, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_EXECUTABLE, fd_offset + ex.a_text); - up_write(¤t->mm->mmap_sem); if (error != N_DATADDR(ex)) { send_sig(SIGKILL, current, 0); return error; @@ -412,9 +402,7 @@ static int load_aout_library(struct file *file) "N_TXTOFF is not page aligned. Please convert library: %s\n", file->f_path.dentry->d_name.name); } - down_write(¤t->mm->mmap_sem); - do_brk(start_addr, ex.a_text + ex.a_data + ex.a_bss); - up_write(¤t->mm->mmap_sem); + vm_brk(start_addr, ex.a_text + ex.a_data + ex.a_bss); file->f_op->read(file, (char __user *)start_addr, ex.a_text + ex.a_data, &pos); @@ -425,12 +413,10 @@ static int load_aout_library(struct file *file) goto out; } /* Now use mmap to map the library into memory. */ - down_write(¤t->mm->mmap_sem); - error = do_mmap(file, start_addr, ex.a_text + ex.a_data, + error = vm_mmap(file, start_addr, ex.a_text + ex.a_data, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE, N_TXTOFF(ex)); - up_write(¤t->mm->mmap_sem); retval = error; if (error != start_addr) goto out; @@ -438,9 +424,7 @@ static int load_aout_library(struct file *file) len = PAGE_ALIGN(ex.a_text + ex.a_data); bss = ex.a_text + ex.a_data + ex.a_bss; if (bss > len) { - down_write(¤t->mm->mmap_sem); - error = do_brk(start_addr + len, bss - len); - up_write(¤t->mm->mmap_sem); + error = vm_brk(start_addr + len, bss - len); retval = error; if (error != start_addr + len) goto out; diff --git a/trunk/fs/binfmt_elf.c b/trunk/fs/binfmt_elf.c index 48ffb3dc610a..16f735417072 100644 --- a/trunk/fs/binfmt_elf.c +++ b/trunk/fs/binfmt_elf.c @@ -82,9 +82,7 @@ static int set_brk(unsigned long start, unsigned long end) end = ELF_PAGEALIGN(end); if (end > start) { unsigned long addr; - down_write(¤t->mm->mmap_sem); - addr = do_brk(start, end - start); - up_write(¤t->mm->mmap_sem); + addr = vm_brk(start, end - start); if (BAD_ADDR(addr)) return addr; } @@ -514,9 +512,7 @@ static unsigned long load_elf_interp(struct elfhdr *interp_elf_ex, elf_bss = ELF_PAGESTART(elf_bss + ELF_MIN_ALIGN - 1); /* Map the last of the bss segment */ - down_write(¤t->mm->mmap_sem); - error = do_brk(elf_bss, last_bss - elf_bss); - up_write(¤t->mm->mmap_sem); + error = vm_brk(elf_bss, last_bss - elf_bss); if (BAD_ADDR(error)) goto out_close; } @@ -962,10 +958,8 @@ static int load_elf_binary(struct linux_binprm *bprm, struct pt_regs *regs) and some applications "depend" upon this behavior. Since we do not have the power to recompile these, we emulate the SVr4 behavior. Sigh. */ - down_write(¤t->mm->mmap_sem); - error = do_mmap(NULL, 0, PAGE_SIZE, PROT_READ | PROT_EXEC, + error = vm_mmap(NULL, 0, PAGE_SIZE, PROT_READ | PROT_EXEC, MAP_FIXED | MAP_PRIVATE, 0); - up_write(¤t->mm->mmap_sem); } #ifdef ELF_PLAT_INIT @@ -1050,8 +1044,7 @@ static int load_elf_library(struct file *file) eppnt++; /* Now use mmap to map the library into memory. */ - down_write(¤t->mm->mmap_sem); - error = do_mmap(file, + error = vm_mmap(file, ELF_PAGESTART(eppnt->p_vaddr), (eppnt->p_filesz + ELF_PAGEOFFSET(eppnt->p_vaddr)), @@ -1059,7 +1052,6 @@ static int load_elf_library(struct file *file) MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE, (eppnt->p_offset - ELF_PAGEOFFSET(eppnt->p_vaddr))); - up_write(¤t->mm->mmap_sem); if (error != ELF_PAGESTART(eppnt->p_vaddr)) goto out_free_ph; @@ -1072,11 +1064,8 @@ static int load_elf_library(struct file *file) len = ELF_PAGESTART(eppnt->p_filesz + eppnt->p_vaddr + ELF_MIN_ALIGN - 1); bss = eppnt->p_memsz + eppnt->p_vaddr; - if (bss > len) { - down_write(¤t->mm->mmap_sem); - do_brk(len, bss - len); - up_write(¤t->mm->mmap_sem); - } + if (bss > len) + vm_brk(len, bss - len); error = 0; out_free_ph: diff --git a/trunk/fs/binfmt_elf_fdpic.c b/trunk/fs/binfmt_elf_fdpic.c index 9bd5612a8224..d390a0fffc65 100644 --- a/trunk/fs/binfmt_elf_fdpic.c +++ b/trunk/fs/binfmt_elf_fdpic.c @@ -390,21 +390,17 @@ static int load_elf_fdpic_binary(struct linux_binprm *bprm, (executable_stack == EXSTACK_DEFAULT && VM_STACK_FLAGS & VM_EXEC)) stack_prot |= PROT_EXEC; - down_write(¤t->mm->mmap_sem); - current->mm->start_brk = do_mmap(NULL, 0, stack_size, stack_prot, + current->mm->start_brk = vm_mmap(NULL, 0, stack_size, stack_prot, MAP_PRIVATE | MAP_ANONYMOUS | MAP_UNINITIALIZED | MAP_GROWSDOWN, 0); if (IS_ERR_VALUE(current->mm->start_brk)) { - up_write(¤t->mm->mmap_sem); retval = current->mm->start_brk; current->mm->start_brk = 0; goto error_kill; } - up_write(¤t->mm->mmap_sem); - current->mm->brk = current->mm->start_brk; current->mm->context.end_brk = current->mm->start_brk; current->mm->context.end_brk += @@ -955,10 +951,8 @@ static int elf_fdpic_map_file_constdisp_on_uclinux( if (params->flags & ELF_FDPIC_FLAG_EXECUTABLE) mflags |= MAP_EXECUTABLE; - down_write(&mm->mmap_sem); - maddr = do_mmap(NULL, load_addr, top - base, + maddr = vm_mmap(NULL, load_addr, top - base, PROT_READ | PROT_WRITE | PROT_EXEC, mflags, 0); - up_write(&mm->mmap_sem); if (IS_ERR_VALUE(maddr)) return (int) maddr; @@ -1096,10 +1090,8 @@ static int elf_fdpic_map_file_by_direct_mmap(struct elf_fdpic_params *params, /* create the mapping */ disp = phdr->p_vaddr & ~PAGE_MASK; - down_write(&mm->mmap_sem); - maddr = do_mmap(file, maddr, phdr->p_memsz + disp, prot, flags, + maddr = vm_mmap(file, maddr, phdr->p_memsz + disp, prot, flags, phdr->p_offset - disp); - up_write(&mm->mmap_sem); kdebug("mmap[%d] sz=%lx pr=%x fl=%x of=%lx --> %08lx", loop, phdr->p_memsz + disp, prot, flags, @@ -1143,10 +1135,8 @@ static int elf_fdpic_map_file_by_direct_mmap(struct elf_fdpic_params *params, unsigned long xmaddr; flags |= MAP_FIXED | MAP_ANONYMOUS; - down_write(&mm->mmap_sem); - xmaddr = do_mmap(NULL, xaddr, excess - excess1, + xmaddr = vm_mmap(NULL, xaddr, excess - excess1, prot, flags, 0); - up_write(&mm->mmap_sem); kdebug("mmap[%d] " " ad=%lx sz=%lx pr=%x fl=%x of=0 --> %08lx", diff --git a/trunk/fs/binfmt_flat.c b/trunk/fs/binfmt_flat.c index 024d20ee3ca3..6b2daf99fab8 100644 --- a/trunk/fs/binfmt_flat.c +++ b/trunk/fs/binfmt_flat.c @@ -542,10 +542,8 @@ static int load_flat_file(struct linux_binprm * bprm, */ DBG_FLT("BINFMT_FLAT: ROM mapping of file (we hope)\n"); - down_write(¤t->mm->mmap_sem); - textpos = do_mmap(bprm->file, 0, text_len, PROT_READ|PROT_EXEC, + textpos = vm_mmap(bprm->file, 0, text_len, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_EXECUTABLE, 0); - up_write(¤t->mm->mmap_sem); if (!textpos || IS_ERR_VALUE(textpos)) { if (!textpos) textpos = (unsigned long) -ENOMEM; @@ -556,10 +554,8 @@ static int load_flat_file(struct linux_binprm * bprm, len = data_len + extra + MAX_SHARED_LIBS * sizeof(unsigned long); len = PAGE_ALIGN(len); - down_write(¤t->mm->mmap_sem); - realdatastart = do_mmap(0, 0, len, + realdatastart = vm_mmap(0, 0, len, PROT_READ|PROT_WRITE|PROT_EXEC, MAP_PRIVATE, 0); - up_write(¤t->mm->mmap_sem); if (realdatastart == 0 || IS_ERR_VALUE(realdatastart)) { if (!realdatastart) @@ -603,10 +599,8 @@ static int load_flat_file(struct linux_binprm * bprm, len = text_len + data_len + extra + MAX_SHARED_LIBS * sizeof(unsigned long); len = PAGE_ALIGN(len); - down_write(¤t->mm->mmap_sem); - textpos = do_mmap(0, 0, len, + textpos = vm_mmap(0, 0, len, PROT_READ | PROT_EXEC | PROT_WRITE, MAP_PRIVATE, 0); - up_write(¤t->mm->mmap_sem); if (!textpos || IS_ERR_VALUE(textpos)) { if (!textpos) diff --git a/trunk/fs/binfmt_som.c b/trunk/fs/binfmt_som.c index e4fc746629a7..4517aaff61b4 100644 --- a/trunk/fs/binfmt_som.c +++ b/trunk/fs/binfmt_som.c @@ -147,10 +147,8 @@ static int map_som_binary(struct file *file, code_size = SOM_PAGEALIGN(hpuxhdr->exec_tsize); current->mm->start_code = code_start; current->mm->end_code = code_start + code_size; - down_write(¤t->mm->mmap_sem); - retval = do_mmap(file, code_start, code_size, prot, + retval = vm_mmap(file, code_start, code_size, prot, flags, SOM_PAGESTART(hpuxhdr->exec_tfile)); - up_write(¤t->mm->mmap_sem); if (retval < 0 && retval > -1024) goto out; @@ -158,20 +156,16 @@ static int map_som_binary(struct file *file, data_size = SOM_PAGEALIGN(hpuxhdr->exec_dsize); current->mm->start_data = data_start; current->mm->end_data = bss_start = data_start + data_size; - down_write(¤t->mm->mmap_sem); - retval = do_mmap(file, data_start, data_size, + retval = vm_mmap(file, data_start, data_size, prot | PROT_WRITE, flags, SOM_PAGESTART(hpuxhdr->exec_dfile)); - up_write(¤t->mm->mmap_sem); if (retval < 0 && retval > -1024) goto out; som_brk = bss_start + SOM_PAGEALIGN(hpuxhdr->exec_bsize); current->mm->start_brk = current->mm->brk = som_brk; - down_write(¤t->mm->mmap_sem); - retval = do_mmap(NULL, bss_start, som_brk - bss_start, + retval = vm_mmap(NULL, bss_start, som_brk - bss_start, prot | PROT_WRITE, MAP_FIXED | MAP_PRIVATE, 0); - up_write(¤t->mm->mmap_sem); if (retval > 0 || retval < -1024) retval = 0; out: diff --git a/trunk/fs/btrfs/ctree.h b/trunk/fs/btrfs/ctree.h index 5b8ef8eb3521..3f65a812e282 100644 --- a/trunk/fs/btrfs/ctree.h +++ b/trunk/fs/btrfs/ctree.h @@ -2166,7 +2166,7 @@ BTRFS_SETGET_STACK_FUNCS(root_last_snapshot, struct btrfs_root_item, static inline bool btrfs_root_readonly(struct btrfs_root *root) { - return root->root_item.flags & BTRFS_ROOT_SUBVOL_RDONLY; + return (root->root_item.flags & cpu_to_le64(BTRFS_ROOT_SUBVOL_RDONLY)) != 0; } /* struct btrfs_root_backup */ diff --git a/trunk/fs/cifs/connect.c b/trunk/fs/cifs/connect.c index d81e933a796b..f31dc9ac37b7 100644 --- a/trunk/fs/cifs/connect.c +++ b/trunk/fs/cifs/connect.c @@ -109,6 +109,8 @@ enum { /* Options which could be blank */ Opt_blank_pass, + Opt_blank_user, + Opt_blank_ip, Opt_err }; @@ -183,11 +185,15 @@ static const match_table_t cifs_mount_option_tokens = { { Opt_wsize, "wsize=%s" }, { Opt_actimeo, "actimeo=%s" }, + { Opt_blank_user, "user=" }, + { Opt_blank_user, "username=" }, { Opt_user, "user=%s" }, { Opt_user, "username=%s" }, { Opt_blank_pass, "pass=" }, { Opt_pass, "pass=%s" }, { Opt_pass, "password=%s" }, + { Opt_blank_ip, "ip=" }, + { Opt_blank_ip, "addr=" }, { Opt_ip, "ip=%s" }, { Opt_ip, "addr=%s" }, { Opt_unc, "unc=%s" }, @@ -1117,7 +1123,7 @@ static int get_option_ul(substring_t args[], unsigned long *option) string = match_strdup(args); if (string == NULL) return -ENOMEM; - rc = kstrtoul(string, 10, option); + rc = kstrtoul(string, 0, option); kfree(string); return rc; @@ -1534,15 +1540,17 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, /* String Arguments */ + case Opt_blank_user: + /* null user, ie. anonymous authentication */ + vol->nullauth = 1; + vol->username = NULL; + break; case Opt_user: string = match_strdup(args); if (string == NULL) goto out_nomem; - if (!*string) { - /* null user, ie. anonymous authentication */ - vol->nullauth = 1; - } else if (strnlen(string, MAX_USERNAME_SIZE) > + if (strnlen(string, MAX_USERNAME_SIZE) > MAX_USERNAME_SIZE) { printk(KERN_WARNING "CIFS: username too long\n"); goto cifs_parse_mount_err; @@ -1611,14 +1619,15 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, } vol->password[j] = '\0'; break; + case Opt_blank_ip: + vol->UNCip = NULL; + break; case Opt_ip: string = match_strdup(args); if (string == NULL) goto out_nomem; - if (!*string) { - vol->UNCip = NULL; - } else if (strnlen(string, INET6_ADDRSTRLEN) > + if (strnlen(string, INET6_ADDRSTRLEN) > INET6_ADDRSTRLEN) { printk(KERN_WARNING "CIFS: ip address " "too long\n"); @@ -1636,12 +1645,6 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, if (string == NULL) goto out_nomem; - if (!*string) { - printk(KERN_WARNING "CIFS: invalid path to " - "network resource\n"); - goto cifs_parse_mount_err; - } - temp_len = strnlen(string, 300); if (temp_len == 300) { printk(KERN_WARNING "CIFS: UNC name too long\n"); @@ -1670,11 +1673,7 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, if (string == NULL) goto out_nomem; - if (!*string) { - printk(KERN_WARNING "CIFS: invalid domain" - " name\n"); - goto cifs_parse_mount_err; - } else if (strnlen(string, 256) == 256) { + if (strnlen(string, 256) == 256) { printk(KERN_WARNING "CIFS: domain name too" " long\n"); goto cifs_parse_mount_err; @@ -1693,11 +1692,7 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, if (string == NULL) goto out_nomem; - if (!*string) { - printk(KERN_WARNING "CIFS: srcaddr value not" - " specified\n"); - goto cifs_parse_mount_err; - } else if (!cifs_convert_address( + if (!cifs_convert_address( (struct sockaddr *)&vol->srcaddr, string, strlen(string))) { printk(KERN_WARNING "CIFS: Could not parse" @@ -1710,11 +1705,6 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, if (string == NULL) goto out_nomem; - if (!*string) { - printk(KERN_WARNING "CIFS: Invalid path" - " prefix\n"); - goto cifs_parse_mount_err; - } temp_len = strnlen(string, 1024); if (string[0] != '/') temp_len++; /* missing leading slash */ @@ -1742,11 +1732,7 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, if (string == NULL) goto out_nomem; - if (!*string) { - printk(KERN_WARNING "CIFS: Invalid iocharset" - " specified\n"); - goto cifs_parse_mount_err; - } else if (strnlen(string, 1024) >= 65) { + if (strnlen(string, 1024) >= 65) { printk(KERN_WARNING "CIFS: iocharset name " "too long.\n"); goto cifs_parse_mount_err; @@ -1771,11 +1757,6 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, if (string == NULL) goto out_nomem; - if (!*string) { - printk(KERN_WARNING "CIFS: No socket option" - " specified\n"); - goto cifs_parse_mount_err; - } if (strnicmp(string, "TCP_NODELAY", 11) == 0) vol->sockopt_tcp_nodelay = 1; break; @@ -1784,12 +1765,6 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, if (string == NULL) goto out_nomem; - if (!*string) { - printk(KERN_WARNING "CIFS: Invalid (empty)" - " netbiosname\n"); - break; - } - memset(vol->source_rfc1001_name, 0x20, RFC1001_NAME_LEN); /* @@ -1817,11 +1792,6 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, if (string == NULL) goto out_nomem; - if (!*string) { - printk(KERN_WARNING "CIFS: Empty server" - " netbiosname specified\n"); - break; - } /* last byte, type, is 0x20 for servr type */ memset(vol->target_rfc1001_name, 0x20, RFC1001_NAME_LEN_WITH_NULL); @@ -1848,12 +1818,6 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, if (string == NULL) goto out_nomem; - if (!*string) { - cERROR(1, "no protocol version specified" - " after vers= mount option"); - goto cifs_parse_mount_err; - } - if (strnicmp(string, "cifs", 4) == 0 || strnicmp(string, "1", 1) == 0) { /* This is the default */ @@ -1868,12 +1832,6 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, if (string == NULL) goto out_nomem; - if (!*string) { - printk(KERN_WARNING "CIFS: no security flavor" - " specified\n"); - break; - } - if (cifs_parse_security_flavors(string, vol) != 0) goto cifs_parse_mount_err; break; diff --git a/trunk/fs/ext4/ext4.h b/trunk/fs/ext4/ext4.h index ab2594a30f86..0e01e90add8b 100644 --- a/trunk/fs/ext4/ext4.h +++ b/trunk/fs/ext4/ext4.h @@ -1203,9 +1203,6 @@ struct ext4_sb_info { unsigned long s_ext_blocks; unsigned long s_ext_extents; #endif - /* ext4 extent cache stats */ - unsigned long extent_cache_hits; - unsigned long extent_cache_misses; /* for buddy allocator */ struct ext4_group_info ***s_group_info; diff --git a/trunk/fs/ext4/extents.c b/trunk/fs/ext4/extents.c index 1421938e6792..abcdeab67f52 100644 --- a/trunk/fs/ext4/extents.c +++ b/trunk/fs/ext4/extents.c @@ -2066,10 +2066,6 @@ static int ext4_ext_check_cache(struct inode *inode, ext4_lblk_t block, ret = 1; } errout: - if (!ret) - sbi->extent_cache_misses++; - else - sbi->extent_cache_hits++; trace_ext4_ext_in_cache(inode, block, ret); spin_unlock(&EXT4_I(inode)->i_block_reservation_lock); return ret; @@ -2882,7 +2878,7 @@ static int ext4_split_extent_at(handle_t *handle, if (err) goto fix_extent_len; /* update the extent length and mark as initialized */ - ex->ee_len = cpu_to_le32(ee_len); + ex->ee_len = cpu_to_le16(ee_len); ext4_ext_try_to_merge(inode, path, ex); err = ext4_ext_dirty(handle, inode, path + depth); goto out; diff --git a/trunk/fs/ext4/super.c b/trunk/fs/ext4/super.c index ceebaf853beb..6da193564e43 100644 --- a/trunk/fs/ext4/super.c +++ b/trunk/fs/ext4/super.c @@ -1305,20 +1305,20 @@ static int set_qf_name(struct super_block *sb, int qtype, substring_t *args) ext4_msg(sb, KERN_ERR, "Cannot change journaled " "quota options when quota turned on"); - return 0; + return -1; } qname = match_strdup(args); if (!qname) { ext4_msg(sb, KERN_ERR, "Not enough memory for storing quotafile name"); - return 0; + return -1; } if (sbi->s_qf_names[qtype] && strcmp(sbi->s_qf_names[qtype], qname)) { ext4_msg(sb, KERN_ERR, "%s quota file already specified", QTYPE2NAME(qtype)); kfree(qname); - return 0; + return -1; } sbi->s_qf_names[qtype] = qname; if (strchr(sbi->s_qf_names[qtype], '/')) { @@ -1326,7 +1326,7 @@ static int set_qf_name(struct super_block *sb, int qtype, substring_t *args) "quotafile must be on filesystem root"); kfree(sbi->s_qf_names[qtype]); sbi->s_qf_names[qtype] = NULL; - return 0; + return -1; } set_opt(sb, QUOTA); return 1; @@ -1341,7 +1341,7 @@ static int clear_qf_name(struct super_block *sb, int qtype) sbi->s_qf_names[qtype]) { ext4_msg(sb, KERN_ERR, "Cannot change journaled quota options" " when quota turned on"); - return 0; + return -1; } /* * The space will be released later when all options are confirmed @@ -1450,6 +1450,16 @@ static int handle_mount_opt(struct super_block *sb, char *opt, int token, const struct mount_opts *m; int arg = 0; +#ifdef CONFIG_QUOTA + if (token == Opt_usrjquota) + return set_qf_name(sb, USRQUOTA, &args[0]); + else if (token == Opt_grpjquota) + return set_qf_name(sb, GRPQUOTA, &args[0]); + else if (token == Opt_offusrjquota) + return clear_qf_name(sb, USRQUOTA); + else if (token == Opt_offgrpjquota) + return clear_qf_name(sb, GRPQUOTA); +#endif if (args->from && match_int(args, &arg)) return -1; switch (token) { @@ -1549,18 +1559,6 @@ static int handle_mount_opt(struct super_block *sb, char *opt, int token, sbi->s_mount_opt |= m->mount_opt; } #ifdef CONFIG_QUOTA - } else if (token == Opt_usrjquota) { - if (!set_qf_name(sb, USRQUOTA, &args[0])) - return -1; - } else if (token == Opt_grpjquota) { - if (!set_qf_name(sb, GRPQUOTA, &args[0])) - return -1; - } else if (token == Opt_offusrjquota) { - if (!clear_qf_name(sb, USRQUOTA)) - return -1; - } else if (token == Opt_offgrpjquota) { - if (!clear_qf_name(sb, GRPQUOTA)) - return -1; } else if (m->flags & MOPT_QFMT) { if (sb_any_quota_loaded(sb) && sbi->s_jquota_fmt != m->mount_opt) { @@ -2366,18 +2364,6 @@ static ssize_t lifetime_write_kbytes_show(struct ext4_attr *a, EXT4_SB(sb)->s_sectors_written_start) >> 1))); } -static ssize_t extent_cache_hits_show(struct ext4_attr *a, - struct ext4_sb_info *sbi, char *buf) -{ - return snprintf(buf, PAGE_SIZE, "%lu\n", sbi->extent_cache_hits); -} - -static ssize_t extent_cache_misses_show(struct ext4_attr *a, - struct ext4_sb_info *sbi, char *buf) -{ - return snprintf(buf, PAGE_SIZE, "%lu\n", sbi->extent_cache_misses); -} - static ssize_t inode_readahead_blks_store(struct ext4_attr *a, struct ext4_sb_info *sbi, const char *buf, size_t count) @@ -2435,8 +2421,6 @@ static struct ext4_attr ext4_attr_##name = __ATTR(name, mode, show, store) EXT4_RO_ATTR(delayed_allocation_blocks); EXT4_RO_ATTR(session_write_kbytes); EXT4_RO_ATTR(lifetime_write_kbytes); -EXT4_RO_ATTR(extent_cache_hits); -EXT4_RO_ATTR(extent_cache_misses); EXT4_ATTR_OFFSET(inode_readahead_blks, 0644, sbi_ui_show, inode_readahead_blks_store, s_inode_readahead_blks); EXT4_RW_ATTR_SBI_UI(inode_goal, s_inode_goal); @@ -2452,8 +2436,6 @@ static struct attribute *ext4_attrs[] = { ATTR_LIST(delayed_allocation_blocks), ATTR_LIST(session_write_kbytes), ATTR_LIST(lifetime_write_kbytes), - ATTR_LIST(extent_cache_hits), - ATTR_LIST(extent_cache_misses), ATTR_LIST(inode_readahead_blks), ATTR_LIST(inode_goal), ATTR_LIST(mb_stats), diff --git a/trunk/fs/fuse/dir.c b/trunk/fs/fuse/dir.c index 206632887bb4..df5ac048dc74 100644 --- a/trunk/fs/fuse/dir.c +++ b/trunk/fs/fuse/dir.c @@ -387,9 +387,6 @@ static int fuse_create_open(struct inode *dir, struct dentry *entry, if (fc->no_create) return -ENOSYS; - if (flags & O_DIRECT) - return -EINVAL; - forget = fuse_alloc_forget(); if (!forget) return -ENOMEM; @@ -644,13 +641,12 @@ static int fuse_unlink(struct inode *dir, struct dentry *entry) fuse_put_request(fc, req); if (!err) { struct inode *inode = entry->d_inode; + struct fuse_inode *fi = get_fuse_inode(inode); - /* - * Set nlink to zero so the inode can be cleared, if the inode - * does have more links this will be discovered at the next - * lookup/getattr. - */ - clear_nlink(inode); + spin_lock(&fc->lock); + fi->attr_version = ++fc->attr_version; + drop_nlink(inode); + spin_unlock(&fc->lock); fuse_invalidate_attr(inode); fuse_invalidate_attr(dir); fuse_invalidate_entry_cache(entry); @@ -762,8 +758,17 @@ static int fuse_link(struct dentry *entry, struct inode *newdir, will reflect changes in the backing inode (link count, etc.) */ - if (!err || err == -EINTR) + if (!err) { + struct fuse_inode *fi = get_fuse_inode(inode); + + spin_lock(&fc->lock); + fi->attr_version = ++fc->attr_version; + inc_nlink(inode); + spin_unlock(&fc->lock); + fuse_invalidate_attr(inode); + } else if (err == -EINTR) { fuse_invalidate_attr(inode); + } return err; } diff --git a/trunk/fs/fuse/file.c b/trunk/fs/fuse/file.c index a841868bf9ce..504e61b7fd75 100644 --- a/trunk/fs/fuse/file.c +++ b/trunk/fs/fuse/file.c @@ -194,10 +194,6 @@ int fuse_open_common(struct inode *inode, struct file *file, bool isdir) struct fuse_conn *fc = get_fuse_conn(inode); int err; - /* VFS checks this, but only _after_ ->open() */ - if (file->f_flags & O_DIRECT) - return -EINVAL; - err = generic_file_open(inode, file); if (err) return err; @@ -932,17 +928,23 @@ static ssize_t fuse_file_aio_write(struct kiocb *iocb, const struct iovec *iov, struct file *file = iocb->ki_filp; struct address_space *mapping = file->f_mapping; size_t count = 0; + size_t ocount = 0; ssize_t written = 0; + ssize_t written_buffered = 0; struct inode *inode = mapping->host; ssize_t err; struct iov_iter i; + loff_t endbyte = 0; WARN_ON(iocb->ki_pos != pos); - err = generic_segment_checks(iov, &nr_segs, &count, VERIFY_READ); + ocount = 0; + err = generic_segment_checks(iov, &nr_segs, &ocount, VERIFY_READ); if (err) return err; + count = ocount; + mutex_lock(&inode->i_mutex); vfs_check_frozen(inode->i_sb, SB_FREEZE_WRITE); @@ -962,11 +964,41 @@ static ssize_t fuse_file_aio_write(struct kiocb *iocb, const struct iovec *iov, file_update_time(file); - iov_iter_init(&i, iov, nr_segs, count, 0); - written = fuse_perform_write(file, mapping, &i, pos); - if (written >= 0) - iocb->ki_pos = pos + written; + if (file->f_flags & O_DIRECT) { + written = generic_file_direct_write(iocb, iov, &nr_segs, + pos, &iocb->ki_pos, + count, ocount); + if (written < 0 || written == count) + goto out; + + pos += written; + count -= written; + iov_iter_init(&i, iov, nr_segs, count, written); + written_buffered = fuse_perform_write(file, mapping, &i, pos); + if (written_buffered < 0) { + err = written_buffered; + goto out; + } + endbyte = pos + written_buffered - 1; + + err = filemap_write_and_wait_range(file->f_mapping, pos, + endbyte); + if (err) + goto out; + + invalidate_mapping_pages(file->f_mapping, + pos >> PAGE_CACHE_SHIFT, + endbyte >> PAGE_CACHE_SHIFT); + + written += written_buffered; + iocb->ki_pos = pos + written_buffered; + } else { + iov_iter_init(&i, iov, nr_segs, count, 0); + written = fuse_perform_write(file, mapping, &i, pos); + if (written >= 0) + iocb->ki_pos = pos + written; + } out: current->backing_dev_info = NULL; mutex_unlock(&inode->i_mutex); @@ -1101,30 +1133,41 @@ static ssize_t fuse_direct_read(struct file *file, char __user *buf, return res; } -static ssize_t fuse_direct_write(struct file *file, const char __user *buf, - size_t count, loff_t *ppos) +static ssize_t __fuse_direct_write(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) { struct inode *inode = file->f_path.dentry->d_inode; ssize_t res; - if (is_bad_inode(inode)) - return -EIO; - - /* Don't allow parallel writes to the same file */ - mutex_lock(&inode->i_mutex); res = generic_write_checks(file, ppos, &count, 0); if (!res) { res = fuse_direct_io(file, buf, count, ppos, 1); if (res > 0) fuse_write_update_size(inode, *ppos); } - mutex_unlock(&inode->i_mutex); fuse_invalidate_attr(inode); return res; } +static ssize_t fuse_direct_write(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) +{ + struct inode *inode = file->f_path.dentry->d_inode; + ssize_t res; + + if (is_bad_inode(inode)) + return -EIO; + + /* Don't allow parallel writes to the same file */ + mutex_lock(&inode->i_mutex); + res = __fuse_direct_write(file, buf, count, ppos); + mutex_unlock(&inode->i_mutex); + + return res; +} + static void fuse_writepage_free(struct fuse_conn *fc, struct fuse_req *req) { __free_page(req->pages[0]); @@ -2077,6 +2120,57 @@ int fuse_notify_poll_wakeup(struct fuse_conn *fc, return 0; } +static ssize_t fuse_loop_dio(struct file *filp, const struct iovec *iov, + unsigned long nr_segs, loff_t *ppos, int rw) +{ + const struct iovec *vector = iov; + ssize_t ret = 0; + + while (nr_segs > 0) { + void __user *base; + size_t len; + ssize_t nr; + + base = vector->iov_base; + len = vector->iov_len; + vector++; + nr_segs--; + + if (rw == WRITE) + nr = __fuse_direct_write(filp, base, len, ppos); + else + nr = fuse_direct_read(filp, base, len, ppos); + + if (nr < 0) { + if (!ret) + ret = nr; + break; + } + ret += nr; + if (nr != len) + break; + } + + return ret; +} + + +static ssize_t +fuse_direct_IO(int rw, struct kiocb *iocb, const struct iovec *iov, + loff_t offset, unsigned long nr_segs) +{ + ssize_t ret = 0; + struct file *file = NULL; + loff_t pos = 0; + + file = iocb->ki_filp; + pos = offset; + + ret = fuse_loop_dio(file, iov, nr_segs, &pos, rw); + + return ret; +} + static const struct file_operations fuse_file_operations = { .llseek = fuse_file_llseek, .read = do_sync_read, @@ -2120,6 +2214,7 @@ static const struct address_space_operations fuse_file_aops = { .readpages = fuse_readpages, .set_page_dirty = __set_page_dirty_nobuffers, .bmap = fuse_bmap, + .direct_IO = fuse_direct_IO, }; void fuse_init_file_inode(struct inode *inode) diff --git a/trunk/fs/fuse/inode.c b/trunk/fs/fuse/inode.c index 4aec5995867e..26783eb2b1fc 100644 --- a/trunk/fs/fuse/inode.c +++ b/trunk/fs/fuse/inode.c @@ -947,6 +947,7 @@ static int fuse_fill_super(struct super_block *sb, void *data, int silent) sb->s_magic = FUSE_SUPER_MAGIC; sb->s_op = &fuse_super_operations; sb->s_maxbytes = MAX_LFS_FILESIZE; + sb->s_time_gran = 1; sb->s_export_op = &fuse_export_operations; file = fget(d.fd); diff --git a/trunk/fs/lockd/clnt4xdr.c b/trunk/fs/lockd/clnt4xdr.c index 3ddcbb1c0a43..13ad1539fbf2 100644 --- a/trunk/fs/lockd/clnt4xdr.c +++ b/trunk/fs/lockd/clnt4xdr.c @@ -241,7 +241,7 @@ static int decode_nlm4_stat(struct xdr_stream *xdr, __be32 *stat) p = xdr_inline_decode(xdr, 4); if (unlikely(p == NULL)) goto out_overflow; - if (unlikely(*p > nlm4_failed)) + if (unlikely(ntohl(*p) > ntohl(nlm4_failed))) goto out_bad_xdr; *stat = *p; return 0; diff --git a/trunk/fs/lockd/clntxdr.c b/trunk/fs/lockd/clntxdr.c index 3d35e3e80c1c..d269ada7670e 100644 --- a/trunk/fs/lockd/clntxdr.c +++ b/trunk/fs/lockd/clntxdr.c @@ -236,7 +236,7 @@ static int decode_nlm_stat(struct xdr_stream *xdr, p = xdr_inline_decode(xdr, 4); if (unlikely(p == NULL)) goto out_overflow; - if (unlikely(*p > nlm_lck_denied_grace_period)) + if (unlikely(ntohl(*p) > ntohl(nlm_lck_denied_grace_period))) goto out_enum; *stat = *p; return 0; diff --git a/trunk/fs/nfsd/nfs3xdr.c b/trunk/fs/nfsd/nfs3xdr.c index 08c6e36ab2eb..43f46cd9edea 100644 --- a/trunk/fs/nfsd/nfs3xdr.c +++ b/trunk/fs/nfsd/nfs3xdr.c @@ -803,13 +803,13 @@ encode_entry_baggage(struct nfsd3_readdirres *cd, __be32 *p, const char *name, return p; } -static int +static __be32 compose_entry_fh(struct nfsd3_readdirres *cd, struct svc_fh *fhp, const char *name, int namlen) { struct svc_export *exp; struct dentry *dparent, *dchild; - int rv = 0; + __be32 rv = nfserr_noent; dparent = cd->fh.fh_dentry; exp = cd->fh.fh_export; @@ -817,26 +817,20 @@ compose_entry_fh(struct nfsd3_readdirres *cd, struct svc_fh *fhp, if (isdotent(name, namlen)) { if (namlen == 2) { dchild = dget_parent(dparent); - if (dchild == dparent) { - /* filesystem root - cannot return filehandle for ".." */ - dput(dchild); - return -ENOENT; - } + /* filesystem root - cannot return filehandle for ".." */ + if (dchild == dparent) + goto out; } else dchild = dget(dparent); } else dchild = lookup_one_len(name, dparent, namlen); if (IS_ERR(dchild)) - return -ENOENT; - rv = -ENOENT; + return rv; if (d_mountpoint(dchild)) goto out; - rv = fh_compose(fhp, exp, dchild, &cd->fh); - if (rv) - goto out; if (!dchild->d_inode) goto out; - rv = 0; + rv = fh_compose(fhp, exp, dchild, &cd->fh); out: dput(dchild); return rv; @@ -845,7 +839,7 @@ compose_entry_fh(struct nfsd3_readdirres *cd, struct svc_fh *fhp, static __be32 *encode_entryplus_baggage(struct nfsd3_readdirres *cd, __be32 *p, const char *name, int namlen) { struct svc_fh fh; - int err; + __be32 err; fh_init(&fh, NFS3_FHSIZE); err = compose_entry_fh(cd, &fh, name, namlen); diff --git a/trunk/fs/nfsd/nfs4proc.c b/trunk/fs/nfsd/nfs4proc.c index 2ed14dfd00a2..987e719fbae8 100644 --- a/trunk/fs/nfsd/nfs4proc.c +++ b/trunk/fs/nfsd/nfs4proc.c @@ -235,15 +235,15 @@ do_open_lookup(struct svc_rqst *rqstp, struct svc_fh *current_fh, struct nfsd4_o */ if (open->op_createmode == NFS4_CREATE_EXCLUSIVE && status == 0) open->op_bmval[1] = (FATTR4_WORD1_TIME_ACCESS | - FATTR4_WORD1_TIME_MODIFY); + FATTR4_WORD1_TIME_MODIFY); } else { status = nfsd_lookup(rqstp, current_fh, open->op_fname.data, open->op_fname.len, resfh); fh_unlock(current_fh); - if (status) - goto out; - status = nfsd_check_obj_isreg(resfh); } + if (status) + goto out; + status = nfsd_check_obj_isreg(resfh); if (status) goto out; @@ -841,6 +841,7 @@ nfsd4_setattr(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate, struct nfsd4_setattr *setattr) { __be32 status = nfs_ok; + int err; if (setattr->sa_iattr.ia_valid & ATTR_SIZE) { nfs4_lock_state(); @@ -852,9 +853,9 @@ nfsd4_setattr(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate, return status; } } - status = fh_want_write(&cstate->current_fh); - if (status) - return status; + err = fh_want_write(&cstate->current_fh); + if (err) + return nfserrno(err); status = nfs_ok; status = check_attr_support(rqstp, cstate, setattr->sa_bmval, diff --git a/trunk/fs/nfsd/nfs4state.c b/trunk/fs/nfsd/nfs4state.c index 1841f8bf845e..7f71c69cdcdf 100644 --- a/trunk/fs/nfsd/nfs4state.c +++ b/trunk/fs/nfsd/nfs4state.c @@ -4211,16 +4211,14 @@ nfsd4_lock(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate, * vfs_test_lock. (Arguably perhaps test_lock should be done with an * inode operation.) */ -static int nfsd_test_lock(struct svc_rqst *rqstp, struct svc_fh *fhp, struct file_lock *lock) +static __be32 nfsd_test_lock(struct svc_rqst *rqstp, struct svc_fh *fhp, struct file_lock *lock) { struct file *file; - int err; - - err = nfsd_open(rqstp, fhp, S_IFREG, NFSD_MAY_READ, &file); - if (err) - return err; - err = vfs_test_lock(file, lock); - nfsd_close(file); + __be32 err = nfsd_open(rqstp, fhp, S_IFREG, NFSD_MAY_READ, &file); + if (!err) { + err = nfserrno(vfs_test_lock(file, lock)); + nfsd_close(file); + } return err; } @@ -4234,7 +4232,6 @@ nfsd4_lockt(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate, struct inode *inode; struct file_lock file_lock; struct nfs4_lockowner *lo; - int error; __be32 status; if (locks_in_grace()) @@ -4280,12 +4277,10 @@ nfsd4_lockt(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate, nfs4_transform_lock_offset(&file_lock); - status = nfs_ok; - error = nfsd_test_lock(rqstp, &cstate->current_fh, &file_lock); - if (error) { - status = nfserrno(error); + status = nfsd_test_lock(rqstp, &cstate->current_fh, &file_lock); + if (status) goto out; - } + if (file_lock.fl_type != F_UNLCK) { status = nfserr_denied; nfs4_set_lock_denied(&file_lock, &lockt->lt_denied); diff --git a/trunk/fs/nfsd/nfs4xdr.c b/trunk/fs/nfsd/nfs4xdr.c index bcd8904ab1e3..74c00bc92b9a 100644 --- a/trunk/fs/nfsd/nfs4xdr.c +++ b/trunk/fs/nfsd/nfs4xdr.c @@ -1392,7 +1392,7 @@ nfsd4_decode_test_stateid(struct nfsd4_compoundargs *argp, struct nfsd4_test_sta for (i = 0; i < test_stateid->ts_num_ids; i++) { stateid = kmalloc(sizeof(struct nfsd4_test_stateid_id), GFP_KERNEL); if (!stateid) { - status = PTR_ERR(stateid); + status = nfserrno(-ENOMEM); goto out; } @@ -3410,7 +3410,7 @@ nfsd4_encode_test_stateid(struct nfsd4_compoundres *resp, int nfserr, *p++ = htonl(test_stateid->ts_num_ids); list_for_each_entry_safe(stateid, next, &test_stateid->ts_stateid_list, ts_id_list) { - *p++ = htonl(stateid->ts_id_status); + *p++ = stateid->ts_id_status; } ADJUST_ARGS(); diff --git a/trunk/fs/nfsd/vfs.c b/trunk/fs/nfsd/vfs.c index 296d671654d6..568666156ea4 100644 --- a/trunk/fs/nfsd/vfs.c +++ b/trunk/fs/nfsd/vfs.c @@ -1458,7 +1458,7 @@ do_nfsd_create(struct svc_rqst *rqstp, struct svc_fh *fhp, switch (createmode) { case NFS3_CREATE_UNCHECKED: if (! S_ISREG(dchild->d_inode->i_mode)) - err = nfserr_exist; + goto out; else if (truncp) { /* in nfsv4, we need to treat this case a little * differently. we don't want to truncate the diff --git a/trunk/fs/ocfs2/alloc.c b/trunk/fs/ocfs2/alloc.c index 3165aebb43c8..31b9463fba1f 100644 --- a/trunk/fs/ocfs2/alloc.c +++ b/trunk/fs/ocfs2/alloc.c @@ -1134,7 +1134,7 @@ static int ocfs2_adjust_rightmost_branch(handle_t *handle, } el = path_leaf_el(path); - rec = &el->l_recs[le32_to_cpu(el->l_next_free_rec) - 1]; + rec = &el->l_recs[le16_to_cpu(el->l_next_free_rec) - 1]; ocfs2_adjust_rightmost_records(handle, et, path, rec); diff --git a/trunk/fs/ocfs2/refcounttree.c b/trunk/fs/ocfs2/refcounttree.c index cf7823382664..9f32d7cbb7a3 100644 --- a/trunk/fs/ocfs2/refcounttree.c +++ b/trunk/fs/ocfs2/refcounttree.c @@ -1036,14 +1036,14 @@ static int ocfs2_get_refcount_cpos_end(struct ocfs2_caching_info *ci, tmp_el = left_path->p_node[subtree_root].el; blkno = left_path->p_node[subtree_root+1].bh->b_blocknr; - for (i = 0; i < le32_to_cpu(tmp_el->l_next_free_rec); i++) { + for (i = 0; i < le16_to_cpu(tmp_el->l_next_free_rec); i++) { if (le64_to_cpu(tmp_el->l_recs[i].e_blkno) == blkno) { *cpos_end = le32_to_cpu(tmp_el->l_recs[i+1].e_cpos); break; } } - BUG_ON(i == le32_to_cpu(tmp_el->l_next_free_rec)); + BUG_ON(i == le16_to_cpu(tmp_el->l_next_free_rec)); out: ocfs2_free_path(left_path); @@ -1468,7 +1468,7 @@ static int ocfs2_divide_leaf_refcount_block(struct buffer_head *ref_leaf_bh, trace_ocfs2_divide_leaf_refcount_block( (unsigned long long)ref_leaf_bh->b_blocknr, - le32_to_cpu(rl->rl_count), le32_to_cpu(rl->rl_used)); + le16_to_cpu(rl->rl_count), le16_to_cpu(rl->rl_used)); /* * XXX: Improvement later. @@ -2411,7 +2411,7 @@ static int ocfs2_calc_refcount_meta_credits(struct super_block *sb, rb = (struct ocfs2_refcount_block *) prev_bh->b_data; - if (le64_to_cpu(rb->rf_records.rl_used) + + if (le16_to_cpu(rb->rf_records.rl_used) + recs_add > le16_to_cpu(rb->rf_records.rl_count)) ref_blocks++; @@ -2476,7 +2476,7 @@ static int ocfs2_calc_refcount_meta_credits(struct super_block *sb, if (prev_bh) { rb = (struct ocfs2_refcount_block *)prev_bh->b_data; - if (le64_to_cpu(rb->rf_records.rl_used) + recs_add > + if (le16_to_cpu(rb->rf_records.rl_used) + recs_add > le16_to_cpu(rb->rf_records.rl_count)) ref_blocks++; @@ -3629,7 +3629,7 @@ int ocfs2_refcounted_xattr_delete_need(struct inode *inode, * one will split a refcount rec, so totally we need * clusters * 2 new refcount rec. */ - if (le64_to_cpu(rb->rf_records.rl_used) + clusters * 2 > + if (le16_to_cpu(rb->rf_records.rl_used) + clusters * 2 > le16_to_cpu(rb->rf_records.rl_count)) ref_blocks++; diff --git a/trunk/fs/ocfs2/suballoc.c b/trunk/fs/ocfs2/suballoc.c index ba5d97e4a73e..f169da4624fd 100644 --- a/trunk/fs/ocfs2/suballoc.c +++ b/trunk/fs/ocfs2/suballoc.c @@ -600,7 +600,7 @@ static void ocfs2_bg_alloc_cleanup(handle_t *handle, ret = ocfs2_free_clusters(handle, cluster_ac->ac_inode, cluster_ac->ac_bh, le64_to_cpu(rec->e_blkno), - le32_to_cpu(rec->e_leaf_clusters)); + le16_to_cpu(rec->e_leaf_clusters)); if (ret) mlog_errno(ret); /* Try all the clusters to free */ @@ -1628,7 +1628,7 @@ static int ocfs2_bg_discontig_fix_by_rec(struct ocfs2_suballoc_result *res, { unsigned int bpc = le16_to_cpu(cl->cl_bpc); unsigned int bitoff = le32_to_cpu(rec->e_cpos) * bpc; - unsigned int bitcount = le32_to_cpu(rec->e_leaf_clusters) * bpc; + unsigned int bitcount = le16_to_cpu(rec->e_leaf_clusters) * bpc; if (res->sr_bit_offset < bitoff) return 0; diff --git a/trunk/include/linux/fuse.h b/trunk/include/linux/fuse.h index 8ba2c9460b28..8f2ab8fef929 100644 --- a/trunk/include/linux/fuse.h +++ b/trunk/include/linux/fuse.h @@ -593,7 +593,7 @@ struct fuse_dirent { __u64 off; __u32 namelen; __u32 type; - char name[0]; + char name[]; }; #define FUSE_NAME_OFFSET offsetof(struct fuse_dirent, name) diff --git a/trunk/include/linux/i2c/twl.h b/trunk/include/linux/i2c/twl.h index 2463b6100333..1f90de0cfdbe 100644 --- a/trunk/include/linux/i2c/twl.h +++ b/trunk/include/linux/i2c/twl.h @@ -666,23 +666,11 @@ struct twl4030_codec_data { unsigned int check_defaults:1; unsigned int reset_registers:1; unsigned int hs_extmute:1; - u16 hs_left_step; - u16 hs_right_step; - u16 hf_left_step; - u16 hf_right_step; void (*set_hs_extmute)(int mute); }; struct twl4030_vibra_data { unsigned int coexist; - - /* twl6040 */ - unsigned int vibldrv_res; /* left driver resistance */ - unsigned int vibrdrv_res; /* right driver resistance */ - unsigned int viblmotor_res; /* left motor resistance */ - unsigned int vibrmotor_res; /* right motor resistance */ - int vddvibl_uV; /* VDDVIBL volt, set 0 for fixed reg */ - int vddvibr_uV; /* VDDVIBR volt, set 0 for fixed reg */ }; struct twl4030_audio_data { diff --git a/trunk/include/linux/kvm_host.h b/trunk/include/linux/kvm_host.h index 665a260c7e09..72cbf08d45fb 100644 --- a/trunk/include/linux/kvm_host.h +++ b/trunk/include/linux/kvm_host.h @@ -596,6 +596,7 @@ void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id); #ifdef CONFIG_IOMMU_API int kvm_iommu_map_pages(struct kvm *kvm, struct kvm_memory_slot *slot); +void kvm_iommu_unmap_pages(struct kvm *kvm, struct kvm_memory_slot *slot); int kvm_iommu_map_guest(struct kvm *kvm); int kvm_iommu_unmap_guest(struct kvm *kvm); int kvm_assign_device(struct kvm *kvm, @@ -609,6 +610,11 @@ static inline int kvm_iommu_map_pages(struct kvm *kvm, return 0; } +static inline void kvm_iommu_unmap_pages(struct kvm *kvm, + struct kvm_memory_slot *slot) +{ +} + static inline int kvm_iommu_map_guest(struct kvm *kvm) { return -ENODEV; diff --git a/trunk/include/linux/mfd/db5500-prcmu.h b/trunk/include/linux/mfd/db5500-prcmu.h index 9890687f582d..5a049dfaf153 100644 --- a/trunk/include/linux/mfd/db5500-prcmu.h +++ b/trunk/include/linux/mfd/db5500-prcmu.h @@ -8,41 +8,14 @@ #ifndef __MFD_DB5500_PRCMU_H #define __MFD_DB5500_PRCMU_H -#ifdef CONFIG_MFD_DB5500_PRCMU - -void db5500_prcmu_early_init(void); -int db5500_prcmu_set_epod(u16 epod_id, u8 epod_state); -int db5500_prcmu_set_display_clocks(void); -int db5500_prcmu_disable_dsipll(void); -int db5500_prcmu_enable_dsipll(void); -int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); -int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size); -void db5500_prcmu_enable_wakeups(u32 wakeups); -int db5500_prcmu_request_clock(u8 clock, bool enable); -void db5500_prcmu_config_abb_event_readout(u32 abb_events); -void db5500_prcmu_get_abb_event_buffer(void __iomem **buf); -int prcmu_resetout(u8 resoutn, u8 state); -int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, - bool keep_ap_pll); -int db5500_prcmu_config_esram0_deep_sleep(u8 state); -void db5500_prcmu_system_reset(u16 reset_code); -u16 db5500_prcmu_get_reset_code(void); -bool db5500_prcmu_is_ac_wake_requested(void); -int db5500_prcmu_set_arm_opp(u8 opp); -int db5500_prcmu_get_arm_opp(void); - -#else /* !CONFIG_UX500_SOC_DB5500 */ - -static inline void db5500_prcmu_early_init(void) {} - -static inline int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size) +static inline int prcmu_resetout(u8 resoutn, u8 state) { - return -ENOSYS; + return 0; } -static inline int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size) +static inline int db5500_prcmu_set_epod(u16 epod_id, u8 epod_state) { - return -ENOSYS; + return 0; } static inline int db5500_prcmu_request_clock(u8 clock, bool enable) @@ -50,69 +23,82 @@ static inline int db5500_prcmu_request_clock(u8 clock, bool enable) return 0; } -static inline int db5500_prcmu_set_display_clocks(void) +static inline int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, + bool keep_ap_pll) { return 0; } -static inline int db5500_prcmu_disable_dsipll(void) +static inline int db5500_prcmu_config_esram0_deep_sleep(u8 state) { return 0; } -static inline int db5500_prcmu_enable_dsipll(void) +static inline u16 db5500_prcmu_get_reset_code(void) { return 0; } -static inline int db5500_prcmu_config_esram0_deep_sleep(u8 state) +static inline bool db5500_prcmu_is_ac_wake_requested(void) { return 0; } -static inline void db5500_prcmu_enable_wakeups(u32 wakeups) {} - -static inline int prcmu_resetout(u8 resoutn, u8 state) +static inline int db5500_prcmu_set_arm_opp(u8 opp) { return 0; } -static inline int db5500_prcmu_set_epod(u16 epod_id, u8 epod_state) +static inline int db5500_prcmu_get_arm_opp(void) { return 0; } -static inline void db5500_prcmu_get_abb_event_buffer(void __iomem **buf) {} static inline void db5500_prcmu_config_abb_event_readout(u32 abb_events) {} -static inline int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, - bool keep_ap_pll) -{ - return 0; -} +static inline void db5500_prcmu_get_abb_event_buffer(void __iomem **buf) {} static inline void db5500_prcmu_system_reset(u16 reset_code) {} -static inline u16 db5500_prcmu_get_reset_code(void) +static inline void db5500_prcmu_enable_wakeups(u32 wakeups) {} + +#ifdef CONFIG_MFD_DB5500_PRCMU + +void db5500_prcmu_early_init(void); +int db5500_prcmu_set_display_clocks(void); +int db5500_prcmu_disable_dsipll(void); +int db5500_prcmu_enable_dsipll(void); +int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); +int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size); + +#else /* !CONFIG_UX500_SOC_DB5500 */ + +static inline void db5500_prcmu_early_init(void) {} + +static inline int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size) { - return 0; + return -ENOSYS; } -static inline bool db5500_prcmu_is_ac_wake_requested(void) +static inline int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size) { - return 0; + return -ENOSYS; } -static inline int db5500_prcmu_set_arm_opp(u8 opp) +static inline int db5500_prcmu_set_display_clocks(void) { return 0; } -static inline int db5500_prcmu_get_arm_opp(void) +static inline int db5500_prcmu_disable_dsipll(void) { return 0; } +static inline int db5500_prcmu_enable_dsipll(void) +{ + return 0; +} #endif /* CONFIG_MFD_DB5500_PRCMU */ diff --git a/trunk/include/linux/mfd/rc5t583.h b/trunk/include/linux/mfd/rc5t583.h index a2c61609d21d..0b64b19d81ab 100644 --- a/trunk/include/linux/mfd/rc5t583.h +++ b/trunk/include/linux/mfd/rc5t583.h @@ -26,6 +26,7 @@ #include #include +#include #define RC5T583_MAX_REGS 0xF8 @@ -279,14 +280,44 @@ struct rc5t583_platform_data { bool enable_shutdown; }; -int rc5t583_write(struct device *dev, u8 reg, uint8_t val); -int rc5t583_read(struct device *dev, uint8_t reg, uint8_t *val); -int rc5t583_set_bits(struct device *dev, unsigned int reg, - unsigned int bit_mask); -int rc5t583_clear_bits(struct device *dev, unsigned int reg, - unsigned int bit_mask); -int rc5t583_update(struct device *dev, unsigned int reg, - unsigned int val, unsigned int mask); +static inline int rc5t583_write(struct device *dev, uint8_t reg, uint8_t val) +{ + struct rc5t583 *rc5t583 = dev_get_drvdata(dev); + return regmap_write(rc5t583->regmap, reg, val); +} + +static inline int rc5t583_read(struct device *dev, uint8_t reg, uint8_t *val) +{ + struct rc5t583 *rc5t583 = dev_get_drvdata(dev); + unsigned int ival; + int ret; + ret = regmap_read(rc5t583->regmap, reg, &ival); + if (!ret) + *val = (uint8_t)ival; + return ret; +} + +static inline int rc5t583_set_bits(struct device *dev, unsigned int reg, + unsigned int bit_mask) +{ + struct rc5t583 *rc5t583 = dev_get_drvdata(dev); + return regmap_update_bits(rc5t583->regmap, reg, bit_mask, bit_mask); +} + +static inline int rc5t583_clear_bits(struct device *dev, unsigned int reg, + unsigned int bit_mask) +{ + struct rc5t583 *rc5t583 = dev_get_drvdata(dev); + return regmap_update_bits(rc5t583->regmap, reg, bit_mask, 0); +} + +static inline int rc5t583_update(struct device *dev, unsigned int reg, + unsigned int val, unsigned int mask) +{ + struct rc5t583 *rc5t583 = dev_get_drvdata(dev); + return regmap_update_bits(rc5t583->regmap, reg, mask, val); +} + int rc5t583_ext_power_req_config(struct device *dev, int deepsleep_id, int ext_pwr_req, int deepsleep_slot_nr); int rc5t583_irq_init(struct rc5t583 *rc5t583, int irq, int irq_base); diff --git a/trunk/include/linux/mfd/twl6040.h b/trunk/include/linux/mfd/twl6040.h index 9bc9ac651dad..b15b5f03f5c4 100644 --- a/trunk/include/linux/mfd/twl6040.h +++ b/trunk/include/linux/mfd/twl6040.h @@ -174,8 +174,35 @@ #define TWL6040_SYSCLK_SEL_LPPLL 0 #define TWL6040_SYSCLK_SEL_HPPLL 1 +struct twl6040_codec_data { + u16 hs_left_step; + u16 hs_right_step; + u16 hf_left_step; + u16 hf_right_step; +}; + +struct twl6040_vibra_data { + unsigned int vibldrv_res; /* left driver resistance */ + unsigned int vibrdrv_res; /* right driver resistance */ + unsigned int viblmotor_res; /* left motor resistance */ + unsigned int vibrmotor_res; /* right motor resistance */ + int vddvibl_uV; /* VDDVIBL volt, set 0 for fixed reg */ + int vddvibr_uV; /* VDDVIBR volt, set 0 for fixed reg */ +}; + +struct twl6040_platform_data { + int audpwron_gpio; /* audio power-on gpio */ + unsigned int irq_base; + + struct twl6040_codec_data *codec; + struct twl6040_vibra_data *vibra; +}; + +struct regmap; + struct twl6040 { struct device *dev; + struct regmap *regmap; struct mutex mutex; struct mutex io_mutex; struct mutex irq_mutex; diff --git a/trunk/include/linux/mm.h b/trunk/include/linux/mm.h index d8738a464b94..74aa71bea1e4 100644 --- a/trunk/include/linux/mm.h +++ b/trunk/include/linux/mm.h @@ -1393,29 +1393,20 @@ extern int install_special_mapping(struct mm_struct *mm, extern unsigned long get_unmapped_area(struct file *, unsigned long, unsigned long, unsigned long, unsigned long); -extern unsigned long do_mmap_pgoff(struct file *file, unsigned long addr, - unsigned long len, unsigned long prot, - unsigned long flag, unsigned long pgoff); extern unsigned long mmap_region(struct file *file, unsigned long addr, unsigned long len, unsigned long flags, vm_flags_t vm_flags, unsigned long pgoff); - -static inline unsigned long do_mmap(struct file *file, unsigned long addr, - unsigned long len, unsigned long prot, - unsigned long flag, unsigned long offset) -{ - unsigned long ret = -EINVAL; - if ((offset + PAGE_ALIGN(len)) < offset) - goto out; - if (!(offset & ~PAGE_MASK)) - ret = do_mmap_pgoff(file, addr, len, prot, flag, offset >> PAGE_SHIFT); -out: - return ret; -} - +extern unsigned long do_mmap(struct file *, unsigned long, + unsigned long, unsigned long, + unsigned long, unsigned long); extern int do_munmap(struct mm_struct *, unsigned long, size_t); -extern unsigned long do_brk(unsigned long, unsigned long); +/* These take the mm semaphore themselves */ +extern unsigned long vm_brk(unsigned long, unsigned long); +extern int vm_munmap(unsigned long, size_t); +extern unsigned long vm_mmap(struct file *, unsigned long, + unsigned long, unsigned long, + unsigned long, unsigned long); /* truncate.c */ extern void truncate_inode_pages(struct address_space *, loff_t); diff --git a/trunk/include/linux/mmc/card.h b/trunk/include/linux/mmc/card.h index 01beae78f079..629b823f8836 100644 --- a/trunk/include/linux/mmc/card.h +++ b/trunk/include/linux/mmc/card.h @@ -481,7 +481,7 @@ struct mmc_driver { struct device_driver drv; int (*probe)(struct mmc_card *); void (*remove)(struct mmc_card *); - int (*suspend)(struct mmc_card *, pm_message_t); + int (*suspend)(struct mmc_card *); int (*resume)(struct mmc_card *); }; diff --git a/trunk/include/linux/nfsd/Kbuild b/trunk/include/linux/nfsd/Kbuild index b8d4001212b3..5b7d84ac954a 100644 --- a/trunk/include/linux/nfsd/Kbuild +++ b/trunk/include/linux/nfsd/Kbuild @@ -1,3 +1,4 @@ +header-y += cld.h header-y += debug.h header-y += export.h header-y += nfsfh.h diff --git a/trunk/include/linux/pinctrl/machine.h b/trunk/include/linux/pinctrl/machine.h index fee4349364f7..e4d1de742502 100644 --- a/trunk/include/linux/pinctrl/machine.h +++ b/trunk/include/linux/pinctrl/machine.h @@ -12,6 +12,8 @@ #ifndef __LINUX_PINCTRL_MACHINE_H #define __LINUX_PINCTRL_MACHINE_H +#include + #include "pinctrl-state.h" enum pinctrl_map_type { @@ -148,7 +150,7 @@ struct pinctrl_map { #define PIN_MAP_CONFIGS_GROUP_HOG_DEFAULT(dev, grp, cfgs) \ PIN_MAP_CONFIGS_GROUP(dev, PINCTRL_STATE_DEFAULT, dev, grp, cfgs) -#ifdef CONFIG_PINMUX +#ifdef CONFIG_PINCTRL extern int pinctrl_register_mappings(struct pinctrl_map const *map, unsigned num_maps); diff --git a/trunk/include/linux/usb/otg.h b/trunk/include/linux/usb/otg.h index f67810f8f21b..38ab3f46346f 100644 --- a/trunk/include/linux/usb/otg.h +++ b/trunk/include/linux/usb/otg.h @@ -94,6 +94,7 @@ struct usb_phy { struct usb_otg *otg; + struct device *io_dev; struct usb_phy_io_ops *io_ops; void __iomem *io_priv; diff --git a/trunk/lib/mpi/mpi-bit.c b/trunk/lib/mpi/mpi-bit.c index 2f526627e4f5..0c505361da19 100644 --- a/trunk/lib/mpi/mpi-bit.c +++ b/trunk/lib/mpi/mpi-bit.c @@ -177,8 +177,8 @@ int mpi_rshift(MPI x, MPI a, unsigned n) */ int mpi_lshift_limbs(MPI a, unsigned int count) { - mpi_ptr_t ap = a->d; - int n = a->nlimbs; + const int n = a->nlimbs; + mpi_ptr_t ap; int i; if (!count || !n) @@ -187,6 +187,7 @@ int mpi_lshift_limbs(MPI a, unsigned int count) if (RESIZE_IF_NEEDED(a, n + count) < 0) return -ENOMEM; + ap = a->d; for (i = n - 1; i >= 0; i--) ap[i + count] = ap[i]; for (i = 0; i < count; i++) diff --git a/trunk/mm/memblock.c b/trunk/mm/memblock.c index 99f285599501..a44eab3157f8 100644 --- a/trunk/mm/memblock.c +++ b/trunk/mm/memblock.c @@ -330,6 +330,9 @@ static int __init_memblock memblock_add_region(struct memblock_type *type, phys_addr_t end = base + memblock_cap_size(base, &size); int i, nr_new; + if (!size) + return 0; + /* special case for empty array */ if (type->regions[0].size == 0) { WARN_ON(type->cnt != 1 || type->total_size); @@ -430,6 +433,9 @@ static int __init_memblock memblock_isolate_range(struct memblock_type *type, *start_rgn = *end_rgn = 0; + if (!size) + return 0; + /* we'll create at most two more regions */ while (type->cnt + 2 > type->max) if (memblock_double_array(type) < 0) @@ -514,7 +520,6 @@ int __init_memblock memblock_reserve(phys_addr_t base, phys_addr_t size) (unsigned long long)base, (unsigned long long)base + size, (void *)_RET_IP_); - BUG_ON(0 == size); return memblock_add_region(_rgn, base, size, MAX_NUMNODES); } diff --git a/trunk/mm/memcontrol.c b/trunk/mm/memcontrol.c index a7165a60d0a7..b868def9bcc1 100644 --- a/trunk/mm/memcontrol.c +++ b/trunk/mm/memcontrol.c @@ -3392,6 +3392,7 @@ void mem_cgroup_replace_page_cache(struct page *oldpage, * the newpage may be on LRU(or pagevec for LRU) already. We lock * LRU while we overwrite pc->mem_cgroup. */ + pc = lookup_page_cgroup(newpage); __mem_cgroup_commit_charge(memcg, newpage, 1, pc, type, true); } diff --git a/trunk/mm/mmap.c b/trunk/mm/mmap.c index a7bf6a31c9f6..848ef52d9603 100644 --- a/trunk/mm/mmap.c +++ b/trunk/mm/mmap.c @@ -240,6 +240,8 @@ static struct vm_area_struct *remove_vma(struct vm_area_struct *vma) return next; } +static unsigned long do_brk(unsigned long addr, unsigned long len); + SYSCALL_DEFINE1(brk, unsigned long, brk) { unsigned long rlim, retval; @@ -951,7 +953,7 @@ static inline unsigned long round_hint_to_min(unsigned long hint) * The caller must hold down_write(¤t->mm->mmap_sem). */ -unsigned long do_mmap_pgoff(struct file *file, unsigned long addr, +static unsigned long do_mmap_pgoff(struct file *file, unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long pgoff) { @@ -1087,7 +1089,32 @@ unsigned long do_mmap_pgoff(struct file *file, unsigned long addr, return mmap_region(file, addr, len, flags, vm_flags, pgoff); } -EXPORT_SYMBOL(do_mmap_pgoff); + +unsigned long do_mmap(struct file *file, unsigned long addr, + unsigned long len, unsigned long prot, + unsigned long flag, unsigned long offset) +{ + if (unlikely(offset + PAGE_ALIGN(len) < offset)) + return -EINVAL; + if (unlikely(offset & ~PAGE_MASK)) + return -EINVAL; + return do_mmap_pgoff(file, addr, len, prot, flag, offset >> PAGE_SHIFT); +} +EXPORT_SYMBOL(do_mmap); + +unsigned long vm_mmap(struct file *file, unsigned long addr, + unsigned long len, unsigned long prot, + unsigned long flag, unsigned long offset) +{ + unsigned long ret; + struct mm_struct *mm = current->mm; + + down_write(&mm->mmap_sem); + ret = do_mmap(file, addr, len, prot, flag, offset); + up_write(&mm->mmap_sem); + return ret; +} +EXPORT_SYMBOL(vm_mmap); SYSCALL_DEFINE6(mmap_pgoff, unsigned long, addr, unsigned long, len, unsigned long, prot, unsigned long, flags, @@ -2105,21 +2132,25 @@ int do_munmap(struct mm_struct *mm, unsigned long start, size_t len) return 0; } - EXPORT_SYMBOL(do_munmap); -SYSCALL_DEFINE2(munmap, unsigned long, addr, size_t, len) +int vm_munmap(unsigned long start, size_t len) { int ret; struct mm_struct *mm = current->mm; - profile_munmap(addr); - down_write(&mm->mmap_sem); - ret = do_munmap(mm, addr, len); + ret = do_munmap(mm, start, len); up_write(&mm->mmap_sem); return ret; } +EXPORT_SYMBOL(vm_munmap); + +SYSCALL_DEFINE2(munmap, unsigned long, addr, size_t, len) +{ + profile_munmap(addr); + return vm_munmap(addr, len); +} static inline void verify_mm_writelocked(struct mm_struct *mm) { @@ -2136,7 +2167,7 @@ static inline void verify_mm_writelocked(struct mm_struct *mm) * anonymous maps. eventually we may be able to do some * brk-specific accounting here. */ -unsigned long do_brk(unsigned long addr, unsigned long len) +static unsigned long do_brk(unsigned long addr, unsigned long len) { struct mm_struct * mm = current->mm; struct vm_area_struct * vma, * prev; @@ -2232,7 +2263,17 @@ unsigned long do_brk(unsigned long addr, unsigned long len) return addr; } -EXPORT_SYMBOL(do_brk); +unsigned long vm_brk(unsigned long addr, unsigned long len) +{ + struct mm_struct *mm = current->mm; + unsigned long ret; + + down_write(&mm->mmap_sem); + ret = do_brk(addr, len); + up_write(&mm->mmap_sem); + return ret; +} +EXPORT_SYMBOL(vm_brk); /* Release all mmaps. */ void exit_mmap(struct mm_struct *mm) diff --git a/trunk/mm/nommu.c b/trunk/mm/nommu.c index f59e170fceb4..bb8f4f004a82 100644 --- a/trunk/mm/nommu.c +++ b/trunk/mm/nommu.c @@ -1233,7 +1233,7 @@ static int do_mmap_private(struct vm_area_struct *vma, /* * handle mapping creation for uClinux */ -unsigned long do_mmap_pgoff(struct file *file, +static unsigned long do_mmap_pgoff(struct file *file, unsigned long addr, unsigned long len, unsigned long prot, @@ -1470,7 +1470,32 @@ unsigned long do_mmap_pgoff(struct file *file, show_free_areas(0); return -ENOMEM; } -EXPORT_SYMBOL(do_mmap_pgoff); + +unsigned long do_mmap(struct file *file, unsigned long addr, + unsigned long len, unsigned long prot, + unsigned long flag, unsigned long offset) +{ + if (unlikely(offset + PAGE_ALIGN(len) < offset)) + return -EINVAL; + if (unlikely(offset & ~PAGE_MASK)) + return -EINVAL; + return do_mmap_pgoff(file, addr, len, prot, flag, offset >> PAGE_SHIFT); +} +EXPORT_SYMBOL(do_mmap); + +unsigned long vm_mmap(struct file *file, unsigned long addr, + unsigned long len, unsigned long prot, + unsigned long flag, unsigned long offset) +{ + unsigned long ret; + struct mm_struct *mm = current->mm; + + down_write(&mm->mmap_sem); + ret = do_mmap(file, addr, len, prot, flag, offset); + up_write(&mm->mmap_sem); + return ret; +} +EXPORT_SYMBOL(vm_mmap); SYSCALL_DEFINE6(mmap_pgoff, unsigned long, addr, unsigned long, len, unsigned long, prot, unsigned long, flags, @@ -1709,16 +1734,22 @@ int do_munmap(struct mm_struct *mm, unsigned long start, size_t len) } EXPORT_SYMBOL(do_munmap); -SYSCALL_DEFINE2(munmap, unsigned long, addr, size_t, len) +int vm_munmap(unsigned long addr, size_t len) { - int ret; struct mm_struct *mm = current->mm; + int ret; down_write(&mm->mmap_sem); ret = do_munmap(mm, addr, len); up_write(&mm->mmap_sem); return ret; } +EXPORT_SYMBOL(vm_munmap); + +SYSCALL_DEFINE2(munmap, unsigned long, addr, size_t, len) +{ + return vm_munmap(addr, len); +} /* * release all the mappings made in a process's VM space @@ -1744,7 +1775,7 @@ void exit_mmap(struct mm_struct *mm) kleave(""); } -unsigned long do_brk(unsigned long addr, unsigned long len) +unsigned long vm_brk(unsigned long addr, unsigned long len) { return -ENOMEM; } diff --git a/trunk/scripts/checkpatch.pl b/trunk/scripts/checkpatch.pl index de639eeeed50..faea0ec612bf 100755 --- a/trunk/scripts/checkpatch.pl +++ b/trunk/scripts/checkpatch.pl @@ -1869,12 +1869,6 @@ sub process { "No space is necessary after a cast\n" . $hereprev); } - if ($rawline =~ /^\+[ \t]*\/\*[ \t]*$/ && - $prevrawline =~ /^\+[ \t]*$/) { - CHK("BLOCK_COMMENT_STYLE", - "Don't begin block comments with only a /* line, use /* comment...\n" . $hereprev); - } - # check for spaces at the beginning of a line. # Exceptions: # 1) within comments diff --git a/trunk/scripts/xz_wrap.sh b/trunk/scripts/xz_wrap.sh index 17a5798c29da..7a2d372f4885 100644 --- a/trunk/scripts/xz_wrap.sh +++ b/trunk/scripts/xz_wrap.sh @@ -12,8 +12,8 @@ BCJ= LZMA2OPTS= -case $ARCH in - x86|x86_64) BCJ=--x86 ;; +case $SRCARCH in + x86) BCJ=--x86 ;; powerpc) BCJ=--powerpc ;; ia64) BCJ=--ia64; LZMA2OPTS=pb=4 ;; arm) BCJ=--arm ;; diff --git a/trunk/security/commoncap.c b/trunk/security/commoncap.c index 0cf4b53480a7..71a166a05975 100644 --- a/trunk/security/commoncap.c +++ b/trunk/security/commoncap.c @@ -29,6 +29,7 @@ #include #include #include +#include /* * If a non-root user executes a setuid-root binary in @@ -505,6 +506,11 @@ int cap_bprm_set_creds(struct linux_binprm *bprm) } skip: + /* if we have fs caps, clear dangerous personality flags */ + if (!cap_issubset(new->cap_permitted, old->cap_permitted)) + bprm->per_clear |= PER_CLEAR_ON_SETID; + + /* Don't let someone trace a set[ug]id/setpcap binary with the revised * credentials unless they have the appropriate permit */ diff --git a/trunk/security/smack/smack_lsm.c b/trunk/security/smack/smack_lsm.c index 10056f2f6df3..45c32f074166 100644 --- a/trunk/security/smack/smack_lsm.c +++ b/trunk/security/smack/smack_lsm.c @@ -3640,8 +3640,38 @@ struct security_operations smack_ops = { }; -static __init void init_smack_know_list(void) +static __init void init_smack_known_list(void) { + /* + * Initialize CIPSO locks + */ + spin_lock_init(&smack_known_huh.smk_cipsolock); + spin_lock_init(&smack_known_hat.smk_cipsolock); + spin_lock_init(&smack_known_star.smk_cipsolock); + spin_lock_init(&smack_known_floor.smk_cipsolock); + spin_lock_init(&smack_known_invalid.smk_cipsolock); + spin_lock_init(&smack_known_web.smk_cipsolock); + /* + * Initialize rule list locks + */ + mutex_init(&smack_known_huh.smk_rules_lock); + mutex_init(&smack_known_hat.smk_rules_lock); + mutex_init(&smack_known_floor.smk_rules_lock); + mutex_init(&smack_known_star.smk_rules_lock); + mutex_init(&smack_known_invalid.smk_rules_lock); + mutex_init(&smack_known_web.smk_rules_lock); + /* + * Initialize rule lists + */ + INIT_LIST_HEAD(&smack_known_huh.smk_rules); + INIT_LIST_HEAD(&smack_known_hat.smk_rules); + INIT_LIST_HEAD(&smack_known_star.smk_rules); + INIT_LIST_HEAD(&smack_known_floor.smk_rules); + INIT_LIST_HEAD(&smack_known_invalid.smk_rules); + INIT_LIST_HEAD(&smack_known_web.smk_rules); + /* + * Create the known labels list + */ list_add(&smack_known_huh.list, &smack_known_list); list_add(&smack_known_hat.list, &smack_known_list); list_add(&smack_known_star.list, &smack_known_list); @@ -3676,16 +3706,8 @@ static __init int smack_init(void) cred = (struct cred *) current->cred; cred->security = tsp; - /* initialize the smack_know_list */ - init_smack_know_list(); - /* - * Initialize locks - */ - spin_lock_init(&smack_known_huh.smk_cipsolock); - spin_lock_init(&smack_known_hat.smk_cipsolock); - spin_lock_init(&smack_known_star.smk_cipsolock); - spin_lock_init(&smack_known_floor.smk_cipsolock); - spin_lock_init(&smack_known_invalid.smk_cipsolock); + /* initialize the smack_known_list */ + init_smack_known_list(); /* * Register with LSM diff --git a/trunk/security/smack/smackfs.c b/trunk/security/smack/smackfs.c index 5c32f36ff706..038811cb7e62 100644 --- a/trunk/security/smack/smackfs.c +++ b/trunk/security/smack/smackfs.c @@ -1614,20 +1614,6 @@ static int __init init_smk_fs(void) smk_cipso_doi(); smk_unlbl_ambient(NULL); - mutex_init(&smack_known_floor.smk_rules_lock); - mutex_init(&smack_known_hat.smk_rules_lock); - mutex_init(&smack_known_huh.smk_rules_lock); - mutex_init(&smack_known_invalid.smk_rules_lock); - mutex_init(&smack_known_star.smk_rules_lock); - mutex_init(&smack_known_web.smk_rules_lock); - - INIT_LIST_HEAD(&smack_known_floor.smk_rules); - INIT_LIST_HEAD(&smack_known_hat.smk_rules); - INIT_LIST_HEAD(&smack_known_huh.smk_rules); - INIT_LIST_HEAD(&smack_known_invalid.smk_rules); - INIT_LIST_HEAD(&smack_known_star.smk_rules); - INIT_LIST_HEAD(&smack_known_web.smk_rules); - return err; } diff --git a/trunk/sound/core/vmaster.c b/trunk/sound/core/vmaster.c index 14a286a7bf2b..857586135d18 100644 --- a/trunk/sound/core/vmaster.c +++ b/trunk/sound/core/vmaster.c @@ -419,6 +419,7 @@ EXPORT_SYMBOL(snd_ctl_make_virtual_master); * snd_ctl_add_vmaster_hook - Add a hook to a vmaster control * @kcontrol: vmaster kctl element * @hook: the hook function + * @private_data: the private_data pointer to be saved * * Adds the given hook to the vmaster control element so that it's called * at each time when the value is changed. diff --git a/trunk/sound/last.c b/trunk/sound/last.c index bdd0857b8871..7ffc182e0844 100644 --- a/trunk/sound/last.c +++ b/trunk/sound/last.c @@ -38,4 +38,4 @@ static int __init alsa_sound_last_init(void) return 0; } -__initcall(alsa_sound_last_init); +late_initcall_sync(alsa_sound_last_init); diff --git a/trunk/sound/pci/hda/patch_conexant.c b/trunk/sound/pci/hda/patch_conexant.c index a36488d94aaa..d906c5b74cf0 100644 --- a/trunk/sound/pci/hda/patch_conexant.c +++ b/trunk/sound/pci/hda/patch_conexant.c @@ -3971,9 +3971,14 @@ static void cx_auto_init_output(struct hda_codec *codec) int i; mute_outputs(codec, spec->multiout.num_dacs, spec->multiout.dac_nids); - for (i = 0; i < cfg->hp_outs; i++) + for (i = 0; i < cfg->hp_outs; i++) { + unsigned int val = PIN_OUT; + if (snd_hda_query_pin_caps(codec, cfg->hp_pins[i]) & + AC_PINCAP_HP_DRV) + val |= AC_PINCTL_HP_EN; snd_hda_codec_write(codec, cfg->hp_pins[i], 0, - AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP); + AC_VERB_SET_PIN_WIDGET_CONTROL, val); + } mute_outputs(codec, cfg->hp_outs, cfg->hp_pins); mute_outputs(codec, cfg->line_outs, cfg->line_out_pins); mute_outputs(codec, cfg->speaker_outs, cfg->speaker_pins); @@ -4391,8 +4396,10 @@ static void apply_pin_fixup(struct hda_codec *codec, enum { CXT_PINCFG_LENOVO_X200, + CXT_PINCFG_LENOVO_TP410, }; +/* ThinkPad X200 & co with cxt5051 */ static const struct cxt_pincfg cxt_pincfg_lenovo_x200[] = { { 0x16, 0x042140ff }, /* HP (seq# overridden) */ { 0x17, 0x21a11000 }, /* dock-mic */ @@ -4401,15 +4408,33 @@ static const struct cxt_pincfg cxt_pincfg_lenovo_x200[] = { {} }; +/* ThinkPad 410/420/510/520, X201 & co with cxt5066 */ +static const struct cxt_pincfg cxt_pincfg_lenovo_tp410[] = { + { 0x19, 0x042110ff }, /* HP (seq# overridden) */ + { 0x1a, 0x21a190f0 }, /* dock-mic */ + { 0x1c, 0x212140ff }, /* dock-HP */ + {} +}; + static const struct cxt_pincfg *cxt_pincfg_tbl[] = { [CXT_PINCFG_LENOVO_X200] = cxt_pincfg_lenovo_x200, + [CXT_PINCFG_LENOVO_TP410] = cxt_pincfg_lenovo_tp410, }; -static const struct snd_pci_quirk cxt_fixups[] = { +static const struct snd_pci_quirk cxt5051_fixups[] = { SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo X200", CXT_PINCFG_LENOVO_X200), {} }; +static const struct snd_pci_quirk cxt5066_fixups[] = { + SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo T400", CXT_PINCFG_LENOVO_TP410), + SND_PCI_QUIRK(0x17aa, 0x215e, "Lenovo T410", CXT_PINCFG_LENOVO_TP410), + SND_PCI_QUIRK(0x17aa, 0x215f, "Lenovo T510", CXT_PINCFG_LENOVO_TP410), + SND_PCI_QUIRK(0x17aa, 0x21ce, "Lenovo T420", CXT_PINCFG_LENOVO_TP410), + SND_PCI_QUIRK(0x17aa, 0x21cf, "Lenovo T520", CXT_PINCFG_LENOVO_TP410), + {} +}; + /* add "fake" mute amp-caps to DACs on cx5051 so that mixer mute switches * can be created (bko#42825) */ @@ -4446,13 +4471,13 @@ static int patch_conexant_auto(struct hda_codec *codec) case 0x14f15051: add_cx5051_fake_mutes(codec); codec->pin_amp_workaround = 1; + apply_pin_fixup(codec, cxt5051_fixups, cxt_pincfg_tbl); break; default: codec->pin_amp_workaround = 1; + apply_pin_fixup(codec, cxt5066_fixups, cxt_pincfg_tbl); } - apply_pin_fixup(codec, cxt_fixups, cxt_pincfg_tbl); - /* Show mute-led control only on HP laptops * This is a sort of white-list: on HP laptops, EAPD corresponds * only to the mute-LED without actualy amp function. Meanwhile, diff --git a/trunk/sound/pci/hda/patch_realtek.c b/trunk/sound/pci/hda/patch_realtek.c index 2508f8109f11..e65e35433055 100644 --- a/trunk/sound/pci/hda/patch_realtek.c +++ b/trunk/sound/pci/hda/patch_realtek.c @@ -1445,6 +1445,13 @@ enum { ALC_FIXUP_ACT_BUILD, }; +static void alc_apply_pincfgs(struct hda_codec *codec, + const struct alc_pincfg *cfg) +{ + for (; cfg->nid; cfg++) + snd_hda_codec_set_pincfg(codec, cfg->nid, cfg->val); +} + static void alc_apply_fixup(struct hda_codec *codec, int action) { struct alc_spec *spec = codec->spec; @@ -1478,9 +1485,7 @@ static void alc_apply_fixup(struct hda_codec *codec, int action) snd_printdd(KERN_INFO "hda_codec: %s: " "Apply pincfg for %s\n", codec->chip_name, modelname); - for (; cfg->nid; cfg++) - snd_hda_codec_set_pincfg(codec, cfg->nid, - cfg->val); + alc_apply_pincfgs(codec, cfg); break; case ALC_FIXUP_VERBS: if (action != ALC_FIXUP_ACT_PROBE || !fix->v.verbs) @@ -4861,6 +4866,7 @@ enum { ALC260_FIXUP_GPIO1_TOGGLE, ALC260_FIXUP_REPLACER, ALC260_FIXUP_HP_B1900, + ALC260_FIXUP_KN1, }; static void alc260_gpio1_automute(struct hda_codec *codec) @@ -4888,6 +4894,36 @@ static void alc260_fixup_gpio1_toggle(struct hda_codec *codec, } } +static void alc260_fixup_kn1(struct hda_codec *codec, + const struct alc_fixup *fix, int action) +{ + struct alc_spec *spec = codec->spec; + static const struct alc_pincfg pincfgs[] = { + { 0x0f, 0x02214000 }, /* HP/speaker */ + { 0x12, 0x90a60160 }, /* int mic */ + { 0x13, 0x02a19000 }, /* ext mic */ + { 0x18, 0x01446000 }, /* SPDIF out */ + /* disable bogus I/O pins */ + { 0x10, 0x411111f0 }, + { 0x11, 0x411111f0 }, + { 0x14, 0x411111f0 }, + { 0x15, 0x411111f0 }, + { 0x16, 0x411111f0 }, + { 0x17, 0x411111f0 }, + { 0x19, 0x411111f0 }, + { } + }; + + switch (action) { + case ALC_FIXUP_ACT_PRE_PROBE: + alc_apply_pincfgs(codec, pincfgs); + break; + case ALC_FIXUP_ACT_PROBE: + spec->init_amp = ALC_INIT_NONE; + break; + } +} + static const struct alc_fixup alc260_fixups[] = { [ALC260_FIXUP_HP_DC5750] = { .type = ALC_FIXUP_PINS, @@ -4938,7 +4974,11 @@ static const struct alc_fixup alc260_fixups[] = { .v.func = alc260_fixup_gpio1_toggle, .chained = true, .chain_id = ALC260_FIXUP_COEF, - } + }, + [ALC260_FIXUP_KN1] = { + .type = ALC_FIXUP_FUNC, + .v.func = alc260_fixup_kn1, + }, }; static const struct snd_pci_quirk alc260_fixup_tbl[] = { @@ -4948,6 +4988,7 @@ static const struct snd_pci_quirk alc260_fixup_tbl[] = { SND_PCI_QUIRK(0x103c, 0x280a, "HP dc5750", ALC260_FIXUP_HP_DC5750), SND_PCI_QUIRK(0x103c, 0x30ba, "HP Presario B1900", ALC260_FIXUP_HP_B1900), SND_PCI_QUIRK(0x1509, 0x4540, "Favorit 100XS", ALC260_FIXUP_GPIO1), + SND_PCI_QUIRK(0x152d, 0x0729, "Quanta KN1", ALC260_FIXUP_KN1), SND_PCI_QUIRK(0x161f, 0x2057, "Replacer 672V", ALC260_FIXUP_REPLACER), SND_PCI_QUIRK(0x1631, 0xc017, "PB V7900", ALC260_FIXUP_COEF), {} diff --git a/trunk/sound/pci/hda/patch_sigmatel.c b/trunk/sound/pci/hda/patch_sigmatel.c index 33a9946b492c..4742cac26aa9 100644 --- a/trunk/sound/pci/hda/patch_sigmatel.c +++ b/trunk/sound/pci/hda/patch_sigmatel.c @@ -5063,12 +5063,11 @@ static void stac92xx_update_led_status(struct hda_codec *codec, int enabled) if (spec->gpio_led_polarity) muted = !muted; - /*polarity defines *not* muted state level*/ if (!spec->vref_mute_led_nid) { if (muted) - spec->gpio_data &= ~spec->gpio_led; /* orange */ + spec->gpio_data |= spec->gpio_led; else - spec->gpio_data |= spec->gpio_led; /* white */ + spec->gpio_data &= ~spec->gpio_led; stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); } else { diff --git a/trunk/sound/soc/codecs/Kconfig b/trunk/sound/soc/codecs/Kconfig index 6508e8b790bb..59d8efaa17e9 100644 --- a/trunk/sound/soc/codecs/Kconfig +++ b/trunk/sound/soc/codecs/Kconfig @@ -57,7 +57,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_TPA6130A2 if I2C select SND_SOC_TLV320DAC33 if I2C select SND_SOC_TWL4030 if TWL4030_CORE - select SND_SOC_TWL6040 if TWL4030_CORE + select SND_SOC_TWL6040 if TWL6040_CORE select SND_SOC_UDA134X select SND_SOC_UDA1380 if I2C select SND_SOC_WL1273 if MFD_WL1273_CORE @@ -276,7 +276,6 @@ config SND_SOC_TWL4030 tristate config SND_SOC_TWL6040 - select TWL6040_CORE tristate config SND_SOC_UDA134X diff --git a/trunk/sound/soc/codecs/twl6040.c b/trunk/sound/soc/codecs/twl6040.c index 2d8c6b825e57..dc7509b9d53a 100644 --- a/trunk/sound/soc/codecs/twl6040.c +++ b/trunk/sound/soc/codecs/twl6040.c @@ -26,7 +26,6 @@ #include #include #include -#include #include #include @@ -1528,7 +1527,7 @@ static int twl6040_resume(struct snd_soc_codec *codec) static int twl6040_probe(struct snd_soc_codec *codec) { struct twl6040_data *priv; - struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev); + struct twl6040_codec_data *pdata = dev_get_platdata(codec->dev); struct platform_device *pdev = container_of(codec->dev, struct platform_device, dev); int ret = 0; diff --git a/trunk/sound/soc/omap/Kconfig b/trunk/sound/soc/omap/Kconfig index e00dd0b1139c..deafbfaacdbf 100644 --- a/trunk/sound/soc/omap/Kconfig +++ b/trunk/sound/soc/omap/Kconfig @@ -97,7 +97,7 @@ config SND_OMAP_SOC_SDP3430 config SND_OMAP_SOC_OMAP_ABE_TWL6040 tristate "SoC Audio support for OMAP boards using ABE and twl6040 codec" - depends on TWL4030_CORE && SND_OMAP_SOC && ARCH_OMAP4 + depends on TWL6040_CORE && SND_OMAP_SOC && ARCH_OMAP4 select SND_OMAP_SOC_DMIC select SND_OMAP_SOC_MCPDM select SND_SOC_TWL6040 diff --git a/trunk/tools/perf/.gitignore b/trunk/tools/perf/.gitignore index 416684be0ad3..26b823b61aa1 100644 --- a/trunk/tools/perf/.gitignore +++ b/trunk/tools/perf/.gitignore @@ -19,3 +19,5 @@ TAGS cscope* config.mak config.mak.autogen +*-bison.* +*-flex.* diff --git a/trunk/tools/perf/Makefile b/trunk/tools/perf/Makefile index 820371f10d1b..03059e75665a 100644 --- a/trunk/tools/perf/Makefile +++ b/trunk/tools/perf/Makefile @@ -237,21 +237,20 @@ export PERL_PATH FLEX = $(CROSS_COMPILE)flex BISON= $(CROSS_COMPILE)bison -event-parser: - $(QUIET_BISON)$(BISON) -v util/parse-events.y -d -o $(OUTPUT)util/parse-events-bison.c +$(OUTPUT)util/parse-events-flex.c: util/parse-events.l $(QUIET_FLEX)$(FLEX) --header-file=$(OUTPUT)util/parse-events-flex.h -t util/parse-events.l > $(OUTPUT)util/parse-events-flex.c -$(OUTPUT)util/parse-events-flex.c: event-parser -$(OUTPUT)util/parse-events-bison.c: event-parser +$(OUTPUT)util/parse-events-bison.c: util/parse-events.y + $(QUIET_BISON)$(BISON) -v util/parse-events.y -d -o $(OUTPUT)util/parse-events-bison.c -pmu-parser: - $(QUIET_BISON)$(BISON) -v util/pmu.y -d -o $(OUTPUT)util/pmu-bison.c +$(OUTPUT)util/pmu-flex.c: util/pmu.l $(QUIET_FLEX)$(FLEX) --header-file=$(OUTPUT)util/pmu-flex.h -t util/pmu.l > $(OUTPUT)util/pmu-flex.c -$(OUTPUT)util/pmu-flex.c: pmu-parser -$(OUTPUT)util/pmu-bison.c: pmu-parser +$(OUTPUT)util/pmu-bison.c: util/pmu.y + $(QUIET_BISON)$(BISON) -v util/pmu.y -d -o $(OUTPUT)util/pmu-bison.c -$(OUTPUT)util/parse-events.o: event-parser pmu-parser +$(OUTPUT)util/parse-events.o: $(OUTPUT)util/parse-events-flex.c $(OUTPUT)util/parse-events-bison.c +$(OUTPUT)util/pmu.o: $(OUTPUT)util/pmu-flex.c $(OUTPUT)util/pmu-bison.c LIB_FILE=$(OUTPUT)libperf.a @@ -527,7 +526,7 @@ else endif ifdef NO_GTK2 - BASIC_CFLAGS += -DNO_GTK2 + BASIC_CFLAGS += -DNO_GTK2_SUPPORT else FLAGS_GTK2=$(ALL_CFLAGS) $(ALL_LDFLAGS) $(EXTLIBS) $(shell pkg-config --libs --cflags gtk+-2.0) ifneq ($(call try-cc,$(SOURCE_GTK2),$(FLAGS_GTK2)),y) @@ -852,8 +851,6 @@ help: @echo ' html - make html documentation' @echo ' info - make GNU info documentation (access with info )' @echo ' pdf - make pdf documentation' - @echo ' event-parser - make event parser code' - @echo ' pmu-parser - make pmu format parser code' @echo ' TAGS - use etags to make tag information for source browsing' @echo ' tags - use ctags to make tag information for source browsing' @echo ' cscope - use cscope to make interactive browsing database' diff --git a/trunk/tools/perf/perf-archive.sh b/trunk/tools/perf/perf-archive.sh index 677e59d62a8d..95b6f8b6177a 100644 --- a/trunk/tools/perf/perf-archive.sh +++ b/trunk/tools/perf/perf-archive.sh @@ -29,13 +29,14 @@ if [ ! -s $BUILDIDS ] ; then fi MANIFEST=$(mktemp /tmp/perf-archive-manifest.XXXXXX) +PERF_BUILDID_LINKDIR=$(readlink -f $PERF_BUILDID_DIR)/ cut -d ' ' -f 1 $BUILDIDS | \ while read build_id ; do linkname=$PERF_BUILDID_DIR.build-id/${build_id:0:2}/${build_id:2} filename=$(readlink -f $linkname) echo ${linkname#$PERF_BUILDID_DIR} >> $MANIFEST - echo ${filename#$PERF_BUILDID_DIR} >> $MANIFEST + echo ${filename#$PERF_BUILDID_LINKDIR} >> $MANIFEST done tar cfj $PERF_DATA.tar.bz2 -C $PERF_BUILDID_DIR -T $MANIFEST diff --git a/trunk/tools/perf/util/session.c b/trunk/tools/perf/util/session.c index 00923cda4d9c..1efd3bee6336 100644 --- a/trunk/tools/perf/util/session.c +++ b/trunk/tools/perf/util/session.c @@ -876,11 +876,11 @@ static int perf_session_deliver_event(struct perf_session *session, dump_sample(session, event, sample); if (evsel == NULL) { ++session->hists.stats.nr_unknown_id; - return -1; + return 0; } if (machine == NULL) { ++session->hists.stats.nr_unprocessable_samples; - return -1; + return 0; } return tool->sample(tool, event, sample, evsel, machine); case PERF_RECORD_MMAP: diff --git a/trunk/virt/kvm/iommu.c b/trunk/virt/kvm/iommu.c index a457d2138f49..e9fff9830bf0 100644 --- a/trunk/virt/kvm/iommu.c +++ b/trunk/virt/kvm/iommu.c @@ -240,9 +240,13 @@ int kvm_iommu_map_guest(struct kvm *kvm) return -ENODEV; } + mutex_lock(&kvm->slots_lock); + kvm->arch.iommu_domain = iommu_domain_alloc(&pci_bus_type); - if (!kvm->arch.iommu_domain) - return -ENOMEM; + if (!kvm->arch.iommu_domain) { + r = -ENOMEM; + goto out_unlock; + } if (!allow_unsafe_assigned_interrupts && !iommu_domain_has_cap(kvm->arch.iommu_domain, @@ -253,17 +257,16 @@ int kvm_iommu_map_guest(struct kvm *kvm) " module option.\n", __func__); iommu_domain_free(kvm->arch.iommu_domain); kvm->arch.iommu_domain = NULL; - return -EPERM; + r = -EPERM; + goto out_unlock; } r = kvm_iommu_map_memslots(kvm); if (r) - goto out_unmap; - - return 0; + kvm_iommu_unmap_memslots(kvm); -out_unmap: - kvm_iommu_unmap_memslots(kvm); +out_unlock: + mutex_unlock(&kvm->slots_lock); return r; } @@ -310,6 +313,11 @@ static void kvm_iommu_put_pages(struct kvm *kvm, } } +void kvm_iommu_unmap_pages(struct kvm *kvm, struct kvm_memory_slot *slot) +{ + kvm_iommu_put_pages(kvm, slot->base_gfn, slot->npages); +} + static int kvm_iommu_unmap_memslots(struct kvm *kvm) { int idx; @@ -320,7 +328,7 @@ static int kvm_iommu_unmap_memslots(struct kvm *kvm) slots = kvm_memslots(kvm); kvm_for_each_memslot(memslot, slots) - kvm_iommu_put_pages(kvm, memslot->base_gfn, memslot->npages); + kvm_iommu_unmap_pages(kvm, memslot); srcu_read_unlock(&kvm->srcu, idx); @@ -335,7 +343,11 @@ int kvm_iommu_unmap_guest(struct kvm *kvm) if (!domain) return 0; + mutex_lock(&kvm->slots_lock); kvm_iommu_unmap_memslots(kvm); + kvm->arch.iommu_domain = NULL; + mutex_unlock(&kvm->slots_lock); + iommu_domain_free(domain); return 0; } diff --git a/trunk/virt/kvm/kvm_main.c b/trunk/virt/kvm/kvm_main.c index 42b73930a6de..9739b533ca2e 100644 --- a/trunk/virt/kvm/kvm_main.c +++ b/trunk/virt/kvm/kvm_main.c @@ -808,12 +808,13 @@ int __kvm_set_memory_region(struct kvm *kvm, if (r) goto out_free; - /* map the pages in iommu page table */ + /* map/unmap the pages in iommu page table */ if (npages) { r = kvm_iommu_map_pages(kvm, &new); if (r) goto out_free; - } + } else + kvm_iommu_unmap_pages(kvm, &old); r = -ENOMEM; slots = kmemdup(kvm->memslots, sizeof(struct kvm_memslots),