From 96d97a794e6a0e0e1801a885bf50a4caa7698e4e Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Wed, 2 Apr 2008 00:45:00 +1100
Subject: [PATCH] --- yaml --- r: 91499 b: refs/heads/master c:
 5f91925c89c39e77c170de9366ffa5144a8dd8ec h: refs/heads/master i:   91497:
 ec190ac24a2bb29ed1981245da11943714c01c17   91495:
 df390c002132a979fb1cc0b817e7ab20df72012f v: v3

---
 [refs]                                 |  2 +-
 trunk/arch/powerpc/sysdev/ppc4xx_pci.c | 10 ++++------
 2 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/[refs] b/[refs]
index 6e1786d6e878..4d9f39db4bc7 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: b64c4c937daaa04a0a5c188718fb77e8041b5686
+refs/heads/master: 5f91925c89c39e77c170de9366ffa5144a8dd8ec
diff --git a/trunk/arch/powerpc/sysdev/ppc4xx_pci.c b/trunk/arch/powerpc/sysdev/ppc4xx_pci.c
index aa856ea9fed8..1814adbd2236 100644
--- a/trunk/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/trunk/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -785,19 +785,17 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
 	u32 val;
 	u32 utlset1;
 
-	if (port->endpoint) {
+	if (port->endpoint)
 		val = PTYPE_LEGACY_ENDPOINT << 20;
-		utlset1 = 0x20222222;
-	} else {
+	else
 		val = PTYPE_ROOT_PORT << 20;
-		utlset1 = 0x21222222;
-	}
 
 	if (port->index == 0) {
 		val |= LNKW_X1 << 12;
+		utlset1 = 0x20000000;
 	} else {
 		val |= LNKW_X4 << 12;
-		utlset1 |= 0x00101101;
+		utlset1 = 0x20101101;
 	}
 
 	mtdcri(SDR0, port->sdr_base + PESDRn_DLPSET, val);