From 96ec873d2d056f071b14f438aa3e398c9af59712 Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Mon, 20 Jun 2011 21:26:06 +0200 Subject: [PATCH] --- yaml --- r: 284719 b: refs/heads/master c: 54eed4c77ca1d02228f07bee74a1afe081393ab0 h: refs/heads/master i: 284717: ab7652ea88ff5ff7b07d779cc438e802904be07b 284715: fb93599daa6b2187abe124f036e0a54ac1d4f72f 284711: 523c092f3d72d44477bba9cbda22d4cc14850f1c 284703: 8de8cca73b643ad13851e7956ea8740f0cdeee8b v: v3 --- [refs] | 2 +- trunk/arch/mips/ath79/irq.c | 5 ++++- trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 5 +++++ 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index f57fdca6587d..4e3d05ce052f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7ee15d8a2837841d75f56319b94510ed950094b5 +refs/heads/master: 54eed4c77ca1d02228f07bee74a1afe081393ab0 diff --git a/trunk/arch/mips/ath79/irq.c b/trunk/arch/mips/ath79/irq.c index 0d98114cbf4d..1b073de44680 100644 --- a/trunk/arch/mips/ath79/irq.c +++ b/trunk/arch/mips/ath79/irq.c @@ -129,7 +129,7 @@ static void __init ath79_misc_irq_init(void) if (soc_is_ar71xx() || soc_is_ar913x()) ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask; - else if (soc_is_ar724x()) + else if (soc_is_ar724x() || soc_is_ar933x()) ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; else BUG(); @@ -186,6 +186,9 @@ void __init arch_init_irq(void) } else if (soc_is_ar913x()) { ath79_ip2_flush_reg = AR913X_DDR_REG_FLUSH_WMAC; ath79_ip3_flush_reg = AR913X_DDR_REG_FLUSH_USB; + } else if (soc_is_ar933x()) { + ath79_ip2_flush_reg = AR933X_DDR_REG_FLUSH_WMAC; + ath79_ip3_flush_reg = AR933X_DDR_REG_FLUSH_USB; } else BUG(); diff --git a/trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index c7159e3479c2..9c76185801d0 100644 --- a/trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/trunk/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -82,6 +82,11 @@ #define AR913X_DDR_REG_FLUSH_USB 0x84 #define AR913X_DDR_REG_FLUSH_WMAC 0x88 +#define AR933X_DDR_REG_FLUSH_GE0 0x7c +#define AR933X_DDR_REG_FLUSH_GE1 0x80 +#define AR933X_DDR_REG_FLUSH_USB 0x84 +#define AR933X_DDR_REG_FLUSH_WMAC 0x88 + /* * PLL block */