diff --git a/[refs] b/[refs] index d3fa0ef3ad22..1b8d6848c2e6 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8ac49e0485bb79223a111b366a3b1f5ec9148729 +refs/heads/master: 404525d5a7ecc847b5ac178dad96402f1e102ccc diff --git a/trunk/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt b/trunk/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt deleted file mode 100644 index fb7b5cd2652f..000000000000 --- a/trunk/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt +++ /dev/null @@ -1,9 +0,0 @@ -Broadcom BCM11351 device tree bindings -------------------------------------------- - -Boards with the bcm281xx SoC family (which includes bcm11130, bcm11140, -bcm11351, bcm28145, bcm28155 SoCs) shall have the following properties: - -Required root node property: - -compatible = "bcm,bcm11351"; diff --git a/trunk/Documentation/devicetree/bindings/arm/calxeda.txt b/trunk/Documentation/devicetree/bindings/arm/calxeda.txt index 25fcf96795ca..4755caaccba6 100644 --- a/trunk/Documentation/devicetree/bindings/arm/calxeda.txt +++ b/trunk/Documentation/devicetree/bindings/arm/calxeda.txt @@ -1,15 +1,8 @@ -Calxeda Platforms Device Tree Bindings +Calxeda Highbank Platforms Device Tree Bindings ----------------------------------------------- -Boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC shall have the -following properties. - -Required root node properties: - - compatible = "calxeda,highbank"; - - -Boards with Calxeda Cortex-A15 based ECX-2000 SOC shall have the following +Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following properties. Required root node properties: - - compatible = "calxeda,ecx-2000"; + - compatible = "calxeda,highbank"; diff --git a/trunk/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt b/trunk/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt index 3614242e7732..f3cf43b66f7e 100644 --- a/trunk/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt +++ b/trunk/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt @@ -12,13 +12,13 @@ Optional properties: Examples: i2c@83fc4000 { /* I2C2 on i.MX51 */ - compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; reg = <0x83fc4000 0x4000>; interrupts = <63>; }; i2c@70038000 { /* HS-I2C on i.MX51 */ - compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; reg = <0x70038000 0x4000>; interrupts = <64>; clock-frequency = <400000>; diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 99199e63f349..59203e77ce9e 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -797,6 +797,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained T: git git://git.pengutronix.de/git/imx/linux-2.6.git F: arch/arm/mach-imx/ +F: arch/arm/plat-mxc/ F: arch/arm/configs/imx*_defconfig ARM/FREESCALE IMX6 diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index c1cc4f79e4fe..ade7e924bef5 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -284,8 +284,8 @@ config ARCH_INTEGRATOR select MULTI_IRQ_HANDLER select NEED_MACH_MEMORY_H select PLAT_VERSATILE + select PLAT_VERSATILE_FPGA_IRQ select SPARSE_IRQ - select VERSATILE_FPGA_IRQ help Support for ARM's Integrator platform. @@ -318,7 +318,7 @@ config ARCH_VERSATILE select PLAT_VERSATILE select PLAT_VERSATILE_CLCD select PLAT_VERSATILE_CLOCK - select VERSATILE_FPGA_IRQ + select PLAT_VERSATILE_FPGA_IRQ help This enables support for ARM Ltd Versatile board. @@ -364,10 +364,10 @@ config ARCH_CNS3XXX config ARCH_CLPS711X bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" + select ARCH_USES_GETTIMEOFFSET select CLKDEV_LOOKUP select COMMON_CLK select CPU_ARM720T - select GENERIC_CLOCKEVENTS select NEED_MACH_MEMORY_H help Support for Cirrus Logic 711x/721x/731x based boards. @@ -433,6 +433,19 @@ config ARCH_FOOTBRIDGE Support for systems based on the DC21285 companion chip ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. +config ARCH_MXC + bool "Freescale MXC/iMX-based" + select ARCH_REQUIRE_GPIOLIB + select CLKDEV_LOOKUP + select CLKSRC_MMIO + select GENERIC_CLOCKEVENTS + select GENERIC_IRQ_CHIP + select MULTI_IRQ_HANDLER + select SPARSE_IRQ + select USE_OF + help + Support for Freescale MXC/iMX-based family of processors + config ARCH_MXS bool "Freescale MXS-based" select ARCH_REQUIRE_GPIOLIB @@ -1009,8 +1022,6 @@ source "arch/arm/mach-mvebu/Kconfig" source "arch/arm/mach-at91/Kconfig" -source "arch/arm/mach-bcm/Kconfig" - source "arch/arm/mach-clps711x/Kconfig" source "arch/arm/mach-cns3xxx/Kconfig" @@ -1047,7 +1058,7 @@ source "arch/arm/mach-msm/Kconfig" source "arch/arm/mach-mv78xx0/Kconfig" -source "arch/arm/mach-imx/Kconfig" +source "arch/arm/plat-mxc/Kconfig" source "arch/arm/mach-mxs/Kconfig" diff --git a/trunk/arch/arm/Kconfig.debug b/trunk/arch/arm/Kconfig.debug index 5566520686a5..b0f3857b3a4c 100644 --- a/trunk/arch/arm/Kconfig.debug +++ b/trunk/arch/arm/Kconfig.debug @@ -412,14 +412,6 @@ endchoice config DEBUG_LL_INCLUDE string default "debug/icedcc.S" if DEBUG_ICEDCC - default "debug/imx.S" if DEBUG_IMX1_UART || \ - DEBUG_IMX25_UART || \ - DEBUG_IMX21_IMX27_UART || \ - DEBUG_IMX31_IMX35_UART || \ - DEBUG_IMX51_UART || \ - DEBUG_IMX50_IMX53_UART ||\ - DEBUG_IMX6Q_UART2 || \ - DEBUG_IMX6Q_UART4 default "debug/highbank.S" if DEBUG_HIGHBANK_UART default "debug/mvebu.S" if DEBUG_MVEBU_UART default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART diff --git a/trunk/arch/arm/Makefile b/trunk/arch/arm/Makefile index 208912167823..5f914fca911b 100644 --- a/trunk/arch/arm/Makefile +++ b/trunk/arch/arm/Makefile @@ -137,7 +137,6 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. machine-$(CONFIG_ARCH_AT91) += at91 -machine-$(CONFIG_ARCH_BCM) += bcm machine-$(CONFIG_ARCH_BCM2835) += bcm2835 machine-$(CONFIG_ARCH_CLPS711X) += clps711x machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx @@ -197,6 +196,7 @@ machine-$(CONFIG_ARCH_ZYNQ) += zynq # Platform directory name. This list is sorted alphanumerically # by CONFIG_* macro name. +plat-$(CONFIG_ARCH_MXC) += mxc plat-$(CONFIG_ARCH_OMAP) += omap plat-$(CONFIG_ARCH_S3C64XX) += samsung plat-$(CONFIG_ARCH_ZYNQ) += versatile diff --git a/trunk/arch/arm/boot/dts/Makefile b/trunk/arch/arm/boot/dts/Makefile index cc803c92a72c..f37cf9fa5fa0 100644 --- a/trunk/arch/arm/boot/dts/Makefile +++ b/trunk/arch/arm/boot/dts/Makefile @@ -17,7 +17,6 @@ dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \ usb_a9263.dtb \ usb_a9g20.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb -dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \ dove-cubox.dtb \ dove-dove-db.dtb @@ -25,8 +24,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos4210-smdkv310.dtb \ exynos4210-trats.dtb \ exynos5250-smdk5250.dtb -dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ - ecx-2000.dtb +dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ integratorcp.dtb dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb diff --git a/trunk/arch/arm/boot/dts/bcm11351-brt.dts b/trunk/arch/arm/boot/dts/bcm11351-brt.dts deleted file mode 100644 index 248067cf7069..000000000000 --- a/trunk/arch/arm/boot/dts/bcm11351-brt.dts +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (C) 2012 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; - -/include/ "bcm11351.dtsi" - -/ { - model = "BCM11351 BRT board"; - compatible = "bcm,bcm11351-brt", "bcm,bcm11351"; - - memory { - reg = <0x80000000 0x40000000>; /* 1 GB */ - }; - - uart@3e000000 { - status = "okay"; - }; - -}; diff --git a/trunk/arch/arm/boot/dts/bcm11351.dtsi b/trunk/arch/arm/boot/dts/bcm11351.dtsi deleted file mode 100644 index ad135885bd2a..000000000000 --- a/trunk/arch/arm/boot/dts/bcm11351.dtsi +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (C) 2012 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/include/ "skeleton.dtsi" - -/ { - model = "BCM11351 SoC"; - compatible = "bcm,bcm11351"; - interrupt-parent = <&gic>; - - chosen { - bootargs = "console=ttyS0,115200n8"; - }; - - gic: interrupt-controller@3ff00100 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x3ff01000 0x1000>, - <0x3ff00100 0x100>; - }; - - uart@3e000000 { - compatible = "bcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; - status = "disabled"; - reg = <0x3e000000 0x1000>; - clock-frequency = <13000000>; - interrupts = <0x0 67 0x4>; - reg-shift = <2>; - reg-io-width = <4>; - }; - - L2: l2-cache { - compatible = "arm,pl310-cache"; - reg = <0x3ff20000 0x1000>; - cache-unified; - cache-level = <2>; - }; -}; diff --git a/trunk/arch/arm/boot/dts/ecx-2000.dts b/trunk/arch/arm/boot/dts/ecx-2000.dts deleted file mode 100644 index 46477ac1de99..000000000000 --- a/trunk/arch/arm/boot/dts/ecx-2000.dts +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Copyright 2011-2012 Calxeda, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see . - */ - -/dts-v1/; - -/* First 4KB has pen for secondary cores. */ -/memreserve/ 0x00000000 0x0001000; - -/ { - model = "Calxeda ECX-2000"; - compatible = "calxeda,ecx-2000"; - #address-cells = <2>; - #size-cells = <2>; - clock-ranges; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - compatible = "arm,cortex-a15"; - reg = <0>; - clocks = <&a9pll>; - clock-names = "cpu"; - }; - - cpu@1 { - compatible = "arm,cortex-a15"; - reg = <1>; - clocks = <&a9pll>; - clock-names = "cpu"; - }; - - cpu@2 { - compatible = "arm,cortex-a15"; - reg = <2>; - clocks = <&a9pll>; - clock-names = "cpu"; - }; - - cpu@3 { - compatible = "arm,cortex-a15"; - reg = <3>; - clocks = <&a9pll>; - clock-names = "cpu"; - }; - }; - - memory@0 { - name = "memory"; - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0xff800000>; - }; - - memory@200000000 { - name = "memory"; - device_type = "memory"; - reg = <0x00000002 0x00000000 0x00000003 0x00000000>; - }; - - soc { - ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>; - - timer { - compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - }; - - intc: interrupt-controller@fff11000 { - compatible = "arm,cortex-a15-gic"; - #interrupt-cells = <3>; - #size-cells = <0>; - #address-cells = <1>; - interrupt-controller; - interrupts = <1 9 0xf04>; - reg = <0xfff11000 0x1000>, - <0xfff12000 0x1000>, - <0xfff14000 0x2000>, - <0xfff16000 0x2000>; - }; - - pmu { - compatible = "arm,cortex-a9-pmu"; - interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>; - }; - }; -}; - -/include/ "ecx-common.dtsi" diff --git a/trunk/arch/arm/boot/dts/ecx-common.dtsi b/trunk/arch/arm/boot/dts/ecx-common.dtsi deleted file mode 100644 index d61b535f682a..000000000000 --- a/trunk/arch/arm/boot/dts/ecx-common.dtsi +++ /dev/null @@ -1,237 +0,0 @@ -/* - * Copyright 2011-2012 Calxeda, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see . - */ - -/ { - chosen { - bootargs = "console=ttyAMA0"; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - interrupt-parent = <&intc>; - - sata@ffe08000 { - compatible = "calxeda,hb-ahci"; - reg = <0xffe08000 0x10000>; - interrupts = <0 83 4>; - dma-coherent; - calxeda,port-phys = <&combophy5 0 &combophy0 0 - &combophy0 1 &combophy0 2 - &combophy0 3>; - }; - - sdhci@ffe0e000 { - compatible = "calxeda,hb-sdhci"; - reg = <0xffe0e000 0x1000>; - interrupts = <0 90 4>; - clocks = <&eclk>; - status = "disabled"; - }; - - memory-controller@fff00000 { - compatible = "calxeda,hb-ddr-ctrl"; - reg = <0xfff00000 0x1000>; - interrupts = <0 91 4>; - }; - - ipc@fff20000 { - compatible = "arm,pl320", "arm,primecell"; - reg = <0xfff20000 0x1000>; - interrupts = <0 7 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - gpioe: gpio@fff30000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff30000 0x1000>; - interrupts = <0 14 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - gpiof: gpio@fff31000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff31000 0x1000>; - interrupts = <0 15 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - gpiog: gpio@fff32000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff32000 0x1000>; - interrupts = <0 16 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - gpioh: gpio@fff33000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff33000 0x1000>; - interrupts = <0 17 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - timer@fff34000 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0xfff34000 0x1000>; - interrupts = <0 18 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - rtc@fff35000 { - compatible = "arm,pl031", "arm,primecell"; - reg = <0xfff35000 0x1000>; - interrupts = <0 19 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - serial@fff36000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0xfff36000 0x1000>; - interrupts = <0 20 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - smic@fff3a000 { - compatible = "ipmi-smic"; - device_type = "ipmi"; - reg = <0xfff3a000 0x1000>; - interrupts = <0 24 4>; - reg-size = <4>; - reg-spacing = <4>; - }; - - sregs@fff3c000 { - compatible = "calxeda,hb-sregs"; - reg = <0xfff3c000 0x1000>; - - clocks { - #address-cells = <1>; - #size-cells = <0>; - - osc: oscillator { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <33333000>; - }; - - ddrpll: ddrpll { - #clock-cells = <0>; - compatible = "calxeda,hb-pll-clock"; - clocks = <&osc>; - reg = <0x108>; - }; - - a9pll: a9pll { - #clock-cells = <0>; - compatible = "calxeda,hb-pll-clock"; - clocks = <&osc>; - reg = <0x100>; - }; - - a9periphclk: a9periphclk { - #clock-cells = <0>; - compatible = "calxeda,hb-a9periph-clock"; - clocks = <&a9pll>; - reg = <0x104>; - }; - - a9bclk: a9bclk { - #clock-cells = <0>; - compatible = "calxeda,hb-a9bus-clock"; - clocks = <&a9pll>; - reg = <0x104>; - }; - - emmcpll: emmcpll { - #clock-cells = <0>; - compatible = "calxeda,hb-pll-clock"; - clocks = <&osc>; - reg = <0x10C>; - }; - - eclk: eclk { - #clock-cells = <0>; - compatible = "calxeda,hb-emmc-clock"; - clocks = <&emmcpll>; - reg = <0x114>; - }; - - pclk: pclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <150000000>; - }; - }; - }; - - dma@fff3d000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0xfff3d000 0x1000>; - interrupts = <0 92 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - ethernet@fff50000 { - compatible = "calxeda,hb-xgmac"; - reg = <0xfff50000 0x1000>; - interrupts = <0 77 4 0 78 4 0 79 4>; - dma-coherent; - }; - - ethernet@fff51000 { - compatible = "calxeda,hb-xgmac"; - reg = <0xfff51000 0x1000>; - interrupts = <0 80 4 0 81 4 0 82 4>; - dma-coherent; - }; - - combophy0: combo-phy@fff58000 { - compatible = "calxeda,hb-combophy"; - #phy-cells = <1>; - reg = <0xfff58000 0x1000>; - phydev = <5>; - }; - - combophy5: combo-phy@fff5d000 { - compatible = "calxeda,hb-combophy"; - #phy-cells = <1>; - reg = <0xfff5d000 0x1000>; - phydev = <31>; - }; - }; -}; diff --git a/trunk/arch/arm/boot/dts/highbank.dts b/trunk/arch/arm/boot/dts/highbank.dts index a9ae5d32e80d..0c6fc34821f9 100644 --- a/trunk/arch/arm/boot/dts/highbank.dts +++ b/trunk/arch/arm/boot/dts/highbank.dts @@ -69,8 +69,16 @@ reg = <0x00000000 0xff900000>; }; + chosen { + bootargs = "console=ttyAMA0"; + }; + soc { - ranges = <0x00000000 0x00000000 0xffffffff>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&intc>; + ranges; timer@fff10600 { compatible = "arm,cortex-a9-twd-timer"; @@ -109,6 +117,173 @@ interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>; }; + sata@ffe08000 { + compatible = "calxeda,hb-ahci"; + reg = <0xffe08000 0x10000>; + interrupts = <0 83 4>; + calxeda,port-phys = <&combophy5 0 &combophy0 0 + &combophy0 1 &combophy0 2 + &combophy0 3>; + dma-coherent; + }; + + sdhci@ffe0e000 { + compatible = "calxeda,hb-sdhci"; + reg = <0xffe0e000 0x1000>; + interrupts = <0 90 4>; + clocks = <&eclk>; + }; + + memory-controller@fff00000 { + compatible = "calxeda,hb-ddr-ctrl"; + reg = <0xfff00000 0x1000>; + interrupts = <0 91 4>; + }; + + ipc@fff20000 { + compatible = "arm,pl320", "arm,primecell"; + reg = <0xfff20000 0x1000>; + interrupts = <0 7 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + gpioe: gpio@fff30000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff30000 0x1000>; + interrupts = <0 14 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + gpiof: gpio@fff31000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff31000 0x1000>; + interrupts = <0 15 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + gpiog: gpio@fff32000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff32000 0x1000>; + interrupts = <0 16 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + gpioh: gpio@fff33000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff33000 0x1000>; + interrupts = <0 17 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + timer { + compatible = "arm,sp804", "arm,primecell"; + reg = <0xfff34000 0x1000>; + interrupts = <0 18 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + rtc@fff35000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0xfff35000 0x1000>; + interrupts = <0 19 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + serial@fff36000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xfff36000 0x1000>; + interrupts = <0 20 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + smic@fff3a000 { + compatible = "ipmi-smic"; + device_type = "ipmi"; + reg = <0xfff3a000 0x1000>; + interrupts = <0 24 4>; + reg-size = <4>; + reg-spacing = <4>; + }; + + sregs@fff3c000 { + compatible = "calxeda,hb-sregs"; + reg = <0xfff3c000 0x1000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + osc: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <33333000>; + }; + + ddrpll: ddrpll { + #clock-cells = <0>; + compatible = "calxeda,hb-pll-clock"; + clocks = <&osc>; + reg = <0x108>; + }; + + a9pll: a9pll { + #clock-cells = <0>; + compatible = "calxeda,hb-pll-clock"; + clocks = <&osc>; + reg = <0x100>; + }; + + a9periphclk: a9periphclk { + #clock-cells = <0>; + compatible = "calxeda,hb-a9periph-clock"; + clocks = <&a9pll>; + reg = <0x104>; + }; + + a9bclk: a9bclk { + #clock-cells = <0>; + compatible = "calxeda,hb-a9bus-clock"; + clocks = <&a9pll>; + reg = <0x104>; + }; + + emmcpll: emmcpll { + #clock-cells = <0>; + compatible = "calxeda,hb-pll-clock"; + clocks = <&osc>; + reg = <0x10C>; + }; + + eclk: eclk { + #clock-cells = <0>; + compatible = "calxeda,hb-emmc-clock"; + clocks = <&emmcpll>; + reg = <0x114>; + }; + + pclk: pclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <150000000>; + }; + }; + }; sregs@fff3c200 { compatible = "calxeda,hb-sregs-l2-ecc"; @@ -116,7 +291,38 @@ interrupts = <0 71 4 0 72 4>; }; + dma@fff3d000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0xfff3d000 0x1000>; + interrupts = <0 92 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + ethernet@fff50000 { + compatible = "calxeda,hb-xgmac"; + reg = <0xfff50000 0x1000>; + interrupts = <0 77 4 0 78 4 0 79 4>; + }; + + ethernet@fff51000 { + compatible = "calxeda,hb-xgmac"; + reg = <0xfff51000 0x1000>; + interrupts = <0 80 4 0 81 4 0 82 4>; + }; + + combophy0: combo-phy@fff58000 { + compatible = "calxeda,hb-combophy"; + #phy-cells = <1>; + reg = <0xfff58000 0x1000>; + phydev = <5>; + }; + + combophy5: combo-phy@fff5d000 { + compatible = "calxeda,hb-combophy"; + #phy-cells = <1>; + reg = <0xfff5d000 0x1000>; + phydev = <31>; + }; }; }; - -/include/ "ecx-common.dtsi" diff --git a/trunk/arch/arm/boot/dts/imx27-3ds.dts b/trunk/arch/arm/boot/dts/imx27-3ds.dts index b01c0d745fc5..0a8978a40ece 100644 --- a/trunk/arch/arm/boot/dts/imx27-3ds.dts +++ b/trunk/arch/arm/boot/dts/imx27-3ds.dts @@ -23,6 +23,10 @@ soc { aipi@10000000 { /* aipi */ + wdog@10002000 { + status = "okay"; + }; + uart1: serial@1000a000 { fsl,uart-has-rtscts; status = "okay"; diff --git a/trunk/arch/arm/boot/dts/imx27.dtsi b/trunk/arch/arm/boot/dts/imx27.dtsi index 67d672792b0d..3e54f1498841 100644 --- a/trunk/arch/arm/boot/dts/imx27.dtsi +++ b/trunk/arch/arm/boot/dts/imx27.dtsi @@ -113,7 +113,7 @@ i2c1: i2c@10012000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; reg = <0x10012000 0x1000>; interrupts = <12>; status = "disabled"; @@ -205,7 +205,7 @@ i2c2: i2c@1001d000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; reg = <0x1001d000 0x1000>; interrupts = <1>; status = "disabled"; diff --git a/trunk/arch/arm/boot/dts/imx51-babbage.dts b/trunk/arch/arm/boot/dts/imx51-babbage.dts index 567e7ee72f91..cbd2b1c7487b 100644 --- a/trunk/arch/arm/boot/dts/imx51-babbage.dts +++ b/trunk/arch/arm/boot/dts/imx51-babbage.dts @@ -22,22 +22,6 @@ }; soc { - display@di0 { - compatible = "fsl,imx-parallel-display"; - crtcs = <&ipu 0>; - interface-pix-fmt = "rgb24"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ipu_disp1_1>; - }; - - display@di1 { - compatible = "fsl,imx-parallel-display"; - crtcs = <&ipu 1>; - interface-pix-fmt = "rgb565"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ipu_disp2_1>; - }; - aips@70000000 { /* aips-1 */ spba@70000000 { esdhc@70004000 { /* ESDHC1 */ diff --git a/trunk/arch/arm/boot/dts/imx51.dtsi b/trunk/arch/arm/boot/dts/imx51.dtsi index 44c7af791fa5..75d069fcf897 100644 --- a/trunk/arch/arm/boot/dts/imx51.dtsi +++ b/trunk/arch/arm/boot/dts/imx51.dtsi @@ -62,13 +62,6 @@ interrupt-parent = <&tzic>; ranges; - ipu: ipu@40000000 { - #crtc-cells = <1>; - compatible = "fsl,imx51-ipu"; - reg = <0x40000000 0x20000000>; - interrupts = <11 10>; - }; - aips@70000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; @@ -302,66 +295,6 @@ }; }; - ipu_disp1 { - pinctrl_ipu_disp1_1: ipudisp1grp-1 { - fsl,pins = < - 528 0x5 /* MX51_PAD_DISP1_DAT0__DISP1_DAT0 */ - 529 0x5 /* MX51_PAD_DISP1_DAT1__DISP1_DAT1 */ - 530 0x5 /* MX51_PAD_DISP1_DAT2__DISP1_DAT2 */ - 531 0x5 /* MX51_PAD_DISP1_DAT3__DISP1_DAT3 */ - 532 0x5 /* MX51_PAD_DISP1_DAT4__DISP1_DAT4 */ - 533 0x5 /* MX51_PAD_DISP1_DAT5__DISP1_DAT5 */ - 535 0x5 /* MX51_PAD_DISP1_DAT6__DISP1_DAT6 */ - 537 0x5 /* MX51_PAD_DISP1_DAT7__DISP1_DAT7 */ - 539 0x5 /* MX51_PAD_DISP1_DAT8__DISP1_DAT8 */ - 541 0x5 /* MX51_PAD_DISP1_DAT9__DISP1_DAT9 */ - 543 0x5 /* MX51_PAD_DISP1_DAT10__DISP1_DAT10 */ - 545 0x5 /* MX51_PAD_DISP1_DAT11__DISP1_DAT11 */ - 547 0x5 /* MX51_PAD_DISP1_DAT12__DISP1_DAT12 */ - 549 0x5 /* MX51_PAD_DISP1_DAT13__DISP1_DAT13 */ - 551 0x5 /* MX51_PAD_DISP1_DAT14__DISP1_DAT14 */ - 553 0x5 /* MX51_PAD_DISP1_DAT15__DISP1_DAT15 */ - 555 0x5 /* MX51_PAD_DISP1_DAT16__DISP1_DAT16 */ - 557 0x5 /* MX51_PAD_DISP1_DAT17__DISP1_DAT17 */ - 559 0x5 /* MX51_PAD_DISP1_DAT18__DISP1_DAT18 */ - 563 0x5 /* MX51_PAD_DISP1_DAT19__DISP1_DAT19 */ - 567 0x5 /* MX51_PAD_DISP1_DAT20__DISP1_DAT20 */ - 571 0x5 /* MX51_PAD_DISP1_DAT21__DISP1_DAT21 */ - 575 0x5 /* MX51_PAD_DISP1_DAT22__DISP1_DAT22 */ - 579 0x5 /* MX51_PAD_DISP1_DAT23__DISP1_DAT23 */ - 584 0x5 /* MX51_PAD_DI1_PIN2__DI1_PIN2 (hsync) */ - 583 0x5 /* MX51_PAD_DI1_PIN3__DI1_PIN3 (vsync) */ - >; - }; - }; - - ipu_disp2 { - pinctrl_ipu_disp2_1: ipudisp2grp-1 { - fsl,pins = < - 603 0x5 /* MX51_PAD_DISP2_DAT0__DISP2_DAT0 */ - 608 0x5 /* MX51_PAD_DISP2_DAT1__DISP2_DAT1 */ - 613 0x5 /* MX51_PAD_DISP2_DAT2__DISP2_DAT2 */ - 614 0x5 /* MX51_PAD_DISP2_DAT3__DISP2_DAT3 */ - 615 0x5 /* MX51_PAD_DISP2_DAT4__DISP2_DAT4 */ - 616 0x5 /* MX51_PAD_DISP2_DAT5__DISP2_DAT5 */ - 617 0x5 /* MX51_PAD_DISP2_DAT6__DISP2_DAT6 */ - 622 0x5 /* MX51_PAD_DISP2_DAT7__DISP2_DAT7 */ - 627 0x5 /* MX51_PAD_DISP2_DAT8__DISP2_DAT8 */ - 633 0x5 /* MX51_PAD_DISP2_DAT9__DISP2_DAT9 */ - 637 0x5 /* MX51_PAD_DISP2_DAT10__DISP2_DAT10 */ - 643 0x5 /* MX51_PAD_DISP2_DAT11__DISP2_DAT11 */ - 648 0x5 /* MX51_PAD_DISP2_DAT12__DISP2_DAT12 */ - 652 0x5 /* MX51_PAD_DISP2_DAT13__DISP2_DAT13 */ - 656 0x5 /* MX51_PAD_DISP2_DAT14__DISP2_DAT14 */ - 661 0x5 /* MX51_PAD_DISP2_DAT15__DISP2_DAT15 */ - 593 0x5 /* MX51_PAD_DI2_PIN2__DI2_PIN2 (hsync) */ - 595 0x5 /* MX51_PAD_DI2_PIN3__DI2_PIN3 (vsync) */ - 597 0x5 /* MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK */ - 599 0x5 /* MX51_PAD_DI_GP4__DI2_PIN15 */ - >; - }; - }; - uart1 { pinctrl_uart1_1: uart1grp-1 { fsl,pins = < @@ -444,7 +377,7 @@ i2c@83fc4000 { /* I2C2 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; reg = <0x83fc4000 0x4000>; interrupts = <63>; status = "disabled"; @@ -453,7 +386,7 @@ i2c@83fc8000 { /* I2C1 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; reg = <0x83fc8000 0x4000>; interrupts = <62>; status = "disabled"; diff --git a/trunk/arch/arm/boot/dts/imx53.dtsi b/trunk/arch/arm/boot/dts/imx53.dtsi index 8317a1727118..76ebb1ad2675 100644 --- a/trunk/arch/arm/boot/dts/imx53.dtsi +++ b/trunk/arch/arm/boot/dts/imx53.dtsi @@ -67,13 +67,6 @@ interrupt-parent = <&tzic>; ranges; - ipu: ipu@18000000 { - #crtc-cells = <1>; - compatible = "fsl,imx53-ipu"; - reg = <0x18000000 0x080000000>; - interrupts = <11 10>; - }; - aips@50000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; @@ -439,7 +432,7 @@ i2c@53fec000 { /* I2C3 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; reg = <0x53fec000 0x4000>; interrupts = <64>; status = "disabled"; @@ -495,7 +488,7 @@ i2c@63fc4000 { /* I2C2 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; reg = <0x63fc4000 0x4000>; interrupts = <63>; status = "disabled"; @@ -504,7 +497,7 @@ i2c@63fc8000 { /* I2C1 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; reg = <0x63fc8000 0x4000>; interrupts = <62>; status = "disabled"; diff --git a/trunk/arch/arm/boot/dts/imx6q.dtsi b/trunk/arch/arm/boot/dts/imx6q.dtsi index 69fe8f46e3e6..f3990b04fecf 100644 --- a/trunk/arch/arm/boot/dts/imx6q.dtsi +++ b/trunk/arch/arm/boot/dts/imx6q.dtsi @@ -882,7 +882,7 @@ i2c@021a0000 { /* I2C1 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; reg = <0x021a0000 0x4000>; interrupts = <0 36 0x04>; clocks = <&clks 125>; @@ -892,7 +892,7 @@ i2c@021a4000 { /* I2C2 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; reg = <0x021a4000 0x4000>; interrupts = <0 37 0x04>; clocks = <&clks 126>; @@ -902,7 +902,7 @@ i2c@021a8000 { /* I2C3 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; reg = <0x021a8000 0x4000>; interrupts = <0 38 0x04>; clocks = <&clks 127>; @@ -1001,23 +1001,5 @@ status = "disabled"; }; }; - - ipu1: ipu@02400000 { - #crtc-cells = <1>; - compatible = "fsl,imx6q-ipu"; - reg = <0x02400000 0x400000>; - interrupts = <0 6 0x4 0 5 0x4>; - clocks = <&clks 130>, <&clks 131>, <&clks 132>; - clock-names = "bus", "di0", "di1"; - }; - - ipu2: ipu@02800000 { - #crtc-cells = <1>; - compatible = "fsl,imx6q-ipu"; - reg = <0x02800000 0x400000>; - interrupts = <0 8 0x4 0 7 0x4>; - clocks = <&clks 133>, <&clks 134>, <&clks 137>; - clock-names = "bus", "di0", "di1"; - }; }; }; diff --git a/trunk/arch/arm/boot/dts/sh7377.dtsi b/trunk/arch/arm/boot/dts/sh7377.dtsi new file mode 100644 index 000000000000..767ee0796daa --- /dev/null +++ b/trunk/arch/arm/boot/dts/sh7377.dtsi @@ -0,0 +1,21 @@ +/* + * Device Tree Source for the sh7377 SoC + * + * Copyright (C) 2012 Renesas Solutions Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "renesas,sh7377"; + + cpus { + cpu@0 { + compatible = "arm,cortex-a8"; + }; + }; +}; diff --git a/trunk/arch/arm/configs/armadillo800eva_defconfig b/trunk/arch/arm/configs/armadillo800eva_defconfig index 3d764072dd54..f78d259f8d23 100644 --- a/trunk/arch/arm/configs/armadillo800eva_defconfig +++ b/trunk/arch/arm/configs/armadillo800eva_defconfig @@ -7,7 +7,6 @@ CONFIG_LOG_BUF_SHIFT=16 # CONFIG_IPC_NS is not set # CONFIG_PID_NS is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_PERF_EVENTS=y CONFIG_SLAB=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y diff --git a/trunk/arch/arm/configs/bcm_defconfig b/trunk/arch/arm/configs/bcm_defconfig deleted file mode 100644 index e3bf2d65618e..000000000000 --- a/trunk/arch/arm/configs/bcm_defconfig +++ /dev/null @@ -1,114 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=19 -CONFIG_CGROUPS=y -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_RESOURCE_COUNTERS=y -CONFIG_CGROUP_SCHED=y -CONFIG_BLK_CGROUP=y -CONFIG_NAMESPACES=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_EMBEDDED=y -# CONFIG_COMPAT_BRK is not set -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_PARTITION_ADVANCED=y -CONFIG_EFI_PARTITION=y -CONFIG_ARCH_BCM=y -CONFIG_ARM_THUMBEE=y -CONFIG_ARM_ERRATA_743622=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -# CONFIG_COMPACTION is not set -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ARM_APPENDED_DTB=y -CONFIG_CMDLINE="console=ttyS0,115200n8 mem=128M" -CONFIG_CPU_IDLE=y -CONFIG_VFP=y -CONFIG_NEON=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_PM_RUNTIME=y -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_PROC_DEVICETREE=y -# CONFIG_BLK_DEV is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_JOYDEV=y -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=y -# CONFIG_SERIO is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_RSA=y -CONFIG_SERIAL_8250_DW=y -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -# CONFIG_HWMON is not set -CONFIG_VIDEO_OUTPUT_CONTROL=y -CONFIG_FB=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_USB_SUPPORT is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_AUTOFS4_FS=y -CONFIG_FUSE_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_CONFIGFS_FS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_PRINTK_TIME=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=110 -CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y -CONFIG_DEBUG_INFO=y -# CONFIG_FTRACE is not set -CONFIG_DEBUG_LL=y -CONFIG_CRC_CCITT=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC7=y -CONFIG_XZ_DEC=y -CONFIG_AVERAGE=y diff --git a/trunk/arch/arm/configs/clps711x_defconfig b/trunk/arch/arm/configs/clps711x_defconfig deleted file mode 100644 index 86209d175b9c..000000000000 --- a/trunk/arch/arm/configs/clps711x_defconfig +++ /dev/null @@ -1,78 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_EMBEDDED=y -CONFIG_PARTITION_ADVANCED=y -# CONFIG_MSDOS_PARTITION is not set -CONFIG_ARCH_CLPS711X=y -CONFIG_ARCH_AUTCPU12=y -CONFIG_ARCH_CDB89712=y -CONFIG_ARCH_CLEP7312=y -CONFIG_ARCH_EDB7211=y -CONFIG_ARCH_P720T=y -CONFIG_ARCH_FORTUNET=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -# CONFIG_IPV6 is not set -CONFIG_IRDA=y -CONFIG_IRTTY_SIR=y -CONFIG_EP7211_DONGLE=y -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_CDB89712=y -CONFIG_MTD_AUTCPU12=y -CONFIG_MTD_PLATRAM=y -CONFIG_BLK_DEV_RAM=y -CONFIG_NETDEVICES=y -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_NET_VENDOR_AMD is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_CHELSIO is not set -CONFIG_CS89x0=y -# CONFIG_NET_VENDOR_FARADAY is not set -# CONFIG_NET_VENDOR_FUJITSU is not set -# CONFIG_NET_VENDOR_HP is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_WIZNET is not set -# CONFIG_WLAN is not set -# CONFIG_INPUT is not set -# CONFIG_SERIO is not set -# CONFIG_VT is not set -CONFIG_SERIAL_CLPS711X_CONSOLE=y -# CONFIG_HW_RANDOM is not set -# CONFIG_HWMON is not set -CONFIG_FB=y -CONFIG_FB_CLPS711X=y -# CONFIG_USB_SUPPORT is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -# CONFIG_IOMMU_SUPPORT is not set -CONFIG_EXT2_FS=y -CONFIG_MINIX_FS=y -# CONFIG_NETWORK_FILESYSTEMS is not set -# CONFIG_FTRACE is not set -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -CONFIG_EARLY_PRINTK=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set -# CONFIG_CRC32 is not set diff --git a/trunk/arch/arm/configs/edb7211_defconfig b/trunk/arch/arm/configs/edb7211_defconfig new file mode 100644 index 000000000000..d52ded350a12 --- /dev/null +++ b/trunk/arch/arm/configs/edb7211_defconfig @@ -0,0 +1,27 @@ +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +# CONFIG_HOTPLUG is not set +CONFIG_ARCH_CLPS711X=y +CONFIG_ARCH_EDB7211=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +# CONFIG_IPV6 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_NETDEVICES=y +# CONFIG_INPUT is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_VT is not set +CONFIG_SERIAL_CLPS711X=y +CONFIG_SERIAL_CLPS711X_CONSOLE=y +CONFIG_EXT2_FS=y +CONFIG_MINIX_FS=y +CONFIG_PARTITION_ADVANCED=y +# CONFIG_MSDOS_PARTITION is not set +CONFIG_DEBUG_USER=y diff --git a/trunk/arch/arm/configs/fortunet_defconfig b/trunk/arch/arm/configs/fortunet_defconfig new file mode 100644 index 000000000000..840fced7529f --- /dev/null +++ b/trunk/arch/arm/configs/fortunet_defconfig @@ -0,0 +1,28 @@ +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +# CONFIG_HOTPLUG is not set +CONFIG_ARCH_CLPS711X=y +CONFIG_ARCH_FORTUNET=y +# CONFIG_ARM_THUMB is not set +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_FPE_FASTFPE=y +CONFIG_BINFMT_AOUT=y +CONFIG_NET=y +CONFIG_UNIX=y +CONFIG_MTD=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_BLK_DEV_RAM=y +# CONFIG_INPUT is not set +# CONFIG_SERIO is not set +# CONFIG_VT is not set +CONFIG_SERIAL_CLPS711X=y +CONFIG_SERIAL_CLPS711X_CONSOLE=y +CONFIG_EXT2_FS=y +CONFIG_DEBUG_USER=y diff --git a/trunk/arch/arm/configs/imx_v4_v5_defconfig b/trunk/arch/arm/configs/imx_v4_v5_defconfig index f71302c3ac33..78ed575feb1a 100644 --- a/trunk/arch/arm/configs/imx_v4_v5_defconfig +++ b/trunk/arch/arm/configs/imx_v4_v5_defconfig @@ -18,9 +18,7 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set CONFIG_ARCH_MXC=y -CONFIG_ARCH_MULTI_V4T=y -CONFIG_ARCH_MULTI_V5=y -# CONFIG_ARCH_MULTI_V7 is not set +CONFIG_ARCH_IMX_V4_V5=y CONFIG_ARCH_MX1ADS=y CONFIG_MACH_SCB9328=y CONFIG_MACH_APF9328=y diff --git a/trunk/arch/arm/configs/imx_v6_v7_defconfig b/trunk/arch/arm/configs/imx_v6_v7_defconfig index 44f117aab52c..394ded624e37 100644 --- a/trunk/arch/arm/configs/imx_v6_v7_defconfig +++ b/trunk/arch/arm/configs/imx_v6_v7_defconfig @@ -17,8 +17,6 @@ CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set CONFIG_ARCH_MXC=y -CONFIG_ARCH_MULTI_V6=y -CONFIG_ARCH_MULTI_V7=y CONFIG_MACH_MX31LILLY=y CONFIG_MACH_MX31LITE=y CONFIG_MACH_PCM037=y diff --git a/trunk/arch/arm/configs/marzen_defconfig b/trunk/arch/arm/configs/marzen_defconfig index f79b55c512d0..53382b6c8bb4 100644 --- a/trunk/arch/arm/configs/marzen_defconfig +++ b/trunk/arch/arm/configs/marzen_defconfig @@ -69,8 +69,6 @@ CONFIG_SERIAL_SH_SCI=y CONFIG_SERIAL_SH_SCI_NR_UARTS=6 CONFIG_SERIAL_SH_SCI_CONSOLE=y # CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_RCAR=y CONFIG_GPIO_SYSFS=y # CONFIG_HWMON is not set CONFIG_THERMAL=y diff --git a/trunk/arch/arm/kernel/smp_twd.c b/trunk/arch/arm/kernel/smp_twd.c index 999aa48657dd..b22d700fea27 100644 --- a/trunk/arch/arm/kernel/smp_twd.c +++ b/trunk/arch/arm/kernel/smp_twd.c @@ -366,8 +366,10 @@ void __init twd_local_timer_of_register(void) int err; np = of_find_matching_node(NULL, twd_of_match); - if (!np) - return; + if (!np) { + err = -ENODEV; + goto out; + } twd_ppi = irq_of_parse_and_map(np, 0); if (!twd_ppi) { diff --git a/trunk/arch/arm/mach-bcm/Kconfig b/trunk/arch/arm/mach-bcm/Kconfig deleted file mode 100644 index 48705c10a0fe..000000000000 --- a/trunk/arch/arm/mach-bcm/Kconfig +++ /dev/null @@ -1,19 +0,0 @@ -config ARCH_BCM - bool "Broadcom SoC" if ARCH_MULTI_V7 - depends on MMU - select ARCH_REQUIRE_GPIOLIB - select ARM_ERRATA_754322 - select ARM_ERRATA_764369 if SMP - select ARM_GIC - select CPU_V7 - select GENERIC_CLOCKEVENTS - select GENERIC_GPIO - select GENERIC_TIME - select GPIO_BCM - select SPARSE_IRQ - select TICK_ONESHOT - help - This enables support for system based on Broadcom SoCs. - It currently supports the 'BCM281XX' family, which includes - BCM11130, BCM11140, BCM11351, BCM28145 and - BCM28155 variants. diff --git a/trunk/arch/arm/mach-bcm/Makefile b/trunk/arch/arm/mach-bcm/Makefile deleted file mode 100644 index bbf412261e5e..000000000000 --- a/trunk/arch/arm/mach-bcm/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# Copyright (C) 2012 Broadcom Corporation -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation version 2. -# -# This program is distributed "as is" WITHOUT ANY WARRANTY of any -# kind, whether express or implied; without even the implied warranty -# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. - -obj-$(CONFIG_ARCH_BCM) := board_bcm.o diff --git a/trunk/arch/arm/mach-bcm/board_bcm.c b/trunk/arch/arm/mach-bcm/board_bcm.c deleted file mode 100644 index 3a62f1b1cabc..000000000000 --- a/trunk/arch/arm/mach-bcm/board_bcm.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright (C) 2012 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include - -static const struct of_device_id irq_match[] = { - {.compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, - {} -}; - -static void timer_init(void) -{ -} - -static struct sys_timer timer = { - .init = timer_init, -}; - -static void __init init_irq(void) -{ - of_irq_init(irq_match); -} - -static void __init board_init(void) -{ - of_platform_populate(NULL, of_default_bus_match_table, NULL, - &platform_bus); -} - -static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, }; - -DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor") - .init_irq = init_irq, - .timer = &timer, - .init_machine = board_init, - .dt_compat = bcm11351_dt_compat, - .handle_irq = gic_handle_irq, -MACHINE_END diff --git a/trunk/arch/arm/mach-clps711x/Makefile b/trunk/arch/arm/mach-clps711x/Makefile index 9cf2d1c6a548..6da6940b3656 100644 --- a/trunk/arch/arm/mach-clps711x/Makefile +++ b/trunk/arch/arm/mach-clps711x/Makefile @@ -12,6 +12,6 @@ obj- := obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o -obj-$(CONFIG_ARCH_EDB7211) += edb7211.o +obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o obj-$(CONFIG_ARCH_P720T) += p720t.o diff --git a/trunk/arch/arm/mach-clps711x/autcpu12.c b/trunk/arch/arm/mach-clps711x/autcpu12.c index 214547b5c51f..32871918bb6e 100644 --- a/trunk/arch/arm/mach-clps711x/autcpu12.c +++ b/trunk/arch/arm/mach-clps711x/autcpu12.c @@ -39,10 +39,19 @@ #include "common.h" +/* + * The on-chip registers are given a size of 1MB so that a section can + * be used to map them; this saves a page table. This is the place to + * add mappings for ROM, expansion memory, PCMCIA, etc. (if static + * mappings are chosen for those areas). + * +*/ + static struct map_desc autcpu12_io_desc[] __initdata = { - /* Memory-mapped extra io and CS8900A Ethernet chip */ - { - .virtual = IO_ADDRESS(AUTCPU12_PHYS_CS8900A), + /* memory-mapped extra io and CS8900A Ethernet chip */ + /* ethernet chip */ + { + .virtual = AUTCPU12_VIRT_CS8900A, .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A), .length = SZ_1M, .type = MT_DEVICE diff --git a/trunk/arch/arm/mach-clps711x/cdb89712.c b/trunk/arch/arm/mach-clps711x/cdb89712.c index d90d25c67ac2..c314f49d6ef6 100644 --- a/trunk/arch/arm/mach-clps711x/cdb89712.c +++ b/trunk/arch/arm/mach-clps711x/cdb89712.c @@ -40,8 +40,8 @@ */ static struct map_desc cdb89712_io_desc[] __initdata = { { - .virtual = IO_ADDRESS(ETHER_PHYS_BASE), - .pfn = __phys_to_pfn(ETHER_PHYS_BASE), + .virtual = ETHER_BASE, + .pfn =__phys_to_pfn(ETHER_START), .length = ETHER_SIZE, .type = MT_DEVICE } diff --git a/trunk/arch/arm/mach-clps711x/common.c b/trunk/arch/arm/mach-clps711x/common.c index 286d6e6d5f5a..509243d89a32 100644 --- a/trunk/arch/arm/mach-clps711x/common.c +++ b/trunk/arch/arm/mach-clps711x/common.c @@ -21,14 +21,13 @@ */ #include #include -#include #include #include #include #include -#include #include +#include #include #include #include @@ -37,6 +36,7 @@ static struct clk *clk_pll, *clk_bus, *clk_uart, *clk_timerl, *clk_timerh, *clk_tint, *clk_spi; +static unsigned long latch; /* * This maps the generic CLPS711x registers @@ -45,7 +45,7 @@ static struct map_desc clps711x_io_desc[] __initdata = { { .virtual = (unsigned long)CLPS711X_VIRT_BASE, .pfn = __phys_to_pfn(CLPS711X_PHYS_BASE), - .length = SZ_64K, + .length = SZ_1M, .type = MT_DEVICE } }; @@ -65,10 +65,6 @@ static void int1_mask(struct irq_data *d) } static void int1_ack(struct irq_data *d) -{ -} - -static void int1_eoi(struct irq_data *d) { switch (d->irq) { case IRQ_CSINT: clps_writel(0, COEOI); break; @@ -90,9 +86,7 @@ static void int1_unmask(struct irq_data *d) } static struct irq_chip int1_chip = { - .name = "Interrupt Vector 1 ", .irq_ack = int1_ack, - .irq_eoi = int1_eoi, .irq_mask = int1_mask, .irq_unmask = int1_unmask, }; @@ -107,10 +101,6 @@ static void int2_mask(struct irq_data *d) } static void int2_ack(struct irq_data *d) -{ -} - -static void int2_eoi(struct irq_data *d) { switch (d->irq) { case IRQ_KBDINT: clps_writel(0, KBDEOI); break; @@ -127,93 +117,73 @@ static void int2_unmask(struct irq_data *d) } static struct irq_chip int2_chip = { - .name = "Interrupt Vector 2 ", .irq_ack = int2_ack, - .irq_eoi = int2_eoi, .irq_mask = int2_mask, .irq_unmask = int2_unmask, }; -struct clps711x_irqdesc { - int nr; - struct irq_chip *chip; - irq_flow_handler_t handle; -}; - -static struct clps711x_irqdesc clps711x_irqdescs[] __initdata = { - { IRQ_CSINT, &int1_chip, handle_fasteoi_irq, }, - { IRQ_EINT1, &int1_chip, handle_level_irq, }, - { IRQ_EINT2, &int1_chip, handle_level_irq, }, - { IRQ_EINT3, &int1_chip, handle_level_irq, }, - { IRQ_TC1OI, &int1_chip, handle_fasteoi_irq, }, - { IRQ_TC2OI, &int1_chip, handle_fasteoi_irq, }, - { IRQ_RTCMI, &int1_chip, handle_fasteoi_irq, }, - { IRQ_TINT, &int1_chip, handle_fasteoi_irq, }, - { IRQ_UTXINT1, &int1_chip, handle_level_irq, }, - { IRQ_URXINT1, &int1_chip, handle_level_irq, }, - { IRQ_UMSINT, &int1_chip, handle_fasteoi_irq, }, - { IRQ_SSEOTI, &int1_chip, handle_level_irq, }, - { IRQ_KBDINT, &int2_chip, handle_fasteoi_irq, }, - { IRQ_SS2RX, &int2_chip, handle_level_irq, }, - { IRQ_SS2TX, &int2_chip, handle_level_irq, }, - { IRQ_UTXINT2, &int2_chip, handle_level_irq, }, - { IRQ_URXINT2, &int2_chip, handle_level_irq, }, -}; - void __init clps711x_init_irq(void) { unsigned int i; - /* Disable interrupts */ + for (i = 0; i < NR_IRQS; i++) { + if (INT1_IRQS & (1 << i)) { + irq_set_chip_and_handler(i, &int1_chip, + handle_level_irq); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + if (INT2_IRQS & (1 << i)) { + irq_set_chip_and_handler(i, &int2_chip, + handle_level_irq); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + } + + /* + * Disable interrupts + */ clps_writel(0, INTMR1); clps_writel(0, INTMR2); - clps_writel(0, INTMR3); - /* Clear down any pending interrupts */ - clps_writel(0, BLEOI); - clps_writel(0, MCEOI); + /* + * Clear down any pending interrupts + */ clps_writel(0, COEOI); clps_writel(0, TC1EOI); clps_writel(0, TC2EOI); clps_writel(0, RTCEOI); clps_writel(0, TEOI); clps_writel(0, UMSEOI); + clps_writel(0, SYNCIO); clps_writel(0, KBDEOI); - clps_writel(0, SRXEOF); - clps_writel(0xffffffff, DAISR); - - for (i = 0; i < ARRAY_SIZE(clps711x_irqdescs); i++) { - irq_set_chip_and_handler(clps711x_irqdescs[i].nr, - clps711x_irqdescs[i].chip, - clps711x_irqdescs[i].handle); - set_irq_flags(clps711x_irqdescs[i].nr, - IRQF_VALID | IRQF_PROBE); - } } -static void clps711x_clockevent_set_mode(enum clock_event_mode mode, - struct clock_event_device *evt) +/* + * gettimeoffset() returns time since last timer tick, in usecs. + * + * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy. + * 'tick' is usecs per jiffy. + */ +static unsigned long clps711x_gettimeoffset(void) { + unsigned long hwticks; + hwticks = latch - (clps_readl(TC2D) & 0xffff); + return (hwticks * (tick_nsec / 1000)) / latch; } -static struct clock_event_device clockevent_clps711x = { - .name = "CLPS711x Clockevents", - .rating = 300, - .features = CLOCK_EVT_FEAT_PERIODIC, - .set_mode = clps711x_clockevent_set_mode, -}; - -static irqreturn_t clps711x_timer_interrupt(int irq, void *dev_id) +/* + * IRQ handler for the timer + */ +static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id) { - clockevent_clps711x.event_handler(&clockevent_clps711x); - + timer_tick(); return IRQ_HANDLED; } static struct irqaction clps711x_timer_irq = { .name = "CLPS711x Timer Tick", .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, - .handler = clps711x_timer_interrupt, + .handler = p720t_timer_interrupt, }; static void add_fixed_clk(struct clk *clk, const char *name, int rate) @@ -274,19 +244,20 @@ static void __init clps711x_timer_init(void) pr_info("CPU frequency set at %i Hz.\n", cpu); - clps_writew(DIV_ROUND_CLOSEST(timh, HZ), TC2D); + latch = (timh + HZ / 2) / HZ; tmp = clps_readl(SYSCON1); tmp |= SYSCON1_TC2S | SYSCON1_TC2M; clps_writel(tmp, SYSCON1); - clockevents_config_and_register(&clockevent_clps711x, timh, 1, 0xffff); + clps_writel(latch - 1, TC2D); setup_irq(IRQ_TC2OI, &clps711x_timer_irq); } struct sys_timer clps711x_timer = { .init = clps711x_timer_init, + .offset = clps711x_gettimeoffset, }; void clps711x_restart(char mode, const char *cmd) diff --git a/trunk/arch/arm/mach-clps711x/edb7211.c b/trunk/arch/arm/mach-clps711x/edb7211-arch.c similarity index 56% rename from trunk/arch/arm/mach-clps711x/edb7211.c rename to trunk/arch/arm/mach-clps711x/edb7211-arch.c index 88f46908de24..5fad0b4f40ad 100644 --- a/trunk/arch/arm/mach-clps711x/edb7211.c +++ b/trunk/arch/arm/mach-clps711x/edb7211-arch.c @@ -1,61 +1,39 @@ /* + * linux/arch/arm/mach-clps711x/arch-edb7211.c + * * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ - #include #include #include +#include #include -#include -#include #include - -#include +#include #include "common.h" -#define VIDEORAM_SIZE SZ_128K - -static struct map_desc edb7211_io_desc[] __initdata = { - { /* Memory-mapped extra keyboard row */ - .virtual = IO_ADDRESS(EP7211_PHYS_EXTKBD), - .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD), - .length = SZ_1M, - .type = MT_DEVICE, - }, { /* CS8900A Ethernet chip */ - .virtual = IO_ADDRESS(EP7211_PHYS_CS8900A), - .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A), - .length = SZ_1M, - .type = MT_DEVICE, - }, { /* Flash bank 0 */ - .virtual = IO_ADDRESS(EP7211_PHYS_FLASH1), - .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1), - .length = SZ_8M, - .type = MT_DEVICE, - }, { /* Flash bank 1 */ - .virtual = IO_ADDRESS(EP7211_PHYS_FLASH2), - .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2), - .length = SZ_8M, - .type = MT_DEVICE, - }, -}; - -void __init edb7211_map_io(void) -{ - clps711x_map_io(); - iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc)); -} +extern void edb7211_map_io(void); /* Reserve screen memory region at the start of main system memory. */ static void __init edb7211_reserve(void) { - memblock_reserve(PHYS_OFFSET, VIDEORAM_SIZE); + memblock_reserve(PHYS_OFFSET, 0x00020000); } static void __init @@ -70,15 +48,15 @@ fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi) * not using that information yet. */ mi->bank[0].start = 0xc0000000; - mi->bank[0].size = SZ_8M; + mi->bank[0].size = 8*1024*1024; mi->bank[1].start = 0xc1000000; - mi->bank[1].size = SZ_8M; + mi->bank[1].size = 8*1024*1024; mi->nr_banks = 2; } MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)") /* Maintainer: Jon McClintock */ - .atag_offset = VIDEORAM_SIZE + 0x100, + .atag_offset = 0x20100, /* 0xc0000000 - 0xc001ffff can be video RAM */ .fixup = fixup_edb7211, .map_io = edb7211_map_io, .reserve = edb7211_reserve, diff --git a/trunk/arch/arm/mach-clps711x/edb7211-mm.c b/trunk/arch/arm/mach-clps711x/edb7211-mm.c new file mode 100644 index 000000000000..4372f06c9929 --- /dev/null +++ b/trunk/arch/arm/mach-clps711x/edb7211-mm.c @@ -0,0 +1,82 @@ +/* + * linux/arch/arm/mach-clps711x/mm.c + * + * Extra MM routines for the EDB7211 board + * + * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include + +#include +#include +#include + +#include + +extern void clps711x_map_io(void); + +/* + * The on-chip registers are given a size of 1MB so that a section can + * be used to map them; this saves a page table. This is the place to + * add mappings for ROM, expansion memory, PCMCIA, etc. (if static + * mappings are chosen for those areas). + * + * Here is a physical memory map (to be fleshed out later): + * + * Physical Address Size Description + * ----------------- ----- --------------------------------- + * c0000000-c001ffff 128KB reserved for video RAM [1] + * c0020000-c0023fff 16KB parameters (see Documentation/arm/Setup) + * c0024000-c0027fff 16KB swapper_pg_dir (task 0 page directory) + * c0028000-... kernel image (TEXTADDR) + * + * [1] Unused pages should be given back to the VM; they are not yet. + * The parameter block should also be released (not sure if this + * happens). + */ +static struct map_desc edb7211_io_desc[] __initdata = { + { /* memory-mapped extra keyboard row */ + .virtual = EP7211_VIRT_EXTKBD, + .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD), + .length = SZ_1M, + .type = MT_DEVICE, + }, { /* and CS8900A Ethernet chip */ + .virtual = EP7211_VIRT_CS8900A, + .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A), + .length = SZ_1M, + .type = MT_DEVICE, + }, { /* flash banks */ + .virtual = EP7211_VIRT_FLASH1, + .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1), + .length = SZ_8M, + .type = MT_DEVICE, + }, { + .virtual = EP7211_VIRT_FLASH2, + .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2), + .length = SZ_8M, + .type = MT_DEVICE, + } +}; + +void __init edb7211_map_io(void) +{ + clps711x_map_io(); + iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc)); +} + diff --git a/trunk/arch/arm/mach-clps711x/include/mach/autcpu12.h b/trunk/arch/arm/mach-clps711x/include/mach/autcpu12.h index f95ce6f29119..1588a365f610 100644 --- a/trunk/arch/arm/mach-clps711x/include/mach/autcpu12.h +++ b/trunk/arch/arm/mach-clps711x/include/mach/autcpu12.h @@ -20,8 +20,12 @@ #ifndef __ASM_ARCH_AUTCPU12_H #define __ASM_ARCH_AUTCPU12_H -/* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */ -#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE +/* + * The CS8900A ethernet chip has its I/O registers wired to chip select 2 + * (nCS2). This is the mapping for it. + */ +#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE /* physical */ +#define AUTCPU12_VIRT_CS8900A (0xfe000000) /* virtual */ /* * The flash bank is wired to chip select 0 @@ -30,9 +34,11 @@ /* offset for device specific information structure */ #define AUTCPU12_LCDINFO_OFFS (0x00010000) - -/* Videomemory in the internal SRAM (CS 6) */ +/* +* Videomemory is the internal SRAM (CS 6) +*/ #define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE +#define AUTCPU12_VIRT_VIDEO (0xfd000000) /* * All special IO's are tied to CS1 diff --git a/trunk/arch/arm/mach-clps711x/include/mach/clps711x.h b/trunk/arch/arm/mach-clps711x/include/mach/clps711x.h index aee352c00a1f..c82e21ca49c7 100644 --- a/trunk/arch/arm/mach-clps711x/include/mach/clps711x.h +++ b/trunk/arch/arm/mach-clps711x/include/mach/clps711x.h @@ -257,9 +257,6 @@ #define MEMCFG_BUS_WIDTH_16 (0) #define MEMCFG_BUS_WIDTH_8 (3) -#define MEMCFG_SQAEN (1 << 6) -#define MEMCFG_CLKENB (1 << 7) - #define MEMCFG_WAITSTATE_8_3 (0 << 2) #define MEMCFG_WAITSTATE_7_3 (1 << 2) #define MEMCFG_WAITSTATE_6_3 (2 << 2) diff --git a/trunk/arch/arm/mach-clps711x/include/mach/hardware.h b/trunk/arch/arm/mach-clps711x/include/mach/hardware.h index 0a3df25ffea7..8497775d6ee5 100644 --- a/trunk/arch/arm/mach-clps711x/include/mach/hardware.h +++ b/trunk/arch/arm/mach-clps711x/include/mach/hardware.h @@ -24,10 +24,7 @@ #include -#define IO_ADDRESS(x) (0xdc000000 + (((x) & 0x03ffffff) | \ - (((x) >> 2) & 0x3c000000))) - -#define CLPS711X_VIRT_BASE IOMEM(IO_ADDRESS(CLPS711X_PHYS_BASE)) +#define CLPS711X_VIRT_BASE IOMEM(0xff000000) #ifndef __ASSEMBLY__ #define clps_readb(off) readb(CLPS711X_VIRT_BASE + (off)) @@ -64,25 +61,58 @@ #define CS7_PHYS_BASE (0x00000000) #endif +#define SYSPLD_VIRT_BASE 0xfe000000 +#define SYSPLD_BASE SYSPLD_VIRT_BASE + #if defined (CONFIG_ARCH_CDB89712) -#define ETHER_PHYS_BASE CS2_PHYS_BASE -#define ETHER_SIZE 0x1000 +#define ETHER_START 0x20000000 +#define ETHER_SIZE 0x1000 +#define ETHER_BASE 0xfe000000 #endif #if defined (CONFIG_ARCH_EDB7211) -/* The extra 8 lines of the keyboard matrix are wired to chip select 3 */ -#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE +/* + * The extra 8 lines of the keyboard matrix are wired to chip select 3 (nCS3) + * and repeat across it. This is the mapping for it. + * + * In jumpered boot mode, nCS3 is mapped to 0x4000000, not 0x3000000. This + * was cause for much consternation and headscratching. This should probably + * be made a compile/run time kernel option. + */ +#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE /* physical */ + +#define EP7211_VIRT_EXTKBD (0xfd000000) /* virtual */ + + +/* + * The CS8900A ethernet chip has its I/O registers wired to chip select 2 + * (nCS2). This is the mapping for it. + * + * In jumpered boot mode, nCS2 is mapped to 0x5000000, not 0x2000000. This + * was cause for much consternation and headscratching. This should probably + * be made a compile/run time kernel option. + */ +#define EP7211_PHYS_CS8900A CS2_PHYS_BASE /* physical */ + +#define EP7211_VIRT_CS8900A (0xfc000000) /* virtual */ -/* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */ -#define EP7211_PHYS_CS8900A CS2_PHYS_BASE -/* The two flash banks are wired to chip selects 0 and 1 */ -#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE -#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE +/* + * The two flash banks are wired to chip selects 0 and 1. This is the mapping + * for them. + * + * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running + * in jumpered boot mode. + */ +#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE /* physical */ +#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE /* physical */ + +#define EP7211_VIRT_FLASH1 (0xfa000000) /* virtual */ +#define EP7211_VIRT_FLASH2 (0xfb000000) /* virtual */ #endif /* CONFIG_ARCH_EDB7211 */ diff --git a/trunk/arch/arm/mach-clps711x/include/mach/irqs.h b/trunk/arch/arm/mach-clps711x/include/mach/irqs.h index 1ea56db2fd5f..14d215f8ca81 100644 --- a/trunk/arch/arm/mach-clps711x/include/mach/irqs.h +++ b/trunk/arch/arm/mach-clps711x/include/mach/irqs.h @@ -34,6 +34,8 @@ #define IRQ_UMSINT 14 #define IRQ_SSEOTI 15 +#define INT1_IRQS (0x0000fff0) + /* * Interrupts from INTSR2 */ @@ -43,4 +45,6 @@ #define IRQ_UTXINT2 (16+12) /* bit 12 */ #define IRQ_URXINT2 (16+13) /* bit 13 */ +#define INT2_IRQS (0x30070000) + #define NR_IRQS 30 diff --git a/trunk/arch/arm/mach-clps711x/include/mach/syspld.h b/trunk/arch/arm/mach-clps711x/include/mach/syspld.h index 9a433155bf58..f7f4c1201898 100644 --- a/trunk/arch/arm/mach-clps711x/include/mach/syspld.h +++ b/trunk/arch/arm/mach-clps711x/include/mach/syspld.h @@ -23,9 +23,14 @@ #define __ASM_ARCH_SYSPLD_H #define SYSPLD_PHYS_BASE (0x10000000) -#define SYSPLD_VIRT_BASE IO_ADDRESS(SYSPLD_PHYS_BASE) -#define SYSPLD_REG(type, off) (*(volatile type *)(SYSPLD_VIRT_BASE + (off))) +#ifndef __ASSEMBLY__ +#include + +#define SYSPLD_REG(type,off) (*(volatile type *)(SYSPLD_BASE + off)) +#else +#define SYSPLD_REG(type,off) (off) +#endif #define PLD_INT SYSPLD_REG(u32, 0x000000) #define PLD_INT_PENIRQ (1 << 5) diff --git a/trunk/arch/arm/mach-clps711x/p720t.c b/trunk/arch/arm/mach-clps711x/p720t.c index dd8995027dd4..b752b586fc2f 100644 --- a/trunk/arch/arm/mach-clps711x/p720t.c +++ b/trunk/arch/arm/mach-clps711x/p720t.c @@ -36,19 +36,27 @@ #include #include +#include + #include "common.h" /* - * Map the P720T system PLD. It occupies two address spaces: - * 0x10000000 and 0x10400000. We map both regions as one. + * Map the P720T system PLD. It occupies two address spaces: + * SYSPLD_PHYS_BASE and SYSPLD_PHYS_BASE + 0x00400000 + * We map both here. */ static struct map_desc p720t_io_desc[] __initdata = { { .virtual = SYSPLD_VIRT_BASE, .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE), - .length = SZ_8M, - .type = MT_DEVICE, - }, + .length = SZ_1M, + .type = MT_DEVICE + }, { + .virtual = 0xfe400000, + .pfn = __phys_to_pfn(0x10400000), + .length = SZ_1M, + .type = MT_DEVICE + } }; static void __init diff --git a/trunk/arch/arm/mach-davinci/board-dm355-evm.c b/trunk/arch/arm/mach-davinci/board-dm355-evm.c index cdf8d0746e79..88ebea89abdf 100644 --- a/trunk/arch/arm/mach-davinci/board-dm355-evm.c +++ b/trunk/arch/arm/mach-davinci/board-dm355-evm.c @@ -324,7 +324,7 @@ static __init void dm355_evm_init(void) if (IS_ERR(aemif)) WARN("%s: unable to get AEMIF clock\n", __func__); else - clk_prepare_enable(aemif); + clk_enable(aemif); platform_add_devices(davinci_evm_devices, ARRAY_SIZE(davinci_evm_devices)); diff --git a/trunk/arch/arm/mach-davinci/board-dm355-leopard.c b/trunk/arch/arm/mach-davinci/board-dm355-leopard.c index d41954507fc2..2f88103c6459 100644 --- a/trunk/arch/arm/mach-davinci/board-dm355-leopard.c +++ b/trunk/arch/arm/mach-davinci/board-dm355-leopard.c @@ -246,7 +246,7 @@ static __init void dm355_leopard_init(void) if (IS_ERR(aemif)) WARN("%s: unable to get AEMIF clock\n", __func__); else - clk_prepare_enable(aemif); + clk_enable(aemif); platform_add_devices(davinci_leopard_devices, ARRAY_SIZE(davinci_leopard_devices)); diff --git a/trunk/arch/arm/mach-davinci/board-dm365-evm.c b/trunk/arch/arm/mach-davinci/board-dm365-evm.c index 5d49c75388ca..1b4a8adcfdc9 100644 --- a/trunk/arch/arm/mach-davinci/board-dm365-evm.c +++ b/trunk/arch/arm/mach-davinci/board-dm365-evm.c @@ -478,7 +478,7 @@ static void __init evm_init_cpld(void) aemif_clk = clk_get(NULL, "aemif"); if (IS_ERR(aemif_clk)) return; - clk_prepare_enable(aemif_clk); + clk_enable(aemif_clk); if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE, "cpld") == NULL) @@ -489,7 +489,7 @@ static void __init evm_init_cpld(void) SECTION_SIZE); fail: pr_err("ERROR: can't map CPLD\n"); - clk_disable_unprepare(aemif_clk); + clk_disable(aemif_clk); return; } diff --git a/trunk/arch/arm/mach-davinci/board-dm644x-evm.c b/trunk/arch/arm/mach-davinci/board-dm644x-evm.c index a84dfcbc1154..f22572cee49d 100644 --- a/trunk/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/trunk/arch/arm/mach-davinci/board-dm644x-evm.c @@ -776,7 +776,7 @@ static __init void davinci_evm_init(void) struct davinci_soc_info *soc_info = &davinci_soc_info; aemif_clk = clk_get(NULL, "aemif"); - clk_prepare_enable(aemif_clk); + clk_enable(aemif_clk); if (HAS_ATA) { if (HAS_NAND || HAS_NOR) diff --git a/trunk/arch/arm/mach-davinci/board-neuros-osd2.c b/trunk/arch/arm/mach-davinci/board-neuros-osd2.c index 3e3e3afebf88..144bf31d68dd 100644 --- a/trunk/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/trunk/arch/arm/mach-davinci/board-neuros-osd2.c @@ -188,7 +188,7 @@ static __init void davinci_ntosd2_init(void) struct davinci_soc_info *soc_info = &davinci_soc_info; aemif_clk = clk_get(NULL, "aemif"); - clk_prepare_enable(aemif_clk); + clk_enable(aemif_clk); if (HAS_ATA) { if (HAS_NAND) diff --git a/trunk/arch/arm/mach-davinci/da850.c b/trunk/arch/arm/mach-davinci/da850.c index 68c5fe01857c..b90c172d5541 100644 --- a/trunk/arch/arm/mach-davinci/da850.c +++ b/trunk/arch/arm/mach-davinci/da850.c @@ -212,12 +212,6 @@ static struct clk tptc2_clk = { .flags = ALWAYS_ENABLED, }; -static struct clk pruss_clk = { - .name = "pruss", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_PRUSS, -}; - static struct clk uart0_clk = { .name = "uart0", .parent = &pll0_sysclk2, @@ -391,7 +385,6 @@ static struct clk_lookup da850_clks[] = { CLK(NULL, "tptc1", &tptc1_clk), CLK(NULL, "tpcc1", &tpcc1_clk), CLK(NULL, "tptc2", &tptc2_clk), - CLK("pruss_uio", "pruss", &pruss_clk), CLK(NULL, "uart0", &uart0_clk), CLK(NULL, "uart1", &uart1_clk), CLK(NULL, "uart2", &uart2_clk), @@ -788,6 +781,12 @@ static struct map_desc da850_io_desc[] = { .length = DA8XX_CP_INTC_SIZE, .type = MT_DEVICE }, + { + .virtual = SRAM_VIRT, + .pfn = __phys_to_pfn(DA8XX_ARM_RAM_BASE), + .length = SZ_8K, + .type = MT_DEVICE + }, }; static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE }; @@ -1240,8 +1239,8 @@ static struct davinci_soc_info davinci_soc_info_da850 = { .gpio_irq = IRQ_DA8XX_GPIO0, .serial_dev = &da8xx_serial_device, .emac_pdata = &da8xx_emac_pdata, - .sram_dma = DA8XX_SHARED_RAM_BASE, - .sram_len = SZ_128K, + .sram_dma = DA8XX_ARM_RAM_BASE, + .sram_len = SZ_8K, }; void __init da850_init(void) diff --git a/trunk/arch/arm/mach-davinci/devices-da8xx.c b/trunk/arch/arm/mach-davinci/devices-da8xx.c index 46c9a0c09ae5..bd2f72b414bc 100644 --- a/trunk/arch/arm/mach-davinci/devices-da8xx.c +++ b/trunk/arch/arm/mach-davinci/devices-da8xx.c @@ -22,7 +22,6 @@ #include #include #include -#include #include "clock.h" #include "asp.h" @@ -33,7 +32,6 @@ #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ #define DA8XX_I2C0_BASE 0x01c22000 #define DA8XX_RTC_BASE 0x01c23000 -#define DA8XX_PRUSS_MEM_BASE 0x01c30000 #define DA8XX_MMCSD0_BASE 0x01c40000 #define DA8XX_SPI0_BASE 0x01c41000 #define DA830_SPI1_BASE 0x01e12000 @@ -520,75 +518,6 @@ void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) } } -static struct resource da8xx_pruss_resources[] = { - { - .start = DA8XX_PRUSS_MEM_BASE, - .end = DA8XX_PRUSS_MEM_BASE + 0xFFFF, - .flags = IORESOURCE_MEM, - }, - { - .start = IRQ_DA8XX_EVTOUT0, - .end = IRQ_DA8XX_EVTOUT0, - .flags = IORESOURCE_IRQ, - }, - { - .start = IRQ_DA8XX_EVTOUT1, - .end = IRQ_DA8XX_EVTOUT1, - .flags = IORESOURCE_IRQ, - }, - { - .start = IRQ_DA8XX_EVTOUT2, - .end = IRQ_DA8XX_EVTOUT2, - .flags = IORESOURCE_IRQ, - }, - { - .start = IRQ_DA8XX_EVTOUT3, - .end = IRQ_DA8XX_EVTOUT3, - .flags = IORESOURCE_IRQ, - }, - { - .start = IRQ_DA8XX_EVTOUT4, - .end = IRQ_DA8XX_EVTOUT4, - .flags = IORESOURCE_IRQ, - }, - { - .start = IRQ_DA8XX_EVTOUT5, - .end = IRQ_DA8XX_EVTOUT5, - .flags = IORESOURCE_IRQ, - }, - { - .start = IRQ_DA8XX_EVTOUT6, - .end = IRQ_DA8XX_EVTOUT6, - .flags = IORESOURCE_IRQ, - }, - { - .start = IRQ_DA8XX_EVTOUT7, - .end = IRQ_DA8XX_EVTOUT7, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct uio_pruss_pdata da8xx_uio_pruss_pdata = { - .pintc_base = 0x4000, -}; - -static struct platform_device da8xx_uio_pruss_dev = { - .name = "pruss_uio", - .id = -1, - .num_resources = ARRAY_SIZE(da8xx_pruss_resources), - .resource = da8xx_pruss_resources, - .dev = { - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &da8xx_uio_pruss_pdata, - } -}; - -int __init da8xx_register_uio_pruss(void) -{ - da8xx_uio_pruss_pdata.sram_pool = sram_get_gen_pool(); - return platform_device_register(&da8xx_uio_pruss_dev); -} - static const struct display_panel disp_panel = { QVGA, 16, @@ -971,7 +900,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr) if (IS_ERR(da850_sata_clk)) return PTR_ERR(da850_sata_clk); - ret = clk_prepare_enable(da850_sata_clk); + ret = clk_enable(da850_sata_clk); if (ret) goto err0; @@ -1002,7 +931,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr) return 0; err1: - clk_disable_unprepare(da850_sata_clk); + clk_disable(da850_sata_clk); err0: clk_put(da850_sata_clk); return ret; @@ -1010,7 +939,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr) static void da850_sata_exit(struct device *dev) { - clk_disable_unprepare(da850_sata_clk); + clk_disable(da850_sata_clk); clk_put(da850_sata_clk); } diff --git a/trunk/arch/arm/mach-davinci/dm355.c b/trunk/arch/arm/mach-davinci/dm355.c index b49c3b77d55e..a255434908db 100644 --- a/trunk/arch/arm/mach-davinci/dm355.c +++ b/trunk/arch/arm/mach-davinci/dm355.c @@ -758,6 +758,12 @@ static struct map_desc dm355_io_desc[] = { .length = IO_SIZE, .type = MT_DEVICE }, + { + .virtual = SRAM_VIRT, + .pfn = __phys_to_pfn(0x00010000), + .length = SZ_32K, + .type = MT_MEMORY_NONCACHED, + }, }; /* Contents of JTAG ID register used to identify exact cpu type */ diff --git a/trunk/arch/arm/mach-davinci/dm365.c b/trunk/arch/arm/mach-davinci/dm365.c index 6c3980540be0..b680c832e0ba 100644 --- a/trunk/arch/arm/mach-davinci/dm365.c +++ b/trunk/arch/arm/mach-davinci/dm365.c @@ -985,6 +985,12 @@ static struct map_desc dm365_io_desc[] = { .length = IO_SIZE, .type = MT_DEVICE }, + { + .virtual = SRAM_VIRT, + .pfn = __phys_to_pfn(0x00010000), + .length = SZ_32K, + .type = MT_MEMORY_NONCACHED, + }, }; static struct resource dm365_ks_resources[] = { diff --git a/trunk/arch/arm/mach-davinci/dm644x.c b/trunk/arch/arm/mach-davinci/dm644x.c index 9ab1f105cf00..cd0c8b1e1ecf 100644 --- a/trunk/arch/arm/mach-davinci/dm644x.c +++ b/trunk/arch/arm/mach-davinci/dm644x.c @@ -786,6 +786,12 @@ static struct map_desc dm644x_io_desc[] = { .length = IO_SIZE, .type = MT_DEVICE }, + { + .virtual = SRAM_VIRT, + .pfn = __phys_to_pfn(0x00008000), + .length = SZ_16K, + .type = MT_MEMORY_NONCACHED, + }, }; /* Contents of JTAG ID register used to identify exact cpu type */ diff --git a/trunk/arch/arm/mach-davinci/dm646x.c b/trunk/arch/arm/mach-davinci/dm646x.c index ac7b431c4c8e..97c0f8e555bd 100644 --- a/trunk/arch/arm/mach-davinci/dm646x.c +++ b/trunk/arch/arm/mach-davinci/dm646x.c @@ -756,6 +756,12 @@ static struct map_desc dm646x_io_desc[] = { .length = IO_SIZE, .type = MT_DEVICE }, + { + .virtual = SRAM_VIRT, + .pfn = __phys_to_pfn(0x00010000), + .length = SZ_32K, + .type = MT_MEMORY_NONCACHED, + }, }; /* Contents of JTAG ID register used to identify exact cpu type */ diff --git a/trunk/arch/arm/mach-davinci/include/mach/common.h b/trunk/arch/arm/mach-davinci/include/mach/common.h index 046c7238a3d6..bdc4aa8e672a 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/common.h +++ b/trunk/arch/arm/mach-davinci/include/mach/common.h @@ -104,6 +104,8 @@ int davinci_pm_init(void); static inline int davinci_pm_init(void) { return 0; } #endif +/* standard place to map on-chip SRAMs; they *may* support DMA */ +#define SRAM_VIRT 0xfffe0000 #define SRAM_SIZE SZ_128K #endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */ diff --git a/trunk/arch/arm/mach-davinci/include/mach/da8xx.h b/trunk/arch/arm/mach-davinci/include/mach/da8xx.h index 700d311c6854..aaccdc4528fc 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/trunk/arch/arm/mach-davinci/include/mach/da8xx.h @@ -26,7 +26,6 @@ #include #include #include -#include #include @@ -73,7 +72,6 @@ extern unsigned int da850_max_speed; #define DA8XX_AEMIF_CS2_BASE 0x60000000 #define DA8XX_AEMIF_CS3_BASE 0x62000000 #define DA8XX_AEMIF_CTL_BASE 0x68000000 -#define DA8XX_SHARED_RAM_BASE 0x80000000 #define DA8XX_ARM_RAM_BASE 0xffff0000 void __init da830_init(void); @@ -88,7 +86,6 @@ int da8xx_register_watchdog(void); int da8xx_register_usb20(unsigned mA, unsigned potpgt); int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); int da8xx_register_emac(void); -int da8xx_register_uio_pruss(void); int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); int da8xx_register_mmcsd0(struct davinci_mmc_config *config); int da850_register_mmcsd1(struct davinci_mmc_config *config); diff --git a/trunk/arch/arm/mach-davinci/include/mach/serial.h b/trunk/arch/arm/mach-davinci/include/mach/serial.h index 2d9d921e8b01..46b3cd11c3c2 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/serial.h +++ b/trunk/arch/arm/mach-davinci/include/mach/serial.h @@ -43,7 +43,6 @@ struct davinci_uart_config { }; extern int davinci_serial_init(struct davinci_uart_config *); -extern int davinci_serial_setup_clk(unsigned instance, unsigned int *rate); #endif #endif /* __ASM_ARCH_SERIAL_H */ diff --git a/trunk/arch/arm/mach-davinci/include/mach/sram.h b/trunk/arch/arm/mach-davinci/include/mach/sram.h index 4e5db56218b8..111f7cc71e07 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/sram.h +++ b/trunk/arch/arm/mach-davinci/include/mach/sram.h @@ -24,7 +24,4 @@ extern void *sram_alloc(size_t len, dma_addr_t *dma); extern void sram_free(void *addr, size_t len); -/* Get the struct gen_pool * for use in platform data */ -extern struct gen_pool *sram_get_gen_pool(void); - #endif /* __MACH_SRAM_H */ diff --git a/trunk/arch/arm/mach-davinci/serial.c b/trunk/arch/arm/mach-davinci/serial.c index f2625814c3c9..1875740fe27c 100644 --- a/trunk/arch/arm/mach-davinci/serial.c +++ b/trunk/arch/arm/mach-davinci/serial.c @@ -70,33 +70,11 @@ static void __init davinci_serial_reset(struct plat_serial8250_port *p) UART_DM646X_SCR_TX_WATERMARK); } -/* Enable UART clock and obtain its rate */ -int __init davinci_serial_setup_clk(unsigned instance, unsigned int *rate) -{ - char name[16]; - struct clk *clk; - struct davinci_soc_info *soc_info = &davinci_soc_info; - struct device *dev = &soc_info->serial_dev->dev; - - sprintf(name, "uart%d", instance); - clk = clk_get(dev, name); - if (IS_ERR(clk)) { - pr_err("%s:%d: failed to get UART%d clock\n", - __func__, __LINE__, instance); - return PTR_ERR(clk); - } - - clk_prepare_enable(clk); - - if (rate) - *rate = clk_get_rate(clk); - - return 0; -} - int __init davinci_serial_init(struct davinci_uart_config *info) { - int i, ret; + int i; + char name[16]; + struct clk *uart_clk; struct davinci_soc_info *soc_info = &davinci_soc_info; struct device *dev = &soc_info->serial_dev->dev; struct plat_serial8250_port *p = dev->platform_data; @@ -109,9 +87,16 @@ int __init davinci_serial_init(struct davinci_uart_config *info) if (!(info->enabled_uarts & (1 << i))) continue; - ret = davinci_serial_setup_clk(i, &p->uartclk); - if (ret) + sprintf(name, "uart%d", i); + uart_clk = clk_get(dev, name); + if (IS_ERR(uart_clk)) { + printk(KERN_ERR "%s:%d: failed to get UART%d clock\n", + __func__, __LINE__, i); continue; + } + + clk_enable(uart_clk); + p->uartclk = clk_get_rate(uart_clk); if (!p->membase && p->mapbase) { p->membase = ioremap(p->mapbase, SZ_4K); diff --git a/trunk/arch/arm/mach-davinci/sram.c b/trunk/arch/arm/mach-davinci/sram.c index c5f7ee5cc80a..db0f7787faf1 100644 --- a/trunk/arch/arm/mach-davinci/sram.c +++ b/trunk/arch/arm/mach-davinci/sram.c @@ -10,7 +10,6 @@ */ #include #include -#include #include #include @@ -18,11 +17,6 @@ static struct gen_pool *sram_pool; -struct gen_pool *sram_get_gen_pool(void) -{ - return sram_pool; -} - void *sram_alloc(size_t len, dma_addr_t *dma) { unsigned long vaddr; @@ -38,7 +32,7 @@ void *sram_alloc(size_t len, dma_addr_t *dma) return NULL; if (dma) - *dma = gen_pool_virt_to_phys(sram_pool, vaddr); + *dma = dma_base + (vaddr - SRAM_VIRT); return (void *)vaddr; } @@ -59,10 +53,8 @@ EXPORT_SYMBOL(sram_free); */ static int __init sram_init(void) { - phys_addr_t phys = davinci_soc_info.sram_dma; unsigned len = davinci_soc_info.sram_len; int status = 0; - void *addr; if (len) { len = min_t(unsigned, len, SRAM_SIZE); @@ -70,17 +62,8 @@ static int __init sram_init(void) if (!sram_pool) status = -ENOMEM; } - - if (sram_pool) { - addr = ioremap(phys, len); - if (!addr) - return -ENOMEM; - status = gen_pool_add_virt(sram_pool, (unsigned)addr, - phys, len, -1); - if (status < 0) - iounmap(addr); - } - + if (sram_pool) + status = gen_pool_add(sram_pool, SRAM_VIRT, len, -1); WARN_ON(status < 0); return status; } diff --git a/trunk/arch/arm/mach-davinci/time.c b/trunk/arch/arm/mach-davinci/time.c index 9847938785ca..75da315b6587 100644 --- a/trunk/arch/arm/mach-davinci/time.c +++ b/trunk/arch/arm/mach-davinci/time.c @@ -379,7 +379,7 @@ static void __init davinci_timer_init(void) timer_clk = clk_get(NULL, "timer0"); BUG_ON(IS_ERR(timer_clk)); - clk_prepare_enable(timer_clk); + clk_enable(timer_clk); /* init timer hw */ timer_init(); @@ -429,7 +429,7 @@ void davinci_watchdog_reset(struct platform_device *pdev) wd_clk = clk_get(&pdev->dev, NULL); if (WARN_ON(IS_ERR(wd_clk))) return; - clk_prepare_enable(wd_clk); + clk_enable(wd_clk); /* disable, internal clock source */ __raw_writel(0, base + TCR); diff --git a/trunk/arch/arm/mach-highbank/Kconfig b/trunk/arch/arm/mach-highbank/Kconfig index 551c97e87a78..0e1d0a42a3ea 100644 --- a/trunk/arch/arm/mach-highbank/Kconfig +++ b/trunk/arch/arm/mach-highbank/Kconfig @@ -1,5 +1,5 @@ config ARCH_HIGHBANK - bool "Calxeda ECX-1000/2000 (Highbank/Midway)" if ARCH_MULTI_V7 + bool "Calxeda ECX-1000 (Highbank)" if ARCH_MULTI_V7 select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_AMBA select ARM_GIC diff --git a/trunk/arch/arm/mach-highbank/core.h b/trunk/arch/arm/mach-highbank/core.h index 068c68795c8c..286ec82a4f63 100644 --- a/trunk/arch/arm/mach-highbank/core.h +++ b/trunk/arch/arm/mach-highbank/core.h @@ -1,6 +1,3 @@ -#ifndef __HIGHBANK_CORE_H -#define __HIGHBANK_CORE_H - extern void highbank_set_cpu_jump(int cpu, void *jump_addr); extern void highbank_clocks_init(void); extern void highbank_restart(char, const char *); @@ -21,5 +18,3 @@ extern void highbank_smc1(int fn, int arg); extern void highbank_cpu_die(unsigned int cpu); extern struct smp_operations highbank_smp_ops; - -#endif diff --git a/trunk/arch/arm/mach-highbank/highbank.c b/trunk/arch/arm/mach-highbank/highbank.c index 3e60e5744157..40e36a50304c 100644 --- a/trunk/arch/arm/mach-highbank/highbank.c +++ b/trunk/arch/arm/mach-highbank/highbank.c @@ -26,22 +26,32 @@ #include #include -#include #include #include +#include #include #include #include #include #include #include +#include #include #include "core.h" #include "sysregs.h" void __iomem *sregs_base; -void __iomem *scu_base_addr; + +#define HB_SCU_VIRT_BASE 0xfee00000 +void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE)); + +static struct map_desc scu_io_desc __initdata = { + .virtual = HB_SCU_VIRT_BASE, + .pfn = 0, /* run-time */ + .length = SZ_4K, + .type = MT_DEVICE, +}; static void __init highbank_scu_map_io(void) { @@ -50,11 +60,13 @@ static void __init highbank_scu_map_io(void) /* Get SCU base */ asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); - scu_base_addr = ioremap(base, SZ_4K); + scu_io_desc.pfn = __phys_to_pfn(base); + iotable_init(&scu_io_desc, 1); } static void __init highbank_map_io(void) { + highbank_scu_map_io(); highbank_lluart_map_io(); } @@ -71,7 +83,6 @@ void highbank_set_cpu_jump(int cpu, void *jump_addr) } const static struct of_device_id irq_match[] = { - { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, }, { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, {} }; @@ -88,9 +99,6 @@ static void __init highbank_init_irq(void) { of_irq_init(irq_match); - if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) - highbank_scu_map_io(); - #ifdef CONFIG_CACHE_L2X0 /* Enable PL310 L2 Cache controller */ highbank_smc1(0x102, 0x1); @@ -128,9 +136,6 @@ static void __init highbank_timer_init(void) sp804_clockevents_init(timer_base, irq, "timer0"); twd_local_timer_of_register(); - - arch_timer_of_register(); - arch_timer_sched_clock_init(); } static struct sys_timer highbank_timer = { @@ -140,6 +145,7 @@ static struct sys_timer highbank_timer = { static void highbank_power_off(void) { hignbank_set_pwr_shutdown(); + scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); while (1) cpu_do_idle(); @@ -205,7 +211,6 @@ static void __init highbank_init(void) static const char *highbank_match[] __initconst = { "calxeda,highbank", - "calxeda,ecx-2000", NULL, }; diff --git a/trunk/arch/arm/mach-highbank/hotplug.c b/trunk/arch/arm/mach-highbank/hotplug.c index 7b60faccd551..2c1b8c3c8e45 100644 --- a/trunk/arch/arm/mach-highbank/hotplug.c +++ b/trunk/arch/arm/mach-highbank/hotplug.c @@ -14,11 +14,13 @@ * this program. If not, see . */ #include +#include +#include +#include #include #include "core.h" -#include "sysregs.h" extern void secondary_startup(void); @@ -31,7 +33,7 @@ void __ref highbank_cpu_die(unsigned int cpu) flush_cache_all(); highbank_set_cpu_jump(cpu, secondary_startup); - highbank_set_core_pwr(); + scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); cpu_do_idle(); diff --git a/trunk/arch/arm/mach-highbank/platsmp.c b/trunk/arch/arm/mach-highbank/platsmp.c index 1129957f6c1d..fa9560ec6e70 100644 --- a/trunk/arch/arm/mach-highbank/platsmp.c +++ b/trunk/arch/arm/mach-highbank/platsmp.c @@ -42,7 +42,9 @@ static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struc */ static void __init highbank_smp_init_cpus(void) { - unsigned int i, ncores = 4; + unsigned int i, ncores; + + ncores = scu_get_core_count(scu_base_addr); /* sanity check */ if (ncores > NR_CPUS) { @@ -63,8 +65,7 @@ static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) { int i; - if (scu_base_addr) - scu_enable(scu_base_addr); + scu_enable(scu_base_addr); /* * Write the address of secondary startup into the jump table diff --git a/trunk/arch/arm/mach-highbank/pm.c b/trunk/arch/arm/mach-highbank/pm.c index 74aa135966f0..de866f21331f 100644 --- a/trunk/arch/arm/mach-highbank/pm.c +++ b/trunk/arch/arm/mach-highbank/pm.c @@ -19,6 +19,7 @@ #include #include +#include #include #include "core.h" @@ -34,6 +35,8 @@ static int highbank_pm_enter(suspend_state_t state) { hignbank_set_pwr_suspend(); highbank_set_cpu_jump(0, cpu_resume); + + scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); cpu_suspend(0, highbank_suspend_finish); return 0; diff --git a/trunk/arch/arm/mach-highbank/sysregs.h b/trunk/arch/arm/mach-highbank/sysregs.h index e13e8ea7c6cb..0e913389f445 100644 --- a/trunk/arch/arm/mach-highbank/sysregs.h +++ b/trunk/arch/arm/mach-highbank/sysregs.h @@ -17,10 +17,6 @@ #define _MACH_HIGHBANK__SYSREGS_H_ #include -#include -#include -#include -#include "core.h" extern void __iomem *sregs_base; @@ -33,39 +29,24 @@ extern void __iomem *sregs_base; #define HB_PWR_HARD_RESET 2 #define HB_PWR_SHUTDOWN 3 -#define SREG_CPU_PWR_CTRL(c) (0x200 + ((c) * 4)) - -static inline void highbank_set_core_pwr(void) -{ - int cpu = cpu_logical_map(smp_processor_id()); - if (scu_base_addr) - scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); - else - writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu)); -} - static inline void hignbank_set_pwr_suspend(void) { writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); - highbank_set_core_pwr(); } static inline void hignbank_set_pwr_shutdown(void) { writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ); - highbank_set_core_pwr(); } static inline void hignbank_set_pwr_soft_reset(void) { writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ); - highbank_set_core_pwr(); } static inline void hignbank_set_pwr_hard_reset(void) { writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ); - highbank_set_core_pwr(); } #endif diff --git a/trunk/arch/arm/mach-highbank/system.c b/trunk/arch/arm/mach-highbank/system.c index 194a5bbb7363..82c27230d4a9 100644 --- a/trunk/arch/arm/mach-highbank/system.c +++ b/trunk/arch/arm/mach-highbank/system.c @@ -14,6 +14,7 @@ * this program. If not, see . */ #include +#include #include #include "core.h" @@ -26,6 +27,7 @@ void highbank_restart(char mode, const char *cmd) else hignbank_set_pwr_soft_reset(); + scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); cpu_do_idle(); } diff --git a/trunk/arch/arm/mach-imx/Kconfig b/trunk/arch/arm/mach-imx/Kconfig index 4e24b8c77eb4..8d276584650e 100644 --- a/trunk/arch/arm/mach-imx/Kconfig +++ b/trunk/arch/arm/mach-imx/Kconfig @@ -1,70 +1,3 @@ -config ARCH_MXC - bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 - select ARCH_REQUIRE_GPIOLIB - select ARM_PATCH_PHYS_VIRT - select AUTO_ZRELADDR if !ZBOOT_ROM - select CLKDEV_LOOKUP - select CLKSRC_MMIO - select GENERIC_CLOCKEVENTS - select GENERIC_IRQ_CHIP - select MULTI_IRQ_HANDLER - select SPARSE_IRQ - select USE_OF - help - Support for Freescale MXC/iMX-based family of processors - -menu "Freescale i.MX support" - depends on ARCH_MXC - -config MXC_IRQ_PRIOR - bool "Use IRQ priority" - help - Select this if you want to use prioritized IRQ handling. - This feature prevents higher priority ISR to be interrupted - by lower priority IRQ even IRQF_DISABLED flag is not set. - This may be useful in embedded applications, where are strong - requirements for timing. - Say N here, unless you have a specialized requirement. - -config MXC_TZIC - bool - -config MXC_AVIC - bool - -config MXC_DEBUG_BOARD - bool "Enable MXC debug board(for 3-stack)" - help - The debug board is an integral part of the MXC 3-stack(PDK) - platforms, it can be attached or removed from the peripheral - board. On debug board, several debug devices(ethernet, UART, - buttons, LEDs and JTAG) are implemented. Between the MCU and - these devices, a CPLD is added as a bridge which performs - data/address de-multiplexing and decode, signal level shift, - interrupt control and various board functions. - -config HAVE_EPIT - bool - -config MXC_USE_EPIT - bool "Use EPIT instead of GPT" - depends on HAVE_EPIT - help - Use EPIT as the system timer on systems that have it. Normally you - don't have a reason to do so as the EPIT has the same features and - uses the same clocks as the GPT. Anyway, on some systems the GPT - may be in use for other purposes. - -config MXC_ULPI - bool - -config ARCH_HAS_RNGA - bool - -config IRAM_ALLOC - bool - select GENERIC_ALLOCATOR - config HAVE_IMX_GPC bool @@ -72,12 +5,6 @@ config HAVE_IMX_MMDC bool config HAVE_IMX_SRC - def_bool y if SMP - -config IMX_HAVE_IOMUX_V1 - bool - -config ARCH_MXC_IOMUX_V3 bool config ARCH_MX1 @@ -177,7 +104,7 @@ config SOC_IMX51 select PINCTRL_IMX51 select SOC_IMX5 -if ARCH_MULTI_V4T +if ARCH_IMX_V4_V5 comment "MX1 platforms:" config MACH_MXLADS @@ -206,10 +133,6 @@ config MACH_APF9328 help Say Yes here if you are using the Armadeus APF9328 development board -endif - -if ARCH_MULTI_V5 - comment "MX21 platforms:" config MACH_MX21ADS @@ -394,7 +317,6 @@ config MACH_IMX27_VISSTRIM_M10 select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MX2_CAMERA - select IMX_HAVE_PLATFORM_MX2_EMMA select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_MMC select LEDS_GPIO_REGISTER @@ -462,7 +384,7 @@ config MACH_IMX27_DT endif -if ARCH_MULTI_V6 +if ARCH_IMX_V6_V7 comment "MX31 platforms:" @@ -727,10 +649,6 @@ config MACH_VPR200 Include support for VPR200 platform. This includes specific configurations for the board and its peripherals. -endif - -if ARCH_MULTI_V7 - comment "i.MX5 platforms:" config MACH_MX50_RDP @@ -821,7 +739,6 @@ config SOC_IMX53 select ARCH_MX5 select ARCH_MX53 select HAVE_CAN_FLEXCAN if CAN - select IMX_HAVE_PLATFORM_IMX2_WDT select PINCTRL select PINCTRL_IMX53 select SOC_IMX5 @@ -839,6 +756,7 @@ config SOC_IMX6Q select HAVE_CAN_FLEXCAN if CAN select HAVE_IMX_GPC select HAVE_IMX_MMDC + select HAVE_IMX_SRC select HAVE_SMP select MFD_SYSCON select PINCTRL @@ -848,7 +766,3 @@ config SOC_IMX6Q This enables support for Freescale i.MX6 Quad processor. endif - -source "arch/arm/mach-imx/devices/Kconfig" - -endmenu diff --git a/trunk/arch/arm/mach-imx/Makefile b/trunk/arch/arm/mach-imx/Makefile index fe47b71469c9..895754aeb4f3 100644 --- a/trunk/arch/arm/mach-imx/Makefile +++ b/trunk/arch/arm/mach-imx/Makefile @@ -1,5 +1,3 @@ -obj-y := time.o cpu.o system.o irq-common.o - obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o @@ -17,24 +15,6 @@ obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(i obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \ clk-pfd.o clk-busy.o clk.o -obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o -obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o - -obj-$(CONFIG_MXC_TZIC) += tzic.o -obj-$(CONFIG_MXC_AVIC) += avic.o - -obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o -obj-$(CONFIG_MXC_ULPI) += ulpi.o -obj-$(CONFIG_MXC_USE_EPIT) += epit.o -obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o -obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o -obj-$(CONFIG_CPU_IDLE) += cpuidle.o - -ifdef CONFIG_SND_IMX_SOC -obj-y += ssi-fiq.o -obj-y += ssi-fiq-ksym.o -endif - # Support for CMOS sensor interface obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o @@ -109,5 +89,3 @@ obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o obj-$(CONFIG_SOC_IMX53) += mach-imx53.o - -obj-y += devices/ diff --git a/trunk/arch/arm/mach-imx/clk-imx1.c b/trunk/arch/arm/mach-imx/clk-imx1.c index 15f9d223cf0b..516ddee1948e 100644 --- a/trunk/arch/arm/mach-imx/clk-imx1.c +++ b/trunk/arch/arm/mach-imx/clk-imx1.c @@ -22,9 +22,9 @@ #include #include +#include +#include #include "clk.h" -#include "common.h" -#include "hardware.h" /* CCM register addresses */ #define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off))) @@ -82,8 +82,7 @@ int __init mx1_clocks_init(unsigned long fref) pr_err("imx1 clk %d: register failed with %ld\n", i, PTR_ERR(clk[i])); - clk_register_clkdev(clk[dma_gate], "ahb", "imx1-dma"); - clk_register_clkdev(clk[hclk], "ipg", "imx1-dma"); + clk_register_clkdev(clk[dma_gate], "ahb", "imx-dma"); clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0"); clk_register_clkdev(clk[mma_gate], "mma", NULL); clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0"); @@ -95,18 +94,18 @@ int __init mx1_clocks_init(unsigned long fref) clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1"); clk_register_clkdev(clk[per1], "per", "imx1-uart.2"); clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2"); - clk_register_clkdev(clk[hclk], NULL, "imx1-i2c.0"); + clk_register_clkdev(clk[hclk], NULL, "imx-i2c.0"); clk_register_clkdev(clk[per2], "per", "imx1-cspi.0"); clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0"); clk_register_clkdev(clk[per2], "per", "imx1-cspi.1"); clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1"); clk_register_clkdev(clk[per2], NULL, "imx-mmc.0"); - clk_register_clkdev(clk[per2], "per", "imx1-fb.0"); - clk_register_clkdev(clk[dummy], "ipg", "imx1-fb.0"); - clk_register_clkdev(clk[dummy], "ahb", "imx1-fb.0"); + clk_register_clkdev(clk[per2], "per", "imx-fb.0"); + clk_register_clkdev(clk[dummy], "ipg", "imx-fb.0"); + clk_register_clkdev(clk[dummy], "ahb", "imx-fb.0"); clk_register_clkdev(clk[hclk], "mshc", NULL); clk_register_clkdev(clk[per3], "ssi", NULL); - clk_register_clkdev(clk[clk32], NULL, "imx1-rtc.0"); + clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0"); clk_register_clkdev(clk[clko], "clko", NULL); mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT); diff --git a/trunk/arch/arm/mach-imx/clk-imx21.c b/trunk/arch/arm/mach-imx/clk-imx21.c index d7ed66091a2a..cf65148bc519 100644 --- a/trunk/arch/arm/mach-imx/clk-imx21.c +++ b/trunk/arch/arm/mach-imx/clk-imx21.c @@ -25,9 +25,9 @@ #include #include +#include +#include #include "clk.h" -#include "common.h" -#include "hardware.h" #define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off))) @@ -156,16 +156,16 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href) clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx21-cspi.1"); clk_register_clkdev(clk[per2], "per", "imx21-cspi.2"); clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx21-cspi.2"); - clk_register_clkdev(clk[per3], "per", "imx21-fb.0"); - clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0"); - clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx21-fb.0"); + clk_register_clkdev(clk[per3], "per", "imx-fb.0"); + clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0"); + clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx-fb.0"); clk_register_clkdev(clk[usb_gate], "per", "imx21-hcd.0"); clk_register_clkdev(clk[usb_hclk_gate], "ahb", "imx21-hcd.0"); - clk_register_clkdev(clk[nfc_gate], NULL, "imx21-nand.0"); - clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx21-dma"); - clk_register_clkdev(clk[dma_gate], "ipg", "imx21-dma"); + clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand.0"); + clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx-dma"); + clk_register_clkdev(clk[dma_gate], "ipg", "imx-dma"); clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[i2c_gate], NULL, "imx21-i2c.0"); + clk_register_clkdev(clk[i2c_gate], NULL, "imx-i2c.0"); clk_register_clkdev(clk[kpp_gate], NULL, "mxc-keypad"); clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0"); clk_register_clkdev(clk[brom_gate], "brom", NULL); diff --git a/trunk/arch/arm/mach-imx/clk-imx25.c b/trunk/arch/arm/mach-imx/clk-imx25.c index bc885801cd68..01e2f843bf2e 100644 --- a/trunk/arch/arm/mach-imx/clk-imx25.c +++ b/trunk/arch/arm/mach-imx/clk-imx25.c @@ -24,10 +24,10 @@ #include #include +#include +#include +#include #include "clk.h" -#include "common.h" -#include "hardware.h" -#include "mx25.h" #define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR) @@ -197,7 +197,7 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc"); clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc"); clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc"); - clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0"); + clk_register_clkdev(clk[nfc_ipg_per], NULL, "mxc_nand.0"); /* i.mx25 has the i.mx35 type cspi */ clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0"); clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1"); @@ -212,15 +212,15 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[per10], "per", "mxc_pwm.3"); clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad"); clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc"); - clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.0"); - clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.1"); - clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.2"); + clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0"); + clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.1"); + clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.2"); clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0"); clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0"); clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0"); - clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx21-fb.0"); - clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx21-fb.0"); - clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx-fb.0"); + clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); + clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1"); @@ -230,9 +230,9 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1"); clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1"); clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1"); - clk_register_clkdev(clk[csi_ipg_per], "per", "imx25-camera.0"); - clk_register_clkdev(clk[csi_ipg], "ipg", "imx25-camera.0"); - clk_register_clkdev(clk[csi_ahb], "ahb", "imx25-camera.0"); + clk_register_clkdev(clk[csi_ipg_per], "per", "mx2-camera.0"); + clk_register_clkdev(clk[csi_ipg], "ipg", "mx2-camera.0"); + clk_register_clkdev(clk[csi_ahb], "ahb", "mx2-camera.0"); clk_register_clkdev(clk[dummy], "audmux", NULL); clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0"); clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1"); diff --git a/trunk/arch/arm/mach-imx/clk-imx27.c b/trunk/arch/arm/mach-imx/clk-imx27.c index 4c1d1e4efc74..366e5d59d886 100644 --- a/trunk/arch/arm/mach-imx/clk-imx27.c +++ b/trunk/arch/arm/mach-imx/clk-imx27.c @@ -6,9 +6,9 @@ #include #include +#include +#include #include "clk.h" -#include "common.h" -#include "hardware.h" #define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off))) @@ -51,10 +51,8 @@ static const char *vpu_sel_clks[] = { "spll", "mpll_main2", }; static const char *cpu_sel_clks[] = { "mpll_main2", "mpll", }; -static const char *mpll_sel_clks[] = { "fpm", "mpll_osc_sel", }; -static const char *mpll_osc_sel_clks[] = { "ckih", "ckih_div1p5", }; static const char *clko_sel_clks[] = { - "ckil", "fpm", "ckih", "ckih", + "ckil", "prem", "ckih", "ckih", "ckih", "mpll", "spll", "cpu_div", "ahb", "ipg", "per1_div", "per2_div", "per3_div", "per4_div", "ssi1_div", "ssi2_div", @@ -81,8 +79,7 @@ enum mx27_clks { vpu_ahb_gate, fec_ahb_gate, emma_ahb_gate, emi_ahb_gate, dma_ahb_gate, csi_ahb_gate, brom_ahb_gate, ata_ahb_gate, wdog_ipg_gate, usb_ipg_gate, uart6_ipg_gate, uart5_ipg_gate, uart4_ipg_gate, uart3_ipg_gate, - uart2_ipg_gate, uart1_ipg_gate, ckih_div1p5, fpm, mpll_osc_sel, - mpll_sel, clk_max + uart2_ipg_gate, uart1_ipg_gate, clk_max }; static struct clk *clk[clk_max]; @@ -94,15 +91,7 @@ int __init mx27_clocks_init(unsigned long fref) clk[dummy] = imx_clk_fixed("dummy", 0); clk[ckih] = imx_clk_fixed("ckih", fref); clk[ckil] = imx_clk_fixed("ckil", 32768); - clk[fpm] = imx_clk_fixed_factor("fpm", "ckil", 1024, 1); - clk[ckih_div1p5] = imx_clk_fixed_factor("ckih_div1p5", "ckih", 2, 3); - - clk[mpll_osc_sel] = imx_clk_mux("mpll_osc_sel", CCM_CSCR, 4, 1, - mpll_osc_sel_clks, - ARRAY_SIZE(mpll_osc_sel_clks)); - clk[mpll_sel] = imx_clk_mux("mpll_sel", CCM_CSCR, 16, 1, mpll_sel_clks, - ARRAY_SIZE(mpll_sel_clks)); - clk[mpll] = imx_clk_pllv1("mpll", "mpll_sel", CCM_MPCTL0); + clk[mpll] = imx_clk_pllv1("mpll", "ckih", CCM_MPCTL0); clk[spll] = imx_clk_pllv1("spll", "ckih", CCM_SPCTL0); clk[mpll_main2] = imx_clk_fixed_factor("mpll_main2", "mpll", 2, 3); @@ -222,20 +211,19 @@ int __init mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5"); clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5"); clk_register_clkdev(clk[pwm_ipg_gate], NULL, "mxc_pwm.0"); - clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.0"); - clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "imx21-mmc.0"); - clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.1"); - clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1"); - clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2"); - clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2"); + clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.0"); + clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "mxc-mmc.0"); + clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.1"); + clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.1"); + clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.2"); + clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.2"); clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0"); clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1"); clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2"); - clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0"); - clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0"); - clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0"); - clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0"); - clk_register_clkdev(clk[per4_gate], "per", "imx27-camera.0"); + clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0"); + clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0"); + clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0"); + clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0"); clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc"); clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc"); clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc"); @@ -250,27 +238,27 @@ int __init mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2"); clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); - clk_register_clkdev(clk[nfc_baud_gate], NULL, "imx27-nand.0"); + clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0"); clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0"); clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0"); - clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx27-dma"); - clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx27-dma"); + clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx-dma"); + clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx-dma"); clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0"); clk_register_clkdev(clk[fec_ahb_gate], "ahb", "imx27-fec.0"); clk_register_clkdev(clk[wdog_ipg_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx21-i2c.0"); - clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx21-i2c.1"); + clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx-i2c.0"); + clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1"); clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0"); clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad"); - clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "imx27-camera.0"); - clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0"); + clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0"); + clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0"); clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0"); clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0"); clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL); clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL); clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL); clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL); - clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc"); + clk_register_clkdev(clk[rtc_ipg_gate], NULL, "mxc_rtc"); clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL); clk_register_clkdev(clk[cpu_div], "cpu", NULL); clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL); diff --git a/trunk/arch/arm/mach-imx/clk-imx31.c b/trunk/arch/arm/mach-imx/clk-imx31.c index 8be64e0a4ace..1253af2d9971 100644 --- a/trunk/arch/arm/mach-imx/clk-imx31.c +++ b/trunk/arch/arm/mach-imx/clk-imx31.c @@ -22,11 +22,12 @@ #include #include +#include +#include +#include + #include "clk.h" -#include "common.h" #include "crmregs-imx3.h" -#include "hardware.h" -#include "mx31.h" static const char *mcu_main_sel[] = { "spll", "mpll", }; static const char *per_sel[] = { "per_div", "ipg", }; @@ -123,10 +124,10 @@ int __init mx31_clocks_init(unsigned long fref) clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2"); clk_register_clkdev(clk[pwm_gate], "pwm", NULL); clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[rtc_gate], NULL, "imx21-rtc"); + clk_register_clkdev(clk[rtc_gate], NULL, "mxc_rtc"); clk_register_clkdev(clk[epit1_gate], "epit", NULL); clk_register_clkdev(clk[epit2_gate], "epit", NULL); - clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0"); + clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0"); clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); @@ -154,12 +155,12 @@ int __init mx31_clocks_init(unsigned long fref) clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3"); clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4"); clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4"); - clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); - clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); - clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); + clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0"); + clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1"); + clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0"); - clk_register_clkdev(clk[sdhc1_gate], NULL, "imx31-mmc.0"); - clk_register_clkdev(clk[sdhc2_gate], NULL, "imx31-mmc.1"); + clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0"); + clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1"); clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1"); clk_register_clkdev(clk[firi_gate], "firi", NULL); diff --git a/trunk/arch/arm/mach-imx/clk-imx35.c b/trunk/arch/arm/mach-imx/clk-imx35.c index 66f3d65ea275..177259b523cd 100644 --- a/trunk/arch/arm/mach-imx/clk-imx35.c +++ b/trunk/arch/arm/mach-imx/clk-imx35.c @@ -14,10 +14,11 @@ #include #include +#include +#include + #include "crmregs-imx3.h" #include "clk.h" -#include "common.h" -#include "hardware.h" struct arm_ahb_div { unsigned char arm, ahb, sel; @@ -225,9 +226,9 @@ int __init mx35_clocks_init() clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0"); clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); - clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); - clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); - clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); + clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0"); + clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1"); + clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); @@ -255,7 +256,7 @@ int __init mx35_clocks_init() clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc"); clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc"); clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0"); + clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0"); clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); clk_prepare_enable(clk[spba_gate]); diff --git a/trunk/arch/arm/mach-imx/clk-imx51-imx53.c b/trunk/arch/arm/mach-imx/clk-imx51-imx53.c index 73b241db63c8..a0bf84803eac 100644 --- a/trunk/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/trunk/arch/arm/mach-imx/clk-imx51-imx53.c @@ -14,10 +14,11 @@ #include #include +#include +#include + #include "crm-regs-imx5.h" #include "clk.h" -#include "common.h" -#include "hardware.h" /* Low-power Audio Playback Mode clock */ static const char *lp_apm_sel[] = { "osc", }; @@ -257,8 +258,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx35-cspi.2"); clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0"); clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1"); - clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); - clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); + clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0"); + clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1"); clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.0"); clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.0"); clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.0"); @@ -271,7 +272,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc"); clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc"); clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc"); - clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand"); + clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand"); clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2"); @@ -305,10 +306,6 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk_prepare_enable(clk[spba]); clk_prepare_enable(clk[emi_fast_gate]); /* fec */ clk_prepare_enable(clk[emi_slow_gate]); /* eim */ - clk_prepare_enable(clk[mipi_hsc1_gate]); - clk_prepare_enable(clk[mipi_hsc2_gate]); - clk_prepare_enable(clk[mipi_esc_gate]); - clk_prepare_enable(clk[mipi_hsp_gate]); clk_prepare_enable(clk[tmax1]); clk_prepare_enable(clk[tmax2]); /* esdhc2, fec */ clk_prepare_enable(clk[tmax3]); /* esdhc1, esdhc4 */ @@ -348,13 +345,14 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); - clk_register_clkdev(clk[hsi2c_gate], NULL, "imx21-i2c.2"); + clk_register_clkdev(clk[hsi2c_gate], NULL, "imx-i2c.2"); clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL); clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0"); clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0"); - clk_register_clkdev(clk[ipu_gate], "bus", "40000000.ipu"); - clk_register_clkdev(clk[ipu_di0_gate], "di0", "40000000.ipu"); - clk_register_clkdev(clk[ipu_di1_gate], "di1", "40000000.ipu"); + clk_register_clkdev(clk[ipu_gate], "bus", "imx51-ipu"); + clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx51-ipu"); + clk_register_clkdev(clk[ipu_di1_gate], "di1", "imx51-ipu"); + clk_register_clkdev(clk[ipu_gate], "hsp", "imx51-ipu"); clk_register_clkdev(clk[usb_phy_gate], "phy", "mxc-ehci.0"); clk_register_clkdev(clk[esdhc1_ipg_gate], "ipg", "sdhci-esdhc-imx51.0"); clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.0"); @@ -442,12 +440,12 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0"); - clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); + clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0"); - clk_register_clkdev(clk[ipu_gate], "bus", "18000000.ipu"); - clk_register_clkdev(clk[ipu_di0_gate], "di0", "18000000.ipu"); - clk_register_clkdev(clk[ipu_di1_gate], "di1", "18000000.ipu"); - clk_register_clkdev(clk[ipu_gate], "hsp", "18000000.ipu"); + clk_register_clkdev(clk[ipu_gate], "bus", "imx53-ipu"); + clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx53-ipu"); + clk_register_clkdev(clk[ipu_di1_gate], "di1", "imx53-ipu"); + clk_register_clkdev(clk[ipu_gate], "hsp", "imx53-ipu"); clk_register_clkdev(clk[usb_phy1_gate], "usb_phy1", "mxc-ehci.0"); clk_register_clkdev(clk[esdhc1_ipg_gate], "ipg", "sdhci-esdhc-imx53.0"); clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.0"); @@ -469,7 +467,6 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk_register_clkdev(clk[can1_serial_gate], "per", "53fc8000.can"); clk_register_clkdev(clk[can2_ipg_gate], "ipg", "53fcc000.can"); clk_register_clkdev(clk[can2_serial_gate], "per", "53fcc000.can"); - clk_register_clkdev(clk[dummy], NULL, "53fa4000.rtc"); /* set SDHC root clock to 200MHZ*/ clk_set_rate(clk[esdhc_a_podf], 200000000); diff --git a/trunk/arch/arm/mach-imx/clk-imx6q.c b/trunk/arch/arm/mach-imx/clk-imx6q.c index a37756c22bb4..3ec242f3341e 100644 --- a/trunk/arch/arm/mach-imx/clk-imx6q.c +++ b/trunk/arch/arm/mach-imx/clk-imx6q.c @@ -19,9 +19,8 @@ #include #include #include - +#include #include "clk.h" -#include "common.h" #define CCGR0 0x68 #define CCGR1 0x6c @@ -105,7 +104,7 @@ static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m" static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", }; static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", }; static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", }; -static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_pfd1_540m", }; +static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", }; static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", }; static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", }; static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", }; diff --git a/trunk/arch/arm/mach-imx/clk-pllv1.c b/trunk/arch/arm/mach-imx/clk-pllv1.c index abff350ba24c..02be73178912 100644 --- a/trunk/arch/arm/mach-imx/clk-pllv1.c +++ b/trunk/arch/arm/mach-imx/clk-pllv1.c @@ -4,10 +4,10 @@ #include #include #include +#include +#include #include "clk.h" -#include "common.h" -#include "hardware.h" /** * pll v1 diff --git a/trunk/arch/arm/mach-imx/cpu-imx25.c b/trunk/arch/arm/mach-imx/cpu-imx25.c index 96ec64b5ff7d..6914bcbf84e4 100644 --- a/trunk/arch/arm/mach-imx/cpu-imx25.c +++ b/trunk/arch/arm/mach-imx/cpu-imx25.c @@ -11,9 +11,8 @@ */ #include #include - -#include "iim.h" -#include "hardware.h" +#include +#include static int mx25_cpu_rev = -1; diff --git a/trunk/arch/arm/mach-imx/cpu-imx27.c b/trunk/arch/arm/mach-imx/cpu-imx27.c index fe8d36f7e30e..ff38e1505f67 100644 --- a/trunk/arch/arm/mach-imx/cpu-imx27.c +++ b/trunk/arch/arm/mach-imx/cpu-imx27.c @@ -24,7 +24,7 @@ #include #include -#include "hardware.h" +#include static int mx27_cpu_rev = -1; static int mx27_cpu_partnumber; diff --git a/trunk/arch/arm/mach-imx/cpu-imx31.c b/trunk/arch/arm/mach-imx/cpu-imx31.c index fde1860a2521..3f2345f0cdaf 100644 --- a/trunk/arch/arm/mach-imx/cpu-imx31.c +++ b/trunk/arch/arm/mach-imx/cpu-imx31.c @@ -11,10 +11,9 @@ #include #include - -#include "common.h" -#include "hardware.h" -#include "iim.h" +#include +#include +#include static int mx31_cpu_rev = -1; diff --git a/trunk/arch/arm/mach-imx/cpu-imx35.c b/trunk/arch/arm/mach-imx/cpu-imx35.c index ec3aaa098c17..846e46eb8cbf 100644 --- a/trunk/arch/arm/mach-imx/cpu-imx35.c +++ b/trunk/arch/arm/mach-imx/cpu-imx35.c @@ -10,9 +10,8 @@ */ #include #include - -#include "hardware.h" -#include "iim.h" +#include +#include static int mx35_cpu_rev = -1; diff --git a/trunk/arch/arm/mach-imx/cpu-imx5.c b/trunk/arch/arm/mach-imx/cpu-imx5.c index d88760014ff9..8eb15a2fcaf9 100644 --- a/trunk/arch/arm/mach-imx/cpu-imx5.c +++ b/trunk/arch/arm/mach-imx/cpu-imx5.c @@ -15,10 +15,9 @@ #include #include #include +#include #include -#include "hardware.h" - static int mx5_cpu_rev = -1; #define IIM_SREV 0x24 diff --git a/trunk/arch/arm/mach-imx/cpu_op-mx51.c b/trunk/arch/arm/mach-imx/cpu_op-mx51.c index b9ef692b61a2..7b92cd6da6d3 100644 --- a/trunk/arch/arm/mach-imx/cpu_op-mx51.c +++ b/trunk/arch/arm/mach-imx/cpu_op-mx51.c @@ -13,10 +13,9 @@ #include #include +#include #include -#include "hardware.h" - static struct cpu_op mx51_cpu_op[] = { { .cpu_rate = 160000000,}, diff --git a/trunk/arch/arm/mach-imx/devices-imx1.h b/trunk/arch/arm/mach-imx/devices-imx1.h index f9b5afc6bcd1..3aad1e70de96 100644 --- a/trunk/arch/arm/mach-imx/devices-imx1.h +++ b/trunk/arch/arm/mach-imx/devices-imx1.h @@ -6,7 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include "devices/devices-common.h" +#include +#include extern const struct imx_imx_fb_data imx1_imx_fb_data; #define imx1_add_imx_fb(pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx21.h b/trunk/arch/arm/mach-imx/devices-imx21.h index bd9393280159..93ece55f75df 100644 --- a/trunk/arch/arm/mach-imx/devices-imx21.h +++ b/trunk/arch/arm/mach-imx/devices-imx21.h @@ -6,7 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include "devices/devices-common.h" +#include +#include extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data; #define imx21_add_imx21_hcd(pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx25.h b/trunk/arch/arm/mach-imx/devices-imx25.h index 0d2922bc575c..f8e03dd1f116 100644 --- a/trunk/arch/arm/mach-imx/devices-imx25.h +++ b/trunk/arch/arm/mach-imx/devices-imx25.h @@ -6,7 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include "devices/devices-common.h" +#include +#include extern const struct imx_fec_data imx25_fec_data; #define imx25_add_fec(pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx27.h b/trunk/arch/arm/mach-imx/devices-imx27.h index 130962519751..04822932cdd1 100644 --- a/trunk/arch/arm/mach-imx/devices-imx27.h +++ b/trunk/arch/arm/mach-imx/devices-imx27.h @@ -6,7 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include "devices/devices-common.h" +#include +#include extern const struct imx_fec_data imx27_fec_data; #define imx27_add_fec(pdata) \ @@ -53,10 +54,8 @@ extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[]; extern const struct imx_mx2_camera_data imx27_mx2_camera_data; #define imx27_add_mx2_camera(pdata) \ imx_add_mx2_camera(&imx27_mx2_camera_data, pdata) - -extern const struct imx_mx2_emma_data imx27_mx2_emmaprp_data; #define imx27_add_mx2_emmaprp() \ - imx_add_mx2_emmaprp(&imx27_mx2_emmaprp_data) + imx_add_mx2_emmaprp(&imx27_mx2_camera_data) extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data; #define imx27_add_mxc_ehci_otg(pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx31.h b/trunk/arch/arm/mach-imx/devices-imx31.h index e8d1611bbc8e..8b2ceb45bb83 100644 --- a/trunk/arch/arm/mach-imx/devices-imx31.h +++ b/trunk/arch/arm/mach-imx/devices-imx31.h @@ -6,7 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include "devices/devices-common.h" +#include +#include extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data; #define imx31_add_fsl_usb2_udc(pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx35.h b/trunk/arch/arm/mach-imx/devices-imx35.h index e2675f1b141c..c3e9f206ac2b 100644 --- a/trunk/arch/arm/mach-imx/devices-imx35.h +++ b/trunk/arch/arm/mach-imx/devices-imx35.h @@ -6,7 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include "devices/devices-common.h" +#include +#include extern const struct imx_fec_data imx35_fec_data; #define imx35_add_fec(pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx50.h b/trunk/arch/arm/mach-imx/devices-imx50.h index 2c290391f298..7216667eaafc 100644 --- a/trunk/arch/arm/mach-imx/devices-imx50.h +++ b/trunk/arch/arm/mach-imx/devices-imx50.h @@ -18,7 +18,8 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. */ -#include "devices/devices-common.h" +#include +#include extern const struct imx_imx_uart_1irq_data imx50_imx_uart_data[]; #define imx50_add_imx_uart(id, pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx51.h b/trunk/arch/arm/mach-imx/devices-imx51.h index deee5baee88c..9f1718725195 100644 --- a/trunk/arch/arm/mach-imx/devices-imx51.h +++ b/trunk/arch/arm/mach-imx/devices-imx51.h @@ -6,7 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include "devices/devices-common.h" +#include +#include extern const struct imx_fec_data imx51_fec_data; #define imx51_add_fec(pdata) \ diff --git a/trunk/arch/arm/mach-imx/ehci-imx25.c b/trunk/arch/arm/mach-imx/ehci-imx25.c index 27e40d17de99..412c583a24b0 100644 --- a/trunk/arch/arm/mach-imx/ehci-imx25.c +++ b/trunk/arch/arm/mach-imx/ehci-imx25.c @@ -15,9 +15,9 @@ #include #include -#include -#include "hardware.h" +#include +#include #define USBCTRL_OTGBASE_OFFSET 0x600 diff --git a/trunk/arch/arm/mach-imx/ehci-imx27.c b/trunk/arch/arm/mach-imx/ehci-imx27.c index 448d9115539d..cd6e1f81508d 100644 --- a/trunk/arch/arm/mach-imx/ehci-imx27.c +++ b/trunk/arch/arm/mach-imx/ehci-imx27.c @@ -15,9 +15,9 @@ #include #include -#include -#include "hardware.h" +#include +#include #define USBCTRL_OTGBASE_OFFSET 0x600 diff --git a/trunk/arch/arm/mach-imx/ehci-imx31.c b/trunk/arch/arm/mach-imx/ehci-imx31.c index 05de4e1e39d7..9a880c78af34 100644 --- a/trunk/arch/arm/mach-imx/ehci-imx31.c +++ b/trunk/arch/arm/mach-imx/ehci-imx31.c @@ -15,9 +15,9 @@ #include #include -#include -#include "hardware.h" +#include +#include #define USBCTRL_OTGBASE_OFFSET 0x600 diff --git a/trunk/arch/arm/mach-imx/ehci-imx35.c b/trunk/arch/arm/mach-imx/ehci-imx35.c index a596f709a937..779e16eb65cb 100644 --- a/trunk/arch/arm/mach-imx/ehci-imx35.c +++ b/trunk/arch/arm/mach-imx/ehci-imx35.c @@ -15,9 +15,9 @@ #include #include -#include -#include "hardware.h" +#include +#include #define USBCTRL_OTGBASE_OFFSET 0x600 diff --git a/trunk/arch/arm/mach-imx/ehci-imx5.c b/trunk/arch/arm/mach-imx/ehci-imx5.c index e49710b10c68..cf8d00e5cce1 100644 --- a/trunk/arch/arm/mach-imx/ehci-imx5.c +++ b/trunk/arch/arm/mach-imx/ehci-imx5.c @@ -15,9 +15,9 @@ #include #include -#include -#include "hardware.h" +#include +#include #define MXC_OTG_OFFSET 0 #define MXC_H1_OFFSET 0x200 diff --git a/trunk/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/trunk/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index b4c70028d359..98aef571b9f8 100644 --- a/trunk/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/trunk/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -29,10 +29,11 @@ #include -#include "common.h" +#include +#include +#include + #include "devices-imx27.h" -#include "hardware.h" -#include "iomux-mx27.h" static const int eukrea_mbimx27_pins[] __initconst = { /* UART2 */ diff --git a/trunk/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/trunk/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c index e2b70f4c1a2c..0b84666792f0 100644 --- a/trunk/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c +++ b/trunk/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c @@ -26,14 +26,14 @@ #include #include