From 9781e7926296d809bebeea830d6cd61d578ac3fb Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Mon, 30 Aug 2010 10:45:54 +0900 Subject: [PATCH] --- yaml --- r: 210794 b: refs/heads/master c: 0770e5280efd6f0001972a2b5127dffad0e22591 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/[refs] b/[refs] index ab135f8dc89b..938dcc6a278b 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: da01c2f733f5eaa1b0670e7b584f431934c60306 +refs/heads/master: 0770e5280efd6f0001972a2b5127dffad0e22591 diff --git a/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h index db4112c6f2be..1c6b92947c5d 100644 --- a/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -143,12 +143,12 @@ extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); /* Define values for the drvstr available for each gpio pin. * * These values control the value of the output signal driver strength, - * configurable on most pins on the S5C series. + * configurable on most pins on the S5P series. */ -#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x00) -#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x01) -#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x10) -#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x11) +#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x0) +#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x2) +#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x1) +#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x3) /** * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin