From 97a5f8bdcd2c5f1a7cb1da9ee7fa668ea5a91519 Mon Sep 17 00:00:00 2001 From: Kenji Kaneshige Date: Thu, 24 Nov 2005 11:39:29 +0900 Subject: [PATCH] --- yaml --- r: 17499 b: refs/heads/master c: f467f6187fc60c954a9509b3a3e17ef89a4f6f22 h: refs/heads/master i: 17497: abacbbfdb1929cf71820db37a72b492a2ace0c00 17495: 43e3aa912e2f6352084aba57530539b5eb5a49d4 v: v3 --- [refs] | 2 +- trunk/drivers/pci/hotplug/shpchp_hpc.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 032408922595..37d5f3832fcb 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0455986cce45d28511f59a29d6cecc17d6b65720 +refs/heads/master: f467f6187fc60c954a9509b3a3e17ef89a4f6f22 diff --git a/trunk/drivers/pci/hotplug/shpchp_hpc.c b/trunk/drivers/pci/hotplug/shpchp_hpc.c index d82987f075b2..f25e11645071 100644 --- a/trunk/drivers/pci/hotplug/shpchp_hpc.c +++ b/trunk/drivers/pci/hotplug/shpchp_hpc.c @@ -1058,11 +1058,11 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs) if (intr_loc & 0x0001) { /* * Command Complete Interrupt Pending - * RO only - clear by writing 0 to the Command Completion + * RO only - clear by writing 1 to the Command Completion * Detect bit in Controller SERR-INT register */ temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE); - temp_dword &= 0xfffeffff; + temp_dword &= 0xfffdffff; writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE); wake_up_interruptible(&ctrl->queue); }