From 97f6d222b5e8548fb2aae923010adb449c246a75 Mon Sep 17 00:00:00 2001
From: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Date: Tue, 29 Jun 2010 16:29:04 +0900
Subject: [PATCH] --- yaml --- r: 218931 b: refs/heads/master c:
 b97680c419b75b0c2cf6837a9f268e2ecbaf50f6 h: refs/heads/master i:   218929:
 32f69686602a6136bbd5afc38160a85eb2ad9ad7   218927:
 d6e61487dbc39ca5e69ca9c2364ca75602f0d877 v: v3

---
 [refs]                                | 2 +-
 trunk/arch/parisc/include/asm/cache.h | 2 --
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/[refs] b/[refs]
index b194f9d2331f..ca2de05e9a02 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 2da83b90bbbac586fca2735f7da21966a31ec33f
+refs/heads/master: b97680c419b75b0c2cf6837a9f268e2ecbaf50f6
diff --git a/trunk/arch/parisc/include/asm/cache.h b/trunk/arch/parisc/include/asm/cache.h
index 039880e7d2c9..47f11c707b65 100644
--- a/trunk/arch/parisc/include/asm/cache.h
+++ b/trunk/arch/parisc/include/asm/cache.h
@@ -24,8 +24,6 @@
 
 #ifndef __ASSEMBLY__
 
-#define L1_CACHE_ALIGN(x)       (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
-
 #define SMP_CACHE_BYTES L1_CACHE_BYTES
 
 #define ARCH_DMA_MINALIGN	L1_CACHE_BYTES