From 98a6a7cb9a7f63d854200efe69f6cd48d004823f Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Sat, 4 Oct 2008 12:45:39 +0800 Subject: [PATCH] --- yaml --- r: 112471 b: refs/heads/master c: 0cb0b0d3c6ebb8215500685a1f70a45bbbdc8e47 h: refs/heads/master i: 112469: 3064ce68cbf0b09b018e00fd6e099c126ef8e1e8 112467: cfb8929ad6e075b35ede22e2d6d7808e1de028c1 112463: 4315525d62803d0f10f789926190c6341bf464e8 v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-pxa/pxa27x.c | 7 +++++++ trunk/drivers/usb/host/ohci-pxa27x.c | 11 +++++++---- 3 files changed, 15 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index 08962d2e1b6b..33b58d0cb0c1 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 84bab7393b0da5086e133b7f333b800d26f7166b +refs/heads/master: 0cb0b0d3c6ebb8215500685a1f70a45bbbdc8e47 diff --git a/trunk/arch/arm/mach-pxa/pxa27x.c b/trunk/arch/arm/mach-pxa/pxa27x.c index bf01e14098f5..3e4ab2279c99 100644 --- a/trunk/arch/arm/mach-pxa/pxa27x.c +++ b/trunk/arch/arm/mach-pxa/pxa27x.c @@ -34,6 +34,13 @@ #include "devices.h" #include "clock.h" +void pxa27x_clear_otgph(void) +{ + if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH)) + PSSR |= PSSR_OTGPH; +} +EXPORT_SYMBOL(pxa27x_clear_otgph); + /* Crystal clock: 13MHz */ #define BASE_CLK 13000000 diff --git a/trunk/drivers/usb/host/ohci-pxa27x.c b/trunk/drivers/usb/host/ohci-pxa27x.c index 8530c6e9b770..1fd77933a4c6 100644 --- a/trunk/drivers/usb/host/ohci-pxa27x.c +++ b/trunk/drivers/usb/host/ohci-pxa27x.c @@ -25,7 +25,6 @@ #include #include -#include /* FIXME: for PSSR */ #include /* @@ -182,6 +181,12 @@ static inline void pxa27x_setup_hc(struct pxaohci_platform_data *inf) UHCRHDA = uhcrhda; } +#ifdef CONFIG_CPU_PXA27x +extern void pxa27x_clear_otgph(void); +#else +#define pxa27x_clear_otgph() do {} while (0) +#endif + static int pxa27x_start_hc(struct device *dev) { int retval = 0; @@ -212,9 +217,7 @@ static int pxa27x_start_hc(struct device *dev) UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE); /* Clear any OTG Pin Hold */ - if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH)) - PSSR |= PSSR_OTGPH; - + pxa27x_clear_otgph(); return 0; }