From 9909c8ed28d7a50b63cf8f132cc8243ef519d322 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 30 Jan 2011 16:40:20 +0000 Subject: [PATCH] --- yaml --- r: 232683 b: refs/heads/master c: e98ff0f55a0232b578c9aa7f1c245868277ac7bc h: refs/heads/master i: 232681: 9a8152c72bb68273f9f4ac12f8b5c60f6c0e25d6 232679: 9c65a4456bf6aa2815332ecaf7c0a2bc53879da2 v: v3 --- [refs] | 2 +- trunk/arch/arm/kernel/head.S | 22 ++++++++++------------ 2 files changed, 11 insertions(+), 13 deletions(-) diff --git a/[refs] b/[refs] index 562de0aac463..73588117ad9c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c1928022ef94662a88329e35fa0968b1be328b8e +refs/heads/master: e98ff0f55a0232b578c9aa7f1c245868277ac7bc diff --git a/trunk/arch/arm/kernel/head.S b/trunk/arch/arm/kernel/head.S index f17d9a09e8fb..c0225da3fb21 100644 --- a/trunk/arch/arm/kernel/head.S +++ b/trunk/arch/arm/kernel/head.S @@ -392,24 +392,22 @@ ENDPROC(__turn_mmu_on) #ifdef CONFIG_SMP_ON_UP __fixup_smp: - mov r4, #0x00070000 - orr r3, r4, #0xff000000 @ mask 0xff070000 - orr r4, r4, #0x41000000 @ val 0x41070000 - and r0, r9, r3 - teq r0, r4 @ ARM CPU and ARMv6/v7? + and r3, r9, #0x000f0000 @ architecture version + teq r3, #0x000f0000 @ CPU ID supported? bne __fixup_smp_on_up @ no, assume UP - orr r3, r3, #0x0000ff00 - orr r3, r3, #0x000000f0 @ mask 0xff07fff0 + bic r3, r9, #0x00ff0000 + bic r3, r3, #0x0000000f @ mask 0xff00fff0 + mov r4, #0x41000000 orr r4, r4, #0x0000b000 - orr r4, r4, #0x00000020 @ val 0x4107b020 - and r0, r9, r3 - teq r0, r4 @ ARM 11MPCore? + orr r4, r4, #0x00000020 @ val 0x4100b020 + teq r3, r4 @ ARM 11MPCore? moveq pc, lr @ yes, assume SMP mrc p15, 0, r0, c0, c0, 5 @ read MPIDR - tst r0, #1 << 31 - movne pc, lr @ bit 31 => SMP + and r0, r0, #0xc0000000 @ multiprocessing extensions and + teq r0, #0x80000000 @ not part of a uniprocessor system? + moveq pc, lr @ yes, assume SMP __fixup_smp_on_up: adr r0, 1f