From 99e48e25930ed39fe85c6131919f01a02c2b77c3 Mon Sep 17 00:00:00 2001
From: Eugene Surovegin <ebs@ebshome.net>
Date: Wed, 8 Jun 2005 15:48:42 -0700
Subject: [PATCH] --- yaml --- r: 1906 b: refs/heads/master c:
 beb9e1c3f32a0f878765c7c1142f91083739c5bd h: refs/heads/master v: v3

---
 [refs]                           |  2 +-
 trunk/arch/ppc/kernel/cputable.c | 11 +++++++++++
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 4143bab6839a..99a3cb4e0b81 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 1f96ddb4fb40961a8ebebf7a00bbfaad55aacbd2
+refs/heads/master: beb9e1c3f32a0f878765c7c1142f91083739c5bd
diff --git a/trunk/arch/ppc/kernel/cputable.c b/trunk/arch/ppc/kernel/cputable.c
index d44b7dc5390a..17abf6cd0d90 100644
--- a/trunk/arch/ppc/kernel/cputable.c
+++ b/trunk/arch/ppc/kernel/cputable.c
@@ -849,6 +849,17 @@ struct cpu_spec	cpu_specs[] = {
 		.icache_bsize		= 32,
 		.dcache_bsize		= 32,
 	},
+	{	/* 405EP */
+		.pvr_mask		= 0xffff0000,
+		.pvr_value		= 0x51210000,
+		.cpu_name		= "405EP",
+		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
+			CPU_FTR_USE_TB,
+		.cpu_user_features	= PPC_FEATURE_32 |
+			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
 
 #endif /* CONFIG_40x */
 #ifdef CONFIG_44x