From 9a0ebec04124dfe2fb41b2fea85e44c5f4c0bcc7 Mon Sep 17 00:00:00 2001 From: Changhwan Youn Date: Tue, 24 Apr 2012 14:33:14 -0700 Subject: [PATCH] --- yaml --- r: 308415 b: refs/heads/master c: eeed66e3a50f4d23d542498b17861ffadcdaf8ec h: refs/heads/master i: 308413: d7abdb0ea720a9211973c127f1ee70184724818c 308411: f8cfdef69f176b1cc5422f3bc8c8c2af4e1ca95f 308407: 09d7e9637b2826deb2c0ce003907c74d8d6e1cfb 308399: 81bc81ec0b902178d7e7790c493fa37e0eab8a0e 308383: 5c9a907526ee880b8f2503b051c3aa3f8cfc0cd7 308351: 55f3a3892bb63f3546f02fe7b2109bf7fadc4256 v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-exynos/include/mach/irqs.h | 4 ++-- trunk/arch/arm/mach-exynos/mct.c | 17 +++++++++++------ 3 files changed, 14 insertions(+), 9 deletions(-) diff --git a/[refs] b/[refs] index 101757c02037..222b3d83e758 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c9ce7dbdbf25d7245ead1923c11620d4c8013592 +refs/heads/master: eeed66e3a50f4d23d542498b17861ffadcdaf8ec diff --git a/trunk/arch/arm/mach-exynos/include/mach/irqs.h b/trunk/arch/arm/mach-exynos/include/mach/irqs.h index 116167524051..86e75f561b6f 100644 --- a/trunk/arch/arm/mach-exynos/include/mach/irqs.h +++ b/trunk/arch/arm/mach-exynos/include/mach/irqs.h @@ -320,6 +320,8 @@ #define EXYNOS5_IRQ_SATA IRQ_SPI(115) #define EXYNOS5_IRQ_NFCON IRQ_SPI(116) +#define EXYNOS5_IRQ_MCT_L0 IRQ_SPI(120) +#define EXYNOS5_IRQ_MCT_L1 IRQ_SPI(121) #define EXYNOS5_IRQ_MMC44 IRQ_SPI(123) #define EXYNOS5_IRQ_MDMA1 IRQ_SPI(124) #define EXYNOS5_IRQ_FIMC_LITE0 IRQ_SPI(125) @@ -399,8 +401,6 @@ #define EXYNOS5_IRQ_FIMD1_SYSTEM COMBINER_IRQ(18, 6) #define EXYNOS5_IRQ_EINT0 COMBINER_IRQ(23, 0) -#define EXYNOS5_IRQ_MCT_L0 COMBINER_IRQ(23, 1) -#define EXYNOS5_IRQ_MCT_L1 COMBINER_IRQ(23, 2) #define EXYNOS5_IRQ_MCT_G0 COMBINER_IRQ(23, 3) #define EXYNOS5_IRQ_MCT_G1 COMBINER_IRQ(23, 4) #define EXYNOS5_IRQ_MCT_G2 COMBINER_IRQ(23, 5) diff --git a/trunk/arch/arm/mach-exynos/mct.c b/trunk/arch/arm/mach-exynos/mct.c index 897d9a9cf226..b601fb8a408b 100644 --- a/trunk/arch/arm/mach-exynos/mct.c +++ b/trunk/arch/arm/mach-exynos/mct.c @@ -388,6 +388,7 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt) { struct mct_clock_event_device *mevt; unsigned int cpu = smp_processor_id(); + int mct_lx_irq; mevt = this_cpu_ptr(&percpu_mct_tick); mevt->evt = evt; @@ -414,14 +415,18 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt) if (mct_int_type == MCT_INT_SPI) { if (cpu == 0) { + mct_lx_irq = soc_is_exynos4210() ? EXYNOS4_IRQ_MCT_L0 : + EXYNOS5_IRQ_MCT_L0; mct_tick0_event_irq.dev_id = mevt; - evt->irq = EXYNOS4_IRQ_MCT_L0; - setup_irq(EXYNOS4_IRQ_MCT_L0, &mct_tick0_event_irq); + evt->irq = mct_lx_irq; + setup_irq(mct_lx_irq, &mct_tick0_event_irq); } else { + mct_lx_irq = soc_is_exynos4210() ? EXYNOS4_IRQ_MCT_L1 : + EXYNOS5_IRQ_MCT_L1; mct_tick1_event_irq.dev_id = mevt; - evt->irq = EXYNOS4_IRQ_MCT_L1; - setup_irq(EXYNOS4_IRQ_MCT_L1, &mct_tick1_event_irq); - irq_set_affinity(EXYNOS4_IRQ_MCT_L1, cpumask_of(1)); + evt->irq = mct_lx_irq; + setup_irq(mct_lx_irq, &mct_tick1_event_irq); + irq_set_affinity(mct_lx_irq, cpumask_of(1)); } } else { enable_percpu_irq(EXYNOS_IRQ_MCT_LOCALTIMER, 0); @@ -473,7 +478,7 @@ static void __init exynos4_timer_resources(void) static void __init exynos4_timer_init(void) { - if (soc_is_exynos4210()) + if ((soc_is_exynos4210()) || (soc_is_exynos5250())) mct_int_type = MCT_INT_SPI; else mct_int_type = MCT_INT_PPI;