From 9b29dccfc20a8eb785ccf0ca3824605da9af4e3a Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Fri, 12 Sep 2008 00:22:42 -0700 Subject: [PATCH] --- yaml --- r: 113139 b: refs/heads/master c: 3ab5827eb0fefbfa7234f3f91f78b50f2dfcf8e4 h: refs/heads/master i: 113137: cb38123b486f71b07c8895e22dfbab27dc15e757 113135: e02a35ec81c8f9b92c7f3e69e2b3eb847fdc324d v: v3 --- [refs] | 2 +- trunk/arch/sparc64/kernel/chmc.c | 20 ++++++++++---------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/[refs] b/[refs] index 4b93b76ee8e1..09354a339b73 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: af1ee569d32e4dec5d14758ce025cc374088394d +refs/heads/master: 3ab5827eb0fefbfa7234f3f91f78b50f2dfcf8e4 diff --git a/trunk/arch/sparc64/kernel/chmc.c b/trunk/arch/sparc64/kernel/chmc.c index 2ed401087cab..967b04886822 100644 --- a/trunk/arch/sparc64/kernel/chmc.c +++ b/trunk/arch/sparc64/kernel/chmc.c @@ -104,20 +104,20 @@ struct chmc { #define JBUSMC_REGS_SIZE 8 -#define JB_MC_REG1_DIMM2_BANK3 0x8000000000000000 -#define JB_MC_REG1_DIMM1_BANK1 0x4000000000000000 -#define JB_MC_REG1_DIMM2_BANK2 0x2000000000000000 -#define JB_MC_REG1_DIMM1_BANK0 0x1000000000000000 -#define JB_MC_REG1_XOR 0x0000010000000000 -#define JB_MC_REG1_ADDR_GEN_2 0x000000e000000000 +#define JB_MC_REG1_DIMM2_BANK3 0x8000000000000000UL +#define JB_MC_REG1_DIMM1_BANK1 0x4000000000000000UL +#define JB_MC_REG1_DIMM2_BANK2 0x2000000000000000UL +#define JB_MC_REG1_DIMM1_BANK0 0x1000000000000000UL +#define JB_MC_REG1_XOR 0x0000010000000000UL +#define JB_MC_REG1_ADDR_GEN_2 0x000000e000000000UL #define JB_MC_REG1_ADDR_GEN_2_SHIFT 37 -#define JB_MC_REG1_ADDR_GEN_1 0x0000001c00000000 +#define JB_MC_REG1_ADDR_GEN_1 0x0000001c00000000UL #define JB_MC_REG1_ADDR_GEN_1_SHIFT 34 -#define JB_MC_REG1_INTERLEAVE 0x0000000001800000 +#define JB_MC_REG1_INTERLEAVE 0x0000000001800000UL #define JB_MC_REG1_INTERLEAVE_SHIFT 23 -#define JB_MC_REG1_DIMM2_PTYPE 0x0000000000200000 +#define JB_MC_REG1_DIMM2_PTYPE 0x0000000000200000UL #define JB_MC_REG1_DIMM2_PTYPE_SHIFT 21 -#define JB_MC_REG1_DIMM1_PTYPE 0x0000000000100000 +#define JB_MC_REG1_DIMM1_PTYPE 0x0000000000100000UL #define JB_MC_REG1_DIMM1_PTYPE_SHIFT 20 #define PART_TYPE_X8 0