From 9b6de3df93d712bbf66c4dd635d4eb49bbf3ec94 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Mon, 29 Oct 2012 22:02:14 -0600 Subject: [PATCH] --- yaml --- r: 335726 b: refs/heads/master c: bc05244e65f26b7b6f87e0964bfe277803914ed9 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 8 ++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 7b84c1c6d459..fd1ea5b77aee 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 5fb3d522efca4b3a369040d37d1380103411db74 +refs/heads/master: bc05244e65f26b7b6f87e0964bfe277803914ed9 diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 652d0285bd6d..7bddfa5534f9 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -2125,6 +2125,14 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .name = "mcpdm", .class = &omap44xx_mcpdm_hwmod_class, .clkdm_name = "abe_clkdm", + /* + * It's suspected that the McPDM requires an off-chip main + * functional clock, controlled via I2C. This IP block is + * currently reset very early during boot, before I2C is + * available, so it doesn't seem that we have any choice in + * the kernel other than to avoid resetting it. + */ + .flags = HWMOD_EXT_OPT_MAIN_CLK, .mpu_irqs = omap44xx_mcpdm_irqs, .sdma_reqs = omap44xx_mcpdm_sdma_reqs, .main_clk = "mcpdm_fck",