diff --git a/[refs] b/[refs] index 9c5e1cf98015..54b2d7ac5c3e 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 963bfb0939232e415c7bfb19b08dce300eb148d9 +refs/heads/master: db12ba53fe8b2d79c06bfe00589b3e98fd50cb4c diff --git a/trunk/arch/arm/configs/omap2plus_defconfig b/trunk/arch/arm/configs/omap2plus_defconfig index 7deec89872c7..9ca8df0b5b8e 100644 --- a/trunk/arch/arm/configs/omap2plus_defconfig +++ b/trunk/arch/arm/configs/omap2plus_defconfig @@ -65,6 +65,10 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyS2,115200" CONFIG_KEXEC=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT_DETAILS=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_FPE_NWFPE=y CONFIG_VFP=y CONFIG_NEON=y @@ -87,23 +91,23 @@ CONFIG_IP_PNP_RARP=y # CONFIG_INET_LRO is not set # CONFIG_IPV6 is not set CONFIG_NETFILTER=y -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m +CONFIG_BT=y +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y CONFIG_BT_RFCOMM=y CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m +CONFIG_BT_BNEP=y CONFIG_BT_BNEP_MC_FILTER=y CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HCIUART=m +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y CONFIG_BT_HCIUART_H4=y CONFIG_BT_HCIUART_BCSP=y CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_CFG80211=m -CONFIG_MAC80211=m +CONFIG_BT_HCIBCM203X=y +CONFIG_BT_HCIBPA10X=y +CONFIG_CFG80211=y +CONFIG_MAC80211=y CONFIG_MAC80211_RC_PID=y CONFIG_MAC80211_RC_DEFAULT_PID=y CONFIG_MAC80211_LEDS=y @@ -139,9 +143,9 @@ CONFIG_SMC91X=y CONFIG_SMSC911X=y CONFIG_KS8851=y CONFIG_KS8851_MLL=y -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -CONFIG_LIBERTAS_SDIO=m +CONFIG_LIBERTAS=y +CONFIG_LIBERTAS_USB=y +CONFIG_LIBERTAS_SDIO=y CONFIG_LIBERTAS_DEBUG=y CONFIG_USB_USBNET=y CONFIG_USB_ALI_M5632=y @@ -203,8 +207,8 @@ CONFIG_FONTS=y CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y CONFIG_LOGO=y -CONFIG_SOUND=m -CONFIG_SND=m +CONFIG_SOUND=y +CONFIG_SND=y CONFIG_SND_MIXER_OSS=y CONFIG_SND_PCM_OSS=y CONFIG_SND_VERBOSE_PRINTK=y diff --git a/trunk/arch/arm/mach-omap1/devices.c b/trunk/arch/arm/mach-omap1/devices.c index a919366a90dd..aa0725608fb1 100644 --- a/trunk/arch/arm/mach-omap1/devices.c +++ b/trunk/arch/arm/mach-omap1/devices.c @@ -232,30 +232,3 @@ static int __init omap1_init_devices(void) } arch_initcall(omap1_init_devices); -#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) - -static struct resource wdt_resources[] = { - { - .start = 0xfffeb000, - .end = 0xfffeb07F, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device omap_wdt_device = { - .name = "omap_wdt", - .id = -1, - .num_resources = ARRAY_SIZE(wdt_resources), - .resource = wdt_resources, -}; - -static int __init omap_init_wdt(void) -{ - if (!cpu_is_omap16xx()) - return; - - platform_device_register(&omap_wdt_device); - return 0; -} -subsys_initcall(omap_init_wdt); -#endif diff --git a/trunk/arch/arm/mach-omap2/devices.c b/trunk/arch/arm/mach-omap2/devices.c index 8e2f0aa310b5..9e5d51bee94a 100644 --- a/trunk/arch/arm/mach-omap2/devices.c +++ b/trunk/arch/arm/mach-omap2/devices.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include @@ -29,8 +28,6 @@ #include #include #include -#include -#include #include "mux.h" @@ -935,39 +932,3 @@ static int __init omap2_init_devices(void) return 0; } arch_initcall(omap2_init_devices); - -#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) -struct omap_device_pm_latency omap_wdt_latency[] = { - [0] = { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - -static int __init omap_init_wdt(void) -{ - int id = -1; - struct omap_device *od; - struct omap_hwmod *oh; - char *oh_name = "wd_timer2"; - char *dev_name = "omap_wdt"; - - if (!cpu_class_is_omap2()) - return 0; - - oh = omap_hwmod_lookup(oh_name); - if (!oh) { - pr_err("Could not look up wd_timer%d hwmod\n", id); - return -EINVAL; - } - - od = omap_device_build(dev_name, id, oh, NULL, 0, - omap_wdt_latency, - ARRAY_SIZE(omap_wdt_latency), 0); - WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n", - dev_name, oh->name); - return 0; -} -subsys_initcall(omap_init_wdt); -#endif diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 66678d98ad96..3cc768e8bc04 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -19,7 +19,6 @@ #include "omap_hwmod_common_data.h" #include "prm-regbits-24xx.h" -#include "cm-regbits-24xx.h" /* * OMAP2420 hardware module integration data @@ -34,7 +33,6 @@ static struct omap_hwmod omap2420_mpu_hwmod; static struct omap_hwmod omap2420_iva_hwmod; static struct omap_hwmod omap2420_l3_main_hwmod; static struct omap_hwmod omap2420_l4_core_hwmod; -static struct omap_hwmod omap2420_wd_timer2_hwmod; /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = { @@ -167,74 +165,12 @@ static struct omap_hwmod omap2420_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; -/* l4_wkup -> wd_timer2 */ -static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { - { - .pa_start = 0x48022000, - .pa_end = 0x4802207f, - .flags = ADDR_TYPE_RT - }, -}; - -static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { - .master = &omap2420_l4_wkup_hwmod, - .slave = &omap2420_wd_timer2_hwmod, - .clk = "mpu_wdt_ick", - .addr = omap2420_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_wd_timer2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* - * 'wd_timer' class - * 32-bit watchdog upward counter that generates a pulse on the reset pin on - * overflow condition - */ - -static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap2420_wd_timer_sysc, -}; - -/* wd_timer2 */ -static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { - &omap2420_l4_wkup__wd_timer2, -}; - -static struct omap_hwmod omap2420_wd_timer2_hwmod = { - .name = "wd_timer2", - .class = &omap2420_wd_timer_hwmod_class, - .main_clk = "mpu_wdt_fck", - .prcm = { - .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT, - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, - }, - }, - .slaves = omap2420_wd_timer2_slaves, - .slaves_cnt = ARRAY_SIZE(omap2420_wd_timer2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), -}; - static __initdata struct omap_hwmod *omap2420_hwmods[] = { &omap2420_l3_main_hwmod, &omap2420_l4_core_hwmod, &omap2420_l4_wkup_hwmod, &omap2420_mpu_hwmod, &omap2420_iva_hwmod, - &omap2420_wd_timer2_hwmod, NULL, }; diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 7ec927aa23de..4526628ed287 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -19,7 +19,6 @@ #include "omap_hwmod_common_data.h" #include "prm-regbits-24xx.h" -#include "cm-regbits-24xx.h" /* * OMAP2430 hardware module integration data @@ -34,7 +33,6 @@ static struct omap_hwmod omap2430_mpu_hwmod; static struct omap_hwmod omap2430_iva_hwmod; static struct omap_hwmod omap2430_l3_main_hwmod; static struct omap_hwmod omap2430_l4_core_hwmod; -static struct omap_hwmod omap2430_wd_timer2_hwmod; /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { @@ -167,74 +165,12 @@ static struct omap_hwmod omap2430_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; -/* l4_wkup -> wd_timer2 */ -static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { - { - .pa_start = 0x49016000, - .pa_end = 0x4901607f, - .flags = ADDR_TYPE_RT - }, -}; - -static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { - .master = &omap2430_l4_wkup_hwmod, - .slave = &omap2430_wd_timer2_hwmod, - .clk = "mpu_wdt_ick", - .addr = omap2430_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* - * 'wd_timer' class - * 32-bit watchdog upward counter that generates a pulse on the reset pin on - * overflow condition - */ - -static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { - .rev_offs = 0x0, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap2430_wd_timer_sysc, -}; - -/* wd_timer2 */ -static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { - &omap2430_l4_wkup__wd_timer2, -}; - -static struct omap_hwmod omap2430_wd_timer2_hwmod = { - .name = "wd_timer2", - .class = &omap2430_wd_timer_hwmod_class, - .main_clk = "mpu_wdt_fck", - .prcm = { - .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT, - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, - }, - }, - .slaves = omap2430_wd_timer2_slaves, - .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), -}; - static __initdata struct omap_hwmod *omap2430_hwmods[] = { &omap2430_l3_main_hwmod, &omap2430_l4_core_hwmod, &omap2430_l4_wkup_hwmod, &omap2430_mpu_hwmod, &omap2430_iva_hwmod, - &omap2430_wd_timer2_hwmod, NULL, }; diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 5bfe9c933144..5d8eb58ba5e3 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -21,7 +21,6 @@ #include "omap_hwmod_common_data.h" #include "prm-regbits-34xx.h" -#include "cm-regbits-34xx.h" /* * OMAP3xxx hardware module integration data @@ -37,7 +36,6 @@ static struct omap_hwmod omap3xxx_iva_hwmod; static struct omap_hwmod omap3xxx_l3_main_hwmod; static struct omap_hwmod omap3xxx_l4_core_hwmod; static struct omap_hwmod omap3xxx_l4_per_hwmod; -static struct omap_hwmod omap3xxx_wd_timer2_hwmod; /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = { @@ -199,69 +197,6 @@ static struct omap_hwmod omap3xxx_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; -/* l4_wkup -> wd_timer2 */ -static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = { - { - .pa_start = 0x48314000, - .pa_end = 0x4831407f, - .flags = ADDR_TYPE_RT - }, -}; - -static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { - .master = &omap3xxx_l4_wkup_hwmod, - .slave = &omap3xxx_wd_timer2_hwmod, - .clk = "wdt2_ick", - .addr = omap3xxx_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_addrs), - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* - * 'wd_timer' class - * 32-bit watchdog upward counter that generates a pulse on the reset pin on - * overflow condition - */ - -static struct omap_hwmod_class_sysconfig omap3xxx_wd_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap3xxx_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap3xxx_wd_timer_sysc, -}; - -/* wd_timer2 */ -static struct omap_hwmod_ocp_if *omap3xxx_wd_timer2_slaves[] = { - &omap3xxx_l4_wkup__wd_timer2, -}; - -static struct omap_hwmod omap3xxx_wd_timer2_hwmod = { - .name = "wd_timer2", - .class = &omap3xxx_wd_timer_hwmod_class, - .main_clk = "wdt2_fck", - .prcm = { - .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP3430_EN_WDT2_SHIFT, - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_WDT2_SHIFT, - }, - }, - .slaves = omap3xxx_wd_timer2_slaves, - .slaves_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_l3_main_hwmod, &omap3xxx_l4_core_hwmod, @@ -269,7 +204,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_l4_wkup_hwmod, &omap3xxx_mpu_hwmod, &omap3xxx_iva_hwmod, - &omap3xxx_wd_timer2_hwmod, NULL, }; diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 9523b4c9537f..afcbd483a6c4 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -453,132 +453,231 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { }; /* - * 'wd_timer' class - * 32-bit watchdog upward counter that generates a pulse on the reset pin on - * overflow condition + * 'uart' class + * universal asynchronous receiver/transmitter (uart) */ -static struct omap_hwmod_class_sysconfig omap44xx_wd_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE | - SYSC_HAS_SOFTRESET), +static struct omap_hwmod_class_sysconfig omap44xx_uart_sysc = { + .rev_offs = 0x0050, + .sysc_offs = 0x0054, + .syss_offs = 0x0058, + .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .sysc_fields = &omap_hwmod_sysc_type1, }; -static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap44xx_wd_timer_sysc, +static struct omap_hwmod_class omap44xx_uart_hwmod_class = { + .name = "uart", + .sysc = &omap44xx_uart_sysc, }; -/* wd_timer2 */ -static struct omap_hwmod omap44xx_wd_timer2_hwmod; -static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = { - { .irq = 80 + OMAP44XX_IRQ_GIC_START }, +/* uart1 */ +static struct omap_hwmod omap44xx_uart1_hwmod; +static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { + { .irq = 72 + OMAP44XX_IRQ_GIC_START }, }; -static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { +static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { + { .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START }, + { .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START }, +}; + +static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { { - .pa_start = 0x4a314000, - .pa_end = 0x4a31407f, + .pa_start = 0x4806a000, + .pa_end = 0x4806a0ff, .flags = ADDR_TYPE_RT }, }; -/* l4_wkup -> wd_timer2 */ -static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = { - .master = &omap44xx_l4_wkup_hwmod, - .slave = &omap44xx_wd_timer2_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .addr = omap44xx_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer2_addrs), +/* l4_per -> uart1 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_uart1_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_uart1_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_uart1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* wd_timer2 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = { - &omap44xx_l4_wkup__wd_timer2, +/* uart1 slave ports */ +static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = { + &omap44xx_l4_per__uart1, }; -static struct omap_hwmod omap44xx_wd_timer2_hwmod = { - .name = "wd_timer2", - .class = &omap44xx_wd_timer_hwmod_class, - .mpu_irqs = omap44xx_wd_timer2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs), - .main_clk = "wd_timer2_fck", +static struct omap_hwmod omap44xx_uart1_hwmod = { + .name = "uart1", + .class = &omap44xx_uart_hwmod_class, + .mpu_irqs = omap44xx_uart1_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart1_irqs), + .sdma_reqs = omap44xx_uart1_sdma_reqs, + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), + .main_clk = "uart1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_WDT2_CLKCTRL, + .clkctrl_reg = OMAP4430_CM_L4PER_UART1_CLKCTRL, }, }, - .slaves = omap44xx_wd_timer2_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer2_slaves), + .slaves = omap44xx_uart1_slaves, + .slaves_cnt = ARRAY_SIZE(omap44xx_uart1_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* wd_timer3 */ -static struct omap_hwmod omap44xx_wd_timer3_hwmod; -static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = { - { .irq = 36 + OMAP44XX_IRQ_GIC_START }, +/* uart2 */ +static struct omap_hwmod omap44xx_uart2_hwmod; +static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { + { .irq = 73 + OMAP44XX_IRQ_GIC_START }, }; -static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { +static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { + { .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START }, + { .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START }, +}; + +static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { { - .pa_start = 0x40130000, - .pa_end = 0x4013007f, + .pa_start = 0x4806c000, + .pa_end = 0x4806c0ff, .flags = ADDR_TYPE_RT }, }; -/* l4_abe -> wd_timer3 */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_wd_timer3_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_wd_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_addrs), - .user = OCP_USER_MPU, +/* l4_per -> uart2 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_uart2_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_uart2_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_uart2_addrs), + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* uart2 slave ports */ +static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = { + &omap44xx_l4_per__uart2, +}; + +static struct omap_hwmod omap44xx_uart2_hwmod = { + .name = "uart2", + .class = &omap44xx_uart_hwmod_class, + .mpu_irqs = omap44xx_uart2_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart2_irqs), + .sdma_reqs = omap44xx_uart2_sdma_reqs, + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), + .main_clk = "uart2_fck", + .prcm = { + .omap4 = { + .clkctrl_reg = OMAP4430_CM_L4PER_UART2_CLKCTRL, + }, + }, + .slaves = omap44xx_uart2_slaves, + .slaves_cnt = ARRAY_SIZE(omap44xx_uart2_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), +}; + +/* uart3 */ +static struct omap_hwmod omap44xx_uart3_hwmod; +static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { + { .irq = 74 + OMAP44XX_IRQ_GIC_START }, +}; + +static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { + { .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START }, + { .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START }, }; -/* l4_abe -> wd_timer3 (dma) */ -static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = { +static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { { - .pa_start = 0x49030000, - .pa_end = 0x4903007f, + .pa_start = 0x48020000, + .pa_end = 0x480200ff, .flags = ADDR_TYPE_RT }, }; -static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_wd_timer3_hwmod, - .clk = "ocp_abe_iclk", - .addr = omap44xx_wd_timer3_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_dma_addrs), - .user = OCP_USER_SDMA, +/* l4_per -> uart3 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_uart3_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_uart3_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_uart3_addrs), + .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* wd_timer3 slave ports */ -static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = { - &omap44xx_l4_abe__wd_timer3, - &omap44xx_l4_abe__wd_timer3_dma, +/* uart3 slave ports */ +static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = { + &omap44xx_l4_per__uart3, }; -static struct omap_hwmod omap44xx_wd_timer3_hwmod = { - .name = "wd_timer3", - .class = &omap44xx_wd_timer_hwmod_class, - .mpu_irqs = omap44xx_wd_timer3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs), - .main_clk = "wd_timer3_fck", +static struct omap_hwmod omap44xx_uart3_hwmod = { + .name = "uart3", + .class = &omap44xx_uart_hwmod_class, + .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), + .mpu_irqs = omap44xx_uart3_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart3_irqs), + .sdma_reqs = omap44xx_uart3_sdma_reqs, + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), + .main_clk = "uart3_fck", + .prcm = { + .omap4 = { + .clkctrl_reg = OMAP4430_CM_L4PER_UART3_CLKCTRL, + }, + }, + .slaves = omap44xx_uart3_slaves, + .slaves_cnt = ARRAY_SIZE(omap44xx_uart3_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), +}; + +/* uart4 */ +static struct omap_hwmod omap44xx_uart4_hwmod; +static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { + { .irq = 70 + OMAP44XX_IRQ_GIC_START }, +}; + +static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { + { .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START }, + { .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START }, +}; + +static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { + { + .pa_start = 0x4806e000, + .pa_end = 0x4806e0ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_per -> uart4 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_uart4_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_uart4_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_uart4_addrs), + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* uart4 slave ports */ +static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = { + &omap44xx_l4_per__uart4, +}; + +static struct omap_hwmod omap44xx_uart4_hwmod = { + .name = "uart4", + .class = &omap44xx_uart_hwmod_class, + .mpu_irqs = omap44xx_uart4_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart4_irqs), + .sdma_reqs = omap44xx_uart4_sdma_reqs, + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), + .main_clk = "uart4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_WDT3_CLKCTRL, + .clkctrl_reg = OMAP4430_CM_L4PER_UART4_CLKCTRL, }, }, - .slaves = omap44xx_wd_timer3_slaves, - .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves), + .slaves = omap44xx_uart4_slaves, + .slaves_cnt = ARRAY_SIZE(omap44xx_uart4_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -602,9 +701,12 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = { /* mpu class */ &omap44xx_mpu_hwmod, - /* wd_timer class */ - &omap44xx_wd_timer2_hwmod, - &omap44xx_wd_timer3_hwmod, + + /* uart class */ + &omap44xx_uart1_hwmod, + &omap44xx_uart2_hwmod, + &omap44xx_uart3_hwmod, + &omap44xx_uart4_hwmod, NULL, }; diff --git a/trunk/arch/arm/plat-omap/devices.c b/trunk/arch/arm/plat-omap/devices.c index 8e88e0e5d524..d1920be7833b 100644 --- a/trunk/arch/arm/plat-omap/devices.c +++ b/trunk/arch/arm/plat-omap/devices.c @@ -232,6 +232,46 @@ static void omap_init_uwire(void) static inline void omap_init_uwire(void) {} #endif +/*-------------------------------------------------------------------------*/ + +#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) + +static struct resource wdt_resources[] = { + { + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device omap_wdt_device = { + .name = "omap_wdt", + .id = -1, + .num_resources = ARRAY_SIZE(wdt_resources), + .resource = wdt_resources, +}; + +static void omap_init_wdt(void) +{ + if (cpu_is_omap16xx()) + wdt_resources[0].start = 0xfffeb000; + else if (cpu_is_omap2420()) + wdt_resources[0].start = 0x48022000; /* WDT2 */ + else if (cpu_is_omap2430()) + wdt_resources[0].start = 0x49016000; /* WDT2 */ + else if (cpu_is_omap343x()) + wdt_resources[0].start = 0x48314000; /* WDT2 */ + else if (cpu_is_omap44xx()) + wdt_resources[0].start = 0x4a314000; + else + return; + + wdt_resources[0].end = wdt_resources[0].start + 0x4f; + + (void) platform_device_register(&omap_wdt_device); +} +#else +static inline void omap_init_wdt(void) {} +#endif + /* * This gets called after board-specific INIT_MACHINE, and initializes most * on-chip peripherals accessible on this board (except for few like USB): @@ -260,6 +300,7 @@ static int __init omap_init_devices(void) omap_init_rng(); omap_init_mcpdm(); omap_init_uwire(); + omap_init_wdt(); return 0; } arch_initcall(omap_init_devices); diff --git a/trunk/drivers/watchdog/omap_wdt.c b/trunk/drivers/watchdog/omap_wdt.c index dbbc5801a0c3..76b58abf4451 100644 --- a/trunk/drivers/watchdog/omap_wdt.c +++ b/trunk/drivers/watchdog/omap_wdt.c @@ -38,11 +38,11 @@ #include #include #include +#include #include #include #include #include -#include #include #include @@ -61,6 +61,8 @@ struct omap_wdt_dev { void __iomem *base; /* physical */ struct device *dev; int omap_wdt_users; + struct clk *ick; + struct clk *fck; struct resource *mem; struct miscdevice omap_wdt_miscdev; }; @@ -144,7 +146,8 @@ static int omap_wdt_open(struct inode *inode, struct file *file) if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users))) return -EBUSY; - pm_runtime_get_sync(wdev->dev); + clk_enable(wdev->ick); /* Enable the interface clock */ + clk_enable(wdev->fck); /* Enable the functional clock */ /* initialize prescaler */ while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) @@ -174,7 +177,8 @@ static int omap_wdt_release(struct inode *inode, struct file *file) omap_wdt_disable(wdev); - pm_runtime_put_sync(wdev->dev); + clk_disable(wdev->ick); + clk_disable(wdev->fck); #else printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n"); #endif @@ -288,7 +292,19 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev) wdev->omap_wdt_users = 0; wdev->mem = mem; - wdev->dev = &pdev->dev; + + wdev->ick = clk_get(&pdev->dev, "ick"); + if (IS_ERR(wdev->ick)) { + ret = PTR_ERR(wdev->ick); + wdev->ick = NULL; + goto err_clk; + } + wdev->fck = clk_get(&pdev->dev, "fck"); + if (IS_ERR(wdev->fck)) { + ret = PTR_ERR(wdev->fck); + wdev->fck = NULL; + goto err_clk; + } wdev->base = ioremap(res->start, resource_size(res)); if (!wdev->base) { @@ -298,8 +314,8 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev) platform_set_drvdata(pdev, wdev); - pm_runtime_enable(wdev->dev); - pm_runtime_get_sync(wdev->dev); + clk_enable(wdev->ick); + clk_enable(wdev->fck); omap_wdt_disable(wdev); omap_wdt_adjust_timeout(timer_margin); @@ -317,7 +333,11 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev) __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF, timer_margin); - pm_runtime_put_sync(wdev->dev); + /* autogate OCP interface clock */ + __raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG); + + clk_disable(wdev->ick); + clk_disable(wdev->fck); omap_wdt_dev = pdev; @@ -329,6 +349,12 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev) err_ioremap: wdev->base = NULL; + +err_clk: + if (wdev->ick) + clk_put(wdev->ick); + if (wdev->fck) + clk_put(wdev->fck); kfree(wdev); err_kzalloc: @@ -360,6 +386,8 @@ static int __devexit omap_wdt_remove(struct platform_device *pdev) release_mem_region(res->start, resource_size(res)); platform_set_drvdata(pdev, NULL); + clk_put(wdev->ick); + clk_put(wdev->fck); iounmap(wdev->base); kfree(wdev);