From 9c40a155c5dfb2576fcbc97f9746f61455c25f43 Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Fri, 19 Aug 2011 11:54:31 +0200 Subject: [PATCH] --- yaml --- r: 273996 b: refs/heads/master c: fb5d375d352ee5830b33ccdff06eb4f5f1d603f5 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-s3c64xx/clock.c | 8 +++++++- trunk/arch/arm/mach-s3c64xx/include/mach/regs-sys.h | 1 + 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 4aeceac55add..0b6651efa45b 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d9018df00785d7ff52aa7fa8acfacd8a036fc832 +refs/heads/master: fb5d375d352ee5830b33ccdff06eb4f5f1d603f5 diff --git a/trunk/arch/arm/mach-s3c64xx/clock.c b/trunk/arch/arm/mach-s3c64xx/clock.c index 8cf39e33579e..872e68361eb4 100644 --- a/trunk/arch/arm/mach-s3c64xx/clock.c +++ b/trunk/arch/arm/mach-s3c64xx/clock.c @@ -744,7 +744,13 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n", apll, mpll, epll); - hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + if(__raw_readl(S3C64XX_OTHERS) & S3C64XX_OTHERS_SYNCMUXSEL) + /* Synchronous mode */ + hclk2 = apll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + else + /* Asynchronous mode */ + hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK); diff --git a/trunk/arch/arm/mach-s3c64xx/include/mach/regs-sys.h b/trunk/arch/arm/mach-s3c64xx/include/mach/regs-sys.h index 774e0de31400..b91e02093289 100644 --- a/trunk/arch/arm/mach-s3c64xx/include/mach/regs-sys.h +++ b/trunk/arch/arm/mach-s3c64xx/include/mach/regs-sys.h @@ -26,5 +26,6 @@ #define S3C64XX_OTHERS S3C_SYSREG(0x900) #define S3C64XX_OTHERS_USBMASK (1 << 16) +#define S3C64XX_OTHERS_SYNCMUXSEL (1 << 6) #endif /* _PLAT_REGS_SYS_H */