From 9c6655e352a2131123d785f23ae039d04e46d958 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 12 Dec 2006 11:52:34 +0000 Subject: [PATCH] --- yaml --- r: 45340 b: refs/heads/master c: 61e84f99877fa8caaf1be86d51d825406e8d8bc1 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/Documentation/cachetlb.txt | 5 +- trunk/Documentation/x86_64/boot-options.txt | 4 - trunk/MAINTAINERS | 22 +--- trunk/arch/arm/kernel/entry-armv.S | 12 +- trunk/arch/arm/kernel/time.c | 13 -- trunk/arch/arm/kernel/traps.c | 1 - trunk/arch/arm/mm/flush.c | 39 ------ trunk/arch/mips/mips-boards/malta/malta_mtd.c | 63 +++++++++ trunk/arch/x86_64/kernel/early-quirks.c | 5 - trunk/arch/x86_64/kernel/io_apic.c | 124 +++++++----------- trunk/drivers/mmc/mmci.c | 4 - trunk/include/asm-arm/arch-iop32x/iop32x.h | 2 +- trunk/include/asm-arm/cacheflush.h | 10 -- trunk/include/asm-arm/hardware/iop3xx.h | 6 +- trunk/include/asm-parisc/cacheflush.h | 2 +- trunk/include/linux/highmem.h | 2 +- trunk/mm/memory.c | 2 +- 18 files changed, 132 insertions(+), 186 deletions(-) create mode 100644 trunk/arch/mips/mips-boards/malta/malta_mtd.c diff --git a/[refs] b/[refs] index 2312e80dd337..d2550b1ca30f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 74bda9310fe9776f3d940057ac2e7881214577d6 +refs/heads/master: 61e84f99877fa8caaf1be86d51d825406e8d8bc1 diff --git a/trunk/Documentation/cachetlb.txt b/trunk/Documentation/cachetlb.txt index debf6813934a..73e794f0ff09 100644 --- a/trunk/Documentation/cachetlb.txt +++ b/trunk/Documentation/cachetlb.txt @@ -373,15 +373,14 @@ maps this page at its virtual address. likely that you will need to flush the instruction cache for copy_to_user_page(). - void flush_anon_page(struct vm_area_struct *vma, struct page *page, - unsigned long vmaddr) + void flush_anon_page(struct page *page, unsigned long vmaddr) When the kernel needs to access the contents of an anonymous page, it calls this function (currently only get_user_pages()). Note: flush_dcache_page() deliberately doesn't work for an anonymous page. The default implementation is a nop (and should remain so for all coherent architectures). For incoherent architectures, it should flush - the cache of the page at vmaddr. + the cache of the page at vmaddr in the current user process. void flush_kernel_dcache_page(struct page *page) When the kernel needs to modify a user page is has obtained diff --git a/trunk/Documentation/x86_64/boot-options.txt b/trunk/Documentation/x86_64/boot-options.txt index 5c86ed6f0448..dbdcaf68e3ea 100644 --- a/trunk/Documentation/x86_64/boot-options.txt +++ b/trunk/Documentation/x86_64/boot-options.txt @@ -52,10 +52,6 @@ APICs apicmaintimer. Useful when your PIT timer is totally broken. - disable_8254_timer / enable_8254_timer - Enable interrupt 0 timer routing over the 8254 in addition to over - the IO-APIC. The kernel tries to set a sensible default. - Early Console syntax: earlyprintk=vga diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 4ccc5fa06d09..2bd34ef58ffa 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -412,32 +412,20 @@ S: Maintained ARM/INTEL IOP32X ARM ARCHITECTURE P: Lennert Buytenhek M: kernel@wantstofly.org -P: Dan Williams -M: dan.j.williams@intel.com L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) -S: Supported - -ARM/INTEL IOP33X ARM ARCHITECTURE -P: Dan Williams -M: dan.j.williams@intel.com -L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) -S: Supported +S: Maintained ARM/INTEL IOP13XX ARM ARCHITECTURE P: Lennert Buytenhek M: kernel@wantstofly.org -P: Dan Williams -M: dan.j.williams@intel.com L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) -S: Supported +S: Maintained ARM/INTEL IQ81342EX MACHINE SUPPORT P: Lennert Buytenhek M: kernel@wantstofly.org -P: Dan Williams -M: dan.j.williams@intel.com L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) -S: Supported +S: Maintained ARM/INTEL IXP2000 ARM ARCHITECTURE P: Lennert Buytenhek @@ -460,10 +448,8 @@ S: Maintained ARM/INTEL XSC3 (MANZANO) ARM CORE P: Lennert Buytenhek M: kernel@wantstofly.org -P: Dan Williams -M: dan.j.williams@intel.com L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) -S: Supported +S: Maintained ARM/IP FABRICS DOUBLE ESPRESSO MACHINE SUPPORT P: Lennert Buytenhek diff --git a/trunk/arch/arm/kernel/entry-armv.S b/trunk/arch/arm/kernel/entry-armv.S index 8517c3c3eb33..2db42b18f53f 100644 --- a/trunk/arch/arm/kernel/entry-armv.S +++ b/trunk/arch/arm/kernel/entry-armv.S @@ -436,7 +436,7 @@ __und_usr: usr_entry tst r3, #PSR_T_BIT @ Thumb mode? - bne __und_usr_unknown @ ignore FP + bne fpundefinstr @ ignore FP sub r4, r2, #4 @ @@ -448,7 +448,7 @@ __und_usr: @ 1: ldrt r0, [r4] adr r9, ret_from_exception - adr lr, __und_usr_unknown + adr lr, fpundefinstr @ @ fallthrough to call_fpe @ @@ -476,9 +476,7 @@ __und_usr: * Emulators may wish to make use of the following registers: * r0 = instruction opcode. * r2 = PC+4 - * r9 = normal "successful" return address * r10 = this threads thread_info structure. - * lr = unrecognised instruction return address */ call_fpe: tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27 @@ -547,12 +545,10 @@ do_fpe: .data ENTRY(fp_enter) - .word no_fp + .word fpundefinstr .text -no_fp: mov pc, lr - -__und_usr_unknown: +fpundefinstr: mov r0, sp adr lr, ret_from_exception b do_undefinstr diff --git a/trunk/arch/arm/kernel/time.c b/trunk/arch/arm/kernel/time.c index 3c8cdcfe8d4a..6ff5e3ff6cb5 100644 --- a/trunk/arch/arm/kernel/time.c +++ b/trunk/arch/arm/kernel/time.c @@ -29,8 +29,6 @@ #include #include -#include - #include #include #include @@ -87,17 +85,6 @@ unsigned long long __attribute__((weak)) sched_clock(void) return (unsigned long long)jiffies * (1000000000 / HZ); } -/* - * An implementation of printk_clock() independent from - * sched_clock(). This avoids non-bootable kernels when - * printk_clock is enabled. - */ -unsigned long long printk_clock(void) -{ - return (unsigned long long)(jiffies - INITIAL_JIFFIES) * - (1000000000 / HZ); -} - static unsigned long next_rtc_update; /* diff --git a/trunk/arch/arm/kernel/traps.c b/trunk/arch/arm/kernel/traps.c index 908915675edc..042a12982e98 100644 --- a/trunk/arch/arm/kernel/traps.c +++ b/trunk/arch/arm/kernel/traps.c @@ -27,7 +27,6 @@ #include #include #include -#include #include "ptrace.h" #include "signal.h" diff --git a/trunk/arch/arm/mm/flush.c b/trunk/arch/arm/mm/flush.c index 9df507d36e0b..628348c9f6c5 100644 --- a/trunk/arch/arm/mm/flush.c +++ b/trunk/arch/arm/mm/flush.c @@ -202,42 +202,3 @@ void flush_dcache_page(struct page *page) } } EXPORT_SYMBOL(flush_dcache_page); - -/* - * Flush an anonymous page so that users of get_user_pages() - * can safely access the data. The expected sequence is: - * - * get_user_pages() - * -> flush_anon_page - * memcpy() to/from page - * if written to page, flush_dcache_page() - */ -void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) -{ - unsigned long pfn; - - /* VIPT non-aliasing caches need do nothing */ - if (cache_is_vipt_nonaliasing()) - return; - - /* - * Write back and invalidate userspace mapping. - */ - pfn = page_to_pfn(page); - if (cache_is_vivt()) { - flush_cache_page(vma, vmaddr, pfn); - } else { - /* - * For aliasing VIPT, we can flush an alias of the - * userspace address only. - */ - flush_pfn_alias(pfn, vmaddr); - } - - /* - * Invalidate kernel mapping. No data should be contained - * in this mapping of the page. FIXME: this is overkill - * since we actually ask for a write-back and invalidate. - */ - __cpuc_flush_dcache_page(page_address(page)); -} diff --git a/trunk/arch/mips/mips-boards/malta/malta_mtd.c b/trunk/arch/mips/mips-boards/malta/malta_mtd.c new file mode 100644 index 000000000000..8ad9bdf25dce --- /dev/null +++ b/trunk/arch/mips/mips-boards/malta/malta_mtd.c @@ -0,0 +1,63 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2006 MIPS Technologies, Inc. + * written by Ralf Baechle + */ + +#include +#include +#include +#include +#include + +static struct mtd_partition malta_mtd_partitions[] = { + { + .name = "YAMON", + .offset = 0x0, + .size = 0x100000, + .mask_flags = MTD_WRITEABLE + }, { + .name = "User FS", + .offset = 0x100000, + .size = 0x2e0000 + }, { + .name = "Board Config", + .offset = 0x3e0000, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE + } +}; + +static struct physmap_flash_data malta_flash_data = { + .width = 4, + .nr_parts = ARRAY_SIZE(malta_mtd_partitions), + .parts = malta_mtd_partitions +}; + +static struct resource malta_flash_resource = { + .start = 0x1e000000, + .end = 0x1e3fffff, + .flags = IORESOURCE_MEM +}; + +static struct platform_device malta_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &malta_flash_data, + }, + .num_resources = 1, + .resource = &malta_flash_resource, +}; + +static int __init malta_mtd_init(void) +{ + platform_device_register(&malta_flash); + + return 0; +} + +module_init(malta_mtd_init) diff --git a/trunk/arch/x86_64/kernel/early-quirks.c b/trunk/arch/x86_64/kernel/early-quirks.c index 49802f1bee94..829698f6d049 100644 --- a/trunk/arch/x86_64/kernel/early-quirks.c +++ b/trunk/arch/x86_64/kernel/early-quirks.c @@ -69,11 +69,6 @@ static void nvidia_bugs(void) static void ati_bugs(void) { - if (timer_over_8254 == 1) { - timer_over_8254 = 0; - printk(KERN_INFO - "ATI board detected. Disabling timer routing over 8254.\n"); - } } static void intel_bugs(void) diff --git a/trunk/arch/x86_64/kernel/io_apic.c b/trunk/arch/x86_64/kernel/io_apic.c index d7bad90a5ad8..2a1dcd5f69c2 100644 --- a/trunk/arch/x86_64/kernel/io_apic.c +++ b/trunk/arch/x86_64/kernel/io_apic.c @@ -55,10 +55,6 @@ int sis_apic_bug; /* not actually supported, dummy for compile */ static int no_timer_check; -static int disable_timer_pin_1 __initdata; - -int timer_over_8254 __initdata = 1; - /* Where if anywhere is the i8259 connect in external int mode */ static struct { int pin, apic; } ioapic_i8259 = { -1, -1 }; @@ -354,29 +350,6 @@ static int __init disable_ioapic_setup(char *str) } early_param("noapic", disable_ioapic_setup); -/* Actually the next is obsolete, but keep it for paranoid reasons -AK */ -static int __init disable_timer_pin_setup(char *arg) -{ - disable_timer_pin_1 = 1; - return 1; -} -__setup("disable_timer_pin_1", disable_timer_pin_setup); - -static int __init setup_disable_8254_timer(char *s) -{ - timer_over_8254 = -1; - return 1; -} -static int __init setup_enable_8254_timer(char *s) -{ - timer_over_8254 = 2; - return 1; -} - -__setup("disable_8254_timer", setup_disable_8254_timer); -__setup("enable_8254_timer", setup_enable_8254_timer); - - /* * Find the IRQ entry number of a certain pin. */ @@ -1595,10 +1568,33 @@ static inline void unlock_ExtINT_logic(void) * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ * is so screwy. Thanks to Brian Perkins for testing/hacking this beast * fanatically on his truly buggy board. - * - * FIXME: really need to revamp this for modern platforms only. */ -static inline void check_timer(void) + +static int try_apic_pin(int apic, int pin, char *msg) +{ + apic_printk(APIC_VERBOSE, KERN_INFO + "..TIMER: trying IO-APIC=%d PIN=%d %s", + apic, pin, msg); + + /* + * Ok, does IRQ0 through the IOAPIC work? + */ + if (!no_timer_check && timer_irq_works()) { + nmi_watchdog_default(); + if (nmi_watchdog == NMI_IO_APIC) { + disable_8259A_irq(0); + setup_nmi(); + enable_8259A_irq(0); + } + return 1; + } + clear_IO_APIC_pin(apic, pin); + apic_printk(APIC_QUIET, KERN_ERR " .. failed\n"); + return 0; +} + +/* The function from hell */ +static void check_timer(void) { int apic1, pin1, apic2, pin2; int vector; @@ -1619,61 +1615,43 @@ static inline void check_timer(void) */ apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); init_8259A(1); - if (timer_over_8254 > 0) - enable_8259A_irq(0); pin1 = find_isa_irq_pin(0, mp_INT); apic1 = find_isa_irq_apic(0, mp_INT); pin2 = ioapic_i8259.pin; apic2 = ioapic_i8259.apic; - apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n", - vector, apic1, pin1, apic2, pin2); + /* Do this first, otherwise we get double interrupts on ATI boards */ + if ((pin1 != -1) && try_apic_pin(apic1, pin1,"with 8259 IRQ0 disabled")) + return; - if (pin1 != -1) { - /* - * Ok, does IRQ0 through the IOAPIC work? - */ - unmask_IO_APIC_irq(0); - if (!no_timer_check && timer_irq_works()) { - nmi_watchdog_default(); - if (nmi_watchdog == NMI_IO_APIC) { - disable_8259A_irq(0); - setup_nmi(); - enable_8259A_irq(0); - } - if (disable_timer_pin_1 > 0) - clear_IO_APIC_pin(0, pin1); - return; - } - clear_IO_APIC_pin(apic1, pin1); - apic_printk(APIC_QUIET,KERN_ERR "..MP-BIOS bug: 8254 timer not " - "connected to IO-APIC\n"); - } + /* Now try again with IRQ0 8259A enabled. + Assumes timer is on IO-APIC 0 ?!? */ + enable_8259A_irq(0); + unmask_IO_APIC_irq(0); + if (try_apic_pin(apic1, pin1, "with 8259 IRQ0 enabled")) + return; + disable_8259A_irq(0); - apic_printk(APIC_VERBOSE,KERN_INFO "...trying to set up timer (IRQ0) " - "through the 8259A ... "); + /* Always try pin0 and pin2 on APIC 0 to handle buggy timer overrides + on Nvidia boards */ + if (!(apic1 == 0 && pin1 == 0) && + try_apic_pin(0, 0, "fallback with 8259 IRQ0 disabled")) + return; + if (!(apic1 == 0 && pin1 == 2) && + try_apic_pin(0, 2, "fallback with 8259 IRQ0 disabled")) + return; + + /* Then try pure 8259A routing on the 8259 as reported by BIOS*/ + enable_8259A_irq(0); if (pin2 != -1) { - apic_printk(APIC_VERBOSE,"\n..... (found apic %d pin %d) ...", - apic2, pin2); - /* - * legacy devices should be connected to IO APIC #0 - */ setup_ExtINT_IRQ0_pin(apic2, pin2, vector); - if (timer_irq_works()) { - apic_printk(APIC_VERBOSE," works.\n"); - nmi_watchdog_default(); - if (nmi_watchdog == NMI_IO_APIC) { - setup_nmi(); - } + if (try_apic_pin(apic2,pin2,"8259A broadcast ExtINT from BIOS")) return; - } - /* - * Cleanup, just in case ... - */ - clear_IO_APIC_pin(apic2, pin2); } - apic_printk(APIC_VERBOSE," failed.\n"); + + /* Tried all possibilities to go through the IO-APIC. Now come the + really cheesy fallbacks. */ if (nmi_watchdog == NMI_IO_APIC) { printk(KERN_WARNING "timer doesn't work through the IO-APIC - disabling NMI Watchdog!\n"); diff --git a/trunk/drivers/mmc/mmci.c b/trunk/drivers/mmc/mmci.c index ccfe6561be24..e9b80e920266 100644 --- a/trunk/drivers/mmc/mmci.c +++ b/trunk/drivers/mmc/mmci.c @@ -42,8 +42,6 @@ mmci_request_end(struct mmci_host *host, struct mmc_request *mrq) { writel(0, host->base + MMCICOMMAND); - BUG_ON(host->data); - host->mrq = NULL; host->cmd = NULL; @@ -200,8 +198,6 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, } if (!cmd->data || cmd->error != MMC_ERR_NONE) { - if (host->data) - mmci_stop_data(host); mmci_request_end(host, cmd->mrq); } else if (!(cmd->data->flags & MMC_DATA_READ)) { mmci_start_data(host, cmd->data); diff --git a/trunk/include/asm-arm/arch-iop32x/iop32x.h b/trunk/include/asm-arm/arch-iop32x/iop32x.h index 2e9469047eb1..4bbd85f3ed2a 100644 --- a/trunk/include/asm-arm/arch-iop32x/iop32x.h +++ b/trunk/include/asm-arm/arch-iop32x/iop32x.h @@ -19,7 +19,7 @@ * Peripherals that are shared between the iop32x and iop33x but * located at different addresses. */ -#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg)) +#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c0 + (reg)) #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) #include diff --git a/trunk/include/asm-arm/cacheflush.h b/trunk/include/asm-arm/cacheflush.h index 5f531ea03059..d51049522cd0 100644 --- a/trunk/include/asm-arm/cacheflush.h +++ b/trunk/include/asm-arm/cacheflush.h @@ -357,16 +357,6 @@ extern void flush_dcache_page(struct page *); extern void __flush_dcache_page(struct address_space *mapping, struct page *page); -#define ARCH_HAS_FLUSH_ANON_PAGE -static inline void flush_anon_page(struct vm_area_struct *vma, - struct page *page, unsigned long vmaddr) -{ - extern void __flush_anon_page(struct vm_area_struct *vma, - struct page *, unsigned long); - if (PageAnon(page)) - __flush_anon_page(vma, page, vmaddr); -} - #define flush_dcache_mmap_lock(mapping) \ write_lock_irq(&(mapping)->tree_lock) #define flush_dcache_mmap_unlock(mapping) \ diff --git a/trunk/include/asm-arm/hardware/iop3xx.h b/trunk/include/asm-arm/hardware/iop3xx.h index 13ac8a4cd01f..1018a7486ab7 100644 --- a/trunk/include/asm-arm/hardware/iop3xx.h +++ b/trunk/include/asm-arm/hardware/iop3xx.h @@ -168,9 +168,9 @@ extern void gpio_line_set(int line, int value); #define IOP3XX_PERCR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0710) /* General Purpose I/O */ -#define IOP3XX_GPOE (volatile u32 *)IOP3XX_GPIO_REG(0x0000) -#define IOP3XX_GPID (volatile u32 *)IOP3XX_GPIO_REG(0x0004) -#define IOP3XX_GPOD (volatile u32 *)IOP3XX_GPIO_REG(0x0008) +#define IOP3XX_GPOE (volatile u32 *)IOP3XX_GPIO_REG(0x0004) +#define IOP3XX_GPID (volatile u32 *)IOP3XX_GPIO_REG(0x0008) +#define IOP3XX_GPOD (volatile u32 *)IOP3XX_GPIO_REG(0x000c) /* Timers */ #define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000) diff --git a/trunk/include/asm-parisc/cacheflush.h b/trunk/include/asm-parisc/cacheflush.h index a799dd8ef395..aedb0512cb04 100644 --- a/trunk/include/asm-parisc/cacheflush.h +++ b/trunk/include/asm-parisc/cacheflush.h @@ -186,7 +186,7 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long } static inline void -flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) +flush_anon_page(struct page *page, unsigned long vmaddr) { if (PageAnon(page)) flush_user_dcache_page(vmaddr); diff --git a/trunk/include/linux/highmem.h b/trunk/include/linux/highmem.h index 645d440807c2..ca9a602cffd7 100644 --- a/trunk/include/linux/highmem.h +++ b/trunk/include/linux/highmem.h @@ -8,7 +8,7 @@ #include #ifndef ARCH_HAS_FLUSH_ANON_PAGE -static inline void flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) +static inline void flush_anon_page(struct page *page, unsigned long vmaddr) { } #endif diff --git a/trunk/mm/memory.c b/trunk/mm/memory.c index af227d26e104..563792f4f687 100644 --- a/trunk/mm/memory.c +++ b/trunk/mm/memory.c @@ -1091,7 +1091,7 @@ int get_user_pages(struct task_struct *tsk, struct mm_struct *mm, if (pages) { pages[i] = page; - flush_anon_page(vma, page, start); + flush_anon_page(page, start); flush_dcache_page(page); } if (vmas)